Method for acquiring compensation CD (Compact Disc) deviation of mask, mask and etching pattern
By measuring and compensating for CD deviation on the ion implantation layer, the problems of photoresist critical linewidth CD offset and collapse were solved, improving the accuracy of the etched pattern and device performance.
Patent Information
- Application Number
- CN202511654792.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-12
- Publication Date
- 2026-01-23
AI Technical Summary
In the prior art, the photoresist critical linewidth CD shift and photoresist collapse caused by the change in the depth and flatness of the photoresist underlayer film affect the deformation and deviation between the etched pattern and the design pattern, resulting in a decrease in device performance.
By forming active and isolation regions on the ion implantation layer, measuring and establishing the deviation curves of the first and second distances, the CD deviation value of the target pattern is obtained and compensated into the mask design dimensions, thereby improving the accuracy of the photoresist critical linewidth CD.
It improves the photoresist collapse phenomenon and enhances the etching accuracy of the etched pattern and the device performance.
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Figure CN121386282A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and particularly to a method for obtaining mask compensation CD deviation, a mask, and an etched pattern. Background Art
[0002] In the prior art, the correction of the pattern by using OPC is based on an ideal underlying substrate. However, in an actual wafer, when the film depth and the film flatness of the underlying photoresist change drastically, it may cause the critical dimension CD of the photoresist to shift, and even the phenomenon of photoresist collapse may occur.
[0003] Refer Figure 1 as shown Figure 1 is a schematic structural diagram of an etched pattern formed by a photoresist on the same film. Among them, 10 - wafer; 20 - film; 30 - photoresist. In Figure 1 as shown, a film 20 is formed on the surface of the wafer 10, and a photoresist 30 is coated on the surface of the film 20. By performing photolithography and development on the photoresist 30, the etched pattern can be transferred to the film 20. However, due to the diffraction effect of light, when light passes through the mask, the resolution at the edge of the exposed pattern is low, and the pattern edge distortion is serious, so that the etched pattern is deformed and deviated from the designed pattern due to exposure. After the actual product is exposed through the mask, the phenomenon of photoresist collapse will occur.
[0004] It should be noted that the information disclosed in the background art part of this invention is only intended to deepen the understanding of the general background art of this invention, and should not be regarded as an admission or any form of suggestion that this information constitutes the prior art known to those skilled in the art. Summary of the Invention
[0005] The purpose of the present invention is to provide a method for obtaining mask compensation CD deviation, a mask, and an etched pattern, so as to solve the problems that the etched pattern is deformed and deviated from the designed pattern due to exposure, and the phenomenon of photoresist collapse will occur after the actual product is exposed through the mask.
[0006] To solve the above technical problems, the present invention provides a method for obtaining mask compensation CD deviation, including:
[0007] Providing an ion implantation layer, the surface of the ion implantation layer has an active region and an isolation region, defining the minimum distance between the edge of the active region and the edge of the ion implantation layer as the first distance, and defining the distance that the ion implantation layer extends outward from the edge of the active region as the second distance;
[0008] Taking the first distance and the second distance as variables, forming test patterns in the active region and the isolation region respectively, and obtaining the actual measured values and target values of the first distance and the second distance in the test patterns, so as to obtain the deviation of the first distance and the second distance;
[0009] Based on the actual measurement values of the first distance and the second distance and the deviation, a curve of the deviation of the test pattern varying with the first distance and the second distance is established;
[0010] Actual measurement values of the first distance and the second distance of the target pattern in the active area and the isolation area are obtained;
[0011] Based on the curve of the variation and the actual measurement values of the first distance and the second distance of the target pattern, a CD deviation value of the mask for the target pattern is obtained.
[0012] Preferably, the pattern on the mask is transferred to the active area and the isolation area by a photolithography and etching process to form the test pattern.
[0013] Preferably, the deviation of the first distance is the difference between the actual measurement value and the target value of the first distance, and the deviation of the second distance is the difference between the actual measurement value and the target value of the second distance.
[0014] Preferably, the test pattern is symmetrically distributed.
[0015] Preferably, the target values of the first distance and the second distance are determined according to the parameters of the design of the product.
[0016] Preferably, the isolation area is a shallow trench isolation.
[0017] Preferably, the material of the active area includes silicon, the material filled in the isolation area includes silicon dioxide, and the ions implanted in the ion implantation layer include boron ions and phosphorus ions.
[0018] Preferably, the target pattern includes a polysilicon layer.
[0019] Based on the same inventive idea, the application further provides a mask, comprising:
[0020] The CD deviation value of the target pattern is obtained by using the method described above, and the CD value of the actual mask for forming the target pattern is the sum of the CD deviation value of the mask and the CD target value of the mask.
[0021] Based on the same inventive idea, the application further provides an etching pattern, comprising:
[0022] The etching pattern is formed in the active area and the isolation area of the ion implantation layer by using the mask described above through exposure and development.
[0023] Compared with the prior art, the method for obtaining the mask compensation CD deviation has the following advantages:
[0024] The present application can obtain the deviation of the first distance and the second distance of the target pattern by establishing different test patterns, establishing the curve of the deviation of the different test patterns with the change of the first distance and the second distance, and obtaining the actual measurement value of the first distance and the second distance of the target pattern. By compensating the offset to the design size of the actual mask, the accuracy of the critical line width CD of the photoresist can be improved, and the phenomenon of photoresist collapse can be improved after the mask is exposed in the actual product.
[0025] The mask and the etching pattern provided by the present application belong to the same inventive concept as the method for obtaining the CD deviation compensation of the mask provided by the present application, and therefore, the mask and the etching pattern provided by the present application have at least all the advantages of the method for obtaining the CD deviation compensation of the mask provided by the present application. The mask provided by the present application can improve the accuracy of the critical line width CD of the photoresist and improve the phenomenon of photoresist collapse. The etching pattern provided by the present application can improve the etching precision of the etching pattern and improve the performance of the device due to the above-mentioned mask which can improve the accuracy of the critical line width CD of the photoresist and improve the phenomenon of photoresist collapse. BRIEF DESCRIPTION OF DRAWINGS
[0026] Figure 1 is a structure schematic diagram of forming an etching pattern by the photoresist in the same kind of film;
[0027] Figure 2 is a structure schematic diagram of the surface of the ion implantation layer having different substrates in an embodiment of the present application;
[0028] Figure 3 is a structure schematic diagram of forming an etching pattern on the surface of different substrates in an embodiment of the present application;
[0029] Figure 4 is a flow chart of the method for obtaining the CD deviation compensation of the mask in an embodiment of the present application;
[0030] Figure 5 is a structure schematic diagram of forming a photoresist pattern on the surface of a silicon substrate in an embodiment of the present application;
[0031] Figure 6 is Figure 5 a schematic diagram of a test pattern formed by photolithography on the structure in
[0032] Figure 7 is a structure schematic diagram of forming a photoresist pattern on the surface of an isolation region substrate in an embodiment of the present application;
[0033] Figure 8 is Figure 7 a schematic diagram of a test pattern formed by photolithography on the structure in
[0034] Figure 9is a structural schematic diagram of forming a photoresist pattern on the surface of a silicon substrate in another embodiment of the present application;
[0035] Figure 10 is Figure 9 is a structural schematic diagram of forming a photoresist pattern on the surface of a silicon substrate in another embodiment of the present application;
[0036] Figure 11 is a structural schematic diagram of forming a photoresist pattern on the surface of a silicon substrate in another embodiment of the present application;
[0037] Figure 12 is Figure 11 is a structural schematic diagram of forming a photoresist pattern on the surface of a silicon substrate in another embodiment of the present application;
[0038] Figure 13 is a curve of CD deviation versus ENC in an embodiment of the present application;
[0039] in the figure,
[0040] 10 - wafer; 20 - thin film;
[0041] 30 - photoresist; 100 - ion implantation layer;
[0042] 110 - active region; 120 - STI isolation region;
[0043] 130 - first photoresist pattern; 140 - polysilicon layer;
[0044] 150 - second photoresist pattern. DETAILED DESCRIPTION
[0045] To make the objects, advantages and features of the present application more clear, the method for obtaining mask compensation CD deviation, mask and etching pattern proposed by the present application are further described in detail below in combination with the drawings and specific embodiments. It should be noted that the drawings are very simplified and all use non-precise proportions, only to facilitate and clearly assist the purpose of explaining the embodiments of the present application. It should be understood that the drawings of the specification do not necessarily show the specific structure of the present application in proportion, and the illustrative features used to explain some principles of the present application in the drawings will also be slightly simplified. The specific design features of the present application disclosed herein include, for example, specific dimensions, directions, positions and shapes, which will be determined in part by the specific application and use environment to be applied and used. In the following described embodiments, sometimes the same reference signs are used to represent the same parts or parts with the same function between different drawings to omit the repeated description. In this specification, similar signs and letters are used to represent similar items, so once an item is defined in one drawing, it does not need to be further discussed in the subsequent drawings.
[0046] In addition, the terms "first", "second", "third", etc. are used herein only to describe different instances, and are not used to denote or imply relative importance or a number of indications of the technical features indicated. Thus, the technical features defined with "first", "second", etc. can explicitly or implicitly include at least one of the technical features. In the description of the present application, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified.
[0047] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present description, the illustrative description of the above terms is not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable manner in any one or more embodiments or examples. In addition, different embodiments or examples described in the present description and the features of different embodiments or examples can be combined and combined by those skilled in the art without contradiction.
[0048] Referring to Figure 2 and Figure 3 As shown, the base layer formed on the surface of the ion implantation layer 100 includes a silicon base formed of a silicon material and an STI base formed of an insulating material. Due to the environment in which the photoresist is located during etching, such as a non-flat or non-uniform underlying substrate, the critical line width (CD value) of the mask design and the distance (space) value between two adjacent patterns are different on the silicon base and the STI base. The pattern formed by the photoresist 30 on the silicon base and the STI base is as shown in FIG. 2. Figure 3 Therefore, after the actual product is exposed through the mask, there is a deviation in the critical line width of the photoresist, causing a deformation and a deviation between the etching pattern and the design pattern due to exposure. After the actual product is exposed through the mask, the phenomenon of photoresist collapse occurs, affecting the performance of the device.
[0049] The core idea of the present application is to provide a method for obtaining mask compensation CD deviation, by obtaining the offset of the mask in different application environments, and compensating the offset to the design size of the actual mask. After the actual product is exposed through the mask, the accuracy of the critical line width CD of the photoresist can be improved, and the phenomenon of photoresist collapse can be improved.
[0050] To achieve the above idea, the present application provides a method for obtaining mask compensation CD deviation, referring to Figures 4 to 13 A specific embodiment of the method for obtaining mask compensation CD deviation is disclosed. The method for obtaining mask compensation CD deviation includes the following steps S1 to S5.
[0051] Step S1: providing an ion implantation layer 100, a surface of the ion implantation layer 100 has an active region 110 and an isolation region, a minimum distance from an edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a first distance, and a distance from the edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a second distance.
[0052] Specifically, referring to FIG. 1, an ion implantation layer 100 is provided, a surface of the ion implantation layer 100 has an active region 110 and an isolation region. Figures 4 to 12 As shown, the surface of the ion implantation layer 100 forms the active region 110 and the isolation region. The isolation region is a shallow trench isolation (STI), that is, an STI isolation region 120. The material of the active region 110 includes silicon, the material filled in the STI isolation region 120 includes silicon dioxide, and the ion implanted in the ion implantation layer 100 includes one or any combination of boron ions and phosphorus ions.
[0053] In the test pattern, a minimum distance from an edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a first distance (i.e., enc in FIG. 1), and a distance from the edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a second distance (i.e., ext in FIG. 1). Figure 6 and Figure 8 In the test pattern, a minimum distance from an edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a first distance (i.e., enc in FIG. 1), and a distance from the edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a second distance (i.e., ext in FIG. 1). Figure 10 and Figure 12 In the test pattern, a minimum distance from an edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a first distance (i.e., enc in FIG. 1), and a distance from the edge of the active region 110 to an edge of the ion implantation layer 100 is defined as a second distance (i.e., ext in FIG. 1).
[0054] The first distance is an enclosure (enc) of the active region 110 to the ion implantation layer 100, that is, a minimum distance from an edge of the active region 110 to an edge of the ion implantation layer 100. The ion implantation layer 100 is covered by the active region 110 to ensure that the ion implantation layer 100 is completely located within the active region 110, prevent the ion implantation layer 100 from directly contacting the STI isolation region 120, reduce the risk of leakage, and improve the reliability and yield of the device.
[0055] The second distance represents an extension (ext) of the ion implantation layer 100 from the edge of the active region 110. It describes the part of the ion implantation layer 100 beyond the boundary of the active region 110, which is used to ensure that there is enough overlap between the ion implantation layer 100 and the STI isolation region 120 to avoid leakage or isolation failure.
[0056] Step S2: forming test patterns in the active region 110 and the isolation region respectively with the first distance and the second distance as variables, and obtaining actual measurement values and target values of the first distance and the second distance in the test patterns to obtain deviations of the first distance and the second distance.
[0057] Specifically, referring to FIG. 1, an ion implantation layer 100 is provided, a surface of the ion implantation layer 100 has an active region 110 and an isolation region. Figures 4 to 12As shown, the active region 110 serves as a silicon substrate, on which test patterns, such as the first photoresist pattern 130, are formed. A photolithography process is used to transfer the pattern designed on the photomask to the photoresist layer, forming a pattern as shown. Figure 5 The first photoresist pattern 130 is shown. Then, the first photoresist pattern 130 is transferred to the ion implantation layer 100 by an etching process, forming a polysilicon layer 140 in the active region 110. The polysilicon layer 140 is formed in the active region 110 through the same etching step.
[0058] The photolithography process is used to transfer the pattern designed on the photomask to the photoresist layer, forming a shape like... Figure 7 The second photoresist pattern 150 is shown. Then, the second photoresist pattern 150 is transferred to the ion implantation layer 100 by an etching process, forming the designed pattern in the STI isolation region 120, thereby forming the pattern shown. Figure 8 The structure shown.
[0059] To facilitate measurement of the test patterns, the test patterns are symmetrically distributed.
[0060] Next, change the first and second distances and repeat the above method to form a test pattern.
[0061] The actual measured values of the first and second distances in the test pattern are obtained using a measuring instrument. Next, based on the product design parameters, the design values of the first and second distances are determined. These design values are the target values for the first and second distances. That is, the target values of the first and second distances are determined according to the product design parameters. Finally, the difference between the actual measured value of the first distance and the target value is the deviation of the first distance. The difference between the reagent measured value of the second distance and the target value is the deviation of the second distance.
[0062] It should be noted that the participants Figure 6 and Figure 8 As shown, the first distance includes both the environment in which the design pattern is formed on the active region 110 (i.e., the silicon substrate) and the environment in which the design pattern is formed on the STI isolation region 120 (STI substrate). (See reference...) Figure 10 and Figure 12 As shown, the second distance includes both the environment in which the design pattern is formed in the active region 110 (i.e., the silicon substrate) and the environment in which the design pattern is formed in the STI isolation region 120 (STI substrate).
[0063] Step S3: Based on the actual measured values and deviations of the first and second distances, establish a curve showing how the deviation of the test pattern changes with the first and second distances.
[0064] Specifically, refer to Figures 4 to 13As shown, based on the actual measured values and deviations of the first and second distances, a curve showing the deviation of the test pattern changing with the first and second distances is obtained. Taking the first distance as the variable, the curve showing the deviation of the test pattern changing with the first distance is formed as follows. Figure 13 The curve shown. From Figure 13 It can be seen that when the test pattern is formed on the active region 110 (i.e., the silicon substrate) and the STI isolation region 120 (i.e., the STI substrate), the CD deviation of the test pattern changes with the first distance (enc) as follows: Figure 13 As shown. When the test pattern is located on a silicon substrate, the CD offset gradually decreases as the first distance increases. When the test pattern is located on an STI substrate, the CD offset gradually increases as the first distance increases.
[0065] Step S4: Obtain the actual measured values of the first and second distances of the target image in the active region 110 and the isolation region.
[0066] Specifically, refer to Figures 4 to 12 As shown, in order to obtain the CD deviation of the mask of the target pattern, the design pattern of the target pattern is first formed in the active region 110 and the STI isolation region 120, respectively. Then, the actual measured values of the first distance and the second distance of the target pattern are obtained by a measuring instrument.
[0067] Step S5: Based on the changing curve and the actual measured values of the first and second distances of the target graphic, obtain the CD deviation value of the mask of the target graphic.
[0068] Specifically, refer to Figures 4 to 13 As shown, based on the acquired variation curve and the actual measured values of the first and second distances of the target pattern obtained by the measuring instrument, the CD deviation of the target pattern on different substrate layers (e.g., silicon substrate, STI substrate) can be directly obtained from the variation curve. Then, the CD value of the actual mask forming the target pattern is the sum of the mask's CD deviation value and the mask's target CD value. The target pattern is the pattern formed in the active region 110 and the STI isolation region 120, for example, it can be the polysilicon layer 140 disclosed in this paper, or the gate oxide layer, etc.
[0069] To achieve the above idea, this embodiment also discloses a photomask, including:
[0070] If the CD deviation value of the target pattern is obtained by using the method described above, then the CD value of the actual mask used to form the target pattern is the sum of the CD deviation value of the mask and the CD target value of the mask.
[0071] The mask provided by the embodiment and the method for obtaining the mask to compensate the CD deviation provided by the embodiment belong to the same inventive concept, and therefore the mask provided by the embodiment has at least all the advantages of the method for obtaining the mask to compensate the CD deviation provided by the embodiment, can improve the accuracy of the critical line width CD of the photoresist, and improve the phenomenon of photoresist collapse.
[0072] To realize the above idea, the embodiment further discloses an etching pattern, comprising:
[0073] The mask is used for exposure and development to form the etching pattern in the active region and the isolation region of the ion implantation layer.
[0074] The etching pattern provided by the embodiment and the method for obtaining the mask to compensate the CD deviation provided by the embodiment belong to the same inventive concept, and therefore the etching pattern provided by the embodiment has at least all the advantages of the method for obtaining the mask to compensate the CD deviation provided by the embodiment. Since the mask can improve the accuracy of the critical line width CD of the photoresist and improve the phenomenon of photoresist collapse, the etching precision of the etching pattern can be improved, and the performance of the device can be improved.
[0075] In summary, the above embodiments describe different configurations of the method for obtaining the mask to compensate the CD deviation, the mask and the etching pattern in detail. Of course, the above description is only a description of the preferred embodiments of the present application, and does not limit the scope of the present application in any way. The present application includes but is not limited to the configurations listed in the above embodiments. Those skilled in the art can easily deduce other configurations from the above embodiments. Any modification or change made by those skilled in the art according to the above disclosure is within the protection scope of the claims.
Claims
1. A method for obtaining a mask compensation CD bias, characterized in that, The method comprises the following steps: providing an ion implantation layer, a surface of the ion implantation layer having an active region and an isolation region, a minimum distance from an edge of the active region to an edge of the ion implantation layer being defined as a first distance, and a distance from the ion implantation layer extending outward from the edge of the active region being defined as a second distance; forming test patterns in the active region and the isolation region respectively with the first distance and the second distance as variables, and obtaining actual measurement values of the first distance and the second distance in the test patterns and target values to obtain deviations of the first distance and the second distance; based on the actual measurement values of the first distance and the second distance and the deviations, establishing a curve of the deviations of the test patterns changing with the first distance and the second distance; obtaining actual measurement values of the first distance and the second distance of a target pattern in the active region and the isolation region; based on the curve and the actual measurement values of the first distance and the second distance of the target pattern, obtaining a CD deviation value of a mask plate of the target pattern.
2. The method of claim 1, wherein, transferring patterns on the mask plate to the active region and the isolation region by using a photolithography and etching process to form the test patterns.
3. The method for obtaining a mask to compensate for CD deviation according to claim 1, characterized in that, The deviation of the first distance is a difference between the actual measurement value and the target value of the first distance, and the deviation of the second distance is a difference between the actual measurement value and the target value of the second distance.
4. The method of claim 1, wherein, The test patterns are symmetrically distributed.
5. The method of claim 1, wherein, The target values of the first distance and the second distance are determined according to parameters of a design of a product.
6. The method of claim 1, wherein, The isolation region is a shallow trench isolation.
7. The method for obtaining a mask to compensate for CD deviation according to claim 1, characterized in that, The material of the active region comprises silicon, the material filled in the isolation region comprises silicon dioxide, and the ions implanted by the ion implantation layer comprise one or both of boron ions and phosphorus ions.
8. The method of claim 1, wherein, The target pattern comprises a polysilicon layer.
9. A mask, characterized in that The method comprises the following steps: using the method according to any one of claims 1-8 to obtain a CD deviation value of a target pattern, and a CD value of an actual mask plate forming the target pattern being a sum of the CD deviation value of the mask plate and a CD target value of the mask plate.
10. An etching pattern, characterized by, The method comprises the following steps: using the mask plate according to claim 9 to form etching patterns in the active region and the isolation region of the ion implantation layer by exposure and development.