Segmentation method and device for complex circuit supporting partition constraint, equipment and medium

By parsing and clustering the circuit hypergraph file, the optimal node is automatically assigned to the target partition, which solves the problem of low efficiency in manually specifying partition constraints, achieves more efficient circuit segmentation, and improves the quality and stability of the segmentation results.

CN121389922APending Publication Date: 2026-01-23S2C
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Patent Information

Application Number
CN202511502494.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-21
Publication Date
2026-01-23

AI Technical Summary

Technical Problem

In existing technologies for large-scale circuit design, manually specifying partition constraints leads to high labor costs, low efficiency, and a high risk of errors. Furthermore, fixed partitioning strategies compress the solution space, making it difficult to balance resource utilization and net optimization, which may result in partitioning failure.

Method used

By parsing the circuit hypergraph file, node information is obtained and clustering is performed. The optimal node is selected based on multi-level filtering conditions, and the score value is calculated to automatically assign it to the target partition, avoiding the need for manual assignment of fixed partitions.

Benefits of technology

Reduce labor costs, avoid the uncertainty of manual operation, expand the solution space, improve the quality of segmentation results, enhance resource utilization and solution stability, and reduce the risk of segmentation failure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a segmentation method and device of a complex circuit supporting partition constraint, equipment and a medium. The method comprises the following steps: analyzing a hypergraph file of a to-be-segmented complex circuit to obtain node information of the hypergraph file; the node information comprises node resource usage amount, network connection information between nodes and node partition constraints; according to the node information and a node clustering condition, performing clustering processing on each node in the circuit hypergraph; according to a multi-stage screening condition, selecting an optimal node in sequence from the nodes after clustering processing; when an optimal node is determined each time, calculating a score value between the optimal node and each partition meeting the constraint condition, determining a target partition according to the score value, and dividing the optimal node into the target partition; and outputting a segmentation result of the complex circuit according to the partition where each node is located. By adopting the technical scheme, the solution space of circuit segmentation can be expanded on the premise of satisfying the constraint, and the dependence of manual intervention is reduced.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a partition constraint supporting complex circuit splitting method, device, equipment and medium. BACKGROUND

[0002] In the field of FPGA (Field-Programmable Gate Array) prototype verification, in order to realize hardware simulation and function verification of large-scale application specific integrated circuit design, it is often necessary to split the complete circuit into multiple sub-circuits and map them to a multi-FPGA system for processing. The partition allocation of circuit modules can generally be completed by using a hypergraph partitioning algorithm.

[0003] At present, for the scene where some circuit modules have partition constraints, the existing technical solution generally manually specifies a unique legal placement partition for each constrained module by engineers according to experience, and then performs subsequent hypergraph partitioning based on the fixed partition to ensure that the constrained module is only allocated to the preset partition, thereby avoiding verification failure due to resource mismatch.

[0004] However, manual specification of fixed partitions relies on engineers' deep understanding of circuit structure and FPGA resource distribution, and requires a large amount of manpower cost for preliminary analysis and adjustment. In particular, in large-scale circuit design, manual operation is low in efficiency and prone to errors due to experience bias. Moreover, even if there are multiple candidate legal partitions for the constrained module, the fixed partition strategy can only select one of them, which directly compresses the solution space of the hypergraph partitioning, resulting in that the partitioning result may not be able to balance resource utilization and cross-partition line network optimization, making it difficult to obtain a high-quality partitioning scheme, and even in some scenarios, the partitioning fails due to unbalanced resource allocation. SUMMARY

[0005] The present application provides a partition constraint supporting complex circuit splitting method, device, equipment and medium, which can expand the solution space of circuit splitting under the premise of meeting the constraints and reduce the dependence on manual intervention.

[0006] According to an aspect of the present application, a partition constraint supporting complex circuit splitting method is provided, comprising:

[0007] The hypergraph file of the complex circuit to be partitioned is parsed to obtain node information of the hypergraph file; wherein the node information includes node resource usage, line network connection information between nodes, and node partition constraints;

[0008] According to the node information and the node clustering condition, each node in the circuit hypergraph is subjected to clustering processing; wherein the nodes include single nodes that have not been clustered and aggregated nodes that have undergone at least one clustering;

[0009] According to the multi-level screening condition, optimal nodes are selected from the nodes after the clustering processing in sequence;

[0010] When the optimal node is determined, a score value between the optimal node and each partition meeting the constraint condition is calculated, and a target partition is determined according to the score value, so that the optimal node is divided into the target partition;

[0011] After the partition division of all nodes is completed, a cutting result of the complex circuit is output according to the partition where each node is located.

[0012] According to another aspect of the present application, a cutting device of a complex circuit supporting partition constraint is provided, comprising:

[0013] A node information acquisition module is configured to parse a hypergraph file of a complex circuit to be cut and acquire node information of the hypergraph file, wherein the node information includes node resource usage, connection information of a line network between nodes, and node partition constraint;

[0014] A node clustering processing module is configured to perform clustering processing on each node in the circuit hypergraph according to the node information and node clustering condition, wherein the node includes a single node that has not been clustered and an aggregated node that has been clustered at least once;

[0015] An optimal node selection module is configured to select optimal nodes from the nodes after the clustering processing in sequence according to the multi-level screening condition;

[0016] An optimal node partition module is configured to calculate a score value between the optimal node and each partition meeting the constraint condition when the optimal node is determined, and determine a target partition according to the score value, so that the optimal node is divided into the target partition;

[0017] A circuit cutting module is configured to output a cutting result of the complex circuit according to the partition where each node is located after the partition division of all nodes is completed.

[0018] According to another aspect of the present application, an electronic device is provided, comprising:

[0019] at least one processor; and

[0020] a memory connected with the at least one processor in communication; wherein,

[0021] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the cutting method of the complex circuit supporting partition constraint according to any one of the embodiments of the present application.

[0022] According to another aspect of the present application, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the partitioning method of a complex circuit supporting partition constraints according to any of the embodiments of the present application when executed.

[0023] The technical solution of the embodiment of the present application acquires node information of the hypergraph file of the complex circuit to be partitioned, clusters each node in the circuit hypergraph according to the node information and node clustering conditions, selects optimal nodes in turn from each node after clustering according to the multi-level screening conditions, calculates the score value between the optimal node and each partition meeting the constraint condition whenever the optimal node is determined, determines a target partition according to the score value, divides the optimal node into the target partition, and outputs the partitioning result of the complex circuit according to the partition where each node is located after the partitioning of all nodes is completed. In this way, the partitioning of the constrained node can be automatically completed without manually pre-specifying fixed partitions, the labor cost is greatly reduced, the uncertainty caused by manual operation is avoided, the problem that the solution space of hypergraph partitioning is compressed due to the fixed constrained module in a single partition is solved, the complete solution space is preserved, the partitioning scheme with higher resource utilization and fewer cross-partition lines is found under the premise of meeting the constraints, the quality of the partitioning result is significantly improved, the solving stability is improved, the problem of node placement is avoided due to the occupied partition resources, and the risk of partitioning failure is reduced.

[0024] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0026] Figure 1 is a flowchart of a partitioning method of a complex circuit supporting partition constraints according to an embodiment of the present application;

[0027] Figure 2 is a flowchart of another partitioning method of a complex circuit supporting partition constraints according to an embodiment of the present application;

[0028] Figure 3is a structural schematic diagram of a partition-constraint-supported complex circuit partitioning device according to an embodiment of the present application;

[0029] Figure 4 is a structural schematic diagram of an electronic device implementing a partition-constraint-supported complex circuit partitioning method according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to make the personnel in the technical field better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the protection scope of the present application.

[0031] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the terms thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device including a series of steps or units does not necessarily have to include only those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product, or device.

[0032] Embodiment One

[0033] Figure 1 A flowchart of a partition-constraint-supported complex circuit partitioning method according to an embodiment of the present application is provided. The embodiment can be applicable to the case of partitioning a complex circuit under the condition that the circuit module has partition constraints. The method can be executed by a partition-constraint-supported complex circuit partitioning device, which can be implemented in the form of hardware and / or software and generally can be configured in a computer or processor with data processing function. As shown in the figure, the method comprises: Figure 1

[0034] S110, parsing a hypergraph file of a complex circuit to be partitioned to obtain node information of the hypergraph file.

[0035] The node information includes node resource usage, connection information of a line network between nodes, and node partition constraints.

[0036] ​Optionally, the complex circuit can refer to a special integrated circuit design circuit which needs to be mapped to a multi-FPGA system, contains multiple functional modules, there is intensive signal interaction between the modules, and part of the modules are fixed in a specific FPGA partition due to hardware resource limitation.

[0037] Optionally, the hypergraph file is a data file for describing the structure of the complex circuit, the node resource usage can refer to the programming resource consumption value of each node, the line network connection information between the nodes can be used to reflect the signal interaction relationship between the circuit modules, and the node partition constraint is used to specify the specific partition where the node is allowed to be placed and the specific partition where the node is not allowed to be placed.

[0038] Optionally, when the circuit hypergraph is not clustered, the circuit hypergraph includes multiple single nodes.

[0039] It can be understood that one of the advantages of the present application compared with the prior art is that the specific placement area of each node with constraints does not need to be manually specified, but the partition constraint is directly written in the hypergraph file, that is, the specific placement area of the node can be automatically determined according to the partition constraint, and the node partition division is completed.

[0040] S120, according to the node information and the node clustering condition, the nodes in the circuit hypergraph are clustered.

[0041] Optionally, each node in the circuit hypergraph can represent a circuit module, and the line network connection between the nodes can reflect the signal interaction relationship between the modules. The division result needs to ensure that the programmable resources of each FPGA partition do not exceed the upper limit of hardware, while minimizing the number of cross-partition line networks to reduce signal delay and power consumption, and guarantee the stability and efficiency of the verification system.

[0042] Among them, the node includes a single node which is not clustered and an aggregated node which has occurred at least once clustering.

[0043] Optionally, the clustering process can refer to reducing the total number of nodes in the hypergraph by merging nodes under the premise of ensuring that the solution space is not excessively compressed, thereby shortening the subsequent partition calculation time, and avoiding the loss of feasible placement partitions of nodes due to merging.

[0044] Optionally, the node clustering can be two single nodes clustered into one aggregated node, two aggregated nodes clustered into one aggregated node, or one single node and one aggregated node clustered into one aggregated node.

[0045] Among them, according to the node information and the node clustering condition, the nodes in the circuit hypergraph are clustered, which can include:

[0046] According to the node information, the two target nodes with the highest connection degree in the circuit hypergraph are determined, and the resource usage and the total number of restricted placement partitions after clustering of the target nodes are determined.

[0047] determining whether the node clustering condition is met according to the resource usage of the target nodes after clustering and the total number of the restricted placement partitions;

[0048] If yes, the target nodes are clustered, and the degrees of connection of the related nodes are updated after clustering for use in the next round of clustering;

[0049] If no, the next group of target nodes is selected from the hypergraph file according to the node information, and the node clustering condition is determined again;

[0050] When the number of nodes in the circuit hypergraph is less than the preset node number threshold, the clustering process is stopped.

[0051] The node clustering condition includes:

[0052] the resource usage of the target nodes after clustering is less than a preset resource usage threshold; and

[0053] the total number of the restricted placement partitions of the target nodes after clustering is less than a target number value, wherein the target number value is determined according to a total partition number.

[0054] Optionally, the degree of connection can quantify the index of the close degree of signal interaction between two nodes, and the higher the degree of connection, the more the frequency or quantity of signal transmission between the two nodes.

[0055] Optionally, the resource usage of the target nodes after clustering is the sum of the resource usage of the two target nodes, and the resource usage threshold is an upper limit value set according to the maximum resource carrying capacity of a single partition, for example, 80%-90% of the total resource amount of the partition.

[0056] Optionally, the restricted placement partition is a specified partition to which the node is not allowed to be allocated, the total number of the restricted placement partitions is the number of the non-placing partitions corresponding to the aggregated node formed after the target nodes are clustered, and the restricted placement partition of the aggregated node is the union of the restricted placement partitions of the original two target nodes.

[0057] Optionally, the target number value is an upper limit of the restricted placement partition calculated based on the total partition number, for example, a preset percentage can be set, and the product of the preset percentage and the total partition number is taken as the target number value. When the preset percentage is 50%, the target number value is the product of 50% and the total partition number.

[0058] Optionally, the total partition number and the available resource amount of each partition can be obtained through a preloaded partition information description file. That is, after the hypergraph file of the complex circuit to be segmented is parsed, the total partition number and the available resource amount of each partition can also be obtained by parsing the partition information description file.

[0059] Optionally, all pairs of unclustered nodes in the hypergraph can be traversed first to obtain the connection degrees of each pair of nodes, and the pair of nodes with the highest connection degree is selected as the initial target nodes. If the target node pair does not meet the clustering condition, the next pair of nodes with the highest connection degree is selected in turn until a node pair that meets the condition is found or all node pairs are traversed.

[0060] Optionally, updating the connection degrees of the related nodes after clustering can include: obtaining the connection degrees of the aggregated node and other nodes, and taking the maximum value of the connection degrees of the original two target nodes and each node. For example, the connection degree of target node A and node C is 8, the connection degree of target node B and node C is 12, and the connection degree of aggregated node AB and node C is updated to 12.

[0061] Optionally, after the node clustering, the restricted placement partition of the aggregated node is the union of the restricted placement partitions of each single node that has been clustered, and the allowed placement partition of the aggregated node is the intersection of the allowed placement partitions of each single node that has been clustered.

[0062] S130, according to the multi-level filtering condition, sequentially selecting an optimal node from the nodes after clustering processing.

[0063] Optionally, according to the multi-level filtering condition, sequentially selecting an optimal node from the nodes after clustering processing can include:

[0064] determining the number of allowed placement partitions of each unpartitioned node, and determining the first node with the least number of allowed placement partitions to complete the first-level filtering;

[0065] determining the constraint type corresponding to each first node according to the allowed placement partition of each first node, and determining the second node with the highest resource tension degree according to the resource tension degree corresponding to each constraint type to complete the second-level filtering;

[0066] obtaining the connection degrees between each second node and each partitioned node, and determining the second node with the highest connection degree as the optimal node to complete the third-level filtering; wherein if there is only one unpartitioned node left in the filtering result after any level of filtering, the filtering is stopped, and the unpartitioned node left in the filtering result is determined as the optimal node.

[0067] Optionally, by setting the multi-level filtering method of the optimal node, it is possible to prioritize processing nodes with high placement risk and avoid such nodes from being unable to be placed due to resource occupation by other nodes, resulting in segmentation failure.

[0068] Optionally, the unpartitioned node is a node that has not been allocated to any partition; the partitioned node is a node that has been determined to be placed in a partition.

[0069] Optionally, the range of the candidate nodes is narrowed down by the multi-stage screening, and if only one candidate node is left after a stage of screening, the node is directly determined as the optimal node, and there is no need to enter the next stage of screening.

[0070] Optionally, the constraint type of each node can be determined according to the allowed placement partition of each node, and all nodes of the same constraint type have the same set of allowed placement partitions, that is, these nodes can only be allocated to the partitions in the set and cannot be placed in other partitions outside the set. For example, if nodes A, B and C are only allowed to be placed in partition 1 and partition 3, A, B and C belong to the same constraint type.

[0071] Optionally, the resource tension degree of the target constraint type is the total resource usage of all unpartitioned nodes of the target constraint type divided by the total resource of the allowed placement partition of the target constraint type. The higher the resource tension degree, the closer the total resource demand of the nodes of the type to the total resource upper limit of the allowed partition, and the greater the risk of resource shortage when placing subsequent nodes. By selecting the nodes with the greatest partition resource pressure in priority through the resource tension degree, it is possible to avoid the situation that the nodes of the type cannot be placed due to resource exhaustion, and to ensure the feasibility and efficiency of the hypergraph partitioning.

[0072] S140, whenever the optimal node is determined, the score value between the optimal node and each partition meeting the constraint condition is calculated, and the target partition is determined according to the score value, and the optimal node is divided into the target partition.

[0073] Wherein, whenever the optimal node is determined, the score value between the optimal node and each partition meeting the constraint condition is calculated, and the target partition is determined according to the score value, and the optimal node is divided into the target partition, which can include:

[0074] Whenever the optimal node is determined, the target allowed placement partition corresponding to the optimal node is obtained, and the average resource usage is calculated according to the number of the target allowed placement partition and the resource usage of the optimal node;

[0075] The remaining resource amount of each target allowed placement partition is obtained, and the estimated resource proportion is calculated according to the average resource usage and the remaining resource amount of each target allowed placement partition;

[0076] The connection degree between the optimal node and each target allowed placement partition is obtained, and the score value of each target allowed placement partition is calculated according to the connection degree between the optimal node and each target allowed placement partition and the estimated resource proportion;

[0077] The target allowed placement partition with the highest score value is determined as the target partition, and the optimal node is divided into the target partition.

[0078] Optionally, the target allowed placement partition is the allowed placement partition set of the optimal node.

[0079] Optionally, the average resource usage is a theoretical value of the optimal node resource usage evenly distributed to each target allowed placement partition. The average resource usage can be obtained by dividing the optimal node resource usage by the number of target allowed placement partitions.

[0080] Optionally, the remaining resource amount is the resource amount in the target allowed placement partition that has not been occupied by the placed nodes.

[0081] Optionally, the estimated resource proportion can be obtained by calculating the ratio of the average resource usage of the target allowed placement interval to the corresponding remaining resource amount of the target allowed placement interval.

[0082] Optionally, the sum of the connectivity between the optimal node and each placed node in the target allowed placement partition can be calculated, and the sum is used as the connectivity between the optimal node and each target allowed placement partition.

[0083] Optionally, the score value of the target allowed placement partition can be obtained by dividing the connectivity between the optimal node and the target allowed placement partition by the estimated resource proportion of the target allowed placement partition.

[0084] S150, after all nodes complete partitioning, output the cutting result of the complex circuit according to the partition in which each node is located.

[0085] Optionally, the cutting result can refer to a circuit module allocation list output in units of partitions, which includes nodes in each partition, total node resource consumption, and node connection relationship, to ensure that the resource consumption of each partition does not exceed the upper limit of the partition resource, and all nodes meet the partition constraints.

[0086] Optionally, after determining the optimal node, calculating the score value between the optimal node and each partition that meets the constraint condition, and determining the target partition according to the score value, the optimal node is divided into the target partition, the method can further include:

[0087] updating the connectivity between the placed nodes and the unplaced nodes and the resource tightness of each constraint type for use in the next selection of the optimal node.

[0088] The technical scheme of the embodiment of the present application analyzes the hypergraph file of the complex circuit to be segmented, obtains node information of the hypergraph file, clusters each node in the circuit hypergraph according to the node information and node clustering conditions, selects optimal nodes in each node after clustering processing in turn according to multi-level screening conditions, calculates the score value between the optimal node and each partition meeting the constraint condition whenever the optimal node is determined, and determines a target partition according to the score value, and divides the optimal node into the target partition. After the partition division of all nodes is completed, the partitioning result of the complex circuit is output according to the partition where each node is located. In this way, the fixed partition can be automatically completed without manual pre-specification, the partition allocation of the constrained node can be automatically completed, the labor cost is greatly reduced, the uncertainty caused by manual operation is avoided, the problem that the constrained module is fixed in a single partition in the prior art, which causes the solution space of the hypergraph segmentation to be compressed, is solved, the complete solution space can be reserved, the partitioning scheme with higher resource utilization and fewer cross-partition line networks can be found under the premise of meeting the constraints, the quality of the partitioning result is significantly improved, the solving stability is improved, the problem of node placement caused by the occupied partition resource is avoided, and the risk of partitioning failure is reduced.

[0089] Embodiment two

[0090] Figure 2 A flowchart of a partitioning method for a complex circuit supporting partition constraints is provided for the second embodiment of the present application. Based on the above-mentioned embodiment, the partitioning method for a complex circuit supporting partition constraints is specifically described. As shown in Figure 2 , the method comprises:

[0091] S210, analyzing the hypergraph file of the complex circuit to be segmented, and obtaining node information of the hypergraph file.

[0092] S220, determining two target nodes with the highest connection degrees in the circuit hypergraph according to the node information, and determining the resource usage after clustering of the target nodes and the total number of the limited placement partitions.

[0093] S230, determining whether the node clustering conditions are met according to the resource usage after clustering of the target nodes and the total number of the limited placement partitions; if yes, performing step S250; if no, performing step S240.

[0094] S240, reselecting the next group of target nodes in the hypergraph file according to the node information, and returning to perform step S230.

[0095] S250, clustering the target nodes, and updating the connection degrees of the related nodes after clustering for use in the next round of clustering processing; performing step S260.

[0096] S260, when the number of nodes in the circuit supergraph is less than the preset node quantity threshold, stop the clustering processing.

[0097] S270, determine the allowed partition quantity of each unpartitioned node, and determine the node with the least allowed partition quantity as the first node, complete the first-level screening.

[0098] S280, determine the constraint type corresponding to each first node according to the allowed partition of each first node, and determine the first node with the highest resource tension degree as the second node according to the resource tension degree corresponding to each constraint type, complete the second-level screening.

[0099] S290, obtain the connection degree between each second node and each partitioned node, and determine the second node with the highest connection degree as the optimal node, complete the third-level screening; if there is only one unpartitioned node left in the screening result after any level of screening, stop the screening, and determine the unpartitioned node left in the screening result as the optimal node.

[0100] S2100, whenever the optimal node is determined, obtain the target allowed partition corresponding to the optimal node, and calculate the average resource usage according to the number of target allowed partitions and the resource usage of the optimal node.

[0101] S2110, obtain the remaining resource quantity of each target allowed partition, and calculate the estimated resource proportion according to the average resource usage and the remaining resource quantity of each target allowed partition.

[0102] S2120, obtain the connection degree between the optimal node and each target allowed partition, and calculate the score value of each target allowed partition according to the connection degree between the optimal node and each target allowed partition and the estimated resource proportion.

[0103] S2130, determine the target partition with the highest score value as the target partition, and divide the optimal node into the target partition.

[0104] S2140, update the connection degree between the partitioned node and the unpartitioned node and the resource tension degree of each constraint type for use in the next selection of the optimal node.

[0105] Wherein, updating the resource tension degree of each constraint type can include:

[0106] According to the allowed partition of each unpartitioned node, determine the unpartitioned nodes with the same allowed partition as the same constraint type;

[0107] According to all unpartitioned nodes contained in the target constraint type, a total resource usage corresponding to the target constraint type is calculated, and according to all allowed partition placement partitions corresponding to the target constraint type, a total partition resource is calculated;

[0108] A ratio of the total resource usage corresponding to the target constraint type to the total partition resource is calculated, and the ratio calculation result is determined as the resource tension degree of the target constraint type.

[0109] Optionally, the target constraint type is any constraint type for which the total partition resource is calculated, the total resource usage is the sum of resource usages of all unpartitioned nodes in the target constraint type, and the total partition resource is the total resource of the allowed partition placement partitions corresponding to the target constraint type.

[0110] S2150, after all nodes complete partition division, according to the partition in which each node is located, output the cutting result of the complex circuit.

[0111] The technical scheme of the embodiment of the application, by analyzing the hypergraph file of the complex circuit to be segmented, obtaining node information of the hypergraph file, clustering each node in the circuit hypergraph according to the node information and the node clustering condition, selecting optimal nodes in the clustered nodes according to the multi-level screening condition, calculating the score value between the optimal node and each partition meeting the constraint condition whenever the optimal node is determined, determining the target partition according to the score value, dividing the optimal node into the target partition, and outputting the cutting result of the complex circuit according to the partition in which each node is located after all nodes complete partition division, can automatically complete the partition allocation of the constrained node without manually pre-specifying the fixed partition, greatly reduces the labor cost, avoids the uncertainty caused by manual operation, solves the problem that the constrained module is fixed in a single partition in the prior art, which causes the solution space of hypergraph segmentation to be compressed, can retain the complete solution space, find a segmentation scheme with higher resource utilization and fewer cross-partition line networks under the premise of meeting the constraints, significantly improves the quality of the segmentation result, improves the solution stability, avoids the problem of node placement caused by the occupation of the allowed partition placement resource, and reduces the risk of segmentation failure.

[0112] Embodiment three

[0113] Figure 3 A structure schematic diagram of a cutting device of a complex circuit supporting partition constraints provided by the embodiment three of the application is shown in the figure. Figure 3 As shown in the figure, the device includes a node information acquisition module 310, a node clustering processing module 320, an optimal node selection module 330, an optimal node partition module 340, and a circuit cutting module 350.

[0114] The node information acquisition module 310 is configured to parse a hypergraph file of a complex circuit to be partitioned, and acquire node information of the hypergraph file, wherein the node information comprises node resource usage, connection information of a line network between nodes, and node partition constraints.

[0115] The node clustering processing module 320 is configured to perform clustering processing on each node in the circuit hypergraph according to the node information and node clustering conditions, wherein the nodes comprise single nodes that have not been clustered and aggregated nodes that have been clustered at least once.

[0116] The optimal node selection module 330 is configured to sequentially select optimal nodes from the nodes after the clustering processing according to multi-level screening conditions.

[0117] The optimal node partition module 340 is configured to, whenever an optimal node is determined, calculate a score value between the optimal node and each partition that meets a constraint condition, and determine a target partition according to the score value, and divide the optimal node into the target partition.

[0118] The circuit partition module 350 is configured to output a partition result of the complex circuit according to the partitions in which the nodes are located after the partition division of all the nodes is completed.

[0119] The technical scheme of the embodiment of the present application comprises the following steps: parsing a hypergraph file of a complex circuit to be partitioned, acquiring node information of the hypergraph file, performing clustering processing on each node in the circuit hypergraph according to the node information and node clustering conditions, sequentially selecting optimal nodes from the nodes after the clustering processing according to multi-level screening conditions, whenever an optimal node is determined, calculating a score value between the optimal node and each partition that meets a constraint condition, and determining a target partition according to the score value, and dividing the optimal node into the target partition, and outputting a partition result of the complex circuit according to the partitions in which the nodes are located after the partition division of all the nodes is completed. The technical scheme does not need to manually pre-specify fixed partitions, can automatically complete the partition allocation of the constrained nodes, greatly reduces the labor cost, avoids the uncertainty caused by manual operation, solves the problem that the constrained modules are fixed in a single partition in the prior art, the solution space of the hypergraph partition is compressed, can retain a complete solution space, finds a partition scheme with higher resource utilization and fewer cross-partition line networks under the premise of meeting the constraints, significantly improves the quality of the partition result, improves the solution stability, avoids the problem that the nodes have no place to be placed due to the occupied partition resources, and reduces the risk of partition failure.

[0120] On the basis of the above embodiments, the node clustering processing module 320 can be specifically configured to:

[0121] According to the node information, two target nodes with the highest connection degrees in the circuit hypergraph are determined, and resource usage after clustering of the target nodes and a total number of placement partitions are determined;

[0122] According to the resource usage after clustering of the target nodes and the total number of placement partitions, it is judged whether a node clustering condition is met;

[0123] If yes, the target nodes are clustered, and connection degrees of related nodes are updated after clustering for use in next round of clustering;

[0124] If no, a next group of target nodes is selected in the hypergraph file according to the node information, and the node clustering condition is judged again;

[0125] When the number of nodes in the circuit hypergraph is less than a preset node number threshold, the clustering is stopped.

[0126] On the basis of each of the above embodiments, the node clustering condition comprises:

[0127] The resource usage after clustering of the target nodes is less than a preset resource usage threshold; and

[0128] The total number of placement partitions after clustering of the target nodes is less than a target number value, wherein the target number value is determined according to a total partition number.

[0129] On the basis of each of the above embodiments, the optimal node selection module 330 can be specifically used for:

[0130] Determining the number of allowed placement partitions of each unpartitioned node, and determining a first node with the least number of allowed placement partitions to complete first-level screening;

[0131] Determining a constraint type corresponding to each first node according to the allowed placement partitions of each first node, and determining a second node with the highest resource tension degree according to the resource tension degrees corresponding to each constraint type to complete second-level screening;

[0132] Obtaining connection degrees between each second node and each partitioned node, and determining an optimal node with the highest connection degree to complete third-level screening; wherein if only one unpartitioned node remains in the screening result after each level of screening, the screening is stopped, and the remaining unpartitioned node in the screening result is determined as the optimal node.

[0133] On the basis of each of the above embodiments, the optimal node partition module 340 can be specifically used for:

[0134] Whenever the optimal node is determined, the target allowed placement partition corresponding to the optimal node is obtained, and the average resource usage is calculated according to the number of target allowed placement partitions and the resource usage of the optimal node;

[0135] The residual resource amount of each target allowed placement partition is obtained, and the estimated resource proportion is calculated according to the average resource usage and the residual resource amount of each target allowed placement partition;

[0136] The connectivity between the optimal node and each target allowed placement partition is obtained, and the score value of each target allowed placement partition is calculated according to the connectivity between the optimal node and each target allowed placement partition and the estimated resource proportion;

[0137] The target allowed placement partition with the highest score value is determined as the target partition, and the optimal node is divided into the target partition.

[0138] On the basis of each of the above embodiments, an information updating module can be further included, configured to:

[0139] The connectivity between the partitioned nodes and the unpartitioned nodes and the resource tightness of each constraint type are updated for use in the next selection of the optimal node.

[0140] On the basis of each of the above embodiments, the information updating module can be specifically configured to:

[0141] According to the allowed placement partitions of each unpartitioned node, the unpartitioned nodes with the same allowed placement partition are determined as the same constraint type;

[0142] According to all unpartitioned nodes contained in the target constraint type, the total resource usage corresponding to the target constraint type is calculated, and according to all allowed placement partitions of the target constraint type, the total partitioned resource amount is calculated;

[0143] The ratio of the total resource usage corresponding to the target constraint type to the total partitioned resource amount is calculated, and the calculation result of the ratio is determined as the resource tightness of the target constraint type.

[0144] The cutting device for supporting partition-constrained complex circuits provided in the embodiments of the present application can execute the cutting method for supporting partition-constrained complex circuits provided in any of the embodiments of the present application, and has the corresponding function modules and beneficial effects of the execution method.

[0145] Embodiment Four

[0146] Figure 4A structural diagram of an electronic device 10 that can be used to implement embodiments of the present application is shown. The electronic device is intended to represent various forms of digital computers, such as laptops, desktops, tablets, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smartphones, wearable devices (e.g., headsets, glasses, watches, etc.), and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the present application described and / or claimed in this document.

[0147] As shown in Figure 4 The electronic device 10 includes at least one processor 11, and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., connected in communication with the at least one processor 11, where the memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer programs stored in the read-only memory (ROM) 12 or loaded from the storage unit 18 into the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0148] Various components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc., an output unit 17, such as various types of displays, a speaker, etc., a storage unit 18, such as a magnetic disk, an optical disk, etc., and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunication networks.

[0149] The processor 11 can be various general and / or special purpose processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs various methods and processes described above, such as the partition-constrained complex circuit splitting method described in embodiments of the present application. That is:

[0150] The hypergraph file of the complex circuit to be partitioned is parsed to obtain node information of the hypergraph file; wherein the node information includes node resource usage, line network connection information between nodes, and node partition constraints;

[0151] According to the node information and the node clustering condition, each node in the circuit hypergraph is subjected to clustering processing; wherein the node includes a single node that has not been subjected to clustering and an aggregated node that has been subjected to clustering at least once;

[0152] According to the multi-level screening condition, an optimal node is selected from the nodes subjected to the clustering processing;

[0153] Whenever the optimal node is determined, a score value between the optimal node and each partition that meets the constraint condition is calculated, and a target partition is determined according to the score value, and the optimal node is divided into the target partition;

[0154] After the partition division of all nodes is completed, the partitioning result of the complex circuit is output according to the partition in which each node is located.

[0155] In some embodiments, the partitioning method of the complex circuit supporting the partition constraint can be implemented as a computer program, which is tangibly contained in a computer readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the partitioning method of the complex circuit supporting the partition constraint described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to perform the partitioning method of the complex circuit supporting the partition constraint by any other appropriate means (for example, by means of firmware).

[0156] The various implementations of the systems and techniques described above can be realized in digital electronic circuitry, integrated circuitry, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on a chip (SOC), a complex programmable logic device (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and / or interpretable on a programmable system including at least one programmable processor, which can be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

[0157] Computer programs for implementing the methods of the present application can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer program, when executed, enables the functions / acts specified in the flowcharts and / or block diagrams to be implemented. The computer program can be executed entirely on a machine, partially on a machine, partially on a machine as a standalone software package and partially on a remote machine or entirely on a remote machine or server.

[0158] In the context of the present application, a computer-readable storage medium can be a tangible medium that can contain or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. A computer-readable storage medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium can be a machine-readable signal medium. More specific examples of a machine-readable storage medium will include one or more lines of a program of instructions in a transitory signal, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0159] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0160] The systems and techniques described herein can be implemented in a computing system that includes a back end component, e.g., as a data server, or that includes a middleware component, e.g., an application server, or that includes a front end component, e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described herein, or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication, e.g., a communication network. Examples of communication networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0161] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. A server can be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system, to solve the defects of large management difficulty and weak business scalability in traditional physical host and VPS service.

[0162] It should be understood that the various forms of flow shown above can be re-ordered, added to, or deleted from without departing from the scope of the present disclosure. For example, the steps recited in the present disclosure can be executed in parallel, executed in series, or executed in different orders, as long as the desired results of the technical solutions of the present disclosure can be achieved, and the present disclosure is not limited herein.

[0163] The above detailed description does not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method of supporting partitioning constraints for slicing of complex circuits, characterized by, The method comprises the following steps: parsing a hypergraph file of a complex circuit to be partitioned to obtain node information of the hypergraph file, wherein the node information comprises node resource usage, connection information of a line network between nodes, and node partition constraints; performing clustering processing on each node in the circuit hypergraph according to the node information and node clustering conditions, wherein the nodes include single nodes that have not been clustered and aggregated nodes that have undergone at least one clustering; selecting optimal nodes from the nodes after clustering processing according to multi-level screening conditions; each time an optimal node is determined, calculating a score value between the optimal node and each partition that meets the constraint condition, and determining a target partition according to the score value to divide the optimal node into the target partition; after all nodes are partitioned, outputting a cutting result of the complex circuit according to the partitions in which the nodes are located.

2. The method of claim 1, wherein, The method of performing clustering processing on each node in the circuit hypergraph according to the node information and node clustering conditions comprises the following steps: determining two target nodes with the highest connection degrees in the circuit hypergraph according to the node information, and determining resource usage and a total number of constrained placement partitions after clustering of the target nodes; judging whether the node clustering conditions are met according to the resource usage and the total number of constrained placement partitions after clustering of the target nodes; if yes, performing clustering processing on the target nodes, and updating the connection degrees of the related nodes after clustering for use in the next round of clustering processing; if no, reselecting a next group of target nodes in the hypergraph file according to the node information, and again judging according to the node clustering conditions; stopping the clustering processing when the number of nodes in the circuit hypergraph is less than a preset node quantity threshold.

3. The method of claim 2, wherein, The node clustering conditions comprise: the resource usage after clustering of the target nodes is less than a preset resource usage threshold; and the total number of constrained placement partitions after clustering of the target nodes is less than a target quantity value, wherein the target quantity value is determined according to a preset total partition quantity. The method of selecting optimal nodes from the nodes after clustering processing according to multi-level screening conditions comprises the following steps:

4. The method of claim 1, wherein, determining the number of allowed placement partitions of each unpartitioned node, and determining a first node with the least number of allowed placement partitions to complete a first-level screening; determining constraint types corresponding to each first node according to the allowed placement partitions of the first nodes, and determining a second node with the highest resource tension degree corresponding to the constraint types to complete a second-level screening; obtaining connection degrees between each second node and each partitioned node, and determining an optimal node with the highest connection degree to complete a third-level screening; wherein if only one unpartitioned node remains in the screening result after each level of screening, the screening is stopped, and the remaining unpartitioned node in the screening result is determined as the optimal node. The method of calculating a score value between the optimal node and each partition that meets the constraint condition, and determining a target partition according to the score value to divide the optimal node into the target partition each time the optimal node is determined comprises the following steps:

5. The method of claim 1, wherein, each time the optimal node is determined, obtaining a target allowed placement partition corresponding to the optimal node, and calculating an average resource usage according to the number of the target allowed placement partition and the resource usage of the optimal node. ​ acquire a remaining resource amount of each target allowed placement partition, and calculate an estimated resource proportion according to the average resource usage amount and the remaining resource amount of each target allowed placement partition; acquire a connection degree between the optimal node and each target allowed placement partition, and calculate a score value of each target allowed placement partition according to the connection degree between the optimal node and each target allowed placement partition and the estimated resource proportion; determine a target partition as the target allowed placement partition with the highest score value, and divide the optimal node into the target partition.

6. The method of claim 1, wherein, After determining the optimal node each time, the method further comprises: updating the connection degree between the partitioned node and the unpartitioned node and the resource tightness of each constraint type for use in the next selection of the optimal node.

7. The method of claim 6, wherein, updating the resource tightness of each constraint type comprises: determining unpartitioned nodes with the same allowed placement partition as the same constraint type according to the allowed placement partition of each unpartitioned node; calculating a total resource usage amount corresponding to a target constraint type according to all unpartitioned nodes included in the target constraint type, and calculating a total partition resource amount according to all allowed placement partitions corresponding to the target constraint type; calculating a ratio of the total resource usage amount corresponding to the target constraint type to the total partition resource amount, and determining the ratio calculation result as the resource tightness of the target constraint type.

8. A device for dividing complex circuits that supports partition constraints, characterized in that, comprises: a node information acquisition module configured to parse a hypergraph file of a complex circuit to be segmented to acquire node information of the hypergraph file, wherein the node information comprises node resource usage amount, line network connection information between nodes, and node partition constraint; a node clustering processing module configured to perform clustering processing on each node in the circuit hypergraph according to the node information and node clustering conditions, wherein the nodes include single nodes that have not been clustered and aggregated nodes that have undergone at least one clustering; an optimal node selection module configured to select optimal nodes in the clustered nodes in turn according to multi-level screening conditions; an optimal node partitioning module configured to, each time an optimal node is determined, calculate a score value between the optimal node and each partition that meets a constraint condition, and determine a target partition according to the score value and divide the optimal node into the target partition; a circuit segmentation module configured to, after all nodes are partitioned, output a segmentation result of the complex circuit according to the partition in which each node is located.

9. An electronic device, comprising: The electronic device comprises: at least one processor; and a memory connected in communication with the at least one processor; wherein the memory stores a computer program that can be executed by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the method for segmenting a complex circuit supporting partition constraints according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions for enabling the processor to implement the method for segmenting a complex circuit supporting partition constraints according to any one of claims 1-7 when executed.