Display device

Abstract

The invention discloses a display device. The display device includes: a substrate including a display area and a non-display area; a pixel driving circuit in the display area on the substrate; an insulating layer on the pixel driving circuit; a bank on the insulating layer; a light emitting device disposed on and overlapping the bank; an electrode disposed on the light emitting device and electrically connected to the light emitting device; an optical layer surrounding a side surface of the light emitting device; and an inorganic layer between the optical layer and the electrode.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2024-0097373, filed July 23, 2024, which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The disclosure relates to a display device. BACKGROUND

[0004] Display devices are applied to various electronic devices, such as televisions, mobile phones, laptop computers, and tablet computers.

[0005] Display devices include organic light emitting displays (OLEDs) that emit light by themselves and liquid crystal displays (LCDs) that require a separate light source.

[0006] Recently, display devices including light emitting diodes (LEDs) have been attracting attention as next-generation display devices. Light emitting diodes are made of inorganic materials, not organic materials. Therefore, compared to liquid crystal displays or organic light emitting display devices, display devices including light emitting diodes have a faster light emitting speed, excellent light emitting efficiency, and display an image with high brightness.

[0007] In the case of a display device including light emitting devices, a process of transferring a plurality of light emitting devices to a substrate is required. However, during the transfer process, errors can occur in which the light emitting devices cannot be transferred to the correct positions due to various reasons. In addition, there can be a problem in which the devices are easily deteriorated by the penetration of external moisture or oxygen. SUMMARY

[0008] The disclosure is made in view of the above-described problems, and an aspect of the disclosure is to provide a display device that can reduce errors that can occur during a transfer process of light emitting devices and a problem of deterioration of devices due to the penetration of external moisture or oxygen.

[0009] According to an aspect of the disclosure, the above and other technical effects can be achieved by providing a display device including a substrate including a display area and a non-display area; a pixel driving circuit in the display area on the substrate; an insulating layer on the pixel driving circuit; a bank on the insulating layer; a light emitting device disposed on the bank and overlapping the bank; an electrode disposed on the light emitting device and electrically connected to the light emitting device; an optical layer surrounding a side surface (or side face) of the light emitting device; and an inorganic layer between the optical layer and the electrode.

[0010] In addition, according to an aspect of the present disclosure, the above and other technical effects can be achieved by providing a display device including a display area including a plurality of light emitting devices, a non-display area disposed outside the display area, and an inorganic layer disposed in the display area, wherein the inorganic layer includes a first opening portion overlapping the plurality of light emitting devices.

[0011] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the present inventive concepts claimed. BRIEF DESCRIPTION OF DRAWINGS

[0012] The accompanying drawings illustrate implementations of the present disclosure and together with the description, explain the principles of the present disclosure, wherein:

[0013] Figure 1 is an exploded perspective view of a display device according to an embodiment of the present disclosure.

[0014] Figure 2 is a plan view of a display device according to an embodiment of the present disclosure.

[0015] Figure 3 is a magnified view of a display device according to an embodiment of the present disclosure.

[0016] Figure 4 is a diagram illustrating a circuit structure according to an embodiment of the present disclosure.

[0017] Figure 5 is a magnified plan view of a display device according to an embodiment of the present disclosure.

[0018] Figure 6 is a magnified plan view of a display device according to an embodiment of the present disclosure.

[0019] Figure 7 is a magnified plan view of a display device according to an embodiment of the present disclosure.

[0020] Figure 8 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0021] Figure 9 is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0022] Figure 10 is a cross-sectional view of a display device according to another embodiment of the present disclosure.

[0023] Figures 11A to 11Eis a cross-sectional view of a manufacturing process of a display device according to another embodiment of the present disclosure.

[0024] Figure 12 is a cross-sectional view of a display device according to another embodiment of the present disclosure.

[0025] Figure 13 is a plan view of a display device according to another embodiment of the present disclosure.

[0026] Figure 14 is an enlarged plan view of a display device according to another embodiment of the present disclosure.

[0027] Figures 15 to 18 is a diagram showing a device to which a display device according to an embodiment of the present disclosure is applied.

[0028] Throughout the drawings and detailed description, unless otherwise described, the same drawing reference numbers should be understood to refer to the same element, feature or structure. The relative dimensions of these elements can be exaggerated for clarity, illustration and convenience. DETAILED DESCRIPTION

[0029] Reference will now be made in detail embodiments of the present disclosure, examples of which can be illustrated in the accompanying drawings. The progress of the described process steps and / or operations is an example; however, the order of the steps and / or operations is not limited to the order set forth herein, and can be changed as known in the art, except for steps and / or operations that must occur in a specific order. The names of the respective elements used in the following description can be chosen only for the convenience of writing the present specification, and can thus be different from the names used in the actual product.

[0030] The advantages and features of the present disclosure and methods of achieving the same will be clarified through the following embodiments described with reference to the accompanying drawings. However, the present disclosure can be implemented in different forms, and should not be construed as limited to the embodiments set forth herein. Rather, the embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Further, the present disclosure is limited only by the scope of the claims.

[0031] The shapes, sizes, ratios, angles, and number disclosed in the drawings for describing embodiments of the present disclosure are only examples and thus the present disclosure is not limited to the illustrated details. Like reference numerals refer to like elements throughout the description. In the following description, detailed descriptions of functions or configurations known in the art are omitted when it is determined that such omissions do not obscure the point of the present disclosure. In the case where "include", "have", and "comprise" are used in the present disclosure, other parts can be added unless "only" is used. The singular form can include the plural form unless stated to the contrary.

[0032] In interpreting the description, even if there is no separate explicit description of the error range, it is interpreted to include the error range.

[0033] In describing the positional relationship, for example, when the positional relationship is described as "on", "above", "below", and "next to", one or more portions can be disposed between two other portions unless "just" or "directly" is used. Terms such as "below", "lower", "above", "upper", and the like can be used herein to describe relationships between elements as shown in the drawings. It will be understood that these terms are spatially relative and based on the orientation depicted in the drawings.

[0034] The description of the temporal relationship can include the case where the temporal priority relationship is described as "after", "subsequently", or "before", and is not continuous unless "immediately" or "immediately" is used.

[0035] Although first, second, and the like are used to describe various components, the components are not limited by these terms. These terms are used only to distinguish one component from another component. Thus, the first component mentioned below can be a second component within the technical idea of the present disclosure.

[0036] It will be understood that, although the terms "first", "second", "A", "B", "(a)", and "(b)" or the like can be used herein to describe various elements, the elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element can be referred to as a second element, and similarly, a second element can be referred to as a first element without departing from the scope of the present disclosure.

[0037] If a component is stated to be "connected", "coupled", "linked", or "attached" to another component, the component can be directly connected, coupled, linked, or attached to the other component, but it should be understood that other components can be interposed between each component that can be indirectly connected, coupled, linked, or attached without any specific description.

[0038] It should be understood that if a component or layer is described as being "in contact with" or "overlapping" another component or layer, the component or layer can be in direct contact or overlapping with the other component or layer, but other components can be interposed between each component that can be in indirect contact or overlapping, unless specifically described otherwise.

[0039] The term "at least one of" shall be understood to include any and all combinations of one or more of the associated listed items. For example, the meaning of "at least one of a first element, a second element, and a third element" encompasses a combination of all three elements, a combination of any two of the three elements, and each of the three elements individually.

[0040] The "first direction", "second direction", "third direction", "X-axis direction", "Y-axis direction", and "Z-axis direction" should not be interpreted as only a geometric relationship perpendicular to each other, but can mean that the configuration of the present disclosure has a wider direction within a range in which the configuration of the present disclosure can function.

[0041] The features of each of the various embodiments of the present specification can be partially or entirely coupled or combined with each other, various interworking and driving are possible in the technology, and each of the embodiments can be implemented independently of each other or together in a related relationship.

[0042] Hereinafter, one embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0043] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure.

[0044] Referring to Figure 1 , the display device 1000 according to an embodiment of the present disclosure can include a display panel 100, a polarizing layer 280, an adhesive layer 290, a cover member 120, a support substrate 190, a flexible circuit board 170, and a printed circuit board 160.

[0045] The display panel 100 can display information, a video, and / or an image provided to a user.

[0046] The polarizing layer 280 can be disposed on the display panel 100. The polarizing layer 280 can prevent or reduce light generated from an external light source from entering the display panel 100 and affecting a light emitting device (which can also be referred to as a light emitting element), etc.

[0047] The adhesive layer 290 can attach the cover member 120 to the display panel 100. The adhesive layer 290 can be disposed between the polarizing layer 280 and the cover member 120 to attach the cover member 120 to the polarizing layer 280. The adhesive layer 290 can include an optical clear adhesive (OCA), an optical clear resin (OCR), a pressure sensitive adhesive (PSA), or the like, but embodiments of the present disclosure are not limited thereto.

[0048] The cover member 120 can be disposed on the polarizing layer 280. The cover member 120 can be disposed on the adhesive layer 290. The cover member 120 can be a member for protecting the display panel 100. The cover member 120 can be formed of a transparent material.

[0049] The support substrate 190 can be disposed between the display panel 100 and the printed circuit board 160. The support substrate 190 can enhance rigidity of the display panel 100. The support substrate 190 can be a back plate, but embodiments of the present disclosure are not limited thereto.

[0050] The flexible circuit board 170 and the printed circuit board 160 can be disposed on a bottom of the display panel 100. The flexible circuit board 170 and the printed circuit board 160 can be disposed on at least one edge of the display panel 100, but embodiments of the present disclosure are not limited thereto. One side of the flexible circuit board 170 can be attached to the display panel 100, and the other side of the flexible circuit board 170 can be attached to the printed circuit board 160, but embodiments of the present disclosure are not limited thereto. The flexible circuit board 170 can be a flexible film, but embodiments of the present disclosure are not limited thereto.

[0051] The printed circuit board 160 can include at least one hole 180, but embodiments of the present disclosure are not limited thereto. An internal component capable of sensing ambient light or temperature that can be provided to a plurality of sensors can be disposed in an area corresponding to the at least one hole 180. For example, the internal component can include an ambient light sensor (ALS) or a temperature sensor, but embodiments of the present disclosure are not limited thereto. For example, the hole 180 can be a through hole or the like, but embodiments of the present disclosure are not limited thereto.

[0052] Figure 2 is a plan view of a display apparatus according to an embodiment of the present disclosure. Further, Figure 3 is an enlarged view of a display apparatus according to an embodiment of the present disclosure.

[0053] Referring to Figure 2 and Figure 3 , the display apparatus 1000 can include a display panel 100, a flexible circuit board 170, and a printed circuit board 160.

[0054] The display panel 100 can include a substrate 110. The substrate 110 can be a member that supports other components of the display device 1000. The substrate 110 can be made of an insulating material. For example, the substrate 110 can be made of glass or resin. Also, the substrate 110 can be made of a material having flexibility. For example, the substrate 110 can be made of a plastic material having flexibility, such as polyimide (PI). However, embodiments of the present disclosure are not limited thereto.

[0055] For example, the display panel 100 can include a display area AA and a non-display area NA. For example, the substrate 110 can include the display area AA and the non-display area NA. The display area AA and the non-display area NA are not limited to the substrate 110, but can be described throughout the display device 1000.

[0056] The display area AA can be an area in which an image is displayed. The display area AA can include a plurality of pixels PX. Each of the plurality of pixels PX can include a plurality of sub-pixels. A plurality of light emitting devices can be disposed in each of the plurality of sub-pixels. The plurality of light emitting devices can be configured to be different according to a type of the display device 1000. For example, when the display device 1000 is an inorganic light emitting display device, the light emitting device can be a light emitting diode (LED), a micro light emitting diode (Micro-LED), or a mini light emitting diode (MLED), but embodiments of the present disclosure are not limited thereto.

[0057] The display area AA can be configured in various shapes according to a design of the display device 1000. For example, the display area AA can be configured in a rectangular shape having four rounded corners, but the configuration of the present disclosure is not limited thereto. For another example, the display area AA can be configured in a rectangular shape having four corners or a circular shape, but the configuration of the present disclosure is not limited thereto.

[0058] Referring to Figure 3A plurality of pixel drive circuits PD can be provided in the display region AA. The plurality of pixel drive circuits PD can be circuits for driving the light emitting devices of the plurality of sub-pixels. Each of the plurality of pixel drive circuits PD can include a plurality of transistors including a drive transistor and a storage capacitor. In addition, each of the plurality of pixel drive circuits PD can control the light emitting operation of the plurality of light emitting devices by supplying a control signal, a power supply, and a drive current to the light emitting devices of the plurality of sub-pixels. For example, the pixel drive circuit PD can include a power line and a signal line for controlling the light emitting on / off and / or the light emitting time of the light emitting device. For example, the plurality of pixel drive circuits PD can be driving drivers manufactured using a metal oxide silicon field effect transistor (MOSFET) in a semiconductor substrate manufacturing process, but embodiments of the present disclosure are not limited thereto. The driving drivers include the plurality of pixel drive circuits PD and can drive the plurality of sub-pixels.

[0059] The non-display region NA can be a region in which an image is not displayed. Various wirings, circuits, and the like for driving the plurality of pixels PX of the display region AA can be provided in the non-display region NA. For example, various wirings and driving circuits can be mounted in the non-display region NA. In addition, a pad portion PAD connected to an integrated circuit, a printed circuit, and the like can be provided in the non-display region NA, but embodiments of the present disclosure are not limited thereto.

[0060] For example, the driving circuit can be a data driving circuit and / or a gate driving circuit, but embodiments of the present disclosure are not limited thereto. A wiring to which a control signal for controlling the driving circuit is supplied can be provided in the non-display region NA. For example, the control signal can include various timing signals including a clock signal, an input data enable signal, and a synchronization signal, but embodiments of the present disclosure are not limited thereto. The control signal can be received through the pad portion PAD. For example, a link line LL for transmitting a signal can be provided in the non-display region NA. For example, a driving component such as the flexible circuit board 170 and the printed circuit board 160 can be connected to the pad portion PAD.

[0061] According to the disclosure, the non-display area NA can include a first non-display area NA1, a bending area BA, and a second non-display area NA2. For example, the first non-display area NA1 can be an area that surrounds at least a portion of the display area AA. The bending area BA can be an area that extends from at least one of the plurality of edges of the first non-display area NA1, and can be a bendable area. The second non-display area NA2 is an area that extends from the bending area BA, and a pad portion PAD can be disposed. For example, the bending area BA can be bent, and the remaining area of the substrate 110 except for the bending area BA can be flat. In this case, when the bending area BA is bent, the second non-display area NA2 can be disposed on the rear surface of the display area AA. However, embodiments of the disclosure are not limited thereto.

[0062] A plurality of link lines LL can be disposed in the non-display area NA. The plurality of link lines LL can be wiring for transmitting various signals from the one or more flexible circuit boards (or flexible films) 170 and the printed circuit board 160 to the display area AA. The plurality of link lines LL can extend from the plurality of pad electrodes PE of the second non-display area NA2 toward the bending area BA and the first non-display area NA1, and can be electrically connected to the plurality of drive lines VL of the display area AA. The plurality of pixel driving circuits PD can be driven by receiving signals from the one or more flexible circuit boards (or flexible films) 170 and the printed circuit board 160 through the drive lines VL in the display area AA and the link lines LL in the non-display area NA.

[0063] For example, the plurality of drive lines VL can be wiring for transmitting signals output from the flexible circuit board (or flexible film) 170 and the printed circuit board 160 to the plurality of pixel driving circuits PD using the plurality of link lines LL. The plurality of drive lines VL can be disposed in the display area AA, and electrically connected to each of the plurality of pixel driving circuits PD. The plurality of drive lines VL can extend from the display area AA toward the non-display area NA, and can be electrically connected to the plurality of link lines LL. Accordingly, signals output from the flexible circuit board (or flexible film) 170 and the printed circuit board 160 can be transmitted to each of the plurality of pixel driving circuits PD through the plurality of link lines LL and the plurality of drive lines VL.

[0064] When the bending region BA is bent, portions of the plurality of link lines LL can also be bent. Stress is concentrated on the portions of the bent link lines LL, and thus a crack can occur in the link lines LL. Accordingly, the plurality of link lines LL can be formed of a conductive material having excellent ductility to reduce a crack when the bending region BA is bent. For example, the plurality of link lines LL can be formed of a conductive material having excellent ductility such as gold (Au), silver (Ag), aluminum (Al), or the like, but embodiments of the present disclosure are not limited thereto. Also, the plurality of link lines LL can be formed of one of various conductive materials used in the display region AA. For example, the plurality of link lines LL can be formed of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), an alloy of copper (Cu), silver (Ag), and magnesium (Mg), or the like, but embodiments of the present disclosure are not limited thereto. The plurality of link lines LL can be a multi-layer structure including various conductive materials. For example, the plurality of link lines LL can be a three-layer structure including titanium (Ti), aluminum (Al), and titanium (Ti), but embodiments of the present disclosure are not limited thereto.

[0065] The plurality of link lines LL can be configured in various shapes to reduce stress. At least a portion of the plurality of link lines LL disposed on the bending region BA can extend in the same direction as an extension direction of the bending region BA, or can extend in a direction different from the extension direction of the bending region BA to reduce stress. For example, when the bending region BA extends from the first non-display region NA1 to the second non-display region NA2 in one direction, at least a portion of the link lines LL disposed on the bending region BA can extend in a direction inclined from the one direction. For another example, at least a portion of the plurality of link lines LL can include a pattern of various shapes. For example, at least a portion of the plurality of link lines LL disposed on the bending region BA can have a shape in which a conductive pattern having at least one of a diamond shape, a lozenge shape, a trapezoidal shape, a triangular wave shape, a sawtooth wave shape, a sinusoidal shape, a circular shape, and an omega shape is repeatedly arranged, but embodiments of the present disclosure are not limited thereto. Accordingly, to minimize stress concentrated on the plurality of link lines LL and a corresponding crack, a shape of the plurality of link lines LL can be formed in various shapes including the above-described shapes, but embodiments of the present disclosure are not limited thereto.

[0066] According to the present disclosure, a width of the second non-display region NA2 in which the plurality of pad electrodes PE are disposed can be wider than a width of the bending region BA in which only the plurality of link lines LL are disposed. Also, a width of the display region AA in which the plurality of sub-pixels are disposed can be wider than the width of the bending region BA in which only the plurality of link lines LL are disposed. Although the width of the bending region BA is illustrated as being narrower than the width of other regions of the substrate 110, a shape of the substrate 110 including the bending region BA is exemplary, and embodiments of the present disclosure are not limited thereto.

[0067] A pad portion PAD including a plurality of pad electrodes PE can be disposed in the second non-display area NA2. A driving portion including one or more flexible circuit boards (or flexible films) 170 and the printed circuit board 160 can be attached to or bonded to the pad portion PAD. The plurality of pad electrodes PE of the pad portion PAD are electrically connected to the one or more flexible circuit boards (or flexible films) 170, and can transmit various signals (or power) received from the printed circuit board 160 and the flexible circuit board (or flexible film) 170 to the plurality of pixel driving circuits PD of the display area AA.

[0068] The flexible circuit board (or flexible film) 170 can be a film in which various components are disposed on a base film having flexibility. For example, a driving IC such as a gate driver IC or a data driver IC can be disposed on the flexible circuit board (or flexible film), but embodiments of the present disclosure are not limited thereto. The driving IC can be a component that processes data and driving signals for displaying an image. The driving IC can be disposed by a chip on glass (COG) or a chip on film (COF) or a tape carrier package (TCP) method according to a mounting method, but embodiments of the present disclosure are not limited thereto. The flexible circuit board (or flexible film) 170 can be attached to or bonded on the plurality of pad electrodes PE by a conductive adhesive layer, but embodiments of the present disclosure are not limited thereto.

[0069] The printed circuit board 160 can be a component that is electrically connected to the one or more flexible circuit boards (or flexible films) 170 and supplies signals to the driving IC. The printed circuit board 160 can be disposed on one side of the flexible circuit board (or flexible film) 170 and can be electrically connected to the flexible circuit board (or flexible film). Various components for supplying various signals to the driving IC can be disposed on the printed circuit board 160. For example, various components such as a timing controller, a power supply unit, a memory, a processor, etc. can be disposed on the printed circuit board 160. For example, the printed circuit board 160 can include a power management integrated circuit (PMIC), but embodiments of the present disclosure are not limited thereto.

[0070] Figure 4 FIG. 1 is a diagram illustrating a circuit structure according to an embodiment of the present disclosure.

[0071] Figure 4One light emitting device ED is shown connected to one micro driver (μDriver), but is not limited thereto. For example, eight light emitting devices ED can be connected to one micro driver (μDriver). For another example, 16 light emitting devices ED can be connected to one micro driver (μDriver), 32 light emitting devices ED or 64 light emitting devices ED can be connected to one micro driver (μDriver) at the same time. The light emitting device ED can be a micro light emitting device (μLED).

[0072] One micro driver (μDriver) can include a driving transistor T DR and a light emitting transistor T EM , but embodiments of the present disclosure are not limited thereto.

[0073] For example, a high potential power voltage VDD can be applied to a first electrode of the driving transistor T DR , a first electrode of the light emitting transistor T EM may be connected to a second electrode of the driving transistor T DR , and a gate electrode of the driving transistor T DR may be applied with a scan signal SC. The scan signal SC applied to the gate electrode of the driving transistor T DR is a direct current power source, and a fixed reference voltage Vref can be applied to each frame, but embodiments of the present disclosure are not limited thereto.

[0074] The second electrode of the driving transistor T DR may be connected to the first electrode of the light emitting transistor T EM , the light emitting device ED can be connected to the second electrode of the light emitting transistor T EM , and a gate electrode of the light emitting transistor T EM may be applied with a light emitting signal EM. The light emitting signal EM applied to the gate electrode of the light emitting transistor T EM may be a pulse width modulation signal that changes every frame, but embodiments of the present disclosure are not limited thereto.

[0075] The first electrode of the light emitting device ED can be connected to the second electrode of the light emitting transistor T EM , and the second electrode of the light emitting device ED can be connected to the ground. For example, the first electrode of the light emitting device ED can be an anode electrode, and the second electrode of the light emitting device ED can be a cathode electrode, but embodiments of the present disclosure are not limited thereto.

[0076] Each of the driving transistor T DR and the light emitting transistor T EM may be an n-type transistor or a p-type transistor.

[0077] The driving transistor TDR can be turned on by a scan signal SC applied from a timing controller T-CON in a micro driver (μDriver), and a light-emitting transistor T EM can be turned on by a light-emitting signal EM. Thus, by applying a high-potential power voltage VDD to a first electrode of the drive transistor T DR , a drive current is applied to the light-emitting device ED via the drive transistor T DR and the light-emitting transistor T EM , and thus the light-emitting device ED can emit light.

[0078] Figures 5 to 7 is an enlarged plan view of a display device according to an embodiment of the present disclosure. For example, Figure 5 is an enlarged plan view of a display region including a plurality of pixels. For example, Figure 6 is an enlarged plan view of a display region including one pixel. For example, Figure 7 is an enlarged plan view of a display region including a plurality of pixels. Although Figure 5 and Figure 7 illustrate a plurality of signal lines TL, a plurality of communication lines NL, a plurality of first electrodes CE1, a plurality of banks BNK, and a plurality of light-emitting devices ED, embodiments of the present disclosure are not limited thereto. Figure 7 is an enlarged plan view in which a plurality of second electrodes CE2 are additionally provided in Figure 5 , for convenience, a region overlapping the second electrodes CE2 is indicated by a dotted line.

[0079] Referring to Figures 5 to 7 , a plurality of pixels PX including a plurality of sub-pixels can be provided in the display region AA. Each of the plurality of sub-pixels includes a light-emitting device ED and can independently emit light. The plurality of sub-pixels can be configured in a plurality of rows and a plurality of columns, and can be provided in a matrix form, but embodiments of the present disclosure are not limited thereto.

[0080] The plurality of sub-pixels can include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, any one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be a red sub-pixel, another can be a green sub-pixel, and still another can be a blue sub-pixel. The types of the plurality of sub-pixels are examples, and embodiments of the present disclosure are not limited thereto.

[0081] Each of the plurality of pixels PX can include one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, one pixel PX can include a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. The pair of first sub-pixels SP1 can include a 1-1 sub-pixel SP1a and a 1-2 sub-pixel SP1b. The pair of second sub-pixels SP2 can include a 2-1 sub-pixel SP2a and a 2-2 sub-pixel SP2b. The pair of third sub-pixels SP3 can include a 3-1 sub-pixel SP3a and a 3-2 sub-pixel SP3b. For example, one pixel PX can include a 1-1 sub-pixel SP1a, a 1-2 sub-pixel SP2a, a 2-1 sub-pixel SP2a, a 2-2 sub-pixel SP2b, a 3-1 sub-pixel SP3a, and a 3-2 sub-pixel SP3b, but embodiments of the present disclosure are not limited thereto.

[0082] The plurality of sub-pixels constituting one pixel PX can be arranged in various ways. For example, in one pixel PX, the pair of first sub-pixels SP1 can be disposed in the same column, the pair of second sub-pixels SP2 can be disposed in the same column, and the pair of third sub-pixels SP3 can be disposed in the same column. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be disposed in the same row. The number and arrangement of the plurality of sub-pixels constituting one pixel PX are examples, and embodiments of the present disclosure are not limited thereto.

[0083] The plurality of signal lines TL can be disposed in the region between the plurality of sub-pixels. The plurality of signal lines TL can extend in the column direction between the plurality of sub-pixels. The plurality of signal lines TL can be lines that transmit an anode voltage from the pixel driving circuit PD (shown in FIG. 1) to the plurality of sub-pixels. For example, the plurality of signal lines TL can be electrically connected to the plurality of pixel driving circuits PD (shown in FIG. 1) and the first electrodes CE1 of the plurality of sub-pixels. The anode voltage output from the pixel driving circuit PD (shown in FIG. 1) can be transmitted to the first electrodes CE1 of the plurality of sub-pixels through the plurality of signal lines TL. For example, the first electrode CE1 can be an electrode electrically connected to the anode 134 (shown in FIG. 1) of the light emitting device ED. Thus, the anode voltage from the signal line TL can be transmitted to the anode 134 (shown in FIG. 1) of the light emitting device ED through the first electrode CE1. Figure 3 Figure 3 Figure 3 Figure 9 Figure 9

[0084] Thus, instead of forming a plurality of transistors and storage capacitors in each of the plurality of sub-pixels, a plurality of pixel circuits can be integrated in one pixel driving circuit PD (shown in FIG. 1) by using the plurality of signal lines TL. Thus, the number of transistors and storage capacitors can be reduced, and the size of the display panel can be reduced. Figure 3 ​​​​​The pixel driving circuit PD (shown in the figure) Figure 3 (as shown in the diagram) to simplify the structure of the display device 1000. Furthermore, since the circuitry provided in each of the multiple sub-pixels is integrated into a single pixel drive circuit PD (as shown in the diagram), the structure of the display device 1000 is simplified. Figure 3 As shown in the diagram, this allows for high efficiency and low power consumption.

[0085] Multiple signal lines TL may include a first signal line TL1, a second signal line TL2, a third signal line TL3, a fourth signal line TL4, a fifth signal line TL5, and a sixth signal line TL6. Each of the first signal line TL1 and the second signal line TL2 may be electrically connected to each of a pair of first sub-pixels SP1. The third signal line TL3 and the fourth signal line TL4 may be electrically connected to each of a pair of second sub-pixels SP2. Each of the fifth signal line TL5 and the sixth signal line TL6 may be electrically connected to each of a pair of third sub-pixels SP3.

[0086] A first signal line TL1 can be disposed on one side of a pair of first sub-pixels SP1, and a second signal line TL2 can be disposed on the other side of the pair of first sub-pixels SP1. The first signal line TL1 can be electrically connected to the first electrode CE1 of one of the pair of first sub-pixels SP1, such as the first electrode CE1 of sub-pixel SP1a (e.g., the first electrode CE1 of sub-pixel SP1a). The second signal line TL2 can be electrically connected to the first electrode CE1 of the remaining first sub-pixels SP1 in the pair, such as the first electrode CE1 of sub-pixel SP1b (e.g., the first electrode CE1 of sub-pixel SP1b).

[0087] The third signal line TL3 can be disposed on one side of the paired second sub-pixels SP2, and the fourth signal line TL4 can be disposed on the other side of the paired second sub-pixels SP2. For example, the third signal line TL3 can be disposed adjacent to the second signal line TL2. The third signal line TL3 can be electrically connected to the first electrode CE1 of one of the paired second sub-pixels SP2, such as the 2-1st sub-pixel SP2a. The fourth signal line TL4 can be electrically connected to the first electrode CE1 of the remaining second sub-pixels SP2 in the paired second sub-pixels SP2, such as the 2-2nd sub-pixel SP2b.

[0088] The fifth signal line TL5 can be provided at one side of the pair of third sub-pixels SP3, and the sixth signal line TL6 can be provided at the other side of the pair of third sub-pixels SP3. For example, the fifth signal line TL5 can be provided adjacent to the fourth signal line TL4. The sixth signal line TL6 can be provided adjacent to the first signal line TL1 connected to the adjacent pixel PX. The fifth signal line TL5 can be electrically connected to the first electrode CE1 of one of the pair of third sub-pixels SP3, for example, the 3-1 sub-pixel SP3a. The sixth signal line TL6 can be electrically connected to the first electrode CE1 of the remaining third sub-pixel SP3 of the pair of third sub-pixels SP3, for example, the 3-2 sub-pixel SP3b.

[0089] The plurality of signal lines TL can be formed of a conductive material. For example, the plurality of signal lines TL can be formed of a conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), or the like, but embodiments of the present disclosure are not limited thereto. For another example, the plurality of signal lines TL can be formed of a multi-layer structure of a conductive material. For example, the plurality of signal lines TL can be formed of a multi-layer structure in which titanium (Ti), aluminum (Al), titanium (Ti), and indium tin oxide (ITO) are stacked, but embodiments of the present disclosure are not limited thereto.

[0090] The plurality of communication lines NL can be provided in the region between the plurality of pixels PX. The plurality of communication lines NL can be provided to extend in the row direction in the region between the plurality of pixels PX. The plurality of communication lines NL can be provided in the region between the plurality of second electrodes CE2 and can not overlap the plurality of second electrodes CE2. For example, the plurality of communication lines NL can be wiring for short distance communication such as near field communication (NFC). The plurality of communication lines NL can function as an antenna. For example, the plurality of communication lines NL can be a plurality of connection lines or the like, but embodiments of the present disclosure are not limited thereto.

[0091] According to the present disclosure, the bank BNK can be provided in each of the plurality of sub-pixels. The plurality of banks BNK can be a structure in which the plurality of light emitting devices ED are provided. The plurality of banks BNK can guide the positions of the plurality of light emitting devices ED in the transfer process of the plurality of light emitting devices ED. The plurality of light emitting devices ED can be transferred onto the plurality of banks BNK in the transfer process of the plurality of light emitting devices ED. The plurality of banks BNK can be a bank pattern or configuration, but embodiments of the present disclosure are not limited thereto.

[0092] The bank BNK of the first sub-pixel SP1, the bank BNK of the second sub-pixel SP2, and the bank BNK of the third sub-pixel SP3 can be provided to be spaced apart from each other. The bank BNK of the first sub-pixel SP1, the bank BNK of the second sub-pixel SP2, and the bank BNK of the third sub-pixel SP3 can be configured to be partitioned. Thus, the banks BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 to which the different types of light emitting devices ED are transferred can be easily identified.

[0093] The bank BNK of the 1-1 sub-pixel SP1a and the bank BNK of the 1-2 sub-pixel SP1b can be connected to each other or can be spaced apart from each other. For example, the bank BNK of the 1-1 sub-pixel SP1a and the bank BNK of the 1-2 sub-pixel SP1b provided with the same light emitting device ED can be connected, partitioned, or spaced apart from each other in consideration of design such as a transfer process requirement. The bank BNK of the 2-1 sub-pixel SP2a and the bank BNK of the 2-2 sub-pixel SP2b can be connected to each other or can be spaced apart from each other. The bank BNK of the 3-1 sub-pixel SP3a and the bank BNK of the 3-2 sub-pixel SP3b can be connected to each other or can be spaced apart from each other. Thus, the banks BNK of the paired first sub-pixel SP1, the banks BNK of the paired second sub-pixel SP2, and the banks BNK of the paired third sub-pixel SP3 can be formed in various ways, and embodiments of the disclosure are not limited thereto.

[0094] For example, the plurality of banks BNK can be formed of an organic insulating material. The plurality of banks BNK can be formed of a single layer or a plurality of layers of an organic insulating material. For example, the plurality of banks BNK can be formed of a photoresist, a polyimide (PI), an acrylic-based material, or the like, but embodiments of the disclosure are not limited thereto.

[0095] The first electrode CE1 can be provided in each of the plurality of sub-pixels. The first electrode CE1 can be provided on the bank BNK. The first electrode CE1 can be electrically connected to one of the plurality of signal lines TL. At least a portion of the first electrode CE1 can extend to the outside of the bank BNK to be electrically connected to the signal line TL closest to the first electrode CE1. For example, a portion of the first electrode CE1 of the 1-1 sub-pixel SP1a can extend to one side region of the 1-1 sub-pixel SP1a to be electrically connected to the first signal line TL1, and a portion of the first electrode CE1 of the 1-2 sub-pixel SP1b can extend to the other side region of the 1-2 sub-pixel SP1b to be electrically connected to the second signal line TL2. A portion of the first electrode CE1 of the 2-1 sub-pixel SP2a can extend to one side region of the 2-1 sub-pixel SP2a to be electrically connected to the third signal line TL3, and a portion of the first electrode CE1 of the 2-2 sub-pixel SP2b can extend to the other side region of the 2-2 sub-pixel SP2b to be electrically connected to the fourth signal line TL4. A portion of the first electrode CE1 of the 3-1 sub-pixel SP3a can extend to one side region of the 3-1 sub-pixel SP3a to be electrically connected to the fifth signal line TL5, and a portion of the first electrode CE1 of the 3-2 sub-pixel SP3b can extend to the other side region of the 3-2 sub-pixel SP3b to be electrically connected to the sixth signal line TL6.

[0096] The first electrode CE1 is electrically connected to the anode electrode 134 of the light emitting device ED (shown in FIG. 1B). An anode voltage from the pixel driving circuit PD (shown in FIG. 1A) can be transmitted to the light emitting device ED via the signal line TL and the first electrode CE1. Different voltages can be applied to the first electrode CE1 of each of the plurality of sub-pixels according to a displayed image. For example, different voltages can be applied to the first electrode CE1 of each of the plurality of sub-pixels. Accordingly, the first electrode CE1 can be a pixel electrode, and embodiments of the present disclosure are not limited thereto. Figure 14 Figure 3 The first electrode CE1 is electrically connected to the anode electrode 134 of the light emitting device ED (shown in FIG. 1B). An anode voltage from the pixel driving circuit PD (shown in FIG. 1A) can be transmitted to the light emitting device ED via the signal line TL and the first electrode CE1. Different voltages can be applied to the first electrode CE1 of each of the plurality of sub-pixels according to a displayed image. For example, different voltages can be applied to the first electrode CE1 of each of the plurality of sub-pixels. Accordingly, the first electrode CE1 can be a pixel electrode, and embodiments of the present disclosure are not limited thereto.

[0097] ​The first electrode CE1 can be formed of an electrically conductive material. For example, the first electrode CE1 can be integrally formed with the plurality of signal lines TL. For example, the first electrode CE1 can be formed of the same electrically conductive material as the plurality of signal lines TL, but embodiments of the present disclosure are not limited thereto. For example, the first electrode CE1 can be formed of an electrically conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), or the like, but embodiments of the present disclosure are not limited thereto. For another example, the first electrode CE1 can be formed of a multi-layer structure of an electrically conductive material. For example, the plurality of first electrodes CE1 can be formed of a multi-layer structure in which titanium (Ti), aluminum (Al), titanium (Ti), and indium tin oxide (ITO) are stacked, but embodiments of the present disclosure are not limited thereto.

[0098] The light emitting device ED can be disposed in each of the plurality of sub-pixels. The plurality of light emitting devices ED can be any one of a light emitting diode (LED) and a micro light emitting diode (Micro LED), but embodiments of the present disclosure are not limited thereto. The plurality of light emitting devices ED can be disposed on the bank BNK and the first electrode CE1. The plurality of light emitting devices ED can be disposed on the first electrode CE1 and can be electrically connected to the first electrode CE1. Accordingly, the light emitting device ED can emit light by receiving an anode voltage from the pixel driving circuit PD through the signal line TL and the first electrode CE1.

[0099] The plurality of light emitting devices ED can include a first light emitting device 130, a second light emitting device 140, and a third light emitting device 150. The first light emitting device 130 can be disposed in the first sub-pixel SP1. The second light emitting device 140 can be disposed in the second sub-pixel SP2. The third light emitting device 150 can be disposed in the third sub-pixel SP3. For example, one of the first light emitting device 130, the second light emitting device 140, and the third light emitting device 150 can be a red light emitting device, another can be a green light emitting device, and still another can be a blue light emitting device, but embodiments of the present disclosure are not limited thereto. Accordingly, various colors of light including white can be implemented by combining red light, green light, and blue light emitted from the plurality of light emitting devices ED. The type of the plurality of light emitting devices ED is an example, and embodiments of the present disclosure are not limited thereto.

[0100] The first light emitting device 130 can include a first-1 light emitting device 130a disposed in the first-1 sub-pixel SP1a and a first-2 light emitting device 130b disposed in the first-2 sub-pixel SP1b. The second light emitting device 140 can include a second-1 light emitting device 140a disposed in the second-1 sub-pixel SP2a and a second-2 light emitting device 140b disposed in the second-2 sub-pixel SP2b. The third light emitting device 150 can include a third-1 light emitting device 150a disposed in the third-1 sub-pixel SP3a and a third-2 light emitting device 150b disposed in the third-2 sub-pixel SP3b.

[0101] The second electrode CE2 can be disposed in each of the plurality of sub-pixels. The second electrode CE2 can be disposed on the light emitting device ED. The second electrode CE2 can be electrically connected to the pixel driving circuit PD (shown in FIG. 1) through the plurality of contact electrodes CCE. Figure 3

[0102] For example, the second electrode CE2 can be electrically connected to a cathode electrode 135 (shown in FIG. 1) of the light emitting device ED to transmit a cathode voltage from the pixel driving circuit PD (shown in FIG. 1) to the light emitting device ED. The same cathode voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels. For example, the same voltage can be applied to the second electrode CE2 of each of the plurality of sub-pixels and the cathode electrode 135 (shown in FIG. 1) of the light emitting device ED. Accordingly, the second electrode CE2 can be a common electrode, but embodiments of the present disclosure are not limited thereto. Figure 14 Figure 3 Figure 9

[0103] At least some of the plurality of sub-pixels can share the second electrode CE2. Some of the second electrodes CE2 of each of the plurality of sub-pixels can be integrally formed to be electrically connected. When the same voltage is applied to the second electrode CE2, the second electrodes CE2 of some of the sub-pixels can be shared and used. For example, the second electrodes CE2 of some of the pixels PX arranged in the same row in the horizontal direction can be integrally formed and connected to each other. For example, one second electrode CE2 can be disposed in a plurality of pixels PX. One second electrode CE2 can be disposed in every n sub-pixels.

[0104] ​​​​For example, some of the second electrodes CE2 of each of the plurality of sub-pixels can be spaced apart from each other or partitioned from each other. For example, the second electrode CE2 connected to the pixel PX of the nth row and the second electrode CE2 connected to the pixel PX of the (n+1)th row can be spaced apart from each other. For example, the plurality of second electrodes CE2 can be spaced apart from each other, wherein the plurality of communication lines NL extending in the row direction are interposed between the plurality of second electrodes CE2. Accordingly, the number of the plurality of sub-pixels can be greater than the number of the plurality of second electrodes CE2. For another example, all of the second electrodes CE2 of the plurality of sub-pixels can be integrally connected, such that only one second electrode CE2 can be provided on the substrate 110, and embodiments of the present disclosure are not limited thereto.

[0105] The plurality of second electrodes CE2 can be formed of a transparent conductive material, but embodiments of the present disclosure are not limited thereto. The plurality of second electrodes CE2 can be formed of a transparent conductive material such that light emitted from the light emitting device ED is directed to the upper portion of the second electrode CE2. For example, the second electrode CE2 can be formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), or the like, but embodiments of the present disclosure are not limited thereto.

[0106] The plurality of contact electrodes CCE can be provided on the substrate 110. For example, the plurality of contact electrodes CCE can be spaced apart from the plurality of banks BNK and the plurality of signal lines TL. Each of the plurality of second electrodes CE2 can overlap at least one contact electrode CCE. For example, one second electrode CE2 can overlap the plurality of contact electrodes CCE.

[0107] For example, the plurality of contact electrodes CCE can be electrically connected to the plurality of second electrodes CE2. The plurality of contact electrodes CCE can be provided between the substrate 110 and the plurality of second electrodes CE2 to transmit a cathode voltage from the pixel driving circuit PD (shown in FIG. 1) to the second electrode CE2. Figure 3

[0108] ​For example, when the micro LED is used as the light emitting device ED, a plurality of micro LEDs can be formed in a wafer, and the micro LEDs can be transferred to the substrate 110 to manufacture the display panel 100. In a process of transferring a plurality of light emitting devices ED having a micro size from a wafer to a substrate 110, various defects can occur. For example, a non-transfer defect in which a light emitting device ED is not transferred can occur in some sub-pixels, and a defect in which a light emitting device ED is transferred out of a correct position due to an alignment error can occur in some sub-pixels. In addition, the transfer process proceeds normally, but the transferred light emitting device ED itself can be defective. Therefore, considering defects during a transfer process of a plurality of light emitting devices ED, a plurality of identical light emitting devices ED can be transferred to one sub-pixel. After a light-on test of the plurality of light emitting devices ED is performed, only one light emitting device ED finally determined to be normal can be used.

[0109] For example, the 1-1 light emitting device 130a and the 1-2 light emitting device 130b can be transferred to one pixel PX, and it can be checked whether there is a defect in the 1-1 light emitting device 130a and the 1-2 light emitting device 130b. If both the 1-1 light emitting device 130a and the 1-2 light emitting device 130b are determined to be normal, only the 1-1 light emitting device 130b can be used and the 1-2 light emitting device 130b can not be used. As another example, if only the 1-2 light emitting device 130b among the 1-1 light emitting device 130a and the 1-2 light emitting device 130b is determined to be normal, the 1-1 light emitting device 130a can not be used and only the 1-2 light emitting device 130b can be used. Therefore, even if a plurality of identical light emitting devices ED are transferred to one pixel PX, only one light emitting device ED can be finally used.

[0110] Therefore, either one of the pair of light emitting devices ED can be a main light emitting device ED or a primary light emitting device ED, and the other light emitting device ED can be a redundant light emitting device ED. The redundant light emitting device ED can be an additional light emitting device ED transferred to prepare for a defect in the main light emitting device ED. When the main light emitting device ED is defective, the redundant light emitting device ED can be used to replace the main light emitting device ED. Therefore, the main light emitting device ED and the redundant light emitting device ED are transferred to one pixel PX, thereby minimizing degradation in display quality due to defects in the main light emitting device ED and the redundant light emitting device ED.

[0111] For example, the 1-1 light emitting device 130a, the 2-1 light emitting device 140a, and the 3-1 light emitting device 150a transferred to one pixel PX can be used as main light emitting devices ED, and the 1-2 light emitting device 130b, the 2-2 light emitting device 140b, and the 3-2 light emitting device 150b can be used as redundant light emitting devices ED.

[0112] Figure 8 is a cross-sectional view of a display device according to an embodiment of the disclosure. Further, Figure 9 is a cross-sectional view of a display device according to an embodiment of the disclosure. For example, Figure 8 is a cross-sectional view of a display region AA, a first non-display region NA1, a bending region BA, and a second non-display region NA2, and Figure 9 is a cross-sectional view of a portion of a display region AA.

[0113] Referring to Figure 8 The first buffer layer 111a and the second buffer layer 111b can be disposed in the remaining regions of the substrate 110 except for the bending region BA.

[0114] The first buffer layer 111a and the second buffer layer 111b can be disposed in the display region AA, the first non-display region NA1, and the second non-display region NA2. The first buffer layer 111a and the second buffer layer 111b can reduce penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be formed of an inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be formed of a single layer or a plurality of layers including silicon oxide (SiOx) or silicon nitride (SiNx), but embodiments of the disclosure are not limited thereto.

[0115] For example, portions of the first buffer layer 111a and the second buffer layer 111b on the bending region BA can be removed. The upper surface of the substrate 110 disposed in the bending region BA can be exposed through the first buffer layer 111a and the second buffer layer 111b. The first buffer layer 111a and the second buffer layer 111b made of an inorganic insulating material can be removed from the bending region BA, thereby minimizing cracks in the first buffer layer 111a and the second buffer layer 111b that can occur during bending.

[0116] A plurality of alignment marks MK can be disposed between the first buffer layer 111a and the second buffer layer 111b. The plurality of alignment marks MK can identify positions of the pixel driving circuit PD during a manufacturing process of the display panel 100. For example, the plurality of alignment marks MK can align positions of the pixel driving circuit PD transferred onto the adhesive layer 112. For another example, the plurality of alignment marks MK can be omitted.

[0117] An adhesive layer 112 can be provided on the second buffer layer 111b. The adhesive layer 112 can be provided in the display region AA, the first non-display region NA1, the bending region BA, and the second non-display region NA2. For another example, a portion of the adhesive layer 112 can be removed from the non-display region NA including the bending region BA. For example, the adhesive layer 112 can be formed of any one of an adhesive polymer, an epoxy resin, a UV-cured resin, a polyimide-based resin, an acrylate-based material, a urethane-based material, and a polydimethylsiloxane (PDMS), but embodiments of the present disclosure are not limited thereto.

[0118] In the display region AA, the pixel driving circuit PD can be provided on the adhesive layer 112. When the pixel driving circuit PD is implemented as a driver driver, the driver driver can be mounted on the adhesive layer 112 by a transfer process, but embodiments of the present disclosure are not limited thereto.

[0119] A first protective layer 113a and a second protective layer 113b can be provided on the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113a and the second protective layer 113b can surround side surfaces of the pixel driving circuit PD, but embodiments of the present disclosure are not limited thereto. For example, the second protective layer 113b can cover at least a portion of an upper surface of the pixel driving circuit PD. For example, at least one of the first protective layer 113a and the second protective layer 113b provided on the bending region BA can be omitted. For example, the first protective layer 113a is entirely provided in the display region AA and the non-display region NA, and the second protective layer 113b is partially provided in the display region AA, the first non-display region NA1, and the second non-display region NA2 and can not be provided in the bending region BA. For example, a portion of the second protective layer 113b in the bending region BA can be removed. However, embodiments of the present disclosure are not limited thereto.

[0120] The first protective layer 113a and the second protective layer 113b can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be formed of a photoresist, a polyimide (PI), a photoacryl-based material, or the like, but embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a and the second protective layer 113b can be an overcoat layer or an insulating layer, but embodiments of the present disclosure are not limited thereto.

[0121] According to the present disclosure, a plurality of first connection lines 121 can be provided over the second protective layer 113b in the display region AA. The plurality of first connection lines 121 can be a wiring for electrically connecting the pixel driving circuit PD to other elements. For example, the pixel driving circuit PD can be electrically connected to the plurality of signal lines TL, the plurality of contact electrodes CCE, and the like through the plurality of first connection lines 121. For example, the plurality of first connection lines 121 can include a plurality of 1-1 connection lines 121a, a plurality of 1-2 connection lines 121b, a plurality of 1-3 connection lines 121c, and a plurality of 1-4 connection lines 121d, but embodiments of the present disclosure are not limited thereto.

[0122] For example, the plurality of 1-1 connection lines 121a can be provided over the second protective layer 113b. The plurality of 1-1 connection lines 121a can be electrically connected to the pixel driving circuit PD. The plurality of 1-1 connection lines 121a can transmit a voltage output from the pixel driving circuit PD to the first electrode CE1 or the second electrode CE2.

[0123] For example, a third protective layer 114 can be provided over the second protective layer 113b. The third protective layer 114 can be provided over the entire display region AA and the non-display region NA. In the bend region BA, the third protective layer 114 can be provided on or cover the side surface of the second protective layer 113b and the upper surface of the first protective layer 113a. The third protective layer 114 can be formed of an organic insulating material. For example, the third protective layer 114 can be formed of a photoresist, a polyimide (PI), a photoacryl-based material, or the like, but embodiments of the present disclosure are not limited thereto. For example, the first protective layer 113a, the second protective layer 113b, and the third protective layer 114 can be formed of the same material, but embodiments of the present disclosure are not limited thereto.

[0124] The plurality of 1-2 connection lines 121b can be provided over the third protective layer 114. The plurality of 1-2 connection lines 121b can be connected to the pixel driving circuit PD through the 1-1 connection line 121a, or can be directly connected to the pixel driving circuit PD. For example, a part of the 1-2 connection line 121b can be directly connected to the pixel driving circuit PD through a contact hole in the third protective layer 114. Another part of the 1-2 connection line 121b can be electrically connected to the 1-1 connection line 121a through a contact hole in the third protective layer 114. However, embodiments of the present disclosure are not limited thereto. For example, a voltage output from the pixel driving circuit PD can be transmitted to the first electrode CE1 or the second electrode CE2 through a connection line different from the plurality of 1-2 connection lines 121b.

[0125] The first insulating layer 115a can be provided on the plurality of first-2 connection lines 121b. The first insulating layer 115a can be provided in the entire display area AA and the non-display area NA, but embodiments of the present disclosure are not limited thereto. The first insulating layer 115a can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the first insulating layer 115a can be formed of a photoresist, a polyimide (PI), a photoacryl-based material, or the like, but embodiments of the present disclosure are not limited thereto.

[0126] The plurality of first-3 connection lines 121c can be provided on the first insulating layer 115a. The plurality of first-3 connection lines 121c can be electrically connected to the plurality of first-2 connection lines 121b. For example, the first-3 connection line 121c can be electrically connected to the first-2 connection line 121b through a contact hole in the first insulating layer 115a.

[0127] The second insulating layer 115b can be provided on the plurality of first-3 connection lines 121c. The second insulating layer 115b can be provided in a remaining area except for the bend area BA, but embodiments of the present disclosure are not limited thereto. The second insulating layer 115b can be provided in the display area AA, the first non-display area NA1, and the second non-display area NA2, but embodiments of the present disclosure are not limited thereto. For example, at least a portion of the second insulating layer 115b provided in the bend area BA can be removed. The second insulating layer 115b can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the second insulating layer 115b can be formed of a photoresist, a polyimide (PI), a photoacryl-based material, or the like, but embodiments of the present disclosure are not limited thereto.

[0128] The plurality of first-4 connection lines 121d can be provided on the second insulating layer 115b. The plurality of first-4 connection lines 121d can be electrically connected to the plurality of first-3 connection lines 121c. For example, the first-4 connection line 121d can be electrically connected to the first-3 connection line 121c through a contact hole in the second insulating layer 115b.

[0129] The first-4 connection line 121d can be connected to the contact electrode CCE through a contact hole in the third insulating layer 115c. Accordingly, the contact electrode CCE and the pixel driving circuit PD can be electrically connected to each other through the first connection line 121.

[0130] Although not shown, the first-4 connection line 121d can be directly connected to the signal line TL through a contact hole provided in the third insulating layer 115c, or can be electrically connected to the signal line TL through other additional lines or electrodes. Accordingly, the signal line TL and the pixel driving circuit PD can be electrically connected through the first connection line 121.

[0131] According to the present disclosure, a plurality of second connection lines 122 can be provided on the second protection layer 113b in the non-display area NA. The plurality of second connection lines 122 can be wiring for transmitting signals received from the flexible circuit board (or flexible film) 170 (shown in FIG. 10) and the printed circuit board 160 (shown in FIG. 10) to the pixel driving circuit PD in the display area AA. Figure 2 Figure 2

[0132] For example, the plurality of second connection lines 122 can be electrically connected to the plurality of pad electrodes PE to receive signals from the flexible circuit board (or flexible film) 170 (shown in FIG. 10) and the printed circuit board 160 (shown in FIG. 10). Figure 2 Figure 2

[0133] For example, the plurality of second connection lines 122 can extend from the pad portion PAD (shown in FIG. 10) toward the display area AA to transmit signals to the wiring in the display area AA. In this case, the plurality of second connection lines 122 can function as the link line LL (shown in FIG. 10). The plurality of second connection lines 122 can include a 2-1 connection line 122a, a 2-2 connection line 122b, a 2-3 connection line 122c, and a 2-4 connection line 122d. Figure 2 Figure 3 The plurality of 2-1 connection lines 122a can be provided on the second protection layer 113b. The plurality of 2-1 connection lines 122a can extend from the second non-display area NA2 to the bend area BA and the first non-display area NA1. The plurality of 2-1 connection lines 122a can transmit signals received from the flexible circuit board (or flexible film) 170 (shown in FIG. 10) and the printed circuit board 160 (shown in FIG. 10) to the pixel driving circuit PD in the display area AA. Accordingly, the plurality of 2-1 connection lines 122a can be electrically connected to the pad electrode PE and the pixel driving circuit PD, respectively.

[0134] For example, although not shown, the 2-1 connection line 122a can extend to the display area AA to be directly connected to the pixel driving circuit PD in the display area AA, or can be electrically connected to the pixel driving circuit PD through other additional lines or electrodes. In addition, the 2-1 connection line 122a can be electrically connected to the pad electrode PE in the second non-display area NA2 via the 2-2 connection line 122b, the 2-3 connection line 122c, and the 2-4 connection line 122d. Accordingly, the pixel driving circuit PD and the pad electrode PE can be electrically connected to each other through the second connection line 122. Figure 2 Figure 2

[0135]

[0136] ​​​​​​​​A plurality of 2-2 connection lines 122b can be disposed on the third protection layer 114. The plurality of 2-2 connection lines 122b can be disposed in the second non-display area NA2. The 2-2 connection lines 122b can be electrically connected to the 2-1 connection lines 122a through contact holes in the third protection layer 114. Accordingly, signals from the flexible circuit board (or flexible film) 170 (shown in FIG. 17) and the printed circuit board 160 (shown in FIG. 16) can be transmitted to the 2-1 connection lines 122a through the 2-2 connection lines 122b. Figure 2 Figure 2 The 2-3 connection lines 122c can be disposed on the first insulation layer 115a. The 2-3 connection lines 122c can be disposed in the second non-display area NA2. The 2-3 connection lines 122c can be electrically connected to the 2-2 connection lines 122b through contact holes in the first insulation layer 115a. Accordingly, signals from the flexible circuit board (or flexible film) 170 (shown in FIG. 17) and the printed circuit board 160 (shown in FIG. 16) can be transmitted to the 2-1 connection lines 122a through the 2-3 connection lines 122c and the 2-2 connection lines 122b.

[0137] The 2-4 connection lines 122d can be disposed on the second insulation layer 115b. The 2-4 connection lines 122d can be disposed in the second non-display area NA2. The 2-4 connection lines 122d can be electrically connected to the 2-3 connection lines 122c through contact holes in the second insulation layer 115b. The 2-4 connection lines 122d can be electrically connected to the pad electrode PE through contact holes in the third insulation layer 115c. Figure 2 Figure 2 Accordingly, signals from the flexible circuit board (or flexible film) 170 (shown in FIG. 17) and the printed circuit board 160 (shown in FIG. 16) can be transmitted to the 2-1 connection lines 122a through the 2-4 connection lines 122d, the 2-3 connection lines 122c, and the 2-2 connection lines 122b.

[0138]

[0139] Accordingly, signals from the flexible circuit board (or flexible film) 170 (shown in FIG. 17) and the printed circuit board 160 (shown in FIG. 16) can be transmitted to the 2-1 connection lines 122a through the 2-4 connection lines 122d, the 2-3 connection lines 122c, and the 2-2 connection lines 122b. Figure 2 Figure 2

[0140] ​​​​​The plurality of first connection lines 121 and the plurality of second connection lines 122 can be formed of a conductive material having excellent ductility or various conductive materials used in the display area AA. For example, the second connection line 122 disposed in part in the bending area BA can be formed of a conductive material having excellent ductility such as gold (Au), silver (Ag), or aluminum (Al), but embodiments of the present disclosure are not limited thereto. For another example, the plurality of first connection lines 121 and the plurality of second connection lines 122 can be formed of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), an alloy of silver (Ag), and magnesium (Mg), or an alloy of the above, but embodiments of the present disclosure are not limited thereto.

[0141] A third insulating layer 115c can be disposed on the plurality of first connection lines 121 and the plurality of second connection lines 122. The third insulating layer 115c can be disposed in the remaining areas except for the bending area BA, but embodiments of the present disclosure are not limited thereto. The third insulating layer 115c can be disposed in the display area AA, the first non-display area NA1, and the second non-display area NA2. At least a portion of the third insulating layer 115c in the bending area BA can be removed. The third insulating layer 115c can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the third insulating layer 115c can be formed of a photoresist, polyimide (PI), a photoacryl-based material, or the like, but embodiments of the present disclosure are not limited thereto.

[0142] A plurality of banks BNK can be disposed on the third insulating layer 115c in the display area AA. The plurality of banks BNK can overlap each of the plurality of sub-pixels. The plurality of banks BNK can not be disposed in the first non-display area NA1, the second non-display area NA2, and the bending area BA. One or more light emitting devices ED of the same type can be disposed on an upper portion of each of the plurality of banks BNK.

[0143] In the display area AA, a plurality of signal lines TL can be disposed on the third insulating layer 115c. The plurality of signal lines TL can be disposed between the plurality of banks BNK. For example, the plurality of signal lines TL can be disposed adjacent to any one of the plurality of banks BNK. Each of the plurality of signal lines TL can be electrically connected to the first connection line 121, for example, the 1st-4th connection line 121d.

[0144] A plurality of contact electrodes CCE can be disposed on the third insulating layer 115c in the display area AA. The plurality of contact electrodes CCE can supply a cathode voltage from the pixel driving circuit PD to the second electrode CE2. Each of the plurality of contact electrodes CCE can be electrically connected to the first connection line 121, for example, the 1st-4th connection line 121d.

[0145] The first electrode CE1 can be provided on the bank BNK. For example, the first electrode CE1 can extend from the adjacent signal line TL to the upper portion of the bank BNK. The first electrode CE1 can be provided on the upper surface of the bank BNK and the side surface of the bank BNK. For example, the first electrode CE1 can extend from the signal line TL on the upper surface of the third insulating layer 115c to the side surface of the bank BNK and the upper surface of the bank BNK. The first electrode CE1 can be integrally formed with the signal line TL.

[0146] Referring to Figure 9 The first electrode CE1 can include a plurality of conductive layers. For example, the first electrode CE1 can include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but embodiments of the disclosure are not limited thereto.

[0147] The first conductive layer CE1a can be provided on the bank BNK. The second conductive layer CE1b can be provided on the first conductive layer CE1a. The third conductive layer CE1c can be provided on the second conductive layer CE1b, and the fourth conductive layer CE1d can be provided on the third conductive layer CE1c. For example, the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be formed of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but embodiments of the disclosure are not limited thereto.

[0148] According to the disclosure, some of the plurality of conductive layers having high reflection efficiency included in the first electrode CE1 can include an alignment mark for aligning the light emitting device ED and / or a reflector. For example, the second conductive layer CE1b of the plurality of conductive layers of the first electrode CE1 can include a reflective material. For example, the second conductive layer CE1b can include aluminum (Al), but embodiments of the disclosure are not limited thereto. Accordingly, the second conductive layer CE1b can function as a reflection plate. Further, due to the high reflection efficiency of the second conductive layer CE1b, identification can be easily performed in a manufacturing process, and thus identification can be easily performed in a placement position or a transfer position of the light emitting device ED with respect to the second conductive layer CE1b.

[0149] For example, to use the second conductive layer CE1b as a reflector, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, a portion of the third conductive layer CE1c and the fourth conductive layer CE1d disposed on the embankment BNK can be removed or etched to expose the upper surface of the second conductive layer CE1b. For example, the central and edge portions of the third conductive layer CE1c and the fourth conductive layer CE1d on which the solder pattern SDP is disposed can be retained, and the remaining portions except for the central portions of the third conductive layer CE1c and the fourth conductive layer CE1d can be removed. For example, the central and edge portions of each of the third conductive layer CE1c made of titanium (Ti) and the fourth conductive layer CE1d made of indium tin oxide (ITO) can be left unetched. Therefore, the other conductive layer of the first electrode CE1 can be prevented from being etched by the TMAH (tetramethylammonium hydroxide) solution used in the masking process of the first electrode CE1.

[0150] According to this disclosure, the first conductive layer CE1a and the third conductive layer CE1c may comprise titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b may comprise aluminum (Al). The fourth conductive layer CE1d may comprise a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has high adhesion to the solder pattern SDP and is corrosion-resistant and acid-resistant. However, embodiments of this disclosure are not limited thereto.

[0151] The first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be deposited sequentially, and then patterned by photolithography and etching processes, but the embodiments of the present disclosure are not limited thereto.

[0152] like Figure 8 and Figure 9 As shown, according to this disclosure, the signal line TL, contact electrode CCE, and pad electrode PE disposed on the same layer as the first electrode CE1 can be formed of multilayer conductive materials, but the embodiments of this disclosure are not limited thereto. For example, the signal line TL, contact electrode CCE, and pad electrode PE can be formed of multilayers stacked with indium tin oxide (ITO), titanium (Ti), aluminum (Al), and titanium (Ti), but the embodiments of this disclosure are not limited thereto.

[0153] According to the present disclosure, a solder pattern SDP can be provided on the first electrode CE1 in each of the plurality of sub-pixels. The solder pattern SDP can join the light emitting device ED to the first electrode CE1. The first electrode CE1 and the light emitting device ED can be electrically connected to each other by eutectic bonding using the solder pattern SDP, but embodiments of the present disclosure are not limited thereto. For example, when the solder pattern SDP is formed of indium (In) and the anode electrode 134 of the light emitting device ED is formed of gold (Au), the solder pattern SDP and the anode electrode 134 can be joined to each other by applying heat and pressure in a transfer process of the light emitting device ED. The light emitting device ED can be joined to the solder pattern SDP and the first electrode CE1 by eutectic bonding without a separate adhesive member. For example, the solder pattern SDP can be formed of indium (In), tin (Sn), or an alloy thereof, but embodiments of the present disclosure are not limited thereto. For example, the solder pattern SDP can be a joining pad, a contact pad, or the like, but embodiments of the present disclosure are not limited thereto.

[0154] According to the present disclosure, a passivation layer 116 can be provided on the plurality of signal lines TL, the plurality of first electrodes CE1, the plurality of contact electrodes CCE, and the third insulating layer 115c. For example, the passivation layer 116 can be provided in the display area AA, the first non-display area NA1, and the second non-display area NA2. A portion of the passivation layer 116 provided in the bending area BA can be removed. A portion of the passivation layer 116 covering the plurality of pad electrodes PE in the second non-display area NA2 can be removed. A portion of the passivation layer 116 covering the plurality of contact electrodes CCE in the display area AA can be removed. A portion of the passivation layer 116 covering the solder pattern SDP in the display area AA can be removed.

[0155] Since the passivation layer 116 covers the remaining area while exposing a portion of the plurality of pad electrodes PE, a portion of the plurality of contact electrodes CCE, and a portion of the solder pattern SDP, permeation of moisture or impurities flowing into the light emitting device ED can be reduced. For example, the passivation layer 116 can be formed of a single layer or a plurality of layers including silicon oxide (SiOx) or silicon nitride (SiNx), but embodiments of the present disclosure are not limited thereto. For example, the passivation layer 116 can be a protective layer or an insulating layer, but embodiments of the present disclosure are not limited thereto. For example, the passivation layer 116 can include a hole exposing the solder pattern SDP and a hole exposing the contact electrode CCE.

[0156] In each of the plurality of sub-pixels, the light emitting device ED can be provided on the solder pattern SDP. The first light emitting device 130 can be provided in the first sub-pixel SP1. The second light emitting device 140 can be provided in the second sub-pixel SP2. The third light emitting device 150 can be provided in the third sub-pixel SP3.

[0157] The light emitting device ED can be formed on a silicon wafer by means of metal organic vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam growth (MBE), hydride vapor phase epitaxy (HVPE), or sputtering, but embodiments of the present disclosure are not limited thereto.

[0158] Referring to Figure 9 The first light emitting device 130 can include an anode 134, a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, a cathode 135, and an encapsulation layer 136, but embodiments of the present disclosure are not limited thereto. For example, the encapsulation layer 136 can not be included in the first light emitting device 130.

[0159] The first semiconductor layer 131 can be disposed on the solder pattern SDP. The second semiconductor layer 133 can be disposed on the first semiconductor layer 131.

[0160] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can include a compound semiconductor such as a III-V group or a II-VI group, and can be doped with an impurity (or a dopant). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 can be a semiconductor layer doped with an n-type impurity, and the other can be a semiconductor layer doped with a p-type impurity, but embodiments of the present disclosure are not limited thereto. For example, at least one of the first semiconductor layer 131 and the second semiconductor layer 133 can be an n-type or p-type impurity-doped layer in a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or a material such as gallium arsenide (GaAs), but embodiments of the present disclosure are not limited thereto. For example, the n-type impurity can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), tin (Sn), or the like, but embodiments of the present disclosure are not limited thereto. For example, the p-type impurity can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), beryllium (Be), or the like, but embodiments of the present disclosure are not limited thereto.

[0161] For example, each of the first semiconductor layer 131 and the second semiconductor layer 133 can be a nitride semiconductor including an n-type impurity and a nitride semiconductor including a p-type impurity, but embodiments of the present disclosure are not limited thereto. For example, the first semiconductor layer 131 can be a nitride semiconductor including a p-type impurity, and the second semiconductor layer 133 can be a nitride semiconductor including an n-type impurity, but embodiments of the present disclosure are not limited thereto.

[0162] The active layer 132 can be disposed between the first semiconductor layer 131 and the second semiconductor layer 133. The active layer 132 can emit light by receiving holes and electrons from the first semiconductor layer 131 and the second semiconductor layer 133. For example, the active layer 132 can be formed of one of a single-well structure, a multi-well structure, a single quantum well structure, a multi-quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but embodiments of the present disclosure are not limited thereto. For example, the active layer 132 can be formed of indium gallium nitride (InGaN) or gallium nitride (GaN), but embodiments of the present disclosure are not limited thereto.

[0163] For another example, the active layer 132 can include a multi-quantum well (MQW) structure having a well layer and a barrier layer, the barrier layer having a larger band gap than the well layer. For example, the active layer 132 can include InGaN as the well layer, and can include an AlGaN layer as the barrier layer, but embodiments of the present disclosure are not limited thereto.

[0164] The anode 134 can be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode 134 can electrically connect the first semiconductor layer 131 to the first electrode CE1. An anode voltage output from the pixel driving circuit PD can be applied to the first semiconductor layer 131 through the signal line TL, the first electrode CE1, and the anode 134. For example, the anode 134 can be formed of a conductive material capable of being eutectically bonded with the solder pattern SDP, but embodiments of the present disclosure are not limited thereto. For example, the anode 134 can be formed of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), copper (Cu), or an alloy thereof, but embodiments of the present disclosure are not limited thereto.

[0165] A cathode 135 can be disposed on the second semiconductor layer 133. For example, the cathode 135 can electrically connect the second semiconductor layer 133 to the second electrode CE2. A cathode voltage output from the pixel driving circuit PD can be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode 135. The cathode 135 can be formed of a transparent conductive material to enable light emitted from the light emitting device ED to be directed to an upper portion of the light emitting device ED, but embodiments of the present disclosure are not limited thereto. For example, the cathode 135 can be formed of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), or the like, but embodiments of the present disclosure are not limited thereto.

[0166] An encapsulation layer 136 can be disposed on at least a portion of each of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, and the cathode 135. For example, the encapsulation layer 136 can surround at least a portion of each of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, and the cathode 135.

[0167] For example, the encapsulation layer 136 can protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation layer 136 can be disposed on a side surface of the first semiconductor layer 131, a side surface of the active layer 132, and a side surface of the second semiconductor layer 133.

[0168] For example, the encapsulation layer 136 can be disposed on at least a portion of the anode 134 and the cathode 135, for example, on an edge portion (or one side) of the anode 134 and an edge portion (or one side) of the cathode 135. At least a portion of the anode 134 can be exposed through the encapsulation layer 136, and the anode 134 can be connected with the solder pattern SDP. For example, at least a portion of the cathode 135 can be exposed through the encapsulation layer 136, and the cathode 135 can be connected with the second electrode CE2. For example, the encapsulation layer 136 can be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of the present disclosure are not limited thereto.

[0169] For another example, the encapsulation layer 136 can have a structure in which a reflective material is distributed in a resin layer, but embodiments of the present disclosure are not limited thereto. For example, the encapsulation layer 136 can be manufactured as a reflector having various structures, but embodiments of the present disclosure are not limited thereto. Light emitted from the active layer 132 can be reflected upward by the encapsulation layer 136, so that light extraction efficiency can be improved. For example, the encapsulation layer 136 can be a reflective layer, but embodiments of the present disclosure are not limited thereto.

[0170] According to the present disclosure, the light emitting device ED has been described as a vertical structure, but embodiments of the present disclosure are not limited thereto. For example, the light emitting device ED can have a lateral structure or a flip chip structure.

[0171] Although the first light emitting device 130 has been described with reference to Figure 9 The second light emitting device 140 and the third light emitting device 150 can have substantially the same structure as the first light emitting device 130. For example, the second light emitting device 140 and the third light emitting device 150 can have substantially the same configuration as the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode 134, the cathode 135, and the encapsulation layer 136.

[0172] As shown in FIGS. 1A and 1B, the first light emitting device 130 can include a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, an anode 134, a cathode 135, and an encapsulation layer 136. Figure 8 and Figure 9 As shown in FIGS. 1A and 1B, the first light emitting device 130 can include a first semiconductor layer 131, an active layer 132, a second semiconductor layer 133, an anode 134, a cathode 135, and an encapsulation layer 136.

[0173] The first optical layer 117a can include an organic insulating material in which fine particles are distributed, but embodiments of the present disclosure are not limited thereto. For example, the first optical layer 117a can be formed of silicone in which fine metal particles, for example, titanium dioxide (TiO2) particles, are distributed, but embodiments of the present disclosure are not limited thereto. Light from the plurality of light emitting devices ED can be scattered by the fine particles distributed in the first optical layer 117a and emitted to the outside of the display panel 100. Accordingly, the first optical layer 117a can improve the extraction efficiency of light emitted from the plurality of light emitting devices ED.

[0174] For example, the first optical layer 117a can be provided in each of the plurality of pixels PX, or can be provided in some of the pixels PX arranged in the same row, but embodiments of the present disclosure are not limited thereto. For example, the first optical layer 117a can be provided in each of the plurality of pixels PX, or the plurality of pixels PX can share one first optical layer 117a. For another example, each of the plurality of sub-pixels can respectively include the first optical layer 117a, but embodiments of the present disclosure are not limited thereto.

[0175] According to the present disclosure, the second optical layer 117b can be provided on the passivation layer 116 in the display area AA. For example, the second optical layer 117b can surround the first optical layer 117a. For example, the second optical layer 117b can be in contact with a side surface of the first optical layer 117a. For example, the second optical layer 117b can be provided in a region between the plurality of pixels PX. However, embodiments of the present disclosure are not limited thereto. For example, the second optical layer 117b can be a diffusion layer, a window diffusion layer, or the like, but embodiments of the present disclosure are not limited thereto.

[0176] The second optical layer 117b can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. The second optical layer 117b can be formed of the same material as the first optical layer 117a, but embodiments of the present disclosure are not limited thereto. For example, the first optical layer 117a can include fine particles, and the second optical layer 117b can not include fine particles. For example, the second optical layer 117b can be formed of silicone, but embodiments of the present disclosure are not limited thereto.

[0177] For example, the thickness of the first optical layer 117a can be less than the thickness of the second optical layer 117b, but embodiments of the present disclosure are not limited thereto. Accordingly, in a plan view, a region in which the first optical layer 117a is provided can include a recessed portion recessed from an upper surface of the second optical layer 117b.

[0178] According to the present disclosure, the second electrode CE2 can be provided on the first optical layer 117a and the second optical layer 117b. For example, the second electrode CE2 can be electrically connected to the plurality of contact electrodes CCE through a contact hole in the second optical layer 117b. For example, the second electrode CE2 can be provided on the plurality of light emitting devices ED. For example, the second electrode CE2 can include a transparent conductive oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO), but embodiments of the present disclosure are not limited thereto. For example, the second electrode CE2 can be in contact with the cathode 135. For example, the second electrode CE2 can overlap the entire first optical layer 117a, and can overlap a portion of the second optical layer 117b.

[0179] The second electrode CE2 can continuously extend in the first direction of the substrate 110. Accordingly, the second electrode CE2 can be commonly connected to the plurality of pixels PX arranged in the first direction of the substrate 110. For example, the second electrode CE2 can be commonly connected to the plurality of pixels PX.

[0180] According to the disclosure, the second electrode CE2 can continuously extend on the first optical layer 117a, the second optical layer 117b, and the light emitting device ED. The area in which the first optical layer 117a is disposed can include a recessed portion recessed from an upper surface of the second optical layer 117b. Accordingly, since a first portion of the second electrode CE2 disposed on the first optical layer 117a is disposed along the recessed portion, the first portion can be disposed at a lower position than a second portion of the second electrode CE2 disposed on the second optical layer 117b.

[0181] The third optical layer 117c can be disposed on the second electrode CE2. The third optical layer 117c can overlap the plurality of light emitting devices ED and the first optical layer 117a. For example, the third optical layer 117c can not overlap the second optical layer 117b. Since the third optical layer 117c is disposed on the second electrode CE2 and the plurality of light emitting devices ED, a mura spot that can occur in some of the plurality of light emitting devices ED can be improved. For example, when the plurality of light emitting devices ED are transferred onto the substrate 110 of the display panel 100, an area in which a gap between the plurality of light emitting devices ED is not uniform due to a process deviation or the like can be formed. When the gap between the plurality of light emitting devices ED is not uniform, a light emitting area of each of the plurality of light emitting devices ED can be disposed non-uniformly, and thus a mura spot (or Mura) can be recognized by a user. Accordingly, since the third optical layer 117c for uniformly diffusing light on an upper portion of the plurality of light emitting devices ED is formed, visibility of light emitted from some of the light emitting devices ED as a mura spot (or Mura) can be reduced. Accordingly, since light emitted from the plurality of light emitting devices ED is uniformly diffused by the third optical layer 117c and extracted to the outside of the display panel 100, brightness uniformity of the display apparatus can be improved.

[0182] The third optical layer 117c can be formed of an organic insulating material in which fine particles are distributed, but embodiments of the disclosure are not limited thereto. For example, the third optical layer 117c can be formed of silicone in which fine metal particles, such as titanium dioxide (TiO2) particles, are distributed, but embodiments of the disclosure are not limited thereto. For example, the third optical layer 117c can be formed of the same material as the first optical layer 117a, but embodiments of the disclosure are not limited thereto. For example, the third optical layer 117c can be a diffusion layer, an upper diffusion layer, or the like, but embodiments of the disclosure are not limited thereto.

[0183] According to the present disclosure, light from the plurality of light emitting devices ED can be scattered by the fine particles in the third optical layer 117c and emitted to the outside of the display panel 100. The third optical layer 117c can uniformly mix the light emitted from the plurality of light emitting devices ED to further improve the brightness uniformity of the display device. In addition, the light extraction efficiency of the display device can be improved by the light scattered from the plurality of fine particles, and thus the display device can be driven with low power.

[0184] In the display area AA, a black matrix BM can be disposed on the second electrode CE2, the first optical layer 117a, the second optical layer 117b, and the third optical layer 117c. For example, the black matrix BM can fill the contact hole in the second optical layer 117b. Since the black matrix BM can cover the display area AA, color mixing of light of the plurality of sub-pixels and reflection of external light can be reduced. For example, since the black matrix BM is disposed in the contact hole connecting the second electrode CE2 and the contact electrode CCE, light leakage between the plurality of adjacent sub-pixels can be prevented.

[0185] For example, the black matrix BM can be formed of an opaque material, but embodiments of the present disclosure are not limited thereto. For example, the black matrix BM can be an organic insulating material to which a black pigment or a black dye is added, but embodiments of the present disclosure are not limited thereto.

[0186] Referring to Figure 8 A cover layer 118 can be disposed on the black matrix BM in the display area AA. The cover layer 118 can protect elements below the cover layer 118, for example, the cover layer 118 can be formed of an organic insulating material, but embodiments of the present disclosure are not limited thereto. For example, the cover layer 118 can be formed of a photoresist, a polyimide (PI), a photoacryl-based material, or the like, but embodiments of the present disclosure are not limited thereto. For example, the cover layer 118 can be an overcoat layer, an insulating layer, or the like, but embodiments of the present disclosure are not limited thereto.

[0187] A polarizing layer 280 can be disposed on the cover layer 118 via a first adhesive layer 291. A cover member 120 can be disposed on the polarizing layer 280 via a second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 can include an optical clear adhesive (OCA), an optical clear resin (OCR), a pressure sensitive adhesive (PSA), or the like, but embodiments of the present disclosure are not limited thereto.

[0188] According to the present disclosure, a plurality of pad electrodes PE can be disposed on the third insulating layer 115c in the second non-display area NA2. For example, a part of the plurality of pad electrodes PE can be exposed through the passivation layer 116. For example, the plurality of pad electrodes PE can be electrically connected to the 2-4th connection line 122d through a contact hole in the third insulating layer 115c.

[0189] An adhesive film ACF can be provided on the plurality of pad electrodes PE. The adhesive film ACF can be an adhesive layer in which conductive balls are distributed in an insulating material, but embodiments of the present disclosure are not limited thereto. When heat or pressure is applied to the adhesive film ACF, the conductive balls can have a conductive property in an area to which heat or pressure is applied. The adhesive film ACF can be provided between the plurality of pad electrodes PE and the flexible circuit board (or flexible film) 170, so that the flexible circuit board (or flexible film) 170 can be attached to or bonded to the plurality of pad electrodes PE. For example, the adhesive film ACF can be an anisotropic conductive film (ACF), but embodiments of the present disclosure are not limited thereto.

[0190] The flexible circuit board (or flexible film) 170 can be provided on the adhesive film ACF. The flexible circuit board (or flexible film) 170 can be electrically connected to the plurality of pad electrodes PE through the adhesive film ACF. Accordingly, signals output from the flexible circuit board (or flexible film) 170 and the printed circuit board 160 can be transmitted to the pixel driving circuit PD in the display area AA through the plurality of pad electrodes PE, the 2-4th connection line 122d, the 2-3rd connection line 122c, the 2-1st connection line 122b, and the 2-1st connection line 122a.

[0191] Figure 10 is a cross-sectional view of a display device according to another embodiment of the present disclosure. More specifically, Figure 10 is a cross-sectional view of a portion of the display area AA.

[0192] Figure 10 Unlike the above-described embodiment, an inorganic layer 200 is further provided. Accordingly, the same reference numerals are given to the same configurations as those of the above-described embodiment, and the different configurations will be described below.

[0193] As Figure 10 indicated, the inorganic layer 200 is provided under the second electrode CE2. In addition, the inorganic layer 200 is provided on the first optical layer 117a and the second optical layer 117b. Accordingly, an upper surface of the inorganic layer 200 is in contact with the second electrode CE2, and a lower surface of the inorganic layer 200 is in contact with the first optical layer 117a and the second optical layer 117b.

[0194] The inorganic layer 200 includes a first opening portion 200a and a second opening portion 200b formed by etching a portion thereof.

[0195] The cathode 135 of the first light emitting device 130 is exposed through the first opening portion 200a, and the exposed cathode 135 and the second electrode CE2 are in contact with each other at the first opening portion 200a.

[0196] The contact electrode CCE is exposed through the second opening part 200b, and the exposed contact electrode CCE and the second electrode CE2 contact each other at the second opening part 200b. The second opening part 200b overlaps the contact hole CH, and the contact electrode CCE can be exposed through the second opening part 200b and the contact hole CH which overlap each other. The contact hole CH can be formed by removing a predetermined region of the second optical layer 117b and the passivation layer 116. The inorganic layer 200 can not extend in the contact hole CH.

[0197] The width of the second opening part 200b and the width of the contact hole CH can be the same. However, the width of the contact hole CH can gradually decrease from the upper portion of the contact hole CH to the lower portion of the contact hole CH, and in this case, the width of the second opening part 200b can be the same as the width of the upper portion of the contact hole CH.

[0198] According to another configuration of the present disclosure, the following effects can be obtained by adding the inorganic layer 200.

[0199] First, if the inorganic layer 200 does not exist, external moisture or oxygen can penetrate into the first optical layer 117a and the second optical layer 117b, and the contact electrode CCE and the second electrode CE2 can easily deteriorate due to the penetration of moisture or oxygen over time.

[0200] On the other hand, when the inorganic layer 200 exists, external moisture or oxygen does not easily penetrate into the first optical layer 117a and the second optical layer 117b through the inorganic layer 200, and thus it is possible to prevent or reduce the problem of deterioration of the contact electrode CCE and the second electrode CE2 over time.

[0201] Therefore, the inorganic layer 200 can include a material capable of effectively preventing the penetration of external moisture or oxygen. The inorganic layer 200 can include a silicon compound such as silicon nitride, but is not limited thereto.

[0202] Second, in the case where the inorganic layer 200 does not exist, a residue of the first optical layer 117a can remain on the upper surface of the cathode 135 of the first light emitting device 130, and the cathode 135 of the first light emitting device 130 and the second electrode CE2 can be connected to each other. Therefore, a problem of increasing the connection resistance at the interface between the cathode 135 and the second electrode CE2 can occur. In order to prevent the problem of increasing the connection resistance, an etching process of removing the residue of the first optical layer 117a remaining on the upper surface of the cathode 135 of the first light emitting device 130 can be additionally performed. However, in this case, a curvature can be generated on the inner surface of the contact hole CH due to the etching process, and the uniformity of the upper surface of the contact electrode CCE can be reduced.

[0203] In contrast, when the inorganic layer 200 is present, the residue of the first optical layer 117a remaining on the upper surface of the cathode 135 of the first light emitting device 130 can be removed together in the dry etching process for forming the first opening portion 200a of the inorganic layer 200. Thus, the problem of increasing the connection resistance at the interface between the cathode 135 and the second electrode CE2 can be prevented. In addition, the process of forming the contact hole CH can be performed after the process of forming the first opening portion 200a and the second opening portion 200b of the inorganic layer 200. Thus, the problem of the inner surface of the contact hole CH being bent or deteriorating the uniformity of the upper surface of the contact electrode CCE due to the process of forming the first opening portion 200a does not occur.

[0204] Figures 11A to 11E is a cross-sectional view of a manufacturing process of a display device according to another embodiment of the disclosure, which involves the manufacturing process of the display device according to the above Figure 10

[0205] First, as shown in Figure 11A , a bank BNK is formed on the third insulating layer 115c. Thereafter, the first electrode CE1 is formed on the bank BNK, and the contact electrode CCE is formed on the third insulating layer 115c on which the bank BNK is not formed. Thereafter, the passivation layer 116 is formed while exposing at least a portion of the first electrode CE1 and the contact electrode CCE. Thereafter, the solder pattern SDP is formed on the exposed first electrode CE1, and the first light emitting device 130 is formed on the solder pattern SDP. Thereafter, the first optical layer 117a is formed on the passivation layer 116 while surrounding the side surface of the first light emitting device 130, and the second optical layer 117b is formed on the passivation layer 116 while surrounding the side surface of the first optical layer 117a.

[0206] Next, as shown in Figure 11B , the inorganic layer 200 is formed on the first light emitting device 130, the first optical layer 117a, and the second optical layer 117b.

[0207] Next, as shown in Figure 11C , a predetermined region of the inorganic layer 200 is etched to form the first opening portion 200a and the second opening portion 200b.

[0208] The first opening portion 200a can be formed in a region overlapping the first light emitting device 130, so that the cathode 135 of the first light emitting device 130 can be exposed to the outside through the first opening portion 200a. The second opening portion 200b can be formed in a region overlapping the contact electrode CCE, so that a predetermined region of the second optical layer 117b can be exposed to the outside through the second opening portion 200b.

[0209] ​The first opening portion 200a and the second opening portion 200b can be formed at the same time by a dry etching process. Residues that can remain on the upper surface of the cathode 135 of the first light emitting device 130 can be removed by the etching process of forming the first opening portion 200a.

[0210] Next, as shown in FIG. 2B, a contact hole CH is formed by etching a predetermined region of the second optical layer 117b exposed by the second opening portion 200b. Accordingly, the contact electrode CCE is exposed to the outside in a region in which the second opening portion 200b and the contact hole CH overlap each other. Figure 11D

[0211] Next, as shown in FIG. 2C, a second electrode CE2 is formed on the inorganic layer 200. Then, the second electrode CE2 is connected to the cathode 135 of the first light emitting device 130 at the first opening portion 200a, and is connected to the contact electrode CCE and the contact hole CH at the second opening portion 200b. Figure 11E

[0212] Figure 12 is a cross-sectional view of a display device according to another embodiment of the disclosure.

[0213] In addition to being further provided with the inorganic layer 200, Figure 12 the same as the above Figure 8 embodiment. Accordingly, the same reference numerals are given to the same configurations, and different configurations will be described below.

[0214] As shown in FIG. 3A, in the display area AA, the inorganic layer 200 is provided between the second electrode CE2 and the first optical layer 117a, and between the second electrode CE2 and the second optical layer 117b. In addition, in a region in which the third optical layer 117c or the second electrode CE2 is not formed, the inorganic layer 200 is provided between the black matrix BM and the second optical layer 117b, and in this case, the upper surface of the inorganic layer 200 can be in contact with the lower surface of the black matrix BM. Figure 12 The inorganic layer 200 includes a plurality of first opening portions 200a in a region overlapping the plurality of light emitting devices ED, and a plurality of second opening portions 200b in a region overlapping the plurality of contact electrodes CCE.

[0215] The second electrode CE2 is connected to the plurality of light emitting devices ED at the plurality of first opening portions 200a, and is connected to the plurality of contact electrodes CCE at the plurality of second opening portions 200b and the contact hole CH.

[0216] The inorganic layer 200 can extend to the non-display areas NA1, BA, and NA2.

[0217]

[0218] ​​​The first non-display area NA1 contacts the display area AA, the bending area BA contacts the first non-display area NA1 and the second non-display area NA2 between the first non-display area NA1 and the second non-display area NA2, and the second non-display area NA2 contacts the bending area BA.

[0219] In the first non-display area NA1, the inorganic layer 200 can be disposed on the insulating layers 115a, 115b, and 115c. For example, in the first non-display area NA1, the inorganic layer 200 can contact side surfaces of the first to third insulating layers 115a, 115b, and 115c. Alternatively, in the first non-display area NA1, the inorganic layer 200 can not contact a side surface of the first insulating layer 115a, but can contact side surfaces of the second and third insulating layers 115b and 115c. Alternatively, in the first non-display area NA1, the inorganic layer 200 can not contact side surfaces of the first and second insulating layers 115a and 115b, but can contact a side surface of the third insulating layer 115c.

[0220] The inorganic layer 200 disposed in the first non-display area NA1 can be continuous with the inorganic layer 200 disposed in the display area AA. To this end, the inorganic layer 200 can extend from the display area AA to the first non-display area NA1 along a side surface of the second optical layer 117b while contacting the side surface of the second optical layer 117b. For example, the inorganic layer 200 can contact a side surface of the second optical layer 117b facing the first non-display area NA1. For example, the inorganic layer 200 can contact a side surface of the second optical layer 117b in a boundary area between the display area AA and the first non-display area NA1.

[0221] In the second non-display area NA2, the inorganic layer 200 can be disposed on the insulating layers 115a, 115b, and 115c. For example, in the second non-display area NA2, the inorganic layer 200 can contact side surfaces of the first to third insulating layers 115a, 115b, and 115c. Alternatively, in the second non-display area NA2, the inorganic layer 200 can not contact a side surface of the first insulating layer 115a, but can contact side surfaces of the second to third insulating layers 115b and 115c. Alternatively, in the second non-display area NA2, the inorganic layer 200 can not contact side surfaces of the first and second insulating layers 115a and 115b, but can contact a side surface of the third insulating layer 115c.

[0222] In addition, the inorganic layer 200 can extend from the second non-display area NA2 to an upper surface of the passivation layer 116 disposed on the third insulating layer 115c. Accordingly, the inorganic layer 200 can be in contact with the upper surface of the passivation layer 116 in the second non-display area NA2, and the passivation layer 116 can be disposed in a region between the inorganic layer 200 and the third insulating layer 115c and a region between the inorganic layer 200 and the pad electrode PE.

[0223] One end of the inorganic layer 200 can coincide with one end of the passivation layer 116, but is not necessarily limited thereto.

[0224] The inorganic layer 200 includes a third opening 200c for exposing the pad electrode PE in the second non-display area NA2. The exposed pad electrode PE and the adhesive film ACF are connected to each other at the third opening portion 200c.

[0225] The inorganic layer 200 can include a fourth opening portion 200d between the first non-display area NA1 and the second non-display area NA2. For example, the inorganic layer 200 can include the fourth opening portion 200d in the bending area BA. In the bending area BA, the third insulating layer 115c can be exposed to the outside. In this way, since the inorganic layer 200 is not formed in the bending area BA, there is no problem in which bending becomes difficult due to the addition of the inorganic layer 200. Since the fourth opening portion 200d is disposed in the entire bending area BA, the inorganic layer 200 can not be formed in the entire bending area BA, but the disclosure is not limited thereto.

[0226] Figure 13 is a plan view of a display device according to another embodiment of the disclosure. For convenience, a region in which the inorganic layer 200 is formed is indicated with diagonal lines in Figure 13

[0227] As shown in Figure 13 , the display panel 100 can include a substrate 110 including a display area AA and a non-display area NA.

[0228] In the display area AA, a plurality of light emitting devices ED are disposed in a matrix arrangement in X-axis and Y-axis directions, and a plurality of contact electrodes CCE are disposed in a region between the plurality of light emitting devices ED. The number of the plurality of contact electrodes CCE can be less than the number of the plurality of light emitting devices ED. The plurality of contact electrodes CCE can be disposed in a region between one row and another row in the matrix arrangement of the plurality of light emitting devices ED. For example, the plurality of contact electrodes CCE can be disposed between one light emitting device ED in one row and one light emitting device ED in another row adjacent thereto.

[0229] ​The non-display area NA can include a first non-display area NA1, a bending area BA, and a second non-display area NA2. For example, the first non-display area NA1 is an area surrounding at least a portion of the display area AA, the bending area BA is an area between the first non-display area NA1 and the second non-display area NA2, and the second non-display area NA2 is an area extending from the bending area BA and is an area in which a plurality of pad electrodes PE are disposed.

[0230] The inorganic layer 200 can be formed in the entire display area AA while including a plurality of first opening portions 200a at a plurality of light emitting devices ED and a plurality of second opening portions 200b at a plurality of contact electrodes CCE.

[0231] The inorganic layer 200 can be formed in the entire first non-display area NA1, but is not limited thereto, and can be formed in a portion of the first non-display area NA1.

[0232] The inorganic layer 200 can be formed in the entire second non-display area NA2 while including a plurality of third opening portions 200c in a plurality of pad electrodes PE, but is not limited thereto, and can be formed in a portion of the second non-display area NA2.

[0233] The inorganic layer 200 can not be formed in the bending area BA while including a fourth opening portion 200d in the bending area BA. However, the disclosure is not limited thereto, and the inorganic layer 200 can be formed in a partial area of the bending area BA.

[0234] Figure 14 is an enlarged plan view of a display device according to another embodiment of the disclosure. In Figure 14 , the inorganic layer 200 is formed on Figure 6 the display device, and for convenience, an area in which the inorganic layer 200 is formed is indicated with a diagonal line in Figure 14

[0235] As shown in Figure 14 , the inorganic layer 200 is disposed in the display area AA. The inorganic layer 200 includes a first opening portion 200a and a second opening portion 200b.

[0236] ​The first opening portion 200a overlaps with the plurality of light emitting devices ED. For example, the first opening portion 200a can overlap with the plurality of light emitting devices 130, 140, and 150 respectively provided in the plurality of sub-pixels SP1, SP2, and SP3. For example, the first opening portion 200a can overlap with the paired light emitting devices 130a, 130b, 140a, 140b, 150a, and 150b in the paired sub-pixels SP1a, SP1b, SP2a, SP2b, SP3a, and SP3b provided in each of the sub-pixels SP1, SP2, and SP3. For example, the first opening portion 200a can overlap with the main light emitting device ED and the redundant light emitting device ED provided in each of the sub-pixels SP1, SP2, and SP3.

[0237] The second opening portion 200b can overlap with the contact electrode CCE.

[0238] The inorganic layer 200 can overlap with a region between the plurality of light emitting devices ED. For example, the inorganic layer 200 can overlap with a region between the plurality of sub-pixels SP1, SP2, and SP3, and then can overlap with the signal lines TL1, TL2, TL3, TL4, TL5, and TL6 provided in the region between the plurality of sub-pixels SP1, SP2, and SP3. For example, the inorganic layer 200 can overlap with a region between the paired sub-pixels SP1a, SP1b, SP2a, SP2b, SP3a, and SP3b. For example, the inorganic layer 200 can overlap with a region between the main light emitting device ED and the redundant light emitting device ED provided in each of the sub-pixels SP1, SP2, and SP3.

[0239] The inorganic layer 200 can overlap with a portion of the first electrode CE1, and can overlap with a portion of the bank BNK.

[0240] Figures 15 to 18 FIG. 1 is a diagram illustrating a device to which a display device according to an embodiment of the disclosure is applied.

[0241] Referring to Figures 15 to 18 , a display device according to an embodiment of the disclosure can be included in various devices or electronic devices. For example, various electronic devices can include a wearable device 1100 as illustrated in Figure 15 , a mobile device 1200 as illustrated in Figure 16 , a laptop computer 1300 as illustrated in Figure 17 , and a monitor or TV 1400 as illustrated in Figure 18 , but embodiments of the disclosure are not limited thereto.

[0242] According to the above-described embodiments of the present disclosure, each of the wearable device 1100, the mobile device 1200, the laptop computer 1300, and the monitor or TV 1400 can include the housing units 1005, 1010, 1015, and 1020, the display panel 100, and the display device 1000.

[0243] For example, the display device according to the embodiments of the present disclosure includes a mobile device, a video phone, a smart watch, a watch phone, a wearable device, a foldable device, a rollable device, a bendable device, a flexible device, a curved device, a sliding device, a variable device, an electronic notebook, an electronic book, a portable multimedia player (PMP), a PDA (personal digital assistant), an MP3 player, a mobile medical device, a desktop PC, a laptop PC, a netbook computer, a workstation, a navigation, a vehicle display, a theater display, a television, a wallpaper device, a signage device, a game device, a laptop computer, a monitor, a camera device, a camcorder, or a home appliance.

[0244] It will be apparent to those skilled in the art that the above-described present disclosure is not limited by the above-described embodiments and drawings, and various substitutions, modifications, and variations can be made in the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, the scope of the present disclosure is defined by the appended claims, and all variations or modifications derived from the meaning, scope, and equivalent concepts of the claims are intended to fall within the scope of the present disclosure.

Claims

1. A display device comprising: a substrate including a display region and a non-display region; a pixel driving circuit in the display region on the substrate; an insulating layer on the pixel driving circuit; a bank on the insulating layer; a light emitting device provided on the bank and overlapping the bank; an electrode provided on the light emitting device and electrically connected to the light emitting device; an optical layer surrounding a side surface of the light emitting device; and an inorganic layer between the optical layer and the electrode. The inorganic layer includes a first opening portion exposing the light emitting device, and 2. The display device according to claim 1, wherein wherein the electrode is connected to the light emitting device at the first opening portion.

3. The display device according to claim 1, further comprising a contact electrode provided below the optical layer and electrically connecting the electrode and the pixel driving circuit. The optical layer includes a contact hole exposing the contact electrode, 4. The display device according to claim 3, wherein wherein the inorganic layer includes a second opening portion overlapping the contact hole, and wherein the electrode is connected to the contact electrode through the second opening portion and the contact hole. The optical layer includes:

5. The display device of claim 4, wherein, a first optical layer surrounding a side surface of the light emitting device, and fine particles are distributed in the first optical layer; and a second optical layer surrounding a side surface of the first optical layer; wherein the contact hole is provided in the second optical layer. A width of the second opening portion is the same as a width of the contact hole.

6. The display device according to claim 4, wherein The inorganic layer does not extend into the contact hole.

7. The display device according to claim 4, wherein 8. The display device according to claim 5, further comprising: a black matrix on the electrode; and a third optical layer provided between the electrode and the black matrix and overlapping the first optical layer. In a region where the electrode is not provided, the inorganic layer is provided between the black matrix and the second optical layer. The inorganic layer extends from the display region to the non-display region.

9. The display device of claim 8, wherein, The inorganic layer extends to the non-display region along a side surface of the optical layer.

10. The display device according to claim 1, wherein The insulating layer extends to the non-display region, and the inorganic layer is provided on the insulating layer extending to the non-display region.

11. The display device of claim 10, wherein, The non-display region includes:

12. The display device of claim 11, wherein, a first non-display region in contact with the display region; 13. The display device of claim 10, wherein, a bending region in contact with the first non-display region; and a second non-display region in contact with the bending region, and a pad electrode is provided in the second non-display region, wherein the inorganic layer includes a third opening portion exposing the pad electrode in the second non-display region and a fourth opening portion in the bending region.

14. The display device according to claim 1, further comprising: a first electrode provided between the bank and the light emitting device and electrically connected to the light emitting device; and a signal line provided on the insulating layer and electrically connecting the first electrode and the pixel driving circuit.

15. The display device according to claim 14, wherein, ​ ​ ​ The display device further includes a passivation layer provided over the first electrode, the bank, and the insulating layer and under the optical layer.

16. The display device of claim 14, wherein, The first electrode includes a plurality of conductive layers, and at least one of the plurality of conductive layers includes an alignment mark and / or a reflector for aligning the light emitting device.

17. A display device, comprising: a display region including a plurality of light emitting devices; a non-display region provided outside the display region; and an inorganic layer provided in the display region, wherein the inorganic layer includes a first opening portion overlapping the plurality of light emitting devices.

18. The display device according to claim 17, further comprising a plurality of contact electrodes connected to the plurality of light emitting devices in the display region, and wherein the inorganic layer further includes a second opening portion overlapping the plurality of contact electrodes.

19. The display device of claim 18, wherein, The display region includes: a pixel driving circuit for driving the plurality of light emitting devices; a first electrode electrically connecting anodes of the plurality of light emitting devices to the pixel driving circuit; and a second electrode electrically connecting cathodes of the plurality of light emitting devices to the pixel driving circuit; wherein the plurality of contact electrodes are electrically connected to the second electrode.

20. The display device of claim 17, wherein, A plurality of pixels including a plurality of sub-pixels are provided in the display region, wherein the plurality of light emitting devices include a main light emitting device and a redundant light emitting device provided in each of the plurality of sub-pixels, and wherein the first opening portion overlaps the main light emitting device and the redundant light emitting device.

21. The display device of claim 17, wherein, The non-display region includes: a first non-display region surrounding at least a portion of the display region; a bending region extending from the first non-display region; and a second non-display region extending from the bending region and including a plurality of pad electrodes, and wherein the inorganic layer includes a third opening portion overlapping the plurality of pad electrodes and a fourth opening portion overlapping the bending region, and wherein the inorganic layer is further provided in the non-display region.

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