Data processing system, computing device and data processing method

Abstract

This invention discloses a data processing system, computing device, and data processing method. The system utilizes an inference computing module to generate short-term memory requirement information for an agent based on user interaction information and to generate control commands. A driver adaptation module converts the control commands into command frames that meet a first recognition requirement and / or converts response frames generated based on command frames into status codes that meet a second recognition requirement, and parses the status codes to obtain the interaction results. A connectivity module determines the target link based on the control commands and sends command frames to a storage module and / or sends the storage module to the driver adaptation module based on response frames. Finally, the storage module stores agent memory data with different access frequencies. This invention solves the problems of low short-term memory access efficiency, large response latency, and insufficient system scalability caused by the limited traditional memory capacity, poor consistency of concurrent access by multiple agents, and lack of hardware-aware scheduling mechanisms when agents process extremely long contexts.

Description

Technical Field

[0001] This invention relates to the field of artificial intelligence technology, and in particular to data processing systems, computing devices, and data processing methods. Background Technology

[0002] With the widespread application of large language models in intelligent agent systems, users have placed higher demands on the coherence, personalization, and contextual understanding of interactive experiences. As a core component supporting the coherence of real-time interaction, the agent's short-term memory is responsible for storing key data such as the current conversation context, intermediate inference results, and temporary states of tool calls. Its performance directly determines the agent's response speed and interaction quality.

[0003] In related technologies, agent short-term memory mainly relies on local memory mapping mode and distributed caching mode. However, the above-mentioned agent short-term memory implementation is limited by the physical capacity of hardware and cannot support ultra-long dialogues or multi-task concurrent scenarios with 100k+ tokens. As a result, memory loss caused by "context overflow" is prone to occur, which disrupts the continuity of interaction, affects the interaction response speed of the agent, and lacks a dynamic hierarchical scheduling mechanism based on access frequency and hardware performance. These issues urgently need to be addressed. Summary of the Invention

[0004] This invention provides a data processing system, computing device, and data processing method to at least solve the problems in related technologies where agents, when processing extremely long contexts, suffer from low short-term memory access efficiency, large response latency, and insufficient system scalability due to limited traditional memory capacity, poor consistency of concurrent access by multiple agents, and lack of hardware-aware scheduling mechanisms.

[0005] This invention provides a data processing system, comprising: an inference computation module, a driver adaptation module, a connectivity module, and a storage module, wherein...

[0006] The reasoning and computing module is used to generate short-term memory requirement information for the agent based on the user's interaction information, and to generate control instructions based on the short-term memory requirement information for the agent.

[0007] The driver adaptation module is used to convert the control command into a command frame that meets the first recognition requirement, and / or to convert the response frame generated based on the command frame into a status code that meets the second recognition requirement, so that the inference calculation module can parse the status code to obtain the interaction result;

[0008] The connectivity module is used to determine the target link according to the control command, and send the command frame to the storage module through the target link, and / or send the response frame generated by the storage module based on the command frame to the driver adaptation module;

[0009] A storage module, comprising at least one storage unit, wherein at least a portion of the storage unit is used to store agent memory data with different access frequencies.

[0010] The present invention also provides a data processing method, comprising the following steps:

[0011] Generate short-term memory requirement information for the intelligent agent based on user interaction information, and generate control instructions based on the short-term memory requirement information for the intelligent agent;

[0012] The control command is converted into a command frame that meets the first identification requirement;

[0013] The target link is determined according to the control command, and the command frame is sent to the storage module through the target link. The response frame generated by the storage module based on the command frame is converted into a status code that meets the second identification requirement, and the status code is parsed to obtain the interaction result.

[0014] The present invention also provides a computing device, including a data processing system as described in any of the above embodiments.

[0015] This invention utilizes an inference computing module to generate short-term memory requirement information for the agent based on user interaction information and to generate control commands. A driver adaptation module converts the control commands into command frames that meet the first recognition requirement and / or converts response frames generated based on command frames into status codes that meet the second recognition requirement, and parses the status codes to obtain the interaction results. A connectivity module determines the target link based on the control commands and sends command frames to the storage module and / or sends the storage module to the driver adaptation module based on the response frames. Finally, the storage module stores agent memory data with different access frequencies. This invention solves the problems of low short-term memory access efficiency, large response latency, and insufficient system scalability caused by traditional memory capacity limitations, poor consistency of concurrent access by multiple agents, and lack of hardware-aware scheduling mechanisms when agents process ultra-long contexts. Based on a four-layer collaborative architecture, a standardized AgMemCXLUnit three-segment data model, and a three-layer heat-aware storage mechanism, it achieves hardware-level elastic expansion, low-latency access, semantic-temporal joint prefetching, and multi-agent consistency assurance for ultra-long contexts. Attached Figure Description

[0016] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1A block diagram illustrating a data processing system provided in an embodiment of the present invention;

[0018] Figure 2 This is a schematic diagram of a CXL (Compute Express Link) agent short-term memory architecture according to an embodiment of the present invention;

[0019] Figure 3 This is a schematic diagram of a three-layer short-term memory architecture for an intelligent agent according to an embodiment of the present invention;

[0020] Figure 4 This is a schematic diagram defining the structure of a CXL agent short-term memory model according to an embodiment of the present invention;

[0021] Figure 5 This is a schematic diagram illustrating the three-tier storage data migration conditions according to an embodiment of the present invention;

[0022] Figure 6 This is a flowchart illustrating a data processing method provided in an embodiment of the present invention. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present invention.

[0024] It should be noted that, in the description of this invention, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., used in this invention are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0025] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] Specifically, before introducing the embodiments of the present invention, we will first introduce the main technical solutions and existing problems of short-term memory of intelligent agents and related technologies. In the field of artificial intelligence, an intelligent agent refers to an agent that can perceive the environment and take actions to achieve specific goals. It has autonomy, adaptability and interaction capabilities. It can learn and make decisions to execute actions to influence the environment or achieve predetermined goals, and can continuously evolve to adapt to complex tasks. The implementation of short-term memory in related technologies mainly relies on two types of technical paths: (1) Local memory mapping mode: such as the "main context-external context" paging mechanism of MemGPT (Memory Grounded Pretrained Transformer) and the virtual memory simulation scheme of LETTA, which store short-term memory in the local memory of CPU (Central Processing Unit) / GPU (Graphics Processing Unit) and expand it through software layer page swapping. The local memory mapping mode is limited by the local memory capacity. The HBM (High Bandwidth) currently used by GPUs (1) High-bandwidth memory) Although the memory capacity can reach 100GB, the model weights, activation values, concurrent requests, and intermediate values ​​of large models occupy more than 90%, leaving very little space for context storage. When the context length reaches 100K, the memory demand of the cache will expand rapidly, quickly squeezing out the space of other parts, thus forcing the system to make a difficult trade-off between concurrency, inference speed, model accuracy and cost. Therefore, under the current hardware and software optimization level, 100K context is defined as "ultra-long". Therefore, when the session length exceeds the hardware memory limit, frequent data exchange overhead will be generated, resulting in a surge in latency (usually exceeding 100ms); (2) Distributed cache mode: such as the memory-level cache of MEMO (a memory management software) combined with the vector database scheme, storing high-frequency access data in distributed caches such as Redis. However, this distributed cache mode relies on TCP (Transmission Control Protocol) / IP (Internet Protocol) protocol interaction, which has too much protocol stack overhead latency and lacks hardware-level memory consistency guarantee.

[0027] Therefore, both of the above technical solutions suffer from limited scalability (limited local memory capacity and cumulative distributed cache latency) and difficulty in maintaining consistency (software lock synchronization is required for concurrent access by multiple agents).

[0028] To address the aforementioned problems, the embodiments of this invention are based on the following aspects: (1) Breaking through the local memory capacity limit, the hardware-level elastic expansion of the short-term memory of the agent is realized based on the CXL protocol to support 100K ultra-long dialogue context storage and solve the context overflow problem; (2) Designing a standardized short-term memory data model adapted to the CXL storage characteristics to realize the dynamic binding of memory data and CXL hardware resources, reducing the access latency to less than 50ms and improving the interaction response speed of the agent; (3) Proposing a dynamic hierarchical scheduling mechanism based on access frequency and hardware load to achieve accurate matching of high-frequency data low-level storage and low-frequency data high-level storage, greatly improving the utilization rate of storage resources; (4) Constructing a hardware-level anomaly handling and data consistency guarantee mechanism to ensure the integrity of memory data and service continuity when multiple agents access each other and when storage devices are abnormal, meeting the enterprise-level availability requirements.

[0029] CXL is an open interconnect protocol for cache coherence for processors, memory expansion and accelerators. The CXL protocol includes three sub-protocols: CXL.io (CXL input / output protocol), CXL.cache (CXL cache coherence protocol) and CXL.memory (CXL memory access protocol). CXL defines three types of devices: Type 1, Type 2 and Type 3 devices. These three types of devices support different storage, cache and transmission devices to meet the needs of different scenarios. In addition, CXL technology has three core advantages: (1) Low latency interconnect: It adopts the direct memory access (DMA) mechanism, and the protocol stack latency can be as low as less than 100ns, close to the local memory access latency; (2) Memory coherence: It supports two modes, CXL.cache and CXL.memory, which can realize the unified memory view of the CPU and external devices; (3) Elastic expansion: It supports hot-swapping of devices and bandwidth aggregation. The single-link bandwidth can reach 64GB / s (CXL3.0) and can be expanded to TB level / s through multiple links.

[0030] Therefore, CXL technology is adapted to the "high throughput, low latency, and scalability" requirements of agent short-term memory, but there is no mature solution for its application in agent memory scenarios. Key issues such as memory data modeling, consistency scheduling, and multi-agent sharing need to be addressed.

[0031] Specifically, Figure 1 This is a block diagram of a data processing system provided in an embodiment of the present invention.

[0032] like Figure 1As shown, the data processing system 10 includes: an inference computing module 100, a driver adaptation module 300, a connectivity module 200, and a storage module 400. The inference computing module 100 generates short-term memory requirement information for the agent based on user interaction information and generates control commands based on this requirement. The driver adaptation module 300 converts the control commands into command frames that meet a first recognition requirement, and / or converts response frames generated based on the command frames into status codes that meet a second recognition requirement, enabling the inference computing module 100 to parse the status codes and obtain the interaction result. The connectivity module 200 determines the target link based on the control commands and sends command frames to the storage module 400 via the target link, and / or sends response frames generated by the storage module 400 based on the command frames to the driver adaptation module 300. The storage module 400 includes at least one storage unit, at least a portion of which is used to store agent memory data with different access frequencies.

[0033] Specifically, this invention adopts an agent short-term memory storage architecture based on the CXL interconnection protocol. It mainly uses CXL storage as the base, a standardized data model (i.e., AgMemCXLUnit (AI fast computation link memory unit, which is the logical storage unit of this invention) data model) as the core, and dynamic hierarchical scheduling (i.e., agent memory three-layer CXL storage) as the engine to form an efficient integrated agent short-term memory solution of architecture-model-scheduling. It mainly includes: (1) Agent short-term memory architecture design: constructing a four-layer progressive architecture, namely inference computing module 100 (inference computing domain), driver adaptation module 300 (CXL driver adaptation domain), connectivity module 200 (CXL connectivity domain) and storage module 400 (memory storage domain), and integrating CXL consistency control. (1) Core components such as controller, link scheduler, and exception processor are used to solve problems such as CXL multi-device interconnection, instruction conversion, and exception recovery, and to achieve end-to-end low-latency collaboration between LLM inference and CXL storage; (2) AgMemCXLUnit data model design: Define a three-segment structure of “metadata header-data payload-CXL attribute tail”, deeply bind the semantic features of the memory data with the CXL storage attributes, design the encoding encapsulation and integrity verification process, and ensure the high compatibility between the data and CXL hardware; (3) Implementation of three-layer CXL storage for intelligent agent memory: Configure three-layer devices of L1 near-core cache, L2 extended memory and L3 shared storage, design a dynamic migration mechanism based on access frequency and hardware load, and combine INT8 quantization and inverted index to optimize sparse data storage, thereby improving storage efficiency and retrieval speed.

[0034] Specifically, such as Figure 2As shown, this embodiment of the invention constructs a collaborative system of a four-layer intelligent agent short-term memory architecture, including an inference computing module 100, a driver adaptation module 300, a connectivity module 200, and a storage module 400. Figure 2 The system consists of an inference computing domain, a CXL driver adaptation domain, a CXL connectivity domain, and a memory storage domain. Each level achieves bidirectional flow of instructions and data through the CXL driver adaptation domain, thereby ensuring a precise match between the inference requirements of LLM (Large Language Model) and the storage capacity of CXL. The composition, function, and core interface design of each level of the agent short-term memory architecture will be further explained below.

[0035] According to one embodiment of the present invention, the inference computing module 100 includes: an inference unit, configured to determine the interaction type based on the user's interaction information, perform corresponding calculation operations to obtain interaction data based on the interaction type, generate storage instructions based on the interaction data, and / or determine a query instruction based on the user's interaction information, parse the query instruction to obtain memory retrieval requirements, and generate retrieval instructions based on the memory retrieval requirements; and a prediction unit, configured to generate a prefetch list based on the current input data determined by the user's interaction information; wherein the current input data includes the semantic vector of the agent's current query and the conversation history of the most recent preset rounds, and the prefetch list includes at least one of memory type, prefetch priority, and estimated access time.

[0036] The most recent preset round can be set by those skilled in the art based on actual user interaction needs, and no specific limitations are made here.

[0037] Specifically, the composition, function and core interface design of the inference computing module 100 in the agent short-term memory architecture are described. The inference computing module 100 is the demand initiator of the agent short-term memory. The core components include the inference unit (which can also be represented as the agent inference engine) and the prediction unit (which can also be represented as the intent prediction module).

[0038] The reasoning unit can implement two core functions based on a lightweight LLM (such as Llama3-8B): (1) It is mainly used to determine the interaction type based on the user's interaction information, and to perform corresponding calculation operations to obtain interaction data based on the interaction type, and to generate storage instructions based on the interaction data, such as performing dialogue generation, task reasoning and other calculations, to generate interaction data that needs to be stored in short-term memory (such as user query response, intermediate reasoning steps), and to pass the storage instructions to the driver adaptation module 300; and / or, (2) It determines the query instructions based on the user's interaction information, and parses the query instructions to obtain memory retrieval requirements, and generates retrieval instructions based on the memory retrieval requirements, such as determining memory retrieval requirements by parsing external query content (such as "reviewing historical dialogues" requires retrieving early Context type memories), and to pass the retrieval instructions to the driver adaptation module 300.

[0039] The prediction unit is used to generate a prefetch list based on the current input data determined by the user's interaction information. The current input data includes the semantic vector of the agent's current query (generated by Sentence-BERT (Bidirectional Encoder Representations from Transformers, with a dimension of 768) and the session history of the most recent preset rounds (e.g., the last 5 times). The output prefetch list includes at least one of the following: memory type (Context, CoT, ToolResult, etc.), prefetch priority, and estimated access time.

[0040] Furthermore, the prefetch priority in the output prefetch list is a two-dimensional intelligent prediction mechanism that integrates semantic understanding capabilities and temporal behavior patterns, aiming to achieve accurate, efficient, and proactive prefetching of short-term memory data of the agent.

[0041] Specifically, the prefetch priority is dynamically evaluated based on semantic similarity, semantic weight, temporal relevance, and temporal weight to assess the prefetch value of each candidate memory.

[0042] Semantic similarity measures the relevance of the current user's query intent to historical memory content in the semantic space. The system uses dense vector models such as Sentence-BERT to encode the current query text into a 768-dimensional semantic vector and calculates its cosine similarity with the memory vectors stored in historical memory units (such as AgMemCXLUnit). In other words, semantic similarity is determined by the cosine similarity between the query vector and the historical memory vector. If the similarity is greater than a preset semantic relevance threshold (e.g., 0.7), the two are considered highly semantically related and have potential reuse value. Temporal correlation is used to capture the sequential dependency patterns in user interaction behavior. The system can construct a Markov chain model based on historical session logs to statistically analyze the state transition probability between "query type" and "memory type." For example, when a large number of users initiate a "Python tutorial query" and then immediately access "tool recommendation memory" (such as IDE (Integrated Development)... Environment (Integrated Development Environment) configuration, debugging techniques, etc.), if the transition probability triggered by the current query is greater than the Markov transition threshold (e.g., 0.8), then a strong temporal correlation is considered to exist, and the prefetch priority should be increased. Therefore, the prefetch priority in this embodiment of the invention is calculated by the following expression:

[0043] Prefetch priority = semantic similarity × semantic weight + temporal relevance × temporal weight;

[0044] The semantic weight can be set to 0.6, and the temporal weight can be set to 0.4. Both the semantic weight and the temporal weight can be dynamically adjusted according to the application scenario (e.g., the teaching scenario emphasizes the temporal aspect, while the question-and-answer scenario emphasizes the semantic aspect).

[0045] Furthermore, when the calculated prefetch priority is greater than or equal to the prefetch high threshold (e.g., 0.8), the active prefetch process is automatically triggered. At this time, the inference calculation module 100 generates a prefetch instruction, which is then encapsulated by the driver adaptation module 300 and scheduled to the target link through the connectivity module 200. This allows the target memory data to be migrated from low-level storage (e.g., L3 shared storage) to high-level storage (e.g., L1 near-core cache or L2 extended memory) in advance. This significantly shortens the data access path during subsequent actual retrieval, compressing the I / O latency, which may originally be as high as tens of milliseconds, to the sub-millisecond level. Thus, without increasing the perceived latency for the user, the intelligent memory service that is ready upon prediction is achieved.

[0046] Thus, the reasoning computing module 100 achieves precise scheduling and proactive loading of the agent's short-term memory by integrating interaction type recognition, memory requirement generation, and prefetching prediction based on semantic-temporal dual dimensions, significantly reducing retrieval latency, improving context response coherence, and enhancing overall system efficiency.

[0047] According to an embodiment of the present invention, the driver adaptation module 300 includes: an instruction conversion unit, configured to convert control instructions into command frames that meet a first identification requirement; and a status parsing unit, configured to convert response frames generated based on command frames into status codes that meet a second identification requirement, so that the inference calculation module 100 parses the status codes to obtain the interaction results.

[0048] According to an embodiment of the present invention, the driver adaptation module 300 further includes: an exception handling unit, configured to determine a target processing strategy based on the current exception type of the data processing system, and to perform exception handling on the data processing system according to the target processing strategy; wherein the current exception type includes at least one of device offline, data migration failure, and consistency lock timeout.

[0049] Specifically, the composition and function of the driver adaptation module 300 in the short-term memory architecture of the intelligent agent are explained. The driver adaptation module 300 undertakes the bridging function of "software interface instruction parsing, hardware operation conversion, and hardware status feedback". The core components include an instruction conversion unit (which can also be represented as an instruction converter), a status parsing unit (which can also be represented as a status parser), and an exception handling unit (which can also be represented as an exception processor).

[0050] The instruction conversion unit, as the core component of the driver adaptation module 300, is used to convert control instructions (such as MemCXL_Store storage instructions and MemCXL_Retrieve retrieval instructions) of the AgMemCXL software layer of the intelligent agent CXL memory module into command frames that meet the first recognition requirements (i.e., CXL hardware protocol specifications). For example, when receiving the control instruction "store Context type AgMemCXLUnit to L2 extended memory", the instruction conversion unit will parse the semantic information such as the target storage level, memory unit type, and data length, and encapsulate it into a standard CXL.memory protocol WriteRequest frame. The frame contains key parameters such as the target storage (such as CXL storage device) device ID (Identifier), storage offset address, transmission data length, and consistency mode to ensure that the hardware can accurately execute the operation.

[0051] The status resolution unit is used to receive response frames returned by the CXL hardware after executing commands in real time. For example, when the CXL storage device successfully completes a write operation, it will return a WriteAck write acknowledgment frame. Alternatively, if a cache line conflict or consistency lock failure occurs, it may return an Invalidate consistency interruption frame. The status resolution unit captures these response frames in real time and converts them into standardized status codes that meet the second recognition requirement (i.e., can be understood by the upper-layer software) according to predefined mapping rules. For example, the WriteAck write acknowledgment frame is resolved into the WRITE_SUCCESS status code, and the Invalidate consistency interruption frame is resolved into the LOCK_CONFLICT status code. The status codes, along with the relevant context, are fed back to the inference computing module 100, enabling the inference computing module 100 to resolve the status codes and obtain the interaction results. Ultimately, this allows the software layer to perceive the hardware operation results in real time, facilitating subsequent process decisions.

[0052] As a key fault-tolerant component of the driver adaptation module 300, the exception handling unit can detect and respond to three types of core exceptions that occur during the operation of the CXL intelligent agent memory system in real time, such as CXL device offline, data migration failure, and consistency lock timeout. It can determine the target processing strategy for the current exception type of the data processing system and perform exception handling on the data processing system according to the target processing strategy to ensure the high availability and data integrity of the system.

[0053] Specifically, when a CXL storage device goes offline (the device's heartbeat is detected every 20ms by the CXL_Device Monitor, and it is determined to be offline if the timeout exceeds 20ms), a failover is immediately triggered. All AgMemCXLUnits on the CXL storage device are marked as "pending recovery". Alternative resources are allocated from the pre-configured backup CXL device pool, and the MemCXL_Recover interface is called to recover data from the most recent synchronization point. During the recovery process, all access requests to the device are uniformly returned with a "temporarily unavailable" status code to avoid request blocking.

[0054] Optionally, when data migration fails (such as L2-L1 level migration being interrupted due to insufficient bandwidth or verification error), the exception handling unit executes a safe rollback mechanism, that is, it retains the original data in the original level to prevent loss and records a failure log containing the reason for failure, timestamp, and target address. Then, it automatically retryes after an interval of 100ms. If three consecutive retries fail, the migration strategy is dynamically adjusted, that is, the target level is adjusted. For example, if L2-L1 level migration fails, it is temporarily stored in L2 and rescheduled when system resources are sufficient to avoid getting stuck in an invalid loop.

[0055] Optionally, when a consistency lock timeout occurs (MemCXL_Lock's default lock wait timeout is 50ms, and Exclusive privileges are not obtained within the timeout period), LOCK_TIMEOUT is returned. At this time, the exception handling unit initiates the degradation and decoupling process: it sends a LockAbort interrupt command to the consistency controller in the connectivity module 200 to forcibly terminate the current lock request, and switches the involved AgMemCXLUnit to the "Private" access mode (only the creator is allowed to access), and asynchronously notifies other intelligent agents to synchronize their states through the application layer message queue, thereby effectively avoiding the risk of deadlock and maintaining the system's continuous service capability.

[0056] Thus, the semantic bridge between hardware and software jointly constructed by the instruction conversion unit and the state parsing unit not only shields the complexity of the underlying CXL protocol, allowing the inference computing module 100 to initiate efficient storage operations without being aware of hardware details, but also ensures the interpretability and programmability of the operation results. This enables the system to make dynamic decisions based on status codes (such as retrying, downgrading, or triggering exception handling), thereby significantly improving the reliability, compatibility, and end-to-end interaction efficiency of the agent short-term memory system. At the same time, based on a targeted, automated, and closed-loop exception handling mechanism, the exception handling unit not only significantly improves the robustness and self-healing ability of the CXL agent memory system in complex deployment environments, but also ensures the consistency, security, and service continuity of memory data in multi-agent concurrent scenarios, providing a reliable underlying storage guarantee for ultra-long context large model applications.

[0057] According to one embodiment of the present invention, the connectivity module 200 includes: a link scheduling unit, configured to determine the current request type based on control instructions, and to determine the target link based on the current request type and the bandwidth utilization of at least one link.

[0058] According to one embodiment of the present invention, the connectivity module 200 further includes: a control unit, configured to query the current state of the status register according to a control instruction, and send an interrupt instruction to at least one other visitor if both the current state and the current visitor list length meet preset conditions, so as to update the current requesting agent identifier in the visitor list memory according to the current visitor list length if a failure confirmation response is received from at least some of the visitors.

[0059] According to one embodiment of the present invention, the control unit includes a status register and a visitor list memory, wherein the status register is used to store the consistency state of the agent's short-term memory unit; and the visitor list memory is used to store the identity identifiers of agents currently holding access permissions to the agent's short-term memory unit.

[0060] The composition and function of the connectivity module 200 in the short-term memory architecture of the intelligent agent are explained. The connectivity module 200 is the core layer for realizing unified management of multiple devices and maintenance of data consistency in CXL. Logically, the connectivity module 200 is located between the inference computing module 100 and the driver adaptation module 300, but the function of the connectivity module 200 is to handle the lower level to ensure the connectivity and consistency of the CXL storage system. The core components of the connectivity module 200 include the link scheduling unit (which can also be represented as the link scheduler) and the control unit (which can also be represented as the CXL consistency controller).

[0061] The link scheduling unit, as the core component of the connectivity module 200, is responsible for real-time monitoring of the bandwidth utilization of multiple CXL links within a node in an interconnected network composed of multiple parallel CXL links. It intelligently selects the optimal transmission path for each storage request type from the driver adaptation module 300 to maximize bandwidth utilization and avoid congestion. Its workflow deeply integrates request semantics and real-time link status: First, the link scheduling unit parses the request type identifier in the control command, which mainly includes read requests, write requests, and migration requests. Read requests (such as Context type memory retrieval) are characterized by high frequency, low bandwidth, and low latency sensitivity; write requests (such as ToolResult type memory storage) are characterized by low frequency, high bandwidth, and the need to ensure atomicity; migration requests (such as L2-L1 level prefetching or L3-L2 backfilling) are characterized by batch processing, extremely high bandwidth, and tolerance for moderate latency.

[0062] Then, the link scheduling unit collects the bandwidth utilization of each CXL link in real time (e.g., updated every 10ms via a hardware performance counter) and matches target links according to a preset dynamic allocation strategy. For example, for read requests, links with a current bandwidth utilization of less than the first preset utilization (e.g., below 40%) are prioritized as target links to ensure sub-millisecond response. For write requests, links with a bandwidth utilization of less than the second preset utilization (e.g., below 60%) are allocated as target links to reserve sufficient bandwidth to ensure complete data writing. For migration requests, a multi-link aggregation transmission strategy is adopted to fragment large blocks of data and send them concurrently to two or more links. At the same time, it is ensured that the bandwidth utilization of a single migration request is less than the third preset utilization (e.g., less than 30% of the total bandwidth of the link) as the target link to prevent sudden traffic from crowding out other critical services.

[0063] Finally, the link scheduling unit calls the unified scheduling interface CXL_LinkDispatch (based on the CXL link distribution interface) (RequestType, DataSize), and inputs the request type and data size parameters. It outputs the optimal link ID after comprehensive evaluation, which is then used by the upper-layer software to initiate CXL hardware operations through the optimal link.

[0064] Thus, through the type-aware and load-balanced scheduling mechanism, the link scheduling unit effectively avoids the surge in tail latency caused by single-link overload, significantly improving the overall throughput and service quality stability of the CXL intelligent agent memory system, especially in high-concurrency and mixed-load scenarios.

[0065] Furthermore, the control unit, as the core logic unit of the consistency controller in the connectivity module 200, is based on the MESI protocol extension design and is responsible for ensuring strong consistency through a hardware-level state machine when multiple agents concurrently access the shared agent short-term memory unit AgMemCXLUnit. The control unit includes a state register and an access list memory. The state register is used to store the consistency state of the agent short-term memory unit AgMemCXLUnit, and the access list memory is used to store the identity of the agent currently holding access to the agent short-term memory unit.

[0066] MESI is a cache coherence protocol designed to address cache coherence issues in multi-core CPUs. It aims to ensure that cached data across multiple cores remains consistent with memory data. MESI achieves cache coherence through a state machine mechanism and bus sniffing technology, while simultaneously reducing bus bandwidth pressure. The MESI protocol defines four cache block states: Modified: Data in the cache has been modified but not yet written back to memory; Exclusive: Data in the cache is consistent with memory and exists only in the current core's cache; Shared: Data in the cache is consistent with memory, but exists in the caches of multiple cores; Invalidated: Data in the cache is invalid and cannot be read.

[0067] Specifically, in this embodiment of the invention, when a LockRequest control command is received from the upper layer (e.g., an agent requests to write to a memory unit in Exclusive mode), the control unit first queries the status register corresponding to the AgMemCXLUnit to obtain its current consistency state (supporting the implementation of five-state transitions: Invalid / Prefetching / Shared / Exclusive / Modified, abbreviated as I / P / S / E / M). The initial state is Invalid. At the same time, the control unit reads the visitor list memory to obtain the list of agent IDs currently holding access to the unit and their length. If it detects that the current state is Shared (S) and the visitor list length is >1, that is, multiple agents are sharing the reading of the memory unit, the control unit immediately broadcasts an Invalidate interrupt command to all other visitors except the current requester, requiring them to release their cached copies of the unit and switch to the Invalid state.

[0068] Then, the control unit enters a waiting state. Only after receiving an InvalidateAck response confirmation from all other visitors does it consider the shared copy to be safely invalidated. At this time, the control unit updates the status register of the AgMemCXLUnit to the Exclusive (E) state and updates the visitor list to the ID of the currently requesting agent. That is, it clears the contents of the visitor list memory and resets it to contain only the unique ID of the currently requesting agent, thereby completing the atomic conversion from shared read to exclusive write.

[0069] Thus, by directly managing the state and visitor identity through hardware registers, the traditional software locks or operating system kernel intervention are completely bypassed, compressing the consistency maintenance latency to the microsecond level. This significantly reduces access conflicts and synchronization overhead in high-concurrency scenarios involving multiple agents. At the same time, the five-state extension design further optimizes the prefetching and data write-back efficiency, providing a low-latency, high-throughput, and strongly consistent underlying collaborative foundation for the CXL agent short-term memory system.

[0070] According to one embodiment of the present invention, the storage module 400 includes: a first storage unit for storing agent memory data with an access frequency greater than a first preset access frequency; a second storage unit for storing agent memory data with an access frequency less than or equal to the first preset access frequency and an access frequency greater than a second preset access frequency; and a third storage unit for storing agent memory data with an access frequency less than or equal to the second preset access frequency.

[0071] The first preset access frequency and the second preset access frequency can both be set by those skilled in the art based on actual data interaction needs or data transmission efficiency, etc., and are not specifically limited here.

[0072] This document explains the hardware selection, performance parameters, and compatible data types of the storage module 400 in the short-term memory architecture of the intelligent agent. Figure 3 As shown, the storage module 400 adopts a three-tiered CXL storage architecture oriented towards the access frequency of short-term memory of intelligent agents. The hardware selection, performance parameters and adaptation logic are designed around the core principle of "access frequency determines storage location" to ensure that each type of memory data is stored in the optimal level. The storage module 400 includes three layers of CXL storage devices: the first storage unit (which can also be represented as the L1 near-core cache layer), the second storage unit (which can also be represented as the L2 extended memory layer), and the third storage unit (which can also be represented as the L3 shared storage layer). Each layer is connected to the connectivity module 200 through a CXL3.0 link. Based on the matching principle of "access frequency-performance requirements", memory data with different access frequencies are accurately mapped to physical storage media with matching performance and cost to achieve dynamic scheduling and optimized storage of the first, second and third storage units, ensuring low-latency access to high-frequency data and efficient storage of low-frequency data.

[0073] The first storage unit uses a CXL.cache type high-speed cache card, which is directly connected to the CPU core through a PCIe (Peripheral Component Interconnect Express) 5.0 slot. It has a storage capacity in the GB range and provides μs-level random read / write latency and 64GB / s bandwidth. The data type stored is "ultra-high access frequency" agent memory data. That is, the first storage unit is specifically used to store ultra-high-frequency memory data with an access frequency higher than the first preset access frequency (such as AccessCount > 10 times / session). This mainly includes: the context of the last 3 rounds of dialogue, the results of high-frequency tool calls, and prefetched data marked as high priority by the prediction unit. In addition, when the agent initiates a "real-time interaction" request (such as the user asking questions continuously with an interval of <10s), the newly generated Context type memory unit will be temporarily stored in this level to ensure that the retrieval latency is <1μs, which meets the requirements of real-time interaction experience.

[0074] It should be noted that the first storage unit supports KV (Key-Value) caching acceleration, which is stored in a dedicated KV cache area through the SparseKV field, with semantic matching latency ≤100ns; it does not support long-term storage, the default CacheTTL is 1 hour, and it will automatically degrade to L2 after the timeout; when the device utilization exceeds the high load threshold of CXL, the dimensionality reduction process is triggered to release low-access frequency data to L2.

[0075] The second storage unit uses a CXL.memory type storage module, deployed in a dedicated CXL memory slot, with a storage capacity in the hundreds of GB range. It supports high-bandwidth transmission, access latency in the 10μs range, and random read / write. The data type it stores is "medium-frequency access" agent memory data, specifically including: medium-hot agent memory data (e.g., 5 < AccessCount ≤ 10) with an access frequency less than or equal to a first preset access frequency and greater than a second preset access frequency, such as early dialogue context (4-10 rounds), with an access frequency lower than the last 3 rounds but higher than previous rounds. The historical dialogue and thought chain reasoning steps (CoT type) are accessed 2-5 times per step and require step-by-step backtracking; the prediction unit marks the medium-priority prefetch data, and the prefetch priority is within the prefetch threshold, without the need for the highest performance; this level also serves as the default storage level for newly generated AgMemCXLUnits, ensuring the balance of initial storage. When the utilization rate of the first storage unit is greater than the CXL high load threshold (e.g., 80%), it receives low-access-frequency memory data degraded from the first storage unit, and the judgment condition is AccessCount ≤ high-frequency access threshold (e.g., 10), thereby achieving dynamic balancing of storage resources.

[0076] It should be noted that the second storage unit supports multi-module bandwidth aggregation and batch data migration; CacheTTL is 24 hours by default, and automatically degrades to the third storage unit after timeout; when the device utilization exceeds the high load threshold of CXL, the dimensionality reduction process is triggered, and data with AccessCount ≤ access high frequency threshold is migrated to the third storage unit.

[0077] The third storage unit uses SSD (SolidStateDrive) storage devices deployed in a dedicated CXL slot, with a capacity of TB-level and access latency in the hundreds of μs level. It supports random read and write and stores agent memory data with a storage access frequency less than or equal to a second preset access frequency (e.g., AccessCount ≤ 5). Specifically, this includes: overdue degraded data (judgment condition: CacheTTL timeout and AccessCount ≤ low-frequency access threshold), tool call logs (ToolResult type, only need to be archived and not frequently retrieved), historical data shared across agents (occasional access by multiple agents, no need for low latency), and low-priority data that failed prefetching (prefetch priority < prefetch low threshold, no need for high-level storage). When the utilization rate of the second storage unit is greater than the CXL high load threshold, this level receives data degraded from the second storage unit. At the same time, the third storage unit serves as the "final storage layer" for short-term memory, and all data cleanup operations are triggered only from this level to avoid affecting the performance of higher-level storage.

[0078] It should be noted that the third storage unit supports shared access by multiple agents, and the shared permissions are maintained through the CXL consistency controller; CacheTTL is 7 days by default, and a cleanup process is triggered after the timeout; when the device utilization exceeds the high load threshold of CXL, internal cleanup is triggered, deleting the lowest 10% of the data in AccessCount and releasing storage resources.

[0079] Therefore, the three-layer storage unit dynamically updates data popularity through the AccessCount counter and CacheTTL dual mechanism, and the CXL-driven adaptation module periodically scans the access statistics information in the metadata header to automatically trigger cross-layer migration. This design significantly improves the overall storage resource utilization (from 40% to >70% in actual tests) while ensuring the ultimate performance of high-frequency data, effectively supporting the efficient, flexible and low-cost operation of large language model agents in ultra-long context scenarios.

[0080] Furthermore, such as Figure 5 As shown, based on the aforementioned three-tier storage unit, it possesses hierarchical scheduling capabilities. The core of hierarchical scheduling is to realize the dynamic migration of stored data between the first, second, and third storage units. This is led by the storage migration module, combining timed scanning and event triggering mechanisms to ensure data consistency and service continuity during the migration process. Specific functions are as follows:

[0081] (1) Core capabilities of the storage migration module: The storage migration module is deployed in the CXL storage manager and has full-process management capabilities of "migration decision-data transfer-status update". Among them, the migration decision is based on three major indicators: AccessCount, CacheTTL and LoadMetrics (storage load). First, the access frequency level of the data (high frequency / medium frequency / low frequency) is determined according to AccessCount to determine the target migration level; second, it is checked whether CacheTTL has expired, and data that has expired is forcibly downgraded; finally, the storage load in LoadMetrics is referenced, and data from high-load devices (utilization > CXL load high threshold) is migrated out first to avoid load concentration. For example, when AccessCount=12 and the current level is L2, the decision is to upgrade from L2 to L1; If ssCount=3 and CacheTTL times out, the decision is to reduce the size of the memory cell to L2-L3. Data transmission uses CXLDMA (Direct Memory Access) technology, which eliminates the need for CPU intervention, reducing host resource consumption. The transmission rate depends on the target link bandwidth. During transmission, data is transmitted in DMA_Read / DMA_Write frames of the CXL.memory protocol, ensuring low latency and high reliability. State update: After migration, three state update operations are performed: First, the StorageTier field of AgMemCXLUnit is modified to update its storage tier attribute; second, the device data index of the CXL storage manager is updated to record the new storage location of the memory unit; third, the CXL consistency controller is notified to update the data storage location to ensure that the correct device can be located during subsequent consistency maintenance.

[0082] (2) Migration triggering mechanism: Migration triggering is divided into two types: timed triggering and event triggering, covering both regular scheduling and abnormal load handling scenarios. Among them, timed triggering: The storage migration module performs a global scan every storage scan interval (e.g., 100ms), traverses the AccessCount and CacheTTL of all AgMemCXLUnits, and generates a migration queue according to the following rules:

[0083] Upgrade queue: Filter memory cells whose AccessCount > access frequency threshold and current level is L2, and add them to the L2-L1 upgrade queue; Filter memory cells whose prefetch priority ≥ prefetch high threshold and current level is L2, and add them to the L2-L1 upgrade queue.

[0084] Dimensionality reduction queue: Memory units with AccessCount ≤ high access frequency threshold and current level L1 are added to the L1-L2 dimensionality reduction queue; memory units with CacheTTL timeout and current level L2 are added to the L2-L3 dimensionality reduction queue.

[0085] Queue priority: Dimensional upgrade requests have higher priority than dimensional downgrade requests (high-frequency data is prioritized to ensure low latency), and memory units with higher AccessCount are migrated first under the same priority (the higher the access frequency, the higher the priority).

[0086] Event triggering: Triggered by abnormal storage load or sudden access demand, ensuring balanced storage resources under abnormal scenarios, mainly including:

[0087] L1 high load trigger: When the CXL_MonitorLoad() interface returns L1 near-core cache layer utilization > CXL high load threshold, immediately scan all memory units in L1, add the lowest 20% of AccessCount data to the L1-L2 dimensionality reduction queue, and quickly release L1 resources;

[0088] Continuous retrieval trigger: When a smart agent's memory unit is retrieved 3 times in a row (AccessCount is incremented by 1 until it reaches or exceeds the high-frequency access threshold), the L2-L1 dimensionality upgrade process is immediately triggered without waiting for timed scanning, ensuring that high-frequency access data is quickly migrated to L1;

[0089] L3 High Load Trigger: When the utilization rate of the L3 shared storage layer is greater than the CXL high load threshold, the L3 internal cleanup process (non-migration) is triggered, the 10% of data with the lowest AccessCount are selected, and the deletion operation is performed (exclusive lock needs to be applied for first and the data synchronized to the external archive storage), and L3 resources are released.

[0090] To ensure consistency during the migration process and avoid data inconsistencies caused by concurrent access by multiple agents, the migration process must ensure that the data is in an "immutable" state. This mainly includes: exclusive lock request, data integrity verification, state update and source data deletion, and failure rollback mechanism.

[0091] Among them, the exclusive lock request: the migration module calls the MemCXL_Lock(UnitID,"Exclusive") interface to request an exclusive lock on the target memory unit from the CXL consistency controller; after receiving the request, the controller changes the consistency state of the memory unit to the Exclusive state, prohibiting other agents from performing read / write operations, and ensuring that the data is not modified during the migration.

[0092] Data integrity verification: After receiving the data, the target storage device returns a DMA_Ack acknowledgment frame; the migration module calls the MemCXL_Validate(UnitID) interface to verify the integrity of the data in the target device (hash check, format check) to ensure that there are no errors in the transmission process.

[0093] Status update and source data deletion: After verification, update the StorageTier and StorageOffset fields of AgMemCXLUnit (to record the new storage address); send a Data_Delete command to the source storage device to delete the source data and avoid duplicate storage; call the MemCXL_Unlock(UnitID) interface to release the exclusive lock, and the CXL consistency controller restores the original consistency state of the memory unit.

[0094] Failure rollback mechanism: If a failure occurs during the migration process (such as DMA_Ack timeout or verification failure), a rollback operation is immediately performed: retain the data in the source storage device to avoid data loss; send a Data_Delete command to the target storage device to delete incomplete data; call MemCXL_Unlock(UnitID) to release the lock; record the migration failure log (including the reason for the failure), and re-initiate the migration after 100ms.

[0095] According to an embodiment of the present invention, the data processing system 10 described above further includes: a data processing module, used to encapsulate semantic identification information and hardware attribute information for memory interaction data, wherein the semantic identification information includes the position information of the memory data to be stored in the interaction sequence, and the hardware attribute information includes the current storage level, compression format and integrity check value of the memory data to be stored.

[0096] According to one embodiment of the present invention, a data processing module includes: a metadata header, a data payload, and a computed fast link attribute tail. The metadata header is used to locate the address storage location of the memory interaction data, record the time series and data access frequency of the memory interaction data, and verify the memory interaction data. The data payload includes the memory interaction data and is used to characterize the memory medium type, data content, and sparse key-value pair storage structure of the memory interaction data. The computed fast link attribute tail is used to verify the transmission integrity of the metadata header and the data payload.

[0097] Specifically, such as Figure 4As shown, the data processing module is defined. In this embodiment of the invention, the data processing module adopts a standardized encapsulation unit designed specifically for the CXL agent short-term memory system, namely the agent CXL memory unit AgMemCXLUnit. Its total length is dynamically adjusted according to the data payload type. The Context type (dialogue context) is about 1-2KB, and the ToolResult type (tool call result) is about 5-10KB. It adopts a three-segment structure of field functions and CXL storage adaptation logic. The whole mainly includes metadata header, data payload and CXL attribute tail, which are used to encapsulate semantic identification information and hardware attribute information for memory interaction data. The semantic identification information includes the position information of the memory data to be stored in the interaction sequence, and the hardware attribute information includes the current storage level, compression format and integrity check value of the memory data to be stored. This achieves deep adaptation between agent memory data and CXL storage characteristics, ensuring that data can be stored, retrieved and migrated efficiently. The following details the field functions and design logic of each part.

[0098] The metadata header, located at the beginning of the unit, has a fixed length of 256 bytes. It is used to locate the address storage location of the memory interaction data, record the time series and data access frequency of the memory interaction data, and verify the memory interaction data. The data payload includes the memory interaction data, which is used to characterize the memory medium type, data content, and sparse key-value pair storage structure of the memory interaction data. The computed fast link attribute tail (i.e., CXL attribute tail), located at the end of the unit, contains hardware control information for the CXL protocol stack and is used to verify the transmission integrity of the metadata header and data payload.

[0099] Thus, through this three-stage design that deeply couples semantics and hardware, AgMemCXLUnit not only enables the upper-layer inference engine to efficiently parse memory content, but also enables the underlying CXL storage system to schedule, precisely compress, securely migrate, and quickly verify on demand. This allows for low-latency, high-reliability, and high-efficiency end-to-end memory management in complex scenarios such as ultra-long contexts, high concurrency, and multi-agent collaboration.

[0100] According to one embodiment of the present invention, the metadata header includes: a session identifier, a timestamp, an access count, and a data hash value, wherein the session identifier is used to locate the address storage location of the memory interaction data; the timestamp is used to record the time series of the memory interaction data so as to generate a migration instruction for the memory interaction data when the difference between the current time and the generation time is greater than a preset threshold; the access count is used to store the access frequency of the memory interaction data; and the data hash value is used to verify the memory interaction data based on the hash check value calculated based on the data payload.

[0101] Specifically, the field functions and design logic of the metadata header in the data processing module are explained. The metadata header is a fixed 256 bytes, used to implement the unique identification, state tracking and integrity verification of AgMemCXLUnit. It mainly includes: Session ID: a 32-byte string, a globally unique ID generated by the UUID-v4 algorithm, with the format "Agent-XXX_User-XXX_UUID", where the first XXX is the agent ID and the second XXX is the user ID, ensuring that memory units are not confused across agents and user sessions. This field is uniformly addressed and associated with the HDM (Host-managed Device Memory) of the CXL connected domain. The session ID can quickly locate the address range of the memory unit in CXL storage, improving retrieval efficiency.

[0102] Timestamp: An 8-byte 64-bit integer that records the generation time (in milliseconds) of AgMemCXLUnit. It is used in the subsequent expiration cleanup process. When the difference between the current time and the timestamp exceeds CacheTTL (Cache Time to Live), storage tier degradation is triggered, releasing higher-level storage resources.

[0103] Access Count: A 4-byte 32-bit integer, initially set to 0, and automatically incremented by 1 each time it is retrieved. It is used for storage level scheduling decisions. For example, when AccessCount > the high-frequency access threshold (e.g., 10), L2-L1 dimensionality increase is triggered, and when AccessCount ≤ the low-frequency access threshold (e.g., 5), L2-L3 dimensionality decrease is triggered, thus realizing dynamic storage based on access frequency.

[0104] Data Hash: A 64-byte string that uses SHA-256 to calculate the hash value of the data payload (Content field) based on the data payload content. It is used to verify data integrity during reading or migration, that is, to verify before writing to ensure that the data has not been tampered with, and to verify after reading to ensure that there are no errors in the transmission process, preventing semantic distortion caused by link noise or storage failure. If the hash is inconsistent, the MemCXL_Recover (CXL storage recovery interface) interface is triggered to recover the data from the backup device.

[0105] Furthermore, after removing the total number of bytes for session identifier, timestamp, access count, and data hash value, the remaining 148 bytes are reserved fields for feature expansion. These fields can be used to store encryption identifiers (such as whether the data is encrypted), compression identifiers (such as whether sparse data optimization is used), etc., to adapt to future feature upgrade needs.

[0106] Thus, by uniformly recording session identifiers, timestamps, access counts, and data hash values, the metadata header enables precise positioning, timeliness awareness, popularity statistics, and integrity verification of memory units, providing lightweight and highly reliable basic metadata support for the efficient scheduling, secure migration, and automatic elimination of the CXL intelligent agent memory system.

[0107] According to an embodiment of the present invention, the data payload includes: a memory type field, a data content field, and a sparse key-value pair field, wherein the memory type field is used to identify the type of memory medium for storing interactive data; the data content field is used to identify the content of the stored interactive data; and the sparse key-value pair field is used to identify the sparse key-value pair storage structure used for storing interactive data.

[0108] Specifically, the data payload stores the core content of short-term memory, adapting to different formats based on memory type. It has a variable length, ranging from a minimum of 256 bytes to a maximum of 64KB. The field functions and design logic are as follows: It mainly includes a memory type field (MemoryType), a data content field (Content), and a sparse key-value pair field (SparseKV). The memory type field is a 4-byte enumeration type with values ​​including Context (dialogue context, such as user queries and agent responses), CoT (thought chain reasoning steps, such as "analyze user needs - call tools - generate results"), and ToolResult (data returned by tool calls, such as API response JSON). This field is used to adapt to the block size characteristics of CXL storage: the L1 near-core cache has a block size of 4KB, prioritizing the storage of Context types (small size, high access frequency); the L3 shared storage has a block size of 64KB, which can store larger ToolResult types, improving storage efficiency.

[0109] Data content fields: Variable type fields, adapted to the corresponding format according to MemoryType: Context type is a UTF-8 encoded text fragment to ensure the readability of the dialogue content; CoT type is a string array, with each array element corresponding to a single-step inference step, facilitating step-by-step retrieval; ToolResult type is a JSON structure containing ToolName (tool name), ResultData (call result data), and ErrorCode (error code) to ensure the integrity of tool call information.

[0110] Sparse key-value pair field: A key-value pair array valid only for Context type, with a dimension of 512. It extracts the top-20 tokens with attention scores > attention threshold (e.g., 0.8) through the LLM attention mechanism. It stores the KeyVector (a 512-dimensional float array) and ValueVector (a 512-dimensional float array) of each token string. This field is stored in the KV cache of CXL storage and supports CXL hardware-accelerated vector comparison operations, which can significantly reduce semantic matching latency and improve retrieval speed.

[0111] Thus, by encapsulating memory types, semantic content, and sparse key-value pairs in a structured manner, the data payload enables memory data to possess semantic parsing, hardware adaptability, and storage efficiency, effectively supporting the CXL intelligent agent system in the precise scheduling, compressed storage, and accelerated access of multiple types of memory.

[0112] Furthermore, the fast link attribute tail is used to achieve the adaptation between AgMemCXLUnit and CXL storage hardware. The field functions and design logic are as follows: mainly including: storage tier field (StorageTier), consistency mode field (ConsistencyMode), and cache time to live field (CacheTTL). Among them, the storage tier field is a 4-byte enumeration type that specifies the target storage tier (L1 / L2 / L3). The initial value is the default L2 extended memory, which is dynamically adjusted according to AccessCount. This field interacts with the CXL storage manager to determine the target device and physical address of the memory unit to be written, ensuring that the data storage location meets the access frequency requirements.

[0113] Consistency Mode Field: A 4-byte enumeration type that sets the consistency mode for multi-agent access. Values ​​include Exclusive (exclusive read and write permissions for a single agent), Shared (shared read-only permissions), and Private (accessible only to the memory cell creator). This field informs the CXL consistency controller to determine the consistency state transition rules for the memory cell and avoid conflicts caused by concurrent access by multiple agents.

[0114] The cache lifetime field is a 4-byte 32-bit integer in seconds, with a default value of 3600 (1 hour). It represents the maximum lifetime of a memory unit in the current tier. Upon timeout, the automatic degradation process of CXL storage is triggered, migrating the memory unit to a lower storage tier (such as L2-L3) and releasing higher-level storage resources.

[0115] Furthermore, after removing the total number of bytes for the storage tier field, consistency mode field, and cache lifetime field, the remaining 20 bytes are reserved fields for CXL hardware, which are automatically filled when the storage device writes data. These fields include StorageOffset (the physical offset address of the memory cell in the storage device) and LinkID (the CXL link ID used when writing data), for quick location during subsequent data reading and migration.

[0116] Furthermore, after defining the data processing module based on the above content, the data processing module is further encoded and encapsulated. The encoding and encapsulation process is the core step in converting the agent's original interaction data into AgMemCXLUnit. It needs to be completed by combining semantic extraction and CXL storage strategy to ensure that the generated memory unit is compatible with CXL hardware characteristics.

[0117] Specifically, the raw data in the data processing module is first preprocessed, mainly including data cleaning and format validation. Data cleaning mainly involves the raw interactive data output by the agent inference engine (e.g., "User: Recommended Python introductory materials; Assistant: Recommended 'Python Programming: From Beginner to Practice'") being cleaned to remove redundant spaces, newlines, and special characters such as "@#￥", retaining the core semantic content and avoiding invalid characters from occupying storage resources. Format validation mainly involves: if the raw data is of type ToolResult, its JSON format validity needs to be verified—checking whether it contains the required fields ToolName, ResultData, and ErrorCode, and whether the field types match (e.g., ErrorCode is an integer). If the format is invalid, the ENCODE_ERROR status code is returned with the error reason (e.g., "ToolName field is missing"), and then the encoding process is terminated.

[0118] Secondly, semantic feature extraction is performed, mainly including semantic vector generation, SparseKV extraction, and prefetch index insertion. Semantic vector generation involves calling the Sentence-BERT model (parameter configuration: hidden layer dimension 768, batch size 1, inference precision FP16) to encode the cleaned interaction data, generating a 768-dimensional semantic vector, which is stored in a reserved field in the metadata header. This vector is used for semantic matching in subsequent retrieval processes; by calculating the cosine similarity with the query vector, relevant memory units are quickly located. SparseKV extraction: For Context type data, an LLM attention analysis process is initiated, starting from... During LLM inference, the attention_scores tensor is obtained, and the top-20 tokens with attention scores greater than the attention high threshold are selected to generate a SparseKV array for semantic matching accelerated by CXL hardware. Prefetch index insertion: If the prefetch priority of the current memory unit marked by the intent prediction module is greater than or equal to the prefetch high threshold, the FAISS_Add_Vector() interface is triggered to insert the generated semantic vector into the FAISS vector index of the L1 near-core cache (the index is updated once every 100 AgMemCXLUnits generated to avoid frequent updates affecting performance), providing a fast matching foundation for subsequent retrieval.

[0119] Next, perform metadata and CXL attribute filling. Metadata filling includes: (1) Automatically generate session identifier: Use UUID-v4 algorithm to generate a unique identifier, associate the current agent ID with the user ID, and ensure cross-session uniqueness; (2) Record timestamp: Obtain the current millisecond-level timestamp of the system and store it in the timestamp field; (3) Initialize access count: Set to 0, and automatically increment by 1 for each subsequent retrieval; (4) Calculate data hash value: Perform SHA-256 hash calculation on the Content field, and store the result in the data hash value field for integrity verification; CXL attribute filling: Fill the field according to the CXLPolicy parameter passed by the agent: CX LPolicy includes TargetTier (target storage level optional, default L2) write StorageTier, ConsistencyMode (consistency mode, required), and CacheTTL (optional, default 3600s). If TargetTier is not specified, it will be allocated to L2 extended memory by default. Consistency resource reservation: If ConsistencyMode in CXLPolicy is Exclusive, a ReserveLock instruction is sent to the CXL consistency controller to reserve exclusive lock resources for this memory unit to avoid lock conflicts during subsequent write operations.

[0120] Finally, CXL storage pre-allocation and encapsulation verification are performed, mainly including storage resource invention, unit encapsulation, and integrity verification. Storage resource invention involves calling the CXL_AllocStorage(StorageTier, DataSize) interface to invent storage resources for the target tier to the CXL storage manager—the parameter StorageTier is the target tier specified by CXLPolicy, and DataSize is the estimated total length of AgMemCXLUnit. The storage manager allocates free storage areas based on the current load of each device and returns StorageOffset (physical offset address) and DeviceID (target device ID). These two parameters are written to the reserved fields at the end of the CXL attributes. If the target tier device load is too high, with utilization exceeding the CXL high load threshold (e.g., 80%), it automatically degrades to the next tier (e.g., if L1 invention fails, it attempts L2) until invention succeeds.

[0121] Unit encapsulation: Concatenate the fields in the order of "metadata header - data payload - CXL attribute tail" to form a complete AgMemCXLUnit.

[0122] Integrity verification: Call the MemCXL_Validate interface to verify the AgMemCXLUnit. If the verification passes, the memory unit is output and the subsequent storage process begins. If the verification fails, an error message is returned (such as HASH_MISMATCH hash mismatch, STORAGE_MISMATCH storage level and device type mismatch), and the encoding process is terminated.

[0123] Furthermore, after encoding and encapsulating the data processing module, data verification and core interface design are carried out. The encoding interface is MemCXL_Encode(InteractionData,CXLPolicy). The following will further explain the functional definition, execution flow (including software and hardware interaction), consistency pre-guarantee, and association with the read and write process of the encoding interface.

[0124] Specifically, the function of the encoding interface is defined as: encoding the agent interaction data into AgMemCXLUnit adapted to CXL storage, thereby achieving the adaptation of the original data with CXL hardware.

[0125] The execution process (including hardware and software interaction) mainly includes: (1) Preprocessing InteractionData["Content"]: cleaning redundant characters and verifying the legality of the JSON format of ToolResult type; (2) Extracting semantic features: generating semantic vectors (all types) and SparseKV arrays, and inserting FAISS index when the prefetch priority is greater than or equal to the prefetch high threshold; (3) Filling metadata header and CXL attribute tail fields: generating SessionID and Timestamp, calculating DataHash, and filling StorageTier, ConsistencyMode, and CacheTTL according to CXLPolicy; (4) Pre-allocating storage resources: calling CXL_AllocStor The age interface, the CXL driver adapter domain converts the interface instruction into an AllocRequest frame of the CXL.memory protocol and sends it to the target storage device; after receiving it, the device allocates storage resources and returns an AllocAck frame (including storage offset StorageOffset and DeviceID). The driver adapter domain parses the frame data and returns it to the software layer; (5) Unit encapsulation and verification: concatenate AgMemCXLUnit and call the MemCXL_Validate interface to perform integrity verification; (6) Result return: if the verification is successful, return AgMemCXLUnit; if any step fails, return ENCODE_ERROR status code with the reason for failure (such as preprocessing failure, storage resource invention failure, verification failure).

[0126] Consistency Pre-Guarantee: If CXLPolicy[Consistency Mode] is Exclusive, a Reserve Lock instruction is automatically sent to the CXL consistency controller during the coding process to reserve exclusive lock resources and avoid failure due to lock conflicts during subsequent write operations.

[0127] Related to the read / write process: This interface is called before data is written to CXL storage to ensure that only valid memory units can occupy storage resources; this interface is called after data is read from CXL storage to ensure that there are no errors or tampering during data transmission. If the hash is inconsistent, the MemCXL_Recover interface is triggered to recover data from the backup device to ensure data integrity.

[0128] Furthermore, after the inference computing module 100 generates the agent's short-term memory data to be stored (such as attention KV cache), before it is sent to the storage module 400 by the driver adaptation module 300, the data processing module performs sparse compression and structured encapsulation operations. For the SparseKV field of the Context type memory unit, an optimization strategy of INT8 quantization + inverted index compression is adopted to reduce storage usage. At the same time, a hardware-accelerated decompression interface is designed to ensure reading efficiency, as detailed below:

[0129] (1) Sparse data optimization process: mainly includes INT8 quantization: converting 32-bit floating-point KV vectors into 8-bit integers to reduce storage usage (compression ratio 4:1) while controlling quantization error; inverted index compression: removing invalid KV vectors corresponding to low attention tokens (attention score < attention high threshold), retaining only valid KV pairs to further reduce storage usage; tag and storage synchronous update: setting a "compression flag" (1 byte, 1 indicates compressed, 0 indicates uncompressed) in the reserved field of the AgMemCXLUnit metadata header, and the CXL storage device identifies whether the data needs to be decompressed based on this flag; the compressed SparseKV field and Content field are packaged and stored to avoid increased retrieval delay caused by scattered storage.

[0130] (2) Hierarchical migration interface: MemCXL_Migrate(UnitID,TargetTier), whose function is defined as: migrating the specified AgMemCXLUnit from the current storage level to the target level, realizing dynamic storage scheduling based on access frequency; the execution process (including consistency guarantee) includes: (1) Status query: calling the AgMemCXL_GetStatus(UnitID) interface to obtain the current level (CurrentTier) and consistency status (ConsistencyState) of the memory unit; if CurrentTier is consistent with TargetTier, directly Return to Completed state, no migration required; (2) Exclusive lock invention: Call the MemCXL_Lock(UnitID,"Exclusive") interface to invent an exclusive lock; if the lock times out (>50ms), return to Failed state, and set Reason to "lock timeout"; (3) Migration link allocation: Call the CXL_LinkDispatch("Migration",len(UnitData)) interface to allocate the optimal CXL link according to the migration data size and link load; (4) DMA data transfer: transfer data to the source storage device (Dev corresponding to CurrentTier). (5) Data verification: After the target device returns a DMA_Ack frame, the MemCXL_Validate(UnitID) interface is called to verify the integrity of the data in the target device; if the verification fails, the Failed state is returned and the Reason is set to "data verification failed"; (6) Status update and cleanup: After the verification passes, the MemCXL_UpdateTier(UnitID,TargetTier) interface is called to modify the StorageTier field of the memory unit; the Data_Delete instruction is sent to the source device to delete the source data; the MemCXL_Unlock(UnitID) interface is called to release the lock; the MigrationTime (total time taken from locking to unlocking) is recorded and the Completed state is returned; (7) Failure rollback: If any step fails (such as locking timeout or verification failure), the Data_Delete instruction is sent to the target device to delete the incomplete data; the source device data is retained; the lock is released; the Failed state is returned and the Reason is recorded.

[0131] It should be noted that the present invention can also combine CXL with intelligent agents to accelerate the application of large model data, and can be applied to the computation of large model applications such as intelligent agents and RAG.

[0132] Therefore, based on the above specific embodiments, the present invention has the following beneficial effects:

[0133] (1) The first four-layer progressive architecture of CXL and agent short-term memory is designed and implemented: the architecture of "inference computing domain - CXL connectivity domain - CXL driver adaptation domain - memory storage domain" is designed and implemented. The hardware-level consistency maintenance of multi-agent access is achieved through the CXL consistency controller, and the link scheduler dynamically allocates CXL link resources, which solves the local memory bottleneck and inefficiency problem of traditional architecture, supports TB-level short-term memory expansion, and reduces access latency to less than 50ms.

[0134] (2) This invention realizes the AgMemCXLUnit standardized three-segment data model: innovatively encapsulates “metadata header-data payload-CXL attribute tail”, deeply binds the semantic features of the memory data (such as SparseKV vector) with CXL storage attributes (such as storage level, consistency mode), designs the encoding encapsulation and integrity verification process, solves the problem of the lack of adaptation between traditional data models and high-speed storage hardware, and improves data storage efficiency by more than 40%.

[0135] (3) This invention realizes dynamic hierarchical scheduling based on access frequency and hardware load: constructing a three-layer CXL storage hierarchy of L1 / L2 / L3, combining AccessCount and CacheTTL to design a timed + event-triggered migration mechanism, and using CXLDMA technology to realize data transmission without CPU intervention. The resource utilization rate is increased from 40% in the traditional scheme to more than 70%, and the high-frequency data retrieval latency is <1ms.

[0136] (4) This invention realizes sparse data storage and hardware-accelerated decompression optimization: For the SparseKV field of Context type memory, the "INT8 quantization + inverted index compression" strategy was developed and implemented, with a compression rate of 12-20 times; the CXL hardware-accelerated decompression interface was designed, with a decompression latency of <100ns, ensuring that the semantic matching efficiency is not reduced, and further reducing storage costs and retrieval latency.

[0137] According to the data processing system proposed in this embodiment of the invention, the inference computing module generates short-term memory requirement information for the agent based on user interaction information and generates control commands; the driver adaptation module converts the control commands into command frames that meet the first recognition requirements and / or converts the response frames generated based on the command frames into status codes that meet the second recognition requirements, and parses the status codes to obtain the interaction results; the connectivity module determines the target link based on the control commands and sends command frames to the storage module and / or sends the storage module to the driver adaptation module based on the response frames; finally, the storage module stores agent memory data with different access frequencies. This solves the problems of low short-term memory access efficiency, large response latency, and insufficient system scalability caused by the limited traditional memory capacity, poor consistency of concurrent access by multiple agents, and lack of hardware-aware scheduling mechanism when agents process ultra-long contexts. Based on the deep coupling of a four-layer collaborative system, a standardized AgMemCXLUnit three-segment data model, and a three-layer heat-aware storage mechanism, it realizes hardware-level elastic expansion, low-latency access, semantic-temporal joint prefetching, and multi-agent consistency guarantee for ultra-long contexts.

[0138] Embodiments of the present invention also provide a data processing method, wherein, as Figure 6 As shown, the method includes the following steps:

[0139] In step S601, the agent's short-term memory requirement information is generated based on the user's interaction information, and control instructions are generated based on the agent's short-term memory requirement information.

[0140] In step S602, the control command is converted into a command frame that meets the first identification requirement.

[0141] In step S603, the target link is determined according to the control command, and a command frame is sent to the storage module through the target link. The response frame generated by the storage module based on the command frame is converted into a status code that meets the second identification requirement, and the status code is parsed to obtain the interaction result.

[0142] According to one embodiment of the present invention, the control instructions include storage instructions, retrieval instructions, and a prefetch list. The system generates short-term memory requirement information for the agent based on user interaction information, and generates control instructions based on this requirement. This includes: determining the interaction type based on the user interaction information, performing corresponding computational operations to obtain interaction data based on the interaction type, and generating a storage instruction based on the interaction data; determining a query instruction based on the user interaction information, parsing the query instruction to obtain memory retrieval requirements, and generating a retrieval instruction based on these requirements; and generating a prefetch list based on current input data determined from the user interaction information. The current input data includes the semantic vector of the agent's current query and the session history of the most recent preset rounds. The prefetch list includes at least one of memory type, prefetch priority, and estimated access time.

[0143] According to one embodiment of the present invention, the prefetch priority is calculated from semantic similarity, semantic weight of semantic similarity, temporal correlation, and temporal weight of temporal correlation, wherein semantic similarity and temporal correlation are determined based on user interaction information.

[0144] According to one embodiment of the present invention, after generating the prefetch list, the method further includes: in response to the prefetch priority being greater than a preset priority, determining the interaction data to be migrated, the current storage unit of the interaction data to be migrated, and the target storage unit based on the current input data; and migrating the interaction data to be migrated from the current storage unit to the target storage unit.

[0145] According to one embodiment of the present invention, determining a target link based on control instructions includes: determining the current request type based on the control instructions; and determining the target link based on the current request type and the bandwidth utilization of at least one link.

[0146] According to one embodiment of the present invention, determining a target link based on the current request type and the bandwidth utilization of at least one link includes: in response to the current request type being a read request, determining a link with a utilization rate less than a first preset utilization rate as a target link based on the bandwidth utilization of at least one link; in response to the current request type being a write request, determining a link with a utilization rate less than a second preset utilization rate as a target link based on the bandwidth utilization of at least one link, wherein the second preset utilization rate is greater than the first preset utilization rate; and in response to the current request type being a migration request, determining a link with a utilization rate less than a third preset utilization rate as a target link based on the bandwidth utilization of at least one link, wherein the third preset utilization rate is less than the first preset utilization rate.

[0147] According to an embodiment of the present invention, the above-described data processing method further includes: querying the current state of the state register according to a control instruction; sending an interrupt instruction to at least one other visitor if both the current state and the current visitor list length meet preset conditions; and updating the current requesting agent identifier in the visitor list memory according to the current visitor list length in response to receiving failure confirmation responses from at least some visitors.

[0148] According to the data processing method proposed in this embodiment of the invention, the inference computing module generates short-term memory requirement information of the agent and generates control instructions based on the user's interaction information; the driver adaptation module converts the control instructions into command frames that meet the first recognition requirements and / or converts the response frames generated based on the command frames into status codes that meet the second recognition requirements, and parses the status codes to obtain the interaction results; the connectivity module determines the target link based on the control instructions and sends command frames to the storage module and / or sends the storage module to the driver adaptation module based on the response frames; finally, the storage module stores agent memory data with different access frequencies. This solves the problems of low short-term memory access efficiency, large response latency, and insufficient system scalability caused by the limited traditional memory capacity, poor consistency of concurrent access by multiple agents, and lack of hardware-aware scheduling mechanism when agents process ultra-long contexts. Based on the deep coupling of a four-layer collaborative system, a standardized AgMemCXLUnit three-segment data model, and a three-layer heat-aware storage mechanism, hardware-level elastic expansion, low-latency access, semantic-temporal joint prefetching, and multi-agent consistency guarantee for ultra-long contexts are achieved.

[0149] Embodiments of the present invention also provide a computing device, including a data processing system as described in any of the above embodiments.

[0150] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0151] The data processing system provided by this invention has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this invention.

Claims

1. A data processing system, characterized in that, include: The module consists of an inference computing module, a driver adaptation module, a connectivity module, and a storage module. The reasoning and computing module is used to generate short-term memory requirement information for the agent based on the user's interaction information, and to generate control instructions based on the short-term memory requirement information for the agent. The driver adaptation module is used to convert the control command into a command frame that meets the first recognition requirement, and convert the response frame generated based on the command frame into a status code that meets the second recognition requirement, so that the inference calculation module can parse the status code to obtain the interaction result; The connectivity module is used to determine the target link according to the control command, send the command frame to the storage module through the target link, and send the response frame generated by the storage module based on the command frame to the driver adaptation module. A storage module, comprising at least one storage unit, wherein at least a portion of the storage unit is used to store agent memory data with different access frequencies.

2. The data processing system according to claim 1, characterized in that, The inference calculation module includes: The reasoning unit is used to determine the interaction type based on the user's interaction information, perform corresponding calculation operations based on the interaction type to obtain interaction data, generate storage instructions based on the interaction data, and / or determine query instructions based on the user's interaction information, parse the query instructions to obtain memory retrieval requirements, and generate retrieval instructions based on the memory retrieval requirements. The prediction unit is used to generate a prefetch list based on the current input data determined by the user's interaction information; wherein the current input data includes the semantic vector of the agent's current query and the session history of the most recent preset rounds, and the prefetch list includes at least one of memory type, prefetch priority and estimated access time.

3. The data processing system according to claim 1, characterized in that, The driver adaptation module includes: The instruction conversion unit is used to convert the control instruction into a command frame that meets the first identification requirement; The state parsing unit is used to convert the response frame generated based on the command frame into a state code that meets the second identification requirement, so that the inference calculation module can parse the state code to obtain the interaction result.

4. The data processing system according to claim 3, characterized in that, The driver adaptation module also includes: An exception handling unit is used to determine a target handling strategy based on the current exception type of the data processing system, and to perform exception handling on the data processing system according to the target handling strategy. The current anomaly type includes at least one of the following: device offline, data migration failure, and consistency lock timeout.

5. The data processing system according to claim 1, characterized in that, The connectivity module includes: A link scheduling unit is used to determine the current request type based on the control command, and to determine the target link based on the current request type and the bandwidth utilization of at least one link.

6. The data processing system according to claim 5, characterized in that, The connectivity module further includes: The control unit is configured to query the current state of the status register according to the control instruction, and send an interrupt instruction to at least one other visitor if both the current state and the current visitor list length meet preset conditions, so as to update the current requesting agent identifier in the visitor list memory according to the current visitor list length if at least some visitors fail confirmation responses are received.

7. The data processing system according to claim 6, characterized in that, The control unit includes the status register and the visitor list memory, wherein, The state register is used to store the consistency state of the agent's short-term memory unit; The visitor list storage is used to store the identity identifiers of the agents who currently hold access permissions to the agent's short-term memory unit.

8. The data processing system according to claim 1, characterized in that, The storage module includes: The first storage unit is used to store agent memory data with an access frequency greater than a first preset access frequency; The second storage unit is used to store agent memory data whose access frequency is less than or equal to the first preset access frequency and whose access frequency is greater than the second preset access frequency. The third storage unit is used to store the agent's memory data whose access frequency is less than or equal to the second preset access frequency.

9. The data processing system according to claim 1, characterized in that, Also includes: The data processing module is used to encapsulate semantic identification information and hardware attribute information for memory interaction data. The semantic identification information includes the position information of the memory data to be stored in the interaction sequence, and the hardware attribute information includes the current storage level, compression format and integrity check value of the memory data to be stored.

10. The data processing system according to claim 9, characterized in that, The data processing module includes: a metadata header, a data payload, and a fast link attribute tail, wherein, The metadata header is used to locate the address storage location of the memory interaction data, record the time series and data access frequency of the memory interaction data, and verify the memory interaction data. The data payload includes the memory interaction data, which is used to characterize the memory medium type, data content and sparse key-value pair storage structure of the memory interaction data. The computed fast link attribute tail is used to perform transmission integrity verification on the metadata header and the data payload.

11. The data processing system according to claim 10, characterized in that, The metadata header includes: session identifier, timestamp, access count, and data hash value, wherein, The session identifier is used to locate the address storage location of the memory interaction data; The timestamp is used to record the time series of the memory interaction data, so as to generate a migration instruction for the memory interaction data when the difference between the current time and the generation time is greater than a preset threshold. The access count is used to store the access frequency of the memory interaction data; The data hash value is used to calculate a hash check value based on the data payload, and to verify the memory interaction data.

12. The data processing system according to claim 10, characterized in that, The data payload includes: a memory type field, a data content field, and a sparse key-value pair field, wherein... The memory type field is used to identify the memory medium type of the memory interaction data; The data content field is used to identify the content of the memory interaction data; The sparse key-value pair field is used to identify the sparse key-value pair storage structure used for the memory interaction data.

13. A computing device, characterized in that, include: The data processing system as described in any one of claims 1-12.

14. A data processing method, characterized in that, The method includes the following steps: Generate short-term memory requirement information for the intelligent agent based on user interaction information, and generate control instructions based on the short-term memory requirement information for the intelligent agent; The control command is converted into a command frame that meets the first identification requirement; The target link is determined according to the control command, and the command frame is sent to the storage module through the target link. The response frame generated by the storage module based on the command frame is converted into a status code that meets the second identification requirement, and the status code is parsed to obtain the interaction result.

15. The data processing method according to claim 14, characterized in that, The control instructions include storage instructions, retrieval instructions, and a prefetch list. The step of generating short-term memory requirement information for the agent based on user interaction information, and generating control instructions based on the agent's short-term memory requirement information, includes: The interaction type is determined based on the user's interaction information, and the corresponding calculation operation is performed according to the interaction type to obtain interaction data, and the storage instruction is generated based on the interaction data; The query instruction is determined based on the user's interaction information, the query instruction is parsed to obtain the memory retrieval requirement, and a retrieval instruction is generated based on the memory retrieval requirement; A prefetch list is generated based on the current input data determined by the user's interaction information; wherein, the current input data includes the semantic vector of the agent's current query and the conversation history of the most recent preset rounds, and the prefetch list includes at least one of memory type, prefetch priority, and estimated access time.

16. The data processing method according to claim 15, characterized in that, The prefetching priority is calculated from semantic similarity, the semantic weight of the semantic similarity, temporal correlation, and the temporal weight of the temporal correlation, wherein... The semantic similarity and temporal correlation are determined based on the user's interaction information.

17. The data processing method according to claim 15 or 16, characterized in that, After generating the prefetch list, the process also includes: In response to the prefetch priority being greater than the preset priority, the interaction data to be migrated, the current storage unit of the interaction data to be migrated, and the target storage unit are determined based on the current input data. The interactive data to be migrated is migrated from the current storage unit to the target storage unit.

18. The data processing method according to claim 14, characterized in that, Determining the target link according to the control command includes: The current request type is determined based on the control instructions; The target link is determined based on the current request type and the bandwidth utilization of at least one link.

19. The data processing method according to claim 18, characterized in that, Determining the target link based on the current request type and the bandwidth utilization of at least one link includes: In response to the current request type being a read request, a link with a utilization rate less than a first preset utilization rate is determined as the target link based on the bandwidth utilization rate of the at least one link. In response to the current request type being a write request, a link with a utilization rate less than a second preset utilization rate is determined as the target link based on the bandwidth utilization rate of the at least one link, wherein the second preset utilization rate is greater than the first preset utilization rate; In response to the current request type being a migration request, a link with a utilization rate less than a third preset utilization rate is determined as the target link based on the bandwidth utilization rate of the at least one link, wherein the third preset utilization rate is less than the first preset utilization rate.

20. The data processing method according to claim 14, characterized in that, Also includes: The current state of the status register is queried according to the control command; If both the current state and the length of the current visitor list meet preset conditions, an interruption command is sent to at least one other visitor. In response to receiving a failure confirmation response from at least some visitors, the identifier of the currently requesting agent in the visitor list memory is updated according to the current visitor list length.

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