Double-sided exposure wafer positioning method and device, electronic equipment and storage medium
By acquiring local Z-axis height information of the wafer and dynamically adjusting the optical focal plane, the defocusing problem caused by warping or uneven thickness is solved, achieving high-precision wafer front and back alignment and improving the applicability and reliability of zero-flip double-sided alignment technology.
Patent Information
- Application Number
- CN202610016480.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-07
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2046-01-07
AI Technical Summary
In existing zero-flip double-sided alignment technology, wafer warping or uneven thickness and other geometric shape deviations cause defocusing, affecting the accuracy of alignment mark recognition and resulting in actual alignment errors of the front and back patterns. Traditional methods are difficult to effectively address this issue.
By controlling a dual-field optical system to acquire local Z-axis height information of both sides of the wafer, the optical focal plane is dynamically adjusted to precisely coincide with the position of the alignment mark, the geometric center coordinates are identified, the alignment deviation is calculated, and the stage is controlled to move or rotate to compensate for the deviation.
It significantly improves the recognition accuracy of alignment marks, ensures precise alignment of the front and back patterns of the wafer, reduces alignment failures caused by individual wafer differences, and improves production efficiency and chip yield.
Smart Images

Figure CN121487548A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a double-side exposure wafer positioning method and device, an electronic device and a storage medium. BACKGROUND
[0002] In the field of semiconductor manufacturing, especially for the production of devices that require accurate alignment of front and back patterns, zero-flip double-side alignment technology is favored for its high efficiency and low risk of contamination. This technology acquires front and back wafer images simultaneously through a double-view optical system and identifies alignment marks to achieve accurate alignment. However, in actual production, wafers are not always ideal flat rigid bodies, and they may have geometric deviations such as warping or uneven thickness. These deviations can cause the double-view optical system to be out of focus when acquiring front and back wafer images, which in turn affects the recognition accuracy of the alignment marks, ultimately leading to actual alignment errors of front and back patterns. Traditional alignment methods often fail to effectively address the out-of-focus problem caused by changes in the wafer's own morphology, thus limiting the application range and accuracy of zero-flip double-side alignment technology.
[0003] Specifically, in the manufacturing process of semiconductor devices, especially micro-electro-mechanical systems (MEMS), power devices or three-dimensional integrated circuits, double-side lithography is a key process. It requires the fabrication of circuit patterns on both the front and back surfaces of the wafer, and the alignment accuracy between the patterns on the front and back surfaces must be extremely high. Traditional process methods require first completing one side of the lithography, then removing the wafer from the equipment, physically flipping it with a mechanical hand, and then sending it back into the equipment for alignment and exposure on the other side. This flipping process not only prolongs the production cycle and increases the risk of wafer contamination by particles, but also introduces uncontrollable alignment errors due to mechanical handling and repositioning, directly affecting the performance and yield of the final device.
[0004] To solve these problems, the industry has developed a zero-flip double-sided alignment technology. The core of this technology is a precise double-view optical system, which is integrated under and above the worktable of the lithography machine. When the wafer is placed on the worktable, the optical components above directly observe the front side of the wafer, and the optical components below can "penetrate" the specific through hole of the worktable through a complex combination of light splitting prisms and mirrors, and observe the back side of the wafer. In this way, the control system can simultaneously obtain real-time images of the front and back sides of the wafer. When performing alignment, the system will look for pre-set alignment marks in the front and back images, which are usually special patterns such as crosses or squares. After receiving the two video signals, the image processing unit accurately calculates the center coordinates of each mark through a specific recognition program. Then, the system compares the coordinates of the front and back marks in the same reference coordinate system and calculates the translation and rotation deviation between them. Finally, by driving the high-precision piezoelectric ceramic worktable to make small movements and rotations, the deviation is compensated until the front and back marks completely coincide in the superimposed image, thus completing the high-precision double-sided alignment. The entire process does not require the wafer to be flipped, greatly improving efficiency and alignment accuracy.
[0005] However, this idealized working mode is based on the premise that the wafer is a rigid plane with absolutely uniform thickness and absolutely flat surface. In actual production environment, this premise is often not true. Due to internal stress introduced during wafer growth, slicing, grinding and subsequent heat treatment, the wafer itself will warp to a certain extent and is no longer a perfect plane. At the same time, the thickness of the wafer may also vary by microns, i.e. total thickness variation (TTV). When such a wafer with geometric morphology deviation is placed on the worktable, problems will follow. The optical focal planes of the upper and lower optical components of the dual-view optical system are pre-set during the device debugging stage, and this setting is based on a standard thickness flat wafer. For a warped wafer, the actual working distance between the wafer surface and the upper and lower optical objectives will change when the worktable moves to different positions to capture different alignment marks. For example, in the edge region of the wafer, due to upward warping, its upper surface will be closer to the upper optical objective, while its lower surface will be farther away from the lower optical objective. This deviation in working distance directly leads to defocusing of the optical system. The direct consequence of defocusing is that the alignment mark image captured by the camera becomes blurred, and the edges of the mark are no longer sharp and clear, but show a diffuse transition zone. The image processing program responsible for identifying the mark position is based on edge detection or gray centroid calculation to determine the geometric center of the mark. When an edge-blurred image is input, the calculation accuracy of the program will decrease significantly. The mark center position calculated by it will deviate from its actual physical center position, resulting in a measurement error. More troublesome is that due to the asymmetric nature of wafer warping, the defocusing experienced by the upper optical system and the lower optical system at the same observation point is likely to be different. For example, the upper image may be slightly blurred, while the lower image may be severely blurred. This leads to inconsistent position measurement errors of the upper and lower marks. The system ultimately calculates the relative deviation between the front and back surfaces based on these two measurement values with different errors, and this calculation result itself contains a false deviation amount. The system drives the worktable to "correct" according to this erroneous result, which is actually an erroneous movement, ultimately resulting in an alignment error between the front and back patterns after lithography that should not have existed. This error is implicit because at the alignment system level, it shows that the alignment is complete, but the physical misalignment has already been cast, seriously affecting the yield of the chip.
[0006] There is currently no effective technical solution to the above problems. SUMMARY
[0007] The application aims to provide a double-side exposure wafer positioning method, device, electronic equipment and storage medium, and aims to solve the technical problem that in the existing zero-flipping double-side alignment technology, the defocus caused by the geometric appearance deviation of wafer warping or uneven thickness affects the alignment mark recognition accuracy, and finally causes the actual alignment error of front and back patterns, the recognition accuracy of the alignment mark can be significantly improved, the accurate alignment of the front and back patterns of the wafer is realized, and the limitation of the traditional method in dealing with wafer appearance changes is overcome.
[0008] In a first aspect, the application provides a double-side exposure wafer positioning method, comprising the following steps: S1. Control the double-view optical system to emit a detection light beam to the upper optical channel and the lower optical channel respectively, and receive the reflection light signals of the respective reflected light; S2. Obtain the local Z-axis height information of the front and back surfaces of the wafer by analyzing the reflection light signals; S3. According to the local Z-axis height information, control the axial movement of the upper and lower optical objectives to adjust the respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective is accurately coincided with the vertical height position of the alignment mark to be observed on the front and back surfaces of the wafer; S4. After the optical focal plane adjustment is completed, obtain the area image containing the alignment marks on the front and back surfaces of the wafer, and identify the geometric center coordinates of the alignment marks in the area image; S5. According to the geometric center coordinates of the alignment marks, calculate the alignment deviation between the front and back surfaces of the wafer; S6. According to the alignment deviation, control the movement or rotation of the workbench to compensate for the deviation.
[0009] The double-side exposure wafer positioning method provided by the application effectively solves the defocus problem caused by the geometric appearance deviation of wafer warping or uneven thickness in the existing zero-flipping double-side alignment technology by introducing the accurate acquisition of the local Z-axis height information of the front and back surfaces of the wafer and the self-adaptive adjustment mechanism of the optical focal plane, and provides a more accurate and reliable zero-flipping double-side alignment solution for the semiconductor manufacturing field.
[0010] In a second aspect, the application provides a double-side exposure wafer positioning device, comprising: A first control module is configured to control the double-view optical system to emit a detection light beam to the upper optical channel and the lower optical channel respectively, and receive the reflection light signals of the respective reflected light; An analysis module is configured to obtain the local Z-axis height information of the front and back surfaces of the wafer by analyzing the reflection light signals; The second control module is configured to control the axial movement of the two optical objectives to adjust the optical focal planes of the two optical objectives to the corresponding specified Z-axis height according to the local Z-axis height information, so that the optical focal plane of each optical objective is accurately overlapped with the vertical height position of the alignment mark to be observed on the front and back surfaces of the wafer. The identification module is configured to acquire a region image containing the alignment marks on the front and back surfaces of the wafer after the optical focal plane is adjusted, and identify the geometric center coordinates of the alignment marks in the region image. The calculation module is configured to calculate the alignment deviation between the front and back surfaces of the wafer according to the geometric center coordinates of the alignment marks. The third control module is configured to control the movement or rotation of the worktable to compensate for the deviation according to the alignment deviation.
[0011] In a third aspect, the present application provides an electronic device comprising a processor and a memory, wherein the memory stores computer readable instructions, and when the computer readable instructions are executed by the processor, the steps of the double-side exposure wafer positioning method provided in the first aspect are executed.
[0012] In a fourth aspect, the present application provides a computer readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the steps of the double-side exposure wafer positioning method provided in the first aspect are executed.
[0013] As can be seen from the above, the double-side exposure wafer positioning method provided by the present application can effectively compensate for the defocus caused by the wafer warping and uneven thickness by acquiring the local Z-axis height information of the front and back surfaces of the wafer in real time and dynamically adjusting the optical focal plane of the optical objective, thereby ensuring the clarity of the alignment mark image and overcoming the limitations of the traditional method in dealing with the wafer topography changes. In addition, due to the significant improvement in the clarity of the alignment mark image, the image processing program can more accurately identify the geometric center coordinates of the mark, thereby greatly reducing the measurement error and avoiding false deviation calculation caused by defocus. Finally, higher front and back surface pattern alignment accuracy is achieved. Furthermore, the present application can adapt to wafers with different topography characteristics, reduce the alignment failure or precision reduction caused by individual differences of the wafers, improve the applicability and reliability of the zero-flip double-side alignment technology in actual production, and finally effectively avoid the pattern misalignment after lithography, thereby directly improving the production yield of the chip and reducing the manufacturing cost.
[0014] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the present application according to the description. The objects and other advantages of the present application can be achieved and obtained by the structure particularly pointed out in the written description and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS
[0015] Figure 1 This is a flowchart of a double-sided exposure wafer positioning method provided in an embodiment of the present invention.
[0016] Figure 2 This is a schematic diagram of a double-sided exposure wafer positioning device provided in an embodiment of the present invention.
[0017] Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention.
[0018] Label Explanation: 100. First control module; 200. Analysis module; 300. Second control module; 400. Identification module; 500. Calculation module; 600. Third control module; 13. Electronic device; 1301. Processor; 1302. Memory; 1303. Communication bus. Detailed Implementation
[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.
[0020] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0021] Please refer to Figure 1 , Figure 1 This is a flowchart of a double-sided exposure wafer positioning method. The double-sided exposure wafer positioning method includes the following steps: S1. Control the dual-field optical system to emit detection beams to the upper optical channel and the lower optical channel respectively, and receive the reflected light signals of their respective reflected light; S2. By analyzing the reflected light signal, the local Z-axis height information of the front and back sides of the wafer is obtained; S3. Based on the local Z-axis height information, control the axial movement of the upper and lower optical objectives to adjust their respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective precisely coincides with the vertical height position of the alignment mark to be observed on both sides of the wafer; S4. After the optical focal plane is adjusted, acquire an image of the region containing the alignment marks on both sides of the wafer, and identify the geometric center coordinates of the alignment marks in the region image; S5. Calculate the alignment deviation between the front and back sides of the wafer based on the geometric center coordinates of the alignment mark; S6. Based on the alignment deviation, control the table to move or rotate to compensate for the deviation.
[0022] This application aims to solve the defocusing problem caused by wafer geometric deviations in the prior art, thereby improving the positioning accuracy of double-sided exposed wafers. By introducing a mechanism for acquiring local Z-axis height information of the front and back sides of the wafer and adjusting the optical focal plane, this application can ensure that the optical system is always in the optimal focusing state under different wafer morphology conditions, thereby accurately identifying alignment marks and ultimately achieving high-precision alignment compensation.
[0023] In this application, a "dual-field optical system" refers to an optical device capable of simultaneously observing and acquiring images of the front and back sides of a wafer. This system typically includes an upper optical channel and a lower optical channel, used to probe the front and back sides of the wafer, respectively. The "upper optical channel" usually consists of a set of lenses, mirrors, and detectors located above the wafer, used for direct observation of the front side; the "lower optical channel" typically uses a complex combination of beam splitters and mirrors to allow optical components located below the wafer to observe the back side. These two channels work together to ensure that information from both sides of the wafer can be acquired simultaneously during a single positioning process. The "probe beam" refers to the light emitted by the dual-field optical system that illuminates the wafer; the reflected light signal carries information about the height and topography of the wafer surface. The "optical objective lens" is a key component of the dual-field optical system, responsible for focusing the image of the wafer surface onto the detector. The "optical focal plane" refers to the plane on which the optical objective lens can clearly image the wafer; its precise adjustment is crucial for acquiring clear alignment mark images. "Alignment marks" are specific geometric patterns pre-fabricated on the front and back sides of a wafer, used as reference points during alignment. "Geometric center coordinates" refer to the precise position of the alignment marks in the image, usually calculated using image processing algorithms. The "worktable" is a mechanical device used to support and precisely move the wafer; its movement or rotation compensates for alignment misalignment between the front and back sides.
[0024] In practical implementation, the double-sided exposure wafer positioning method first controls a dual-field optical system in step S1 to emit probe beams to the upper and lower optical channels respectively, and receives the reflected light signals from each. The probe beams can be laser beams, broadband beams, or LED beams of specific wavelengths. For example, a confocal laser scanning system can be used to scan the wafer surface with a laser beam and receive the reflected light signals. The reception of the reflected light signals can be achieved through a photodetector, CCD, or CMOS sensor array.
[0025] Subsequently, in step S2, local Z-axis height information of both sides of the wafer is obtained by analyzing the reflected light signal. Various techniques can be used to analyze the reflected light signal. For example, the height information of the wafer surface can be inferred by analyzing the intensity, phase, or time of flight of the reflected light signal. One approach is to utilize the confocal principle, scanning different Z-axis heights and recording the intensity of the reflected light to find the Z-axis position corresponding to the maximum intensity as the local height. Another approach is to use interferometry to accurately calculate the height of the wafer surface by analyzing the interference fringes between the reflected light and the reference light.
[0026] Next, in step S3, based on the local Z-axis height information, the upper and lower optical objectives are controlled to move axially to adjust their respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective precisely coincides with the vertical height position of the alignment marks to be observed on both sides of the wafer. The axial movement of the optical objectives can be achieved by high-precision actuators such as piezoelectric ceramic drivers, voice coil motors, or stepper motors. For example, based on the local Z-axis height information obtained in step S2, the average Z-axis height of each alignment mark area can be calculated, and then this average height can be used as the specified Z-axis height to drive the optical objective to move to that position.
[0027] After the optical focal plane is adjusted, step S4 acquires an image of the region containing the alignment marks on both sides of the wafer and identifies the geometric center coordinates of the alignment marks in the region image. The region image can be acquired using a high-resolution CCD or CMOS camera. Alignment mark identification can employ image processing algorithms, such as edge detection algorithms (e.g., Canny, Sobel operators), template matching algorithms, or deep learning-based image recognition algorithms. For example, the image can be binarized first, then connected component analysis can be used to find the alignment mark region, and finally, the geometric center coordinates can be determined by calculating the centroid of the region.
[0028] Next, in step S5, the alignment deviation between the front and back sides of the wafer is calculated based on the geometric center coordinates of the alignment marks. The calculation of the alignment deviation can be based on the principle of geometric transformation. For example, the least squares method or the Iterative Closest Point (ICP) algorithm can be used to calculate the translation and rotation transformation parameters by matching the alignment mark point sets on the front and back sides of the wafer, thereby obtaining the alignment deviation.
[0029] Finally, in step S6, the stage is moved or rotated to compensate for the alignment deviation. The movement and rotation of the stage can be achieved using a high-precision piezoelectric ceramic stage, a linear motor, or a rotary motor. For example, if the calculated alignment deviation includes translation in the X and Y directions and rotation in the Z-axis direction, the stage can be driven to move at the micrometer level in the X and Y directions and rotate at the micro-radian level around the Z-axis to eliminate the deviation.
[0030] The double-sided exposure wafer positioning method of this application effectively solves the defocusing problem caused by wafer geometric shape deviation in the prior art by introducing precise acquisition of local Z-axis height information of the front and back sides of the wafer and an adaptive adjustment mechanism for the optical focal plane. In traditional methods, due to wafer warping or uneven thickness, the optical focal plane of the optical system cannot be precisely aligned with the wafer surface, resulting in blurred alignment mark images, reduced recognition accuracy, and thus introducing alignment errors.
[0031] This application, through steps S1 and S2, first utilizes a dual-field optical system to emit a probe beam and receive reflected light signals, then analyzes these signals to obtain local Z-axis height information of both sides of the wafer. This process can accurately perceive the actual morphology of the wafer surface, rather than relying on a preset ideal plane. Subsequently, in step S3, based on this real-time local Z-axis height information, the system can intelligently control the axial movement of the upper and lower optical objectives, precisely adjusting their respective optical focal planes to coincide with the vertical height position of the alignment mark to be observed. Thus, regardless of how uneven the wafer surface is, it can ensure that the optical system is always in optimal focus when acquiring the alignment mark image.
[0032] After the optical focal plane is adjusted, step S4 acquires a clear image of the alignment mark area and accurately identifies the geometric center coordinates of the alignment marks. Because image clarity is guaranteed, the accuracy of mark recognition is significantly improved. Next, step S5 calculates the actual alignment deviation between the front and back sides of the wafer based on these high-precision geometric center coordinates. Finally, in step S6, the system precisely controls the stage to move or rotate based on the calculated alignment deviation, thereby effectively compensating for the deviation.
[0033] Compared to existing technologies, the core innovation of this application lies in its adaptive optical focal plane adjustment capability. Traditional methods typically employ a fixed optical focal plane or simple global Z-axis adjustment, which struggles to handle complex variations in the local morphology of the wafer. This application acquires local Z-axis height information from both sides of the wafer in real time and dynamically adjusts the optical focal plane of the optical objective accordingly, ensuring the clarity and recognition accuracy of the alignment mark image across the entire wafer surface. This method significantly reduces alignment errors caused by wafer morphology deviations, thereby improving the alignment accuracy of double-sided exposure and the chip yield. For example, when processing a wafer with a 5-micrometer local warpage, traditional methods may result in severe defocusing of the alignment mark image, with recognition errors reaching hundreds of nanometers; however, this application, through precise optical focal plane adjustment, can control the defocusing error to the sub-micrometer or even nanometer level, thereby reducing the alignment error by an order of magnitude.
[0034] In some embodiments, the specific steps in step S2 include: S21. By analyzing the reflected light signal, obtain the preliminary Z-axis height range of the front and back sides of the wafer; S22. Control the optical objective lens to scan along the Z-axis within the corresponding initial Z-axis height range, and acquire a series of corresponding scan images during the scanning process; S23. Evaluate the sharpness of the scanned image and take the Z-axis height position corresponding to the scanned image with the best sharpness as the corresponding local Z-axis height information to obtain the local Z-axis height information of the front and back sides of the calibrated wafer.
[0035] Specifically, in step S21, by performing preliminary analysis on the reflected light signals received by the dual-field optical system, the approximate vertical height regions of the front and back sides of the wafer, i.e., the preliminary Z-axis height range, can be quickly determined. This preliminary range aims to narrow the search space for subsequent fine scanning and improve efficiency. Further, in step S22, once the preliminary Z-axis height range is determined, the optical objective lens is precisely controlled to move axially along the Z-axis within this preliminary Z-axis height range, continuously or discretely acquiring a series of scan images during this process. These scan images record the visual information of the wafer surface at different Z-axis height positions. Subsequently, in step S23, the sharpness of the acquired scan images is evaluated. Sharpness evaluation can be achieved through various image processing algorithms, such as calculations based on gradient, contrast, edge sharpness, or frequency domain energy. By comparing the sharpness of these scan images, the image with the best sharpness can be accurately identified, and the Z-axis height position corresponding to this image is determined as the local Z-axis height information of the front and back sides of the wafer. Thus, calibrated, high-precision local Z-axis height information of the front and back sides of the wafer is obtained.
[0036] This application's solution effectively addresses the problems of insufficient accuracy, susceptibility to environmental noise, and insensitivity to minute undulations on the wafer surface faced by traditional methods when directly acquiring high-precision local Z-axis height information. These problems are addressed by introducing a preliminary Z-axis height range determination, fine Z-axis scanning with optical objectives, and a clarity evaluation mechanism for the scanned images. First, obtaining the preliminary Z-axis height range allows subsequent fine scanning to be performed in a smaller, more relevant space, significantly improving scanning efficiency and reducing computational burden. Second, by systematically scanning the Z-axis within the preliminary height range and acquiring a series of images, detailed information about the wafer surface at different vertical heights is ensured to be fully captured. Finally, optical focal plane determination based on image clarity leverages the physical characteristic that images have the highest clarity at the focal point. Through objective image processing algorithms rather than simple signal thresholding, the precise vertical height position of the wafer's front and back alignment marks can be identified more accurately and robustly, overcoming the noise interference and uncertainties that may exist with single reflected light signals.
[0037] The above technical solution significantly improves the accuracy and reliability of acquiring local Z-axis height information on both sides of the wafer. This method, through step-by-step refinement—from initial range determination to fine scanning, and then to precise judgment based on image clarity—effectively avoids errors that might arise from directly analyzing reflected light signals, ensuring the accuracy of subsequent optical objective lens focal plane adjustments. This lays a solid foundation for clear imaging and accurate identification of wafer alignment marks on both sides, ultimately improving the overall accuracy and stability of double-sided exposed wafer positioning.
[0038] In some embodiments, the specific steps in step S21 include: S211. Preprocess the reflected light signal to obtain the preprocessed reflected light signal; S212. By analyzing the preprocessed reflected light signal, the preliminary Z-axis height range of the front and back sides of the wafer is obtained.
[0039] Specifically, preprocessing includes removing transient outliers and performing local smoothing to suppress local fluctuations and spurious peaks caused by random contaminants or uneven local roughness.
[0040] The proposed solution effectively addresses the noise and instability issues in the original reflected light signal by removing transient outliers and performing local smoothing. Specifically, removing transient outliers eliminates discrete, high-amplitude erroneous data points caused by occasional interference (such as contaminants). If these data points are not removed, they may be incorrectly identified as true height features of the wafer surface, or lead to significant deviations in the calculation of the initial Z-axis height range. Simultaneously, local smoothing suppresses common random noise and subtle fluctuations caused by surface microstructures, making the overall trend of the signal clearer and helping to distinguish between true height changes and noise interference. It is precisely this synergistic effect of these two processes that allows the preprocessed reflected light signal to more accurately reflect the actual height information of both sides of the wafer, thus laying a solid foundation for the subsequent accurate acquisition of the initial Z-axis height range.
[0041] The above technical solutions significantly improve the accuracy and reliability of acquiring preliminary Z-axis height information for both sides of the wafer. Specifically, by removing instantaneous outliers, erroneous height judgments caused by random contaminants or transient measurement interference can be effectively avoided. Local smoothing suppresses signal fluctuations caused by uneven local roughness on the wafer surface or system noise, resulting in more stable and accurate identification of the preliminary Z-axis height range. This improvement not only enhances the system's robustness to complex wafer surface conditions and environmental noise but also provides a more precise reference for subsequent optical objective focal plane adjustment, ultimately contributing to improved overall accuracy and efficiency of double-sided exposure wafer positioning.
[0042] In some embodiments, the specific steps in step S5 include: S51. Perform point set matching on the geometric center coordinates of the alignment markers to obtain the corresponding point set; S52. Based on the corresponding point sets, calculate the translation transformation parameters and / or rotation transformation parameters that minimize the distance residual between the corresponding point sets; S53. Calculate the alignment deviation between the front and back sides of the wafer based on the translation transformation parameters and / or rotation transformation parameters.
[0043] Point set matching refers to using specific algorithms to establish a one-to-one correspondence between alignment marks on the front and back sides of a wafer. For example, matching algorithms based on feature descriptors, iterative nearest neighbor (ICP) algorithms, or matching methods based on topology analysis can be used to ensure that identical alignment marks on the front and back sides are accurately associated, thereby forming corresponding point sets.
[0044] Furthermore, based on the obtained set of corresponding points, transformation parameters that describe the relative positional relationship between the front and back sides of the wafer need to be calculated. These parameters include translational transformation parameters and / or rotational transformation parameters. Translational transformation parameters describe the relative displacement of the wafer in the X and Y directions, while rotational transformation parameters describe the relative rotation of the wafer in the Z-axis direction. The goal of calculating these parameters is to minimize the distance residual between the sets of corresponding points. This means that through these transformation parameters, the alignment markers on the front side of the wafer can be mapped as accurately as possible to the corresponding alignment markers on the back side of the wafer, thereby minimizing the deviation between the two.
[0045] Therefore, after obtaining the translation and / or rotation transformation parameters, the alignment deviation between the front and back sides of the wafer can be calculated based on these parameters. This alignment deviation can be a comprehensive numerical value, such as the average deviation or the maximum deviation, or a vector containing translation and rotation components, used to accurately quantify the degree of misalignment between the front and back sides of the wafer.
[0046] This application's solution refines step S5, which calculates the alignment deviation between the front and back faces of a wafer, into three sub-steps: point set matching, transformation parameter calculation, and deviation calculation. This achieves precise quantification of the relative positional relationship between the front and back faces of the wafer. First, point set matching ensures that alignment marks on the front and back faces of the wafer can be accurately associated, laying the foundation for subsequent deviation calculation. Second, by calculating translation and / or rotation transformation parameters that minimize the distance residual between corresponding point sets, the overall translation and rotation deviation between the front and back faces of the wafer can be effectively captured, avoiding errors that may arise from calculations based solely on a single marker point or simple difference. It is precisely this method based on overall point set optimization that allows the calculated transformation parameters to more accurately reflect the actual alignment relationship between the front and back faces of the wafer. Finally, based on these precise transformation parameters, the alignment deviation between the front and back faces of the wafer can be reliably calculated, providing an accurate basis for subsequent deviation compensation.
[0047] The above technical solution enables accurate and robust calculation of alignment deviations between the front and back sides of a wafer. The introduction of point set matching ensures the accuracy of the alignment mark correspondence, avoiding calculation errors caused by misidentification or local defects. The transformation parameter calculation method based on minimizing distance residuals effectively suppresses the influence of measurement noise and local inhomogeneities on deviation calculation, thereby improving the accuracy and stability of deviation calculation. Therefore, the solution presented in this application can provide more reliable positioning data for double-sided exposure processes, thereby improving the accuracy and yield of exposure alignment.
[0048] In some embodiments, the specific steps in step S52 include: S521. Based on the corresponding point set, calculate the translation transformation parameters and / or rotation transformation parameters using the least squares method.
[0049] This application's solution employs the least squares method to calculate translation and / or rotation transformation parameters, effectively addressing the inefficiencies, insufficient accuracy, or sensitivity to noise inherent in traditional methods when the specific calculation method is not clearly defined. The least squares method systematically minimizes the sum of squared residuals between all corresponding point pairs, extracting the most reliable transformation parameters from data containing measurement errors. This method possesses mathematically favorable properties, providing an optimal linear unbiased estimate, thus ensuring high accuracy and stability of the calculated translation and / or rotation transformation parameters. Consequently, even with localized defects on the wafer surface or minor errors in alignment mark identification, accurate alignment deviation information can be obtained.
[0050] The above technical solution, employing the least squares method to calculate translation and / or rotation transformation parameters, significantly improves the accuracy and robustness of calculating alignment deviations between the front and back sides of the wafer. Compared to other potentially simpler calculation methods, the least squares method effectively suppresses the impact of random errors and noise on the calculation results, ensuring that the obtained transformation parameters are closer to the true values. This is crucial for the stringent alignment accuracy requirements in double-sided exposure processes, effectively reducing yield losses caused by positioning errors, thereby improving overall production efficiency and product quality.
[0051] In some preferred embodiments, it is assumed that in step S4, a set of alignment mark geometric center coordinates P_front={(x_f1,y_f1),...,(x_fn,y_fn)} for the front side of the wafer and a set of corresponding alignment mark geometric center coordinates P_back={(x_b1,y_b1),...,(x_bn,y_bn)} for the back side of the wafer are obtained, where P_front is the alignment mark geometric center coordinate of the front side of the wafer, x_f1 is the x-axis coordinate of the first alignment mark geometric center on the front side of the wafer, and y_f1 is the geometric center coordinate of the front side of the wafer. The y-axis coordinate of the first alignment mark geometric center, x_fn is the x-axis coordinate of the nth alignment mark geometric center on the front side of the wafer, y_fn is the y-axis coordinate of the nth alignment mark geometric center on the front side of the wafer, P_back is the coordinate of the alignment mark geometric center on the back side of the wafer, x_b1 is the x-axis coordinate of the first alignment mark geometric center on the back side of the wafer, y_b1 is the y-axis coordinate of the first alignment mark geometric center on the back side of the wafer, x_bn is the x-axis coordinate of the nth alignment mark geometric center on the back side of the wafer, y_bn is the y-axis coordinate of the nth alignment mark geometric center on the back side of the wafer. In step S51, these point sets are matched to establish a correspondence. Subsequently, in step S521, to calculate the translation transformation parameters (Δx, Δy) and rotation transformation parameters (θ), an error function E can be constructed, for example, E = Σ[(x_bi - (x_fi*cosθ - y_fi*sinθ + Δx))^2 + (y_bi - (x_fi*sinθ + y_fi*cosθ + Δy))^2]. By taking the partial derivatives of this error function E with respect to Δx, Δy, and θ and setting them to zero, a set of equations can be obtained. These equations can be solved using iterative optimization algorithms (such as the Levenberg-Marquardt algorithm) or analytical methods under specific conditions to obtain the optimal translation and rotation transformation parameters that minimize the sum of squared errors. For example, when considering only the translation transformation, Δx and Δy can be initially estimated by simply calculating the average difference between the X and Y coordinates of the corresponding point sets, and then refined using the least squares method. When considering rotation, more complex matrix operations and iterative solutions are required to accurately determine the rotation angle and center, ensuring that the calculation of alignment deviations reaches the sub-micron level of accuracy.
[0052] In some embodiments, the specific steps in step S53 include: S531. Transform the geometric center coordinates of all alignment marks on the front side of the wafer to the coordinate system on the back side of the wafer through translation and / or rotation transformation parameters to obtain the transformed wafer front side mark points; S532. Calculate the average or maximum distance between the transformed wafer front-side marker and the corresponding wafer back-side marker; S533. Use the average distance or maximum distance as the alignment deviation between the front and back sides of the wafer.
[0053] Specifically, in step S531, the geometric center coordinates of all alignment marks on the front side of the wafer are considered as a set of points. Using the translation and / or rotation transformation parameters obtained in step S52, this set of points is transformed from the front-side coordinate system to the back-side coordinate system. The purpose of this transformation is to simulate the position of the front-side marking points in the back-side coordinate system under ideal alignment, thus facilitating comparison with the actual back-side marking points. The transformed set of points is called the transformed front-side marking points.
[0054] In step S532, after obtaining the transformed wafer front-side markers, they need to be compared with the corresponding alignment markers on the wafer back-side. This comparison can be done by calculating the distance between them. Specifically, the Euclidean distance between each pair of corresponding markers can be calculated, and then these distances can be statistically analyzed. The average distance is the arithmetic mean of the distances between all pairs of corresponding markers, which reflects the overall alignment. The maximum distance is the maximum value among all pairs of corresponding markers, which reveals the most severe local alignment deviations.
[0055] In practical applications, step S533 uses the calculated average or maximum distance as the alignment deviation between the front and back sides of the wafer. The choice of average or maximum distance as the quantitative indicator of deviation depends on the specific application scenario and the required positioning accuracy. For example, when high overall alignment accuracy is required, the average distance may be more suitable; while when it is necessary to ensure that the deviation in any local area does not exceed a certain threshold, the maximum distance is more critical. The purpose is to provide a quantifiable and operable alignment deviation value to facilitate subsequent deviation compensation operations.
[0056] This application's solution first transforms the wafer's front-side markers to the wafer's back-side coordinate system, ensuring the two point sets are compared under the same reference frame, thus eliminating errors caused by coordinate system inconsistencies. Subsequently, by calculating the distance between the transformed wafer's front-side markers and their corresponding back-side markers, the inconsistency between the two is directly quantified. This distance-based quantification method is intuitive and accurate, effectively reflecting the actual alignment deviation between the wafer's front and back sides. Whether using the average distance or the maximum distance, it provides a clear numerical basis for subsequent deviation compensation, ensuring the accuracy and effectiveness of the compensation.
[0057] Through the above technical solution, this application provides a precise and reliable method for quantifying the alignment deviation between the front and back sides of a wafer. Compared to simply obtaining translation and rotation transformation parameters, this solution further transforms these parameters into intuitive distance deviations, making the assessment of alignment deviations more specific and operable. This helps improve the accuracy and stability of wafer positioning during double-sided exposure, reduces the scrap rate caused by misalignment, and thus improves production efficiency and product quality.
[0058] In some preferred embodiments, it is assumed that there are four alignment markers P1, P2, P3, P4 on the front side of the wafer, with geometric center coordinates of (x1, y1), (x2, y2), (x3, y3), and (x4, y4), respectively. There are four corresponding alignment markers Q1, Q2, Q3, Q4 on the back side of the wafer, with geometric center coordinates of (x1, y1), (x2, y2), (x3, y3), and (x4, y4), respectively.
[0059] First, by point set matching and the least squares method, the translation transformation parameters (Δx, Δy) and rotation transformation parameters θ for transforming the front-side marker points to the back-side coordinate system were obtained.
[0060] Next, the coordinates of the front marking points P1, P2, P3, and P4 are transformed using these parameters to obtain the transformed wafer front marking points P'1, P'2, P'3, and P'4, with coordinates of (x'1, y'1), (x'2, y'2), (x'3, y'3), and (x'4, y'4), respectively.
[0061] Then, calculate the Euclidean distance between each pair of corresponding marked points: d1=distance(P'1,Q1); d2=distance(P'2,Q2); d3=distance(P'3,Q3); d4 = distance(P'4, Q4); Finally, the average of these distances (d1+d2+d3+d4) / 4 can be calculated as the average distance deviation, or the maximum distance deviation can be taken as max{d1,d2,d3,d4}. For example, if the average distance is 0.5 micrometers, then 0.5 micrometers is used as the alignment deviation between the front and back sides of the wafer, which is used to guide the stage to make corresponding translation or rotation compensation.
[0062] Please refer to Figure 2 , Figure 2 This invention provides a double-sided exposure wafer positioning device in some embodiments, which is integrated into a back-end control device in the form of a computer program, comprising: The first control module 100 is used to control the dual-field optical system to emit detection beams to the upper optical channel and the lower optical channel respectively, and to receive the reflected light signals of their respective reflected light. Analysis module 200 is used to obtain local Z-axis height information of the front and back sides of the wafer by analyzing the reflected light signal; The second control module 300 is used to control the axial movement of the upper and lower optical objectives based on the local Z-axis height information, so as to adjust their respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective is precisely coincident with the vertical height position of the alignment mark to be observed on both sides of the wafer. The recognition module 400 is used to acquire an image of the region containing alignment marks on both sides of the wafer after the optical focal plane is adjusted, and to identify the geometric center coordinates of the alignment marks in the region image. The calculation module 500 is used to calculate the alignment deviation between the front and back sides of the wafer based on the geometric center coordinates of the alignment mark; The third control module 600 is used to control the movement or rotation of the worktable to compensate for the alignment deviation.
[0063] In some embodiments, the analysis module 200 performs the following when it is used to obtain local Z-axis height information of both sides of the wafer by analyzing the reflected light signal: S21. By analyzing the reflected light signal, obtain the preliminary Z-axis height range of the front and back sides of the wafer; S22. Control the optical objective lens to scan along the Z-axis within the corresponding initial Z-axis height range, and acquire a series of corresponding scan images during the scanning process; S23. Evaluate the sharpness of the scanned image and take the Z-axis height position corresponding to the scanned image with the best sharpness as the corresponding local Z-axis height information to obtain the local Z-axis height information of the front and back sides of the calibrated wafer.
[0064] In some embodiments, the analysis module 200 performs the following when it is used to obtain the preliminary Z-axis height range of the front and back sides of the wafer by analyzing the reflected light signal: S211. Preprocess the reflected light signal to obtain the preprocessed reflected light signal; S212. By analyzing the preprocessed reflected light signal, the preliminary Z-axis height range of the front and back sides of the wafer is obtained.
[0065] In some embodiments, the calculation module 500 performs the following when calculating the alignment deviation between the front and back sides of the wafer based on the geometric center coordinates of the alignment marks: S51. Perform point set matching on the geometric center coordinates of the alignment markers to obtain the corresponding point set; S52. Based on the corresponding point sets, calculate the translation transformation parameters and / or rotation transformation parameters that minimize the distance residual between the corresponding point sets; S53. Calculate the alignment deviation between the front and back sides of the wafer based on the translation transformation parameters and / or rotation transformation parameters.
[0066] In some embodiments, the calculation module 500 performs the following when calculating translation and / or rotation transformation parameters that minimize the distance residuals between corresponding point sets: S521. Based on the corresponding point set, calculate the translation transformation parameters and / or rotation transformation parameters using the least squares method.
[0067] In some embodiments, the calculation module 500 performs the following when calculating the alignment deviation between the front and back faces of the wafer based on translation and / or rotation transformation parameters: S531. Transform the geometric center coordinates of all alignment marks on the front side of the wafer to the coordinate system on the back side of the wafer through translation and / or rotation transformation parameters to obtain the transformed wafer front side mark points; S532. Calculate the average or maximum distance between the transformed wafer front-side marker and the corresponding wafer back-side marker; S533. Use the average distance or maximum distance as the alignment deviation between the front and back sides of the wafer.
[0068] Please refer to Figure 3 , Figure 3This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. The present invention provides an electronic device 13, including: a processor 1301 and a memory 1302. The processor 1301 and the memory 1302 are interconnected and communicate with each other through a communication bus 1303 and / or other forms of connection mechanism (not shown). The memory 1302 stores computer-readable instructions executable by the processor 1301. When the electronic device is running, the processor 1301 executes the computer-readable instructions to execute the method in any optional implementation of the above embodiments, so as to achieve the following functions: controlling the dual-field optical system to emit detection beams to the upper optical channel and the lower optical channel respectively, and receiving their respective reflections. The reflected light signal is analyzed to obtain local Z-axis height information of both sides of the wafer. Based on the local Z-axis height information, the upper and lower optical objectives are axially moved to adjust their respective optical focal planes to the corresponding specified Z-axis heights, so that the optical focal plane of each optical objective precisely coincides with the vertical height of the alignment marks to be observed on both sides of the wafer. After the optical focal planes are adjusted, an image of the region containing the alignment marks on both sides of the wafer is acquired, and the geometric center coordinates of the alignment marks in the region image are identified. Based on the geometric center coordinates of the alignment marks, the alignment deviation between the front and back sides of the wafer is calculated. Based on the alignment deviation, the stage is moved or rotated to compensate for the deviation.
[0069] This invention provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it performs the method in any optional implementation of the above embodiments to achieve the following functions: controlling a dual-field optical system to emit probe beams to the upper optical channel and the lower optical channel respectively, and receiving the reflected light signals of their respective reflected beams; obtaining local Z-axis height information of the front and back sides of the wafer by analyzing the reflected light signals; controlling the axial movement of the upper and lower optical objectives according to the local Z-axis height information to adjust their respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective precisely coincides with the vertical height position of the alignment marks to be observed on the front and back sides of the wafer; after the optical focal plane adjustment is completed, acquiring a region image containing the alignment marks on the front and back sides of the wafer, and identifying the geometric center coordinates of the alignment marks in the region image; calculating the alignment deviation between the front and back sides of the wafer according to the geometric center coordinates of the alignment marks; and controlling the stage to move or rotate to compensate for the deviation according to the alignment deviation.
[0070] The computer-readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.
[0071] In the embodiments provided by this invention, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some communication interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.
[0072] Furthermore, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0073] Furthermore, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.
[0074] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.
[0075] The above description is merely an embodiment of the present invention and is not intended to limit the scope of protection of the present invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A method for positioning a double-sided exposed wafer, characterized in that, Includes the following steps: S1. Control the dual-field optical system to emit detection beams to the upper optical channel and the lower optical channel respectively, and receive the reflected light signals of their respective reflected light; S2. By analyzing the reflected light signal, the local Z-axis height information of the front and back sides of the wafer is obtained; S3. Based on the local Z-axis height information, control the axial movement of the upper and lower optical objectives to adjust their respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective precisely coincides with the vertical height position of the alignment mark to be observed on both sides of the wafer; S4. After the optical focal plane is adjusted, acquire an image of the region containing the alignment marks on both sides of the wafer, and identify the geometric center coordinates of the alignment marks in the region image; S5. Calculate the alignment deviation between the front and back sides of the wafer based on the geometric center coordinates of the alignment mark; S6. Based on the alignment deviation, control the table to move or rotate to compensate for the deviation.
2. The double-sided exposure wafer positioning method according to claim 1, characterized in that, The specific steps in step S2 include: S21. By analyzing the reflected light signal, obtain the preliminary Z-axis height range of the front and back sides of the wafer; S22. Control the optical objective lens to scan along the Z-axis within the corresponding initial Z-axis height range, and acquire a series of corresponding scan images during the scanning process; S23. Evaluate the sharpness of the scanned image and take the Z-axis height position corresponding to the scanned image with the best sharpness as the corresponding local Z-axis height information to obtain the local Z-axis height information of the front and back sides of the calibrated wafer.
3. The double-sided exposure wafer positioning method according to claim 2, characterized in that, The specific steps in step S21 include: S211. Preprocess the reflected light signal to obtain the preprocessed reflected light signal; S212. By analyzing the preprocessed reflected light signal, the preliminary Z-axis height range of the front and back sides of the wafer is obtained.
4. The double-sided exposure wafer positioning method according to claim 3, characterized in that, Preprocessing includes removing transient outliers and performing local smoothing to suppress local fluctuations and spurious peaks caused by random contaminants or local roughness inhomogeneities.
5. The double-sided exposure wafer positioning method according to claim 1, characterized in that, The specific steps in step S5 include: S51. Perform point set matching on the geometric center coordinates of the alignment markers to obtain the corresponding point set; S52. Based on the corresponding point sets, calculate the translation transformation parameters and / or rotation transformation parameters that minimize the distance residual between the corresponding point sets; S53. Calculate the alignment deviation between the front and back sides of the wafer based on the translation transformation parameters and / or rotation transformation parameters.
6. The double-sided exposure wafer positioning method according to claim 5, characterized in that, The specific steps in step S52 include: S521. Based on the corresponding point set, calculate the translation transformation parameters and / or rotation transformation parameters using the least squares method.
7. The double-sided exposure wafer positioning method according to claim 5, characterized in that, The specific steps in step S53 include: S531. Transform the geometric center coordinates of all alignment marks on the front side of the wafer to the coordinate system on the back side of the wafer through translation and / or rotation transformation parameters to obtain the transformed wafer front side mark points; S532. Calculate the average or maximum distance between the transformed wafer front-side marker and the corresponding wafer back-side marker; S533. Use the average distance or maximum distance as the alignment deviation between the front and back sides of the wafer.
8. A double-sided exposure wafer positioning device, characterized in that, include: The first control module is used to control the dual-field optical system to emit detection beams to the upper optical channel and the lower optical channel respectively, and to receive the reflected light signals of their respective reflected light. The analysis module is used to obtain local Z-axis height information of the front and back sides of the wafer by analyzing the reflected light signal; The second control module is used to control the axial movement of the upper and lower optical objectives based on the local Z-axis height information, so as to adjust their respective optical focal planes to the corresponding specified Z-axis height, so that the optical focal plane of each optical objective is precisely aligned with the vertical height position of the alignment mark to be observed on both sides of the wafer. The recognition module is used to acquire an image of the region containing alignment marks on both sides of the wafer after the optical focal plane is adjusted, and to identify the geometric center coordinates of the alignment marks in the region image; The calculation module is used to calculate the alignment deviation between the front and back sides of the wafer based on the geometric center coordinates of the alignment mark; The third control module is used to control the movement or rotation of the worktable to compensate for the alignment deviation.
9. An electronic device, characterized in that, It includes a processor and a memory, the memory storing computer-readable instructions, which, when executed by the processor, perform the steps of the double-sided exposure wafer positioning method as described in any one of claims 1-7.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it performs the steps in the double-sided exposure wafer positioning method as described in any one of claims 1-7.
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