Automatic addressing method and system for LIN bus communication

Abstract

The invention provides an LIN (Local Interconnect Network) automatic addressing method and system. The system comprises an LIN host module, an LIN slave module and an LIN bus module, a plurality of LIN slave nodes are sequentially connected in series through input ports and output ports to form a chain network, each LIN slave node is provided with an input pin and an output pin, and the LIN host module establishes communication with the LIN slave nodes through the LIN bus module. An LIN slave node generates and sends instructions of address reset, address query, address allocation, self-check preparation, self-check query and the like, the LIN slave node responds to the instructions to switch the level of an output pin, the state of a preorder node is detected through an input pin, and a host dominates address initialization, query, allocation, cyclic allocation and self-check updating processes according to the sequence from the far end to the near end. And automatic addressing of all slave nodes is realized. The method and the system provided by the invention do not need to depend on hardware differentiation design or software preset addresses, so that the hardware design and material management cost is remarkably reduced, the number of supporting nodes is flexible and adaptive, the communication reliability is high, and cross-bus extension application can be realized; the method is especially suitable for scenes with consistent multi-node functions, low cost and high-reliability communication requirements in the field of automotive electronics.

Description

Technical Field

[0001] This invention relates to the field of automotive electronics technology, and more specifically, to an automatic addressing method and system for LIN bus communication. Background Technology

[0002] Local Interconnect Network (LIN bus), as a low-cost, low-speed serial communication bus, is widely used in automotive body control, lighting control, seat adjustment, and other scenarios. These systems typically contain multiple controllers as LIN network nodes. Each node must have a unique network address to achieve orderly data exchange via the bus; this is the fundamental technical prerequisite for ensuring the stable operation of the LIN bus communication system. However, when automotive suppliers mass-produce these LIN controllers, they usually need to ensure that the hardware design and operating software are completely identical, which makes it impossible to distinguish communication addresses.

[0003] Existing technologies differentiate communication addresses by adjusting the hardware design of LIN networks, which may lead to a decrease in the quality of LIN network communication, or even cause the entire network to crash after a node fails. It may also lead to controller confusion during actual production, manufacturing and deployment.

[0004] Therefore, there is an urgent need for an automatic addressing system and method for LIN bus communication when the node hardware design and operating software are completely identical, to solve the problem of automatic address allocation when the node hardware design and operating software are completely identical in the existing LIN network, as well as the problems of communication quality being affected, high implementation cost, poor adaptability to the number of nodes and insufficient bus scalability of existing solutions. Summary of the Invention

[0005] Based on existing technology, the objective of this invention is to provide an automatic addressing method and system for LIN bus communication, which can automatically allocate addresses to each controller without affecting network communication quality, and has low implementation cost, can meet the network communication needs of any number of nodes, and can be extended to other types of communication buses.

[0006] According to the present invention, the above-mentioned task is solved by an automatic addressing method and system for LIN bus communication.

[0007] In a first aspect, the present invention provides an automatic addressing method for LIN bus communication, applied to a LIN network consisting of a LIN master module and multiple LIN slave nodes. Each LIN slave node has an input port and an output port, as well as input pins and output pins respectively connected to the input port and the output port. Multiple LIN slave nodes are connected in series through the input port and the output port to form a chain network. The method includes the following steps: The LIN master module sends an address reset command, and all the LIN slave nodes set their own addresses to unassigned state and control their own output pins to output a high level. The LIN host module performs an address query. Based on a preset address allocation table, it sends address query commands sequentially from the far end LIN slave node to the near end LIN slave node in the chain network. By detecting the level state of the input pins of the LIN slave node, it determines the LIN slave node whose address is to be allocated. The LIN host module performs address allocation by sending an address allocation command to the LIN slave node whose address is to be allocated. After receiving the address allocation command, the LIN slave node whose address is to be allocated sets its own address and controls its output pin to output a low level. The LIN host module performs address round-robin allocation, repeatedly executing the address lookup and address allocation steps until all LIN slave nodes have completed address allocation; and The LIN host module performs address self-check and update, periodically sends address self-check commands to check the address status of each LIN slave node, and if a node is lost or the address is abnormal, it executes the address query, address allocation and address cyclic allocation steps to complete the address update.

[0008] Furthermore, when the LIN slave node powers on, it first checks whether it has completed address allocation, and then performs the following steps based on the address allocation status: If address allocation is complete, the LIN slave node control output pin outputs a low level; and If address allocation is not completed, the LIN slave node control output pin will output a high level.

[0009] In one embodiment of the present invention: The LIN host module uses the CMD1 command to send a request to reset the addresses of all the LIN slave nodes; After receiving the CMD1 instruction, the LIN slave node sets itself to an address-unallocated state and controls the output pin of the LIN slave node to output a high level.

[0010] In one embodiment of the present invention: The LIN host module periodically sends CMD2 instructions, which are configured to query the address allocation results of each LIN slave node until the address allocation of all LIN slave nodes is completed or the address of a certain LIN slave node cannot be allocated. If the LIN slave node receives a CMD2 instruction and its input pin is low, the LIN slave node will look up its own address allocation from a preset address allocation table according to the number of CMD2 instructions received, and control its own output pin to output a low level.

[0011] Furthermore, if the CMD2 command does not respond and an address cannot be allocated, the LIN host module records the address and reports the error.

[0012] In one embodiment of the present invention: The LIN host module sends an address allocation instruction via the CMD3 instruction, which includes the allocated address of the LIN slave node; If the LIN slave node receives the CMD3 instruction and its own address has not been assigned, the LIN slave node sets its own assigned address according to the information in the CMD3 instruction and controls its own output pin to output a low level.

[0013] In one embodiment of the present invention, the LIN master module sets the output pins of all the LIN slave nodes to output high level by sending a CMD4 command.

[0014] In one embodiment of the present invention, the LIN host module sends CMD5 to query the address allocation status of each LIN slave node in order from far to near according to a preset address allocation table. If a LIN slave node receives a CMD5 instruction, it immediately controls its own output pin to output a low level and feeds back the level status of the input pin to the LIN host.

[0015] Furthermore, if the LIN host module detects that two or more LIN slave nodes have lost communication, it will directly report the error and request address reallocation.

[0016] A second aspect of the present invention provides an automatic addressing system for LIN bus communication, the system comprising: The LIN master module is configured to establish a communication connection with the LIN slave module, generate and send address reset, address query, address allocation, self-test preparation and self-test query commands, and monitor the response status of the LIN slave node and execute error recording and recovery strategies. A LIN slave module includes multiple LIN slave nodes. Each LIN slave node includes a LIN transceiver, a control chip, an input port and an output port connected to the control chip, and input pins and output pins connected to the input port and the output port, respectively. The multiple LIN slave nodes are connected in series through the input port and the output port. A LIN bus module, configured to connect the LIN master module and the LIN slave module.

[0017] This invention proposes an automatic addressing method and system for LIN bus communication, which has at least the following advantages: The method and system can automatically allocate addresses for all slave nodes or a single slave node in the entire network, provided the controller hardware design and operating software are completely consistent with existing solutions. Furthermore, the system has strong fault tolerance, preventing the entire network communication from being paralyzed due to the failure of a single slave node. In addition, while ensuring the original network communication quality, the method and system can be applied to network communication with any number of nodes, and simultaneously supports the expansion and / or reduction of network nodes. The method and system are not limited to LIN network communication; they are also applicable to other types of buses and can be widely used in automotive electronics scenarios such as body control subsystems, lighting control systems, and air conditioning control systems. Attached Figure Description

[0018] To further illustrate the advantages and other features of the various embodiments of the present invention, a more specific description of the embodiments of the present invention will be presented with reference to the accompanying drawings. It is understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by the same or similar reference numerals for clarity.

[0019] Figure 1 The diagram illustrates the circuit structure of a LIN slave node in one embodiment of the present invention.

[0020] Figure 2 A complete LIN network structure diagram is shown in one embodiment of the present invention.

[0021] Figure 3 The following is a flowchart illustrating the execution strategy of the LIN host module at the initial power-on moment in one embodiment of the present invention.

[0022] Figure 4 A flowchart illustrating the address reallocation process performed by the LIN host module in one embodiment of the present invention is shown.

[0023] Figure 5 The following is a flowchart illustrating the execution process of the LIN host module when it detects a loss of node communication, according to one embodiment of the present invention.

[0024] Figure 6 The following is a flowchart illustrating the execution strategy of a LIN slave node in one embodiment of the present invention.

[0025] List of reference numerals 100 LIN slave nodes 101 LIN transceiver 102 Control Chip 103 Output Port 104 LIN port 105 Input Port 106 output pins 107 Input Pins R1 is the first resistor. R2 is the second resistor. R3 is the third resistor. D1 First diode D2 Second Diode Detailed Implementation It should be noted that the components in the various figures may be shown exaggeratedly for illustrative purposes and are not necessarily to scale. In each figure, the same reference numerals are used for components that are identical or have the same function.

[0026] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0027] In this invention, unless otherwise specified, the quantifiers “a” and “one” do not exclude scenarios involving multiple elements.

[0028] It should also be noted that, in the embodiments of the present invention, only a portion of the components or parts may be shown for clarity and simplicity. However, those skilled in the art will understand that, under the teachings of the present invention, necessary components or parts can be added as needed for specific scenarios. Furthermore, unless otherwise stated, features in different embodiments of the present invention can be combined with each other. For example, a feature in the second embodiment can replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment will also fall within the scope of disclosure or description of this application.

[0029] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0030] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0031] This invention proposes a LIN automatic addressing system, the system comprising: The LIN master module is configured to establish a communication connection with the LIN slave module, generate and send address reset, address query, address allocation, self-test preparation and self-test query commands, and monitor the response status of the LIN slave node and execute error recording and recovery strategies. A LIN slave module includes multiple LIN slave nodes. Each LIN slave node includes a control chip, an input port and an output port connected to the control chip, and input pins and output pins connected to the input port and the output port, respectively. The multiple LIN slave nodes are connected in series through the input port and the output port. A LIN bus module, configured to connect the LIN master module and the LIN slave module.

[0032] Figure 1 A circuit diagram of a LIN slave node is shown in one embodiment of the present invention. Figure 1 As shown, the LIN slave node 100 includes: LIN transceiver 101 is configured as the physical layer communication interface of the LIN bus module, and realizes signal conversion and transmission between the control chip 102 and the LIN bus module through LIN port 104. The control chip 102 is configured as the logic control core of the LIN slave node. It receives instructions sent by the LIN master module through a LIN transceiver, parses the instruction type and the information it carries, and executes the corresponding operations. The control chip has an input pin 107 near the input terminal of the LIN slave node 100 and an output pin 106 near the output terminal of the LIN slave node 100. The control chip 102 can control the output pin 106 to output a high or low level.

[0033] Output port 103 is connected to output pin 106 of control chip 102 via output terminal circuit. The output terminal circuit includes: one end of first resistor R1 is connected to output port 103, and the other end is connected to output pin 106 (C_Pin) of control chip 102; the anode of first diode D1 is grounded, and the cathode is connected to the connection node between first resistor R1 and output port 103 for level clamping and protection.

[0034] Input port 105 is connected to input pin 107 of control chip 102 via input circuit. The input circuit includes: one end of second resistor R2 is connected to input port 105, and the other end is connected to input pin 107 (S_Pin) of control chip 102; one end of third resistor R3 is connected to the connection node between second resistor R2 and input pin 107, and the other end is grounded; the anode of second diode D2 is connected to the ground terminal of third resistor R3, and the cathode is connected to the connection node between second resistor R2 and input port 105, forming a protection circuit.

[0035] Figure 2 A complete LIN network structure diagram is shown in one embodiment of the present invention. Figure 2 As shown, in one embodiment of the present invention, the number of LIN slave nodes in the LIN network is N (N>1), and all LIN slave nodes are connected in series through input ports and output ports.

[0036] This invention also proposes a LIN automatic addressing method, applied to the aforementioned LIN automatic addressing system of this invention, the method comprising the following steps: The LIN master module sends an address reset command, and all the LIN slave nodes set their own addresses to unassigned state and control their own output pins to output a high level. The LIN host module performs an address query. Based on a preset address allocation table, it sends address query commands sequentially from the far end LIN slave node to the near end LIN slave node in the chain network. By detecting the level state of the input pins of the LIN slave node, it determines the LIN slave node whose address is to be allocated. The LIN host module performs address allocation by sending an address allocation command to the LIN slave node whose address is to be allocated. After receiving the address allocation command, the LIN slave node whose address is to be allocated sets its own address and controls its output pin to output a low level. The LIN host module performs address round-robin allocation, repeatedly executing the address lookup and address allocation steps until all LIN slave nodes have completed address allocation; and The LIN host module performs address self-check and update, periodically sends address self-check commands to check the address status of each LIN slave node, and if a node is lost or the address is abnormal, it executes the address query, address allocation and address cyclic allocation steps to complete the address update.

[0037] The software execution strategy of the LIN automatic addressing method will be further explained below with reference to specific embodiments of the present invention.

[0038] Figure 3 A flowchart illustrating the execution strategy of the LIN host module at the initial power-on moment, according to one embodiment of the present invention, is shown. Figure 3 As shown, in one embodiment of the present invention, the LIN host module performs the following steps at the initial moment of power-on: The LIN host module queries all LIN slave nodes in the LIN network sequentially, from farthest to nearest, according to a pre-defined address allocation table to check if address allocation has been completed. During the query process, if a response is received, the allocation is recorded as complete; if no response is received, the unallocated address information is recorded. This query process is repeated until all LIN slave nodes in the LIN network have been queried.

[0039] In one embodiment of the present invention, if the LIN host module finds that only one LIN slave node address (e.g., address A1) has not been allocated, the following steps are performed: The LIN host module sends an address allocation command CMD3, which includes the allocated address of the LIN slave node, i.e., address A1. Next, the LIN host module queries this address for a response. If there is no response after multiple consecutive queries (e.g., preferably 3 times), the LIN host module records the address and reports an error.

[0040] Figure 4 A flowchart illustrating the address reallocation process performed by the LIN host module in one embodiment of the present invention is shown. Figure 4 As shown, in one embodiment of the present invention, if the LIN host module finds that more than one LIN slave node address has not been allocated, it performs address reallocation. Specifically, address reallocation includes the following steps: The LIN host module uses the CMD1 command to send a request to reset the addresses of all nodes.

[0041] The LIN host module periodically sends the CMD2 command to query the node address allocation results until all node addresses have been allocated, or until a certain address is detected as unallocable. Specifically, an address being unallocable is indicated by a no-response to the CMD2 command.

[0042] In one embodiment of the present invention, if an address (e.g., address A2) cannot be allocated, the LIN host module records the address and reports the error.

[0043] Figure 5 The following is a flowchart illustrating the execution process of the LIN host module when it detects a loss of node communication, according to one embodiment of the present invention. Figure 5 As shown, in one embodiment of the present invention, if the LIN host module discovers that two or more LIN slave nodes have lost communication, it directly reports an error and requests address reallocation.

[0044] In one embodiment of the present invention, if the LIN host module detects that a LIN slave node address (e.g., address A3) has lost communication, the following steps are performed: The LIN host module uses the CMD3 command to send a request to the outside world, assigning the address A3 to the LIN slave node; The LIN host module performs an address query, using address A3 to query the status of the LIN slave node. If the address query is answered, the LIN host module records that the address A3 allocation is complete. If the address query is not answered, the above address allocation and query steps are repeated. If the query request is not answered multiple times (for example, preferably 3 times), the allocation of address A3 is abandoned and an error is reported.

[0045] Figure 6 A flowchart illustrating the execution strategy of a LIN slave node in one embodiment of the present invention is shown. Figure 6 As shown, in one embodiment of the present invention, upon initial power-up, the LIN slave node first checks whether it has completed address allocation. If it has, the LIN slave node controls its output pin to output a low level. Otherwise, it controls its output pin to output a high level. Subsequently, the LIN slave node executes corresponding operations according to the instructions sent by the master. Specifically, the operations are as follows: If a LIN slave node receives a CMD1 instruction, it immediately sets itself to an address-unallocated state and then controls its output pin to output a high level.

[0046] If a LIN slave node receives a CMD2 instruction and detects that its own input pin is low, the LIN slave node will look up its own address allocation from the preset address allocation table according to the number of CMD2 instructions received, and then control its own output pin to output a low level.

[0047] If a LIN slave node receives a CMD3 instruction (which contains the address information assigned to the LIN slave node) and its own address has not been assigned, the LIN slave node sets its own assigned address according to the information in the CMD3 instruction, and then controls its own output pin to output a low level.

[0048] If a LIN slave node receives the CMD4 command, it immediately controls its output pin to output a high level.

[0049] If a LIN slave node receives a CMD5 command, it immediately controls its own output pins to output a low level and feeds back the level status of its own input pins to the LIN master module through response data.

[0050] In one embodiment of the present invention, the LIN master module periodically performs an address self-test to check whether the address allocation of each LIN slave node in the LIN slave module is correct. Specifically, the address self-test includes the following steps: First, the LIN master module sends the CMD4 command to control all LIN slave nodes to output a high level on their output pins.

[0051] Since the LIN slave nodes are connected in series through the input and output ports, when an output pin of a LIN slave node outputs a high level, the input pin of the next LIN slave node connected in series with it along the current direction should also be at a high level. Based on this, the LIN master module sends a CMD5 command to sequentially query the address allocation status of each LIN slave node according to a preset address allocation table. If the query finds that the input pin of a LIN slave node is not low, it considers the current node's address allocation incorrect, and the LIN master module then executes an address reallocation strategy.

[0052] In one embodiment of the present invention, the functions of CMD1 to CMD5 are configured as follows: The CMD1 instruction (address reset instruction) is configured to trigger the address status reset of all LIN slave nodes, causing the slave nodes to clear their allocated addresses and return to the "unallocated" state. At the same time, it controls its own output port to output a high level, providing a unified initial state for subsequent re-addressing.

[0053] The CMD2 command (address query command) is configured to query the address allocation progress of each LIN slave node. It is sent periodically by the LIN master module in the order from the far end to the near end of the chain network. The LIN slave node only responds when its own address has not been allocated and its own input port detects a high level. The LIN master module determines the LIN slave node whose address is currently to be allocated based on the response result, thus avoiding address conflicts.

[0054] The CMD3 instruction (address allocation instruction) is configured to send target address information to a LIN slave node with a specific address to be allocated. After receiving the information, the LIN slave node sets its own address to the target address and immediately controls its own output port to output a low level, thus completing the address binding and transmitting the "address allocated" signal to subsequent LIN nodes.

[0055] The CMD4 instruction (self-test preparation instruction) is configured to unify the output port level of all LIN slave nodes during the address self-test process, forcing LIN slave nodes (regardless of their current address state) to output a high level on their control output port, thus eliminating the interference of the original level state on the self-test results.

[0056] The CMD5 command (self-test query command) is configured to verify the matching of the address and physical location of each LIN slave node. It is sent by the LIN master module in the order from the far end to the near end. After receiving the CMD5 command, the LIN slave node immediately switches the level of its output port to low level and feeds back the real-time level of its input port. The LIN master module determines whether the address is correctly assigned by checking whether the input port of the LIN slave node is low, thereby detecting abnormal nodes.

[0057] In one embodiment of the present invention, during the operation of the system, if a new LIN slave node is added to the LIN network, the LIN host module needs to be actively triggered by external triggering conditions (such as button triggering) to execute the address reallocation strategy, and allocate a unique address to the new LIN slave node according to the process of address reset, query and allocation.

[0058] The automatic addressing method and system for LIN bus communication proposed in the above embodiments of the present invention have at least the following beneficial effects: The method and system proposed in the present invention can automatically allocate addresses of each controller when the hardware design and operating software of the LIN network nodes are completely consistent, without relying on hardware differentiation design or software preset addresses, significantly reducing hardware design complexity and material management costs; its address allocation process does not affect network communication quality and supports flexible adaptation of any number of nodes. In terms of application scenarios, the method and system proposed in the present invention are applicable to subsystems such as body control (e.g., door and window controllers), lighting control (e.g., ambient lighting and turn signal controllers), and seat and air conditioning control (e.g., seat adjustment motors and damper controllers) in the automotive electronics field, providing an efficient address management solution for fields where multiple nodes have consistent functions and require low-cost, high-reliability communication.

[0059] Although various embodiments of the present invention in LIN bus communication have been described above, it should be understood that they are presented as examples only and not as limitations. It will be apparent to those skilled in the art that the systems and methods of the present invention are also applicable to other types of communication buses such as CAN bus and Ethernet.

[0060] Although various embodiments of the invention have been described above, it should be understood that they are presented by way of example only and not as limitations. It will be apparent to those skilled in the art that various combinations, modifications, and alterations can be made without departing from the spirit and scope of the invention. Therefore, the breadth and scope of the invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined solely by the appended claims and their equivalents.

Claims

1. An automatic addressing method for LIN bus communication, characterized in that, This method is applied to a LIN network consisting of a LIN master module and multiple LIN slave nodes. Each LIN slave node has an input port and an output port, as well as input pins and output pins connected to the input port and output port, respectively. Multiple LIN slave nodes are connected in series through the input port and the output port to form a chain network. The method includes the following steps: The LIN master module sends an address reset command, and all the LIN slave nodes set their own addresses to unassigned state and control their own output pins to output a high level. The LIN host module performs an address query. Based on a preset address allocation table, it sends address query commands sequentially from the far end LIN slave node to the near end LIN slave node in the chain network. By detecting the level state of the input pins of the LIN slave node, it determines the LIN slave node whose address is to be allocated. The LIN host module performs address allocation by sending an address allocation command to the LIN slave node whose address is to be allocated. After receiving the address allocation command, the LIN slave node whose address is to be allocated sets its own address and controls its output pin to output a low level. The LIN host module performs address round-robin allocation, repeatedly executing the address lookup and address allocation steps until all LIN slave nodes have completed address allocation; and The LIN host module performs address self-check and update, periodically sends address self-check commands to check the address status of each LIN slave node, and if a node is lost or the address is abnormal, it executes the address query, address allocation and address cyclic allocation steps to complete the address update.

2. The method according to claim 1, characterized in that, When the LIN slave node powers on, it first checks whether it has completed address allocation, and then performs the following steps based on the address allocation status: If address allocation is complete, the LIN slave node control output pin outputs a low level; and If address allocation is not completed, the LIN slave node control output pin will output a high level.

3. The method according to claim 2, characterized in that: The LIN host module uses the CMD1 command to send a request to reset the addresses of all the LIN slave nodes; and After receiving the CMD1 instruction, the LIN slave node sets itself to an address-unallocated state and controls the output pin of the LIN slave node to output a high level.

4. The method according to claim 2, characterized in that: The LIN host module periodically sends CMD2 instructions, which are configured to query the address allocation results of each LIN slave node until the address allocation of all LIN slave nodes is completed or the address of a certain LIN slave node cannot be allocated. as well as If the LIN slave node receives a CMD2 instruction and its input pin is low, the LIN slave node will look up its own address allocation from a preset address allocation table according to the number of CMD2 instructions received, and control its own output pin to output a low level.

5. The method according to claim 4, characterized in that, If the CMD2 command does not respond and an address cannot be allocated, the LIN host module records the address and reports the error.

6. The method according to claim 2, characterized in that: The LIN host module sends an address allocation instruction via the CMD3 command, the CMD3 command including the allocated address of the LIN slave node; and If the LIN slave node receives the CMD3 instruction and its own address has not been assigned, the LIN slave node sets its own assigned address according to the information in the CMD3 instruction and controls its own output pin to output a low level.

7. The method according to claim 2, characterized in that, The LIN master module sets the output pins of all LIN slave nodes to high level by sending the CMD4 command.

8. The method according to claim 2, characterized in that, The LIN master module queries the address allocation status of each LIN slave node sequentially by sending CMD5 commands from far to near according to a preset address allocation table. If a LIN slave node receives a CMD5 command, it immediately controls its output pin to output a low level and feeds back the level status of the input pin to the LIN master.

9. The method according to claim 1, characterized in that, If the LIN host module detects that two or more LIN slave nodes have lost communication, it will directly report the error and request address reallocation.

10. An automatic addressing system for LIN bus communication, characterized in that, The system includes: The LIN master module is configured to establish a communication connection with the LIN slave module, generate and send address reset, address query, address allocation, self-test preparation and self-test query commands, and monitor the response status of the LIN slave node and execute error recording and recovery strategies. A LIN slave module includes multiple LIN slave nodes. Each LIN slave node includes a LIN transceiver, a control chip, an input port and an output port connected to the control chip, and input pins and output pins connected to the input port and the output port, respectively. The multiple LIN slave nodes are connected in series through the input port and the output port. A LIN bus module, configured to connect the LIN master module and the LIN slave module.

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