Power-on impact current suppression circuit applied to airborne secondary power supply and control method of power-on impact current suppression circuit

Abstract

The invention relates to the technical field of airborne power supplies, in particular to a power-on impact current suppression circuit applied to an airborne secondary power supply and a control method of the power-on impact current suppression circuit. The suppression circuit comprises a power supply circuit, multiple paths of power supply modules and delay starting circuits which are arranged in one-to-one correspondence with the power supply modules; the power supply circuit is used for supplying power to the delay starting circuit; different delay time is set through each path of delay starting circuit, so that the multiple paths of power supply modules are started in a time-sharing manner, and the power-on impact current of the airborne secondary power supply is inhibited. According to the invention, the time-sharing starting of the multi-path power supply module can be realized, and the function of suppressing the power-on impact current is achieved, so that the normal starting of a post-stage load and the safety of power utilization are protected, and the reliability of the combined power supply is improved.

Description

Technical Field

[0001] This invention relates to the field of airborne power supply technology, specifically to a power-on inrush current suppression circuit and its control method applied to airborne secondary power supplies. Background Technology

[0002] Currently, in the development of airborne power supply and distribution technology, modular power supply solutions are used in various electronic systems due to the complex power supply requirements of the loads. Because of the complexity of the internal working principles of electronic systems, there are strict power-on requirements for each output voltage. Airborne DC / DC converters are connected in parallel to the primary bus. When the rated voltage is suddenly applied, it will bring a large inrush current to the system bus. The power supply characteristics of aircraft require that the inrush current generated by the secondary power supply should not exceed 5 times the rated current. Therefore, it is necessary to implement an airborne secondary power supply inrush current suppression circuit. Summary of the Invention

[0003] The purpose of this invention is to provide a power-on inrush current suppression circuit and its control method for airborne secondary power supplies. This control circuit and its control method can overcome the shortcomings of the prior art, realize the power-on inrush current suppression function of the secondary power supply, protect the normal start-up and power supply safety of downstream loads, and improve the reliability of the secondary power supply.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect of the invention, a power-on inrush current suppression circuit for airborne secondary power supplies is disclosed. The suppression circuit includes a power supply circuit, multiple power modules, and a delayed start circuit corresponding to each power module. The power supply circuit supplies power to the delayed start circuits. By setting different delay times for each delayed start circuit, the multiple power modules are started in a time-sharing manner to suppress the power-on inrush current of the airborne secondary power supply.

[0005] As a further improvement to the above scheme, the output terminal of the power supply circuit is connected to the input terminal of each delayed start circuit; the output terminal of the delayed start circuit is connected to the disable control terminal of the corresponding power module.

[0006] As a further improvement to the above solution, the power supply circuit is used to convert the bus voltage into the power supply voltage of the delayed start circuit; the delayed start circuit is used to set the delay time through RC parameters and generate a low-level signal during the delay time, using the low-level signal to control the power module to stop working, and after the delay time, the power module starts working; the power module is used to convert the input DC bus voltage into the DC voltage required by the downstream load.

[0007] As a further improvement to the above scheme, the power supply module is a DC / DC converter, and the power supply module's disable terminal INH is low-level disabled.

[0008] As a further improvement to the above scheme, the power supply circuit includes a resistor R4, a Zener diode V2, a transistor V3, and a capacitor C1. The first terminal of the resistor R4 is connected to the input bus voltage Vin, and the second terminal is connected to the cathode of the Zener diode V2; the anode of the Zener diode V2 is connected to the input bus ground; the base of the transistor V3 is connected to the cathode of the Zener diode V2, the collector is connected to the input bus voltage Vin, and the emitter is connected to the first terminal of the capacitor C1; the second terminal of the capacitor C1 is connected to the input bus ground.

[0009] As a further improvement to the above solution, the delayed start circuit includes resistors R5, R6, R7, and R8, capacitor C2, Zener diode V1, transistor V4, and reference source N3; the first end of resistor R5 is connected to the output terminal of the power supply circuit, and the second end is connected to the first end of capacitor C2; the second end of capacitor C2 is connected to the input bus ground; the first end of resistor R6 is connected to the first end of capacitor C2, and the second end of resistor R6 is connected to the second end of capacitor C2; the reference terminal of reference source N3 is connected to the first end of capacitor C2; the reference source N3... The first terminal of the resistor R7 is connected to the second terminal of the resistor R7; the second terminal of the reference source N3 is connected to the input bus ground; the first terminal of the resistor R7 is connected to the output terminal of the power supply circuit; the second terminal of the resistor R7 is connected to the first terminal of the Zener diode V1; the second terminal of the Zener diode V1 is connected to the first terminal of the resistor R8; the second terminal of the resistor R8 is connected to the input bus ground; the first terminal of the resistor R8 is connected to the base of the transistor V4; the emitter of the transistor V4 is connected to the input bus ground; the collector of the transistor V4 is connected to the disable terminal INH of the power supply module.

[0010] In a second aspect of the present invention, a control method for the above-described power-on inrush current suppression circuit applied to an airborne secondary power supply is disclosed, the method comprising: The power supply circuit provides power to each delayed start circuit; By setting different delay times for each delay start circuit, multiple power modules can be started in a time-sharing manner according to the corresponding delay times, so as to suppress the power-on inrush current of the airborne secondary power supply.

[0011] As a further improvement to the above solution, the power supply circuit supplies power to each delayed start circuit; by setting different delay times for each delayed start circuit, multiple power modules are started in a time-sharing manner according to the corresponding delay times, so as to suppress the power-on inrush current of the airborne secondary power supply, specifically including: When the rated voltage is applied to the input terminal, the input voltage is output as VCC through the power supply circuit to power each delay start circuit. The voltage across capacitor C2 in the delay start circuit gradually builds up. When the voltage across capacitor C2 is less than the internal reference voltage of reference source N3, transistor V4 is turned on, the disable terminal INH of the power supply module is pulled low, and the power supply module has no output; when the voltage across capacitor C2 is greater than the internal reference voltage of reference source N3, transistor V4 is turned off, the disable terminal INH of the power supply module is left floating, and the power supply module works normally. The delay time of the delay start circuit can be set by adjusting the parameters of resistor R5 and capacitor C2 in the delay start circuit.

[0012] Compared with the prior art, the advantages of the present invention are: (1) The airborne secondary power supply inrush current suppression circuit described in this invention is used in the multi-output circuit of the airborne power supply component DC / DC converter, which can realize the time-sharing start-up of each output in the airborne power supply component. This invention realizes the function of time-sharing start-up of each output of the airborne secondary power supply, which can protect the orderly start-up of the downstream load and the safety of power consumption, improve the reliability of the combined power supply, and has the characteristics of simple design, simple and flexible structure, low cost, reliable operation and significant economic benefits.

[0013] (2) The airborne secondary power supply inrush current suppression circuit of the present invention defines that each power module in the airborne power supply assembly starts after a certain delay. By configuring the resistors and capacitors of the delay start circuit, the power modules can start in a time-sharing manner, thereby achieving the effect of suppressing the inrush current. It has strong anti-interference ability and can be widely used in airborne power supply assemblies composed of multiple power modules. Attached Figure Description

[0014] Figure 1 This is a block diagram illustrating the principle of the power-on inrush current suppression circuit applied to airborne secondary power supplies in this invention. Figure 2 This is a circuit diagram of the power-on inrush current suppression circuit applied to airborne secondary power supplies in this invention.

[0015] in: 1. Power supply circuit; 2. Delay start circuit; 3. Power module. Detailed Implementation

[0016] The present invention will be further described below with reference to the accompanying drawings: To improve the reliability of combined power supplies and the safety of electrical equipment, this invention proposes a power-on inrush current suppression circuit for airborne secondary power supplies. This circuit is designed around the high reliability and anti-interference requirements of airborne power supplies and can be directly integrated into airborne power supply components to realize the function of power-on inrush current suppression for airborne secondary power supplies, protecting the orderly start-up of downstream loads and the safety of power consumption.

[0017] like Figure 1 The circuit shown is an inrush current suppression circuit for airborne secondary power supplies, comprising a power supply circuit 1, a delayed start circuit 2, and a power module 3.

[0018] The power supply circuit 1 converts the bus voltage into the supply voltage VCC in the delay start circuit 2. The delay start circuit 2 generates a low-level signal during the delay period to disable the operation of the power module 3. After the delay period, the transistor V4 in the delay start circuit 2 is cut off, and the power module 3 outputs normally, thus achieving time-sharing startup of the power module 3 and suppressing power-on inrush current. The power module 3 converts the input DC bus voltage into the DC voltage required by the downstream load. The power module 3 is a DC / DC converter, and its disable terminal INH is low-level disabled.

[0019] In some implementations, such as Figure 2 As shown, the power supply circuit 1 includes a resistor R4, a Zener diode V2, a transistor V3, and a capacitor C1. The first terminal of the resistor R4 is connected to the input bus voltage Vin, and the second terminal is connected to the cathode of the Zener diode V2; the anode of the Zener diode V2 is connected to the input bus ground. The base of the transistor V3 is connected to the cathode of the Zener diode V2, the collector is connected to the input bus voltage Vin, and the emitter is connected to the first terminal of the capacitor C1; the second terminal of the capacitor C1 is connected to the input bus ground. The input bus voltage Vin supplies power to the Zener diode V2 through the resistor R4. When the transistor V3 operates in the amplification region, the voltage across the capacitor C1 is the voltage across the Zener diode V2 minus the voltage difference between the base and emitter of the transistor V3.

[0020] In some implementations, such as Figure 2As shown, the delayed start circuit 2 includes resistors R5, R6, R7, and R8, capacitor C2, Zener diode V1, transistor V4, and reference source N3. The first end of resistor R5 is connected to the output terminal of the power supply circuit 1, and the second end is connected to the first end of capacitor C2; the second end of capacitor C2 is connected to the input bus ground. The first end of resistor R6 is connected to the first end of capacitor C2, and the second end of resistor R6 is connected to the second end of capacitor C2. The reference terminal of reference source N3 is connected to the first end of capacitor C2; the first end of reference source N3 is connected to the second end of resistor R7; the second end of reference source N3 is connected to the input bus ground; the first end of resistor R7 is connected to the output terminal of the power supply circuit 1; the second end of resistor R7 is connected to the first end of Zener diode V1; the second end of Zener diode V1 is connected to resistor R8; and the second end of resistor R8 is connected to the input bus ground. The first end of the resistor R8 is connected to the base of the transistor V4; the emitter of the transistor V4 is connected to the input bus ground; and the collector of the transistor V4 is connected to the disable terminal INH of the power module 3.

[0021] The output of power supply circuit 1 is the supply voltage VCC, which provides bias current to the reference source N3 and the Zener diode V1 through resistor R7. The connection point of resistors R5 and R6 serves as the sampling point for the supply voltage VCC. The holding time of the low-level output of the delay start circuit 2 is controlled by setting the parameters of resistor R5 and capacitor C2. After the supply voltage VCC is established, capacitor C2 is charged through resistor R5, and the voltage across it gradually builds up, i.e., the voltage at the sampling point gradually builds up. The voltage at this sampling point is compared with the built-in reference voltage 2.5V of the reference source N3 to control the voltage of the cathode of the reference source N3, thereby controlling the conduction and cutoff of transistor V4 in each delay start circuit 2, realizing the time-sharing start of each power module.

[0022] This invention innovatively employs a delay logic based on RC charging / discharging and reference source comparison. By adjusting the parameters of resistor R5 and capacitor C2 in the delay start-up circuit, the start-up time difference of different power modules can be flexibly set: upon power-up, capacitor C2 gradually charges. Before the voltage reaches the internal reference voltage (2.5V) of the reference source N3, transistor V4 conducts, and the power module's disable terminal INH is pulled low (no output); after the voltage reaches the target, transistor V4 is cut off, and the power module starts. By configuring multiple sets of RC parameters, multiple power modules can be started in a preset sequence, avoiding the superposition of bus currents caused by simultaneous startup of multiple modules. This fundamentally controls the inrush current to within 5 times the rated current, achieving precise delay and orderly startup.

[0023] The present invention also includes a control method for the above-mentioned power-on inrush current suppression circuit applied to an airborne secondary power supply, the method comprising the following steps: When the rated voltage is applied to the input terminal, the input voltage outputs VCC through power supply circuit 1. The voltage across capacitor C2 gradually builds up. When the voltage across capacitor C2 is less than the internal reference voltage of reference source N3, transistor V4 conducts, pulling the disable terminal INH of power module 3 low, and power module 3 has no output. When the voltage across capacitor C2 is greater than the internal reference voltage of reference source N3, transistor V4 is cut off, the disable terminal INH of power module 3 is left floating, and power module 3 operates normally. By configuring the RC parameters of the delay start circuit 2, the start-up time of different power modules in the secondary power supply can be adjusted to suppress the inrush current.

[0024] The working principle of the above-mentioned airborne secondary power supply inrush current suppression circuit is as follows: The input bus voltage Vin supplies power to Zener diode V2 through resistor R4. Transistor V3 operates in the amplification region. The voltage across capacitor C1 is the voltage across Zener diode V2 minus the voltage difference between the base and emitter of transistor V3. The voltage across capacitor C1 is the supply voltage for pin VCC. The connection point of resistors R5 and R6 serves as the sampling point for the supply voltage VCC. When the sampling point is lower than the built-in reference voltage 2.5V of the reference source N3, the supply voltage VCC is divided by resistor R7, Zener diode V1, and resistor R8 to obtain a high level at the base of transistor V4. Transistor V4 saturates and conducts, pulling the disable pin of power module 3 low. After the set delay time is reached, the sampling point is higher than the built-in reference voltage 2.5V of the reference source N3, pulling the cathode of Zener diode low, transistor V4 is cut off, the disable pin of power module 3 is left floating, and each power module starts up in a time-sharing manner. By properly selecting the parameters of resistor R5 and capacitor C2, the power module can be started in a time-sharing manner, thereby suppressing the inrush current.

[0025] In summary, this invention is applied to a circuit for suppressing inrush current during power-up of airborne secondary power supplies. By setting the parameters of the RC components in the delayed start circuit, a multi-channel time-sharing start-up effect can be achieved in the event of a module power failure. The circuit structure of this invention supports the parallel expansion of multiple power modules. By configuring independent delayed start circuits for different power modules (only the corresponding RC parameters need to be adjusted), time-sharing start-up of any number of power modules can be achieved without refactoring the overall circuit. At the same time, the design of the Zener diodes V1 / V2 and the reference source N3 in the circuit can resist voltage fluctuations and electromagnetic interference in the airborne environment, ensuring stable triggering of the delayed logic. It is suitable for complex airborne power supply components composed of multiple DC / DC converters.

[0026] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.

Claims

1. A circuit for suppressing inrush current applied to airborne secondary power supplies, characterized in that, The suppression circuit includes a power supply circuit (1), a multi-channel power supply module (3), and a time-delay start circuit (2) corresponding to each power supply module (3). The power supply circuit (1) is used to supply power to the time-delay start circuit (2). By setting different delay times for each time-delay start circuit (2), the multiple power supply modules (3) are started in a time-sharing manner to suppress the power-on inrush current of the airborne secondary power supply.

2. The power-on inrush current suppression circuit for airborne secondary power supplies according to claim 1, characterized in that, The output terminal of the power supply circuit (1) is connected to the input terminal of each delay start circuit (2); the output terminal of the delay start circuit (2) is connected to the disable control terminal of the corresponding power module (3).

3. The power-on inrush current suppression circuit for airborne secondary power supplies according to claim 1, characterized in that, The power supply circuit (1) is used to convert the bus voltage into the power supply voltage of the delayed start circuit (2); The delay start circuit (2) is used to set the delay time through RC parameters and generate a low-level signal during the delay time. The low-level signal is used to control the power module (3) to stop working. After the delay time, the power module (3) starts working. The power module (3) is used to convert the input DC bus voltage into the DC voltage required by the downstream load.

4. The power-on inrush current suppression circuit for airborne secondary power supplies according to claim 1, characterized in that, The power module (3) is a DC / DC converter, and the disable terminal INH of the power module (3) is low-level disable.

5. The power-on inrush current suppression circuit for airborne secondary power supplies according to claim 1, characterized in that, The power supply circuit (1) includes a resistor R4, a Zener diode V2, a transistor V3, and a capacitor C1; The first end of resistor R4 is connected to the input bus voltage Vin, and the second end is connected to the cathode of Zener diode V2; the anode of Zener diode V2 is connected to the input bus ground; the base of transistor V3 is connected to the cathode of Zener diode V2, the collector is connected to the input bus voltage Vin, and the emitter is connected to the first end of capacitor C1; the second end of capacitor C1 is connected to the input bus ground.

6. The power-on inrush current suppression circuit for airborne secondary power supplies according to claim 1, characterized in that, The delayed start circuit (2) includes resistors R5, R6, R7, and R8, capacitor C2, Zener diode V1, transistor V4, and reference source N3; The first end of resistor R5 is connected to the output terminal of the power supply circuit (1), and the second end is connected to the first end of capacitor C2; the second end of capacitor C2 is connected to the input bus ground; the first end of resistor R6 is connected to the first end of capacitor C2, and the second end of resistor R6 is connected to the second end of capacitor C2; the reference terminal of reference source N3 is connected to the first end of capacitor C2; the first end of reference source N3 is connected to the second end of resistor R7; the second end of reference source N3 is connected to the input bus ground; the first end of resistor R7 is connected to the output terminal of the power supply circuit (1); the second end of resistor R7 is connected to the first end of Zener diode V1; the second end of Zener diode V1 is connected to the first end of resistor R8; the second end of resistor R8 is connected to the input bus ground; the first end of resistor R8 is connected to the base of transistor V4; the emitter of transistor V4 is connected to the input bus ground; the collector of transistor V4 is connected to the disable terminal INH of power module (3).

7. The control method for suppressing power-on inrush current in an airborne secondary power supply according to any one of claims 1 to 6, characterized in that, The method includes: The power supply circuit (1) supplies power to each delayed start circuit (2); By setting different delay times for each delay start circuit (2), the multi-power modules (3) are started in time according to the corresponding delay times, so as to suppress the power-on inrush current of the airborne secondary power supply.

8. The control method for suppressing power-on inrush current in an airborne secondary power supply according to claim 7, characterized in that, The power supply circuit (1) supplies power to each delayed start circuit (2); by setting different delay times for each delayed start circuit (2), the multiple power supply modules (3) are started in a time-sharing manner according to the corresponding delay times, so as to suppress the power-on inrush current of the airborne secondary power supply, specifically including: When the rated voltage is applied to the input terminal, the input voltage outputs VCC through the power supply circuit (1) to power each delay start circuit (2), and the voltage across capacitor C2 in the delay start circuit (2) is gradually established. When the voltage across capacitor C2 is less than the internal reference voltage of reference source N3, transistor V4 is turned on, the disable terminal INH of the power module is pulled low, and the power module (3) has no output; when the voltage across capacitor C2 is greater than the internal reference voltage of reference source N3, transistor V4 is turned off, the disable terminal INH of power module (3) is left floating, and the power module works normally. The delay time of the delay start circuit (2) can be set by adjusting the parameters of resistor R5 and capacitor C2 in the delay start circuit (2).

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