Ferroelectric memory and preparation method thereof
By controlling the oxygen vacancy concentration and introducing oxide interface intercalation, the problem of oxygen vacancy migration in HfO2-based ferroelectric memory under high electric field was solved, realizing a high-performance ferroelectric memory and improving residual polarization and reliability.
Patent Information
- Application Number
- CN202511618198.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-06
- Publication Date
- 2026-02-17
Smart Images
Figure CN121548045A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of memory technology, and in particular to a ferroelectric memory and its fabrication method. Background Technology
[0002] With the development of information technology, people's demand for information storage is constantly increasing, placing higher and higher demands on the capacity, size, power consumption, and price of memory. As a typical representative of traditional non-volatile memory, flash memory devices are facing their development bottlenecks. On the one hand, the ever-shrinking device size is leading to increasingly higher manufacturing costs; on the other hand, a series of reliability issues brought about by size reduction make it difficult for flash memory devices to continue developing along Moore's Law. Therefore, the need to find and develop new types of non-volatile memory is urgent. Among them, HfO2-based ferroelectric memory has become one of the popular candidates for new non-volatile memory in the post-Moore's Law era due to its advantages such as high speed, low power consumption, simple structure and easy integration, and good compatibility with existing CMOS processes.
[0003] However, existing HfO2-based ferroelectric memories still face challenges in application. Their ferroelectricity depends on the synergistic stability of defects and crystal phases. Inevitably, interface defects and oxygen vacancies in the device tend to accumulate and migrate under high electric fields, leading to increased leakage current, residual polarization decay, and decreased durability. Furthermore, the high defect state density at the gate dielectric / electrode interface also impacts reliability. Therefore, effectively suppressing oxygen vacancy defects, reducing leakage current, and improving durability while maintaining high ferroelectricity has become a key research direction for HfO2-based ferroelectric memories.
[0004] In view of this, the present invention is proposed. Summary of the Invention
[0005] The purpose of this invention is to provide a ferroelectric memory and its fabrication method, thereby solving the problems mentioned in the background art.
[0006] In a first aspect, the present invention provides a method for fabricating a ferroelectric memory, comprising the following steps: S1. Deposit a bottom electrode layer on the substrate using an ion beam sputtering process; S2. A ferroelectric layer is deposited using a magnetron sputtering process. During the deposition of the ferroelectric layer, the oxygen content in the deposition atmosphere is adjusted by controlling the oxygen flow rate, thereby regulating the concentration of oxygen vacancies in the ferroelectric layer. S3. Perform photolithography on the device; S4. Deposit the top electrode layer by ion beam sputtering process, remove excess photoresist and excess metal, and obtain the ferroelectric memory. The following steps are also included between S1 and S2 or between S2 and S3: Oxides are deposited as interface intercalation layers using atomic layer deposition (ALD) technology.
[0007] Preferably, step S1 includes: Provide a substrate, and clean the substrate by immersing it in acetone and anhydrous ethanol in sequence, then rinsing it with deionized water and drying it to complete the cleaning of the substrate. A bottom electrode layer was deposited on the cleaned substrate using ion beam sputtering. The ion beam sputtering process employed a TiN target, with a beam current voltage of 700–900 V, a beam current of 40–60 mA, and an accelerating voltage of 150–170 V. The gas used was an Ar / N₂ mixture, with the Ar flow rate controlled at 7–9 sccm and the N₂ flow rate at 4–6 sccm. Within this process range, good film contrast can be obtained, which is beneficial for the generation of ferroelectric properties.
[0008] Preferably, in step S2, the magnetron sputtering process uses ZrO2 and Hf elemental targets, both with a purity of over 99%. The targets are mounted on the magnetron sputtering coating equipment, and an AC power supply is used to set the sputtering power. The power for Hf is 6W~100W, and the sputtering power for ZrO2 is 30W~200W. The flow rates of Ar, O2, and N2 are controlled to be 10~50 sccm, 0~10 sccm, and 0~10 sccm, respectively. Adjusting these process parameters within this range yields better ferroelectric thin film quality, which is beneficial for the generation of ferroelectric properties.
[0009] Preferably, step S3 includes: coating photoresist, pre-baking at 150°C for 2 minutes, exposure, post-baking at 120°C for 2 minutes, immersion development for 45 seconds, rinsing with deionized water, and drying.
[0010] Preferably, step S4 includes: The top electrode layer is deposited by sputtering using an ion beam sputtering process, which employs a TiN target and an Ar / N2 mixed gas as the working gas. The obtained device was immersed in acetone solution until the photoresist and excess metal were removed, then immersed in anhydrous ethanol to remove the acetone, rinsed with deionized water, and dried. The rinsed and dried device was annealed in a nitrogen atmosphere at 500°C to obtain a ferroelectric memory.
[0011] In a second aspect, the present invention provides a ferroelectric memory, which is fabricated using the aforementioned method and comprises, from bottom to top, a substrate, a bottom electrode layer, a ferroelectric layer, and a top electrode layer; wherein an oxide is deposited between the bottom electrode layer and the ferroelectric layer or between the ferroelectric layer and the top electrode layer as an interface intercalation layer.
[0012] Preferably, the interfacial intercalation material is Al2O3, and the thickness of the interfacial intercalation is 1~5nm.
[0013] Preferably, the ferroelectric layer material is hafnium zirconium oxide, and the thickness of the ferroelectric layer is 10 nm.
[0014] Preferably, the bottom electrode layer has a thickness of 40 nm, and the top electrode layer has a thickness of 40 nm.
[0015] Preferably, the substrate material is silicon or silicon / silicon dioxide, wherein the silicon thickness is 500 μm and the silicon dioxide thickness is 300 nm.
[0016] The present invention has at least the following beneficial effects: (1) Enhanced residual polarization (ferroelectricity): In the ferroelectric layer deposition process, the present invention adjusts the partial pressure of oxygen in the deposition atmosphere by precisely controlling the oxygen flow rate; under controlled oxygen environment, the oxygen vacancy concentration in the dielectric layer is further regulated to avoid ferroelectric phase inhibition or defect introduction caused by too many or too few oxygen vacancy; through the above regulation methods, the formation and stability of ferroelectric phase (especially o phase) in the ferroelectric layer are promoted, while the formation of other phases is suppressed, which significantly improves the residual polarization performance of the ferroelectric layer, thereby enhancing the write and hold capabilities of the ferroelectric memory and improving the memory window.
[0017] (2) Improved electrical reliability: The present invention uses oxide interface intercalation in ferroelectric memory to avoid direct contact between the electrode and the ferroelectric layer, thereby suppressing chemical reactions and the formation of defect states; by utilizing the properties of oxide, the generation of oxygen-related defects during electric field cycling is suppressed; moreover, oxide can reduce the oxygen vacancy concentration near the interface, thereby achieving high electrical reliability of the device through interface engineering and defect control, improving durability and maintaining characteristics. Attached Figure Description
[0018] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0019] Figure 1 This is a schematic diagram of the internal structure of a conventional HfO2-based ferroelectric memory.
[0020] Figure 2 A technical roadmap for the ferroelectric memory provided by this invention.
[0021] Figure 3 A schematic diagram of the ferroelectric memory structure with bottom electrode interface intercalation provided by the present invention.
[0022] Figure 4 A schematic diagram of the internal structure of the ferroelectric memory with bottom electrode interface intercalation provided by the present invention.
[0023] Figure 5 A schematic diagram of the ferroelectric memory structure with top electrode interface intercalation provided by the present invention.
[0024] Figure 6 A schematic diagram of the internal structure of the ferroelectric memory with the top electrode interface intercalation layer provided by the present invention.
[0025] Figure 7 A schematic diagram of the interface-free intercalation ferroelectric memory structure provided by the present invention.
[0026] Figure 8 The figure shows the device performance test results of the interface-free intercalation ferroelectric memory provided by the present invention under different oxygen flux levels.
[0027] Explanation of reference numerals in the attached figures: 1-1, bottom electrode layer; 1-2, top electrode layer; 2, ferroelectric layer; 3, interface intercalation layer; 4, substrate; 5, TiO2 or TiO2 x N y 6. Layer; 7. Positive charge; 8. Oxygen atom; 9. Oxygen vacancy; 10. Negative charge; 11. Fixed oxide charge; 22. Ferroelectric dipole arrangement. Detailed Implementation
[0028] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.
[0029] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form includes the plural form unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.
[0030] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0031] Comparative Example This comparative example provides a conventional HfO2-based ferroelectric memory, with the internal structure as follows: Figure 1As shown, the device includes: a TiN bottom electrode layer 1-1 and a TiN top electrode layer 1-2, with TiO2 or TiO2 formed between the TiN electrode and the ferroelectric layer 2. x N y Interface layer 5. TiO2 or TiO x N y The interface layer 5 and the ferroelectric layer 2 contain various charges and defect states, including oxygen atoms 7, oxygen vacancies 8, positive charges 6, negative charges 9, and fixed oxide charges 10.
[0032] In this device, the TiN electrode, as a transition metal material, exhibits strong chemical reactivity. Under high-temperature processing or an applied electric field, it readily reacts with oxygen in the ferroelectric layer 2, introducing a large number of oxygen vacancies 8 into the ferroelectric layer 2. The formation of these oxygen vacancies 8 not only disrupts the stoichiometry of the ferroelectric layer 2 but also leads to an increase in fixed oxide charges 10 at the interface, generating a large number of positive charges 6, negative charges 9, and trapped states within the ferroelectric layer 2, forming a built-in electric field. These defects and fixed charges further induce domain wall pinning effects, making it difficult for ferroelectric domains to effectively flip, reducing the device's residual polarization, and further contributing to device reliability issues.
[0033] Therefore, conventional HfO2-based ferroelectric memories suffer from drawbacks such as thick interface layers, high oxygen vacancy concentrations, and unstable electrical performance, failing to achieve the expected high reliability and high remanent polarization.
[0034] Example 1 like Figure 2 As shown, this embodiment provides a method for fabricating a high-performance HfO2-based ferroelectric memory. This embodiment takes the bottom electrode interface intercalation as an example, that is, the interface intercalation is located between the bottom electrode layer and the ferroelectric layer. The specific steps for sample preparation are as follows: A 4-inch Si / SiO2 wafer was used as substrate 4, with a Si thickness of 500 μm and a SiO2 thickness of 300 nm. Substrate 4 was then sequentially immersed in acetone and anhydrous ethanol for 3 min, rinsed with deionized water for 3 min, and dried to complete the cleaning of substrate 4.
[0035] TiN was deposited as the bottom electrode layer 1-1 on the cleaned substrate 4 by ion beam sputtering. The TiN target was set at a beam voltage of 800 V, a beam current of 46 mA, an accelerating voltage of 160 V, and an Ar / N2 mixed gas with flow rates of 8 sccm and 5 sccm, respectively. The thickness of the TiN bottom electrode layer 1-1 was 40 nm.
[0036] Al₂O₃ of 1–5 nm was deposited on the bottom electrode layer 1-1 using atomic layer deposition (ALD) as the interface intercalation layer 3. The Al₂O₃ interface intercalation avoids direct contact between the electrode and the ferroelectric layer, suppressing chemical reactions and the formation of defect states. The properties of oxides are utilized to suppress oxygen-related defects during electric field cycling. High electrical reliability, improved durability, and maintained characteristics are achieved through interface engineering and defect control.
[0037] In this embodiment, an Al2O3 bottom interface intercalation layer is used. It has low reactivity with the hafnium zirconium oxide film interface and can provide oxygen atoms to the interface through its own reduction reaction, effectively suppressing the formation of oxygen vacancies in the film and interface, thereby suppressing the interface defect concentration and achieving high electrical reliability. Moreover, the presence of the Al2O3 bottom interface intercalation layer will regulate the film nucleation, limit grain growth, and increase the proportion of the o phase.
[0038] A hafnium zirconium oxide (HZO) thin film was deposited on the intercalation layer 3 as the ferroelectric layer 2 using magnetron sputtering. ZrO2 and Hf elemental targets were selected, both with a purity of over 99%. The targets were mounted on a magnetron sputtering deposition apparatus, and an AC power supply was used. The sputtering power was set between 6W and 100W for Hf and between 30W and 200W for ZrO2. The flow rate of Ar was controlled at 20 sccm, the flow rate of O2 at 0-10 sccm, and the flow rate of N2 at 0 sccm, resulting in a 10 nm hafnium zirconium oxide thin film. In the process of hafnium zirconium oxide thin film deposition, the oxygen content in the deposition atmosphere is adjusted by controlling the oxygen flow rate. By optimizing the oxygen flow rate, the concentration of oxygen vacancies in the ferroelectric layer is precisely controlled, avoiding the inhibition of ferroelectric phase or the introduction of defects caused by too many or too few oxygen vacancies. This increases the formation and stability of the ferroelectric phase (especially the o phase), while suppressing the formation of other phases, achieving high remanent polarization, thereby enhancing the write and retention capabilities of the ferroelectric memory.
[0039] Coat with photoresist (negative photoresist 1500), preheat at 150℃ for 2 minutes, expose, postheat at 120℃ for 2 minutes, immerse in developer for 45 seconds, rinse with deionized water, and blow dry.
[0040] TiN was deposited as the top electrode layer 1-2 by ion beam sputtering. The TiN target was set at a beam voltage of 800V, a beam current of 46 mA, an accelerating voltage of 160V, and an Ar / N2 mixed gas with flow rates of 8 sccm and 5 sccm, respectively. The thickness of the TiN top electrode layer 1-2 was 40 nm.
[0041] The obtained device was immersed in acetone solution until the photoresist and excess metal were removed; then it was immersed in anhydrous ethanol to remove the acetone; then it was rinsed with deionized water and dried.
[0042] The rinsed and dried device was annealed at 500°C for 30 seconds in a N2 atmosphere to obtain an HfO2-based ferroelectric memory.
[0043] The high-performance HfO2-based ferroelectric memory structure with bottom electrode interface intercalation obtained in this embodiment is as follows: Figure 3 As shown, the internal structure is as follows Figure 4 As shown, from bottom to top, it includes: substrate 4, TiN bottom electrode layer 1-1, Al2O3 interface intercalation layer 3, ferroelectric layer 2, and top electrode layer 1-2. Ferroelectric layer 2 contains ferroelectric dipole arrangement 11, oxygen atoms 7, oxygen vacancies 8, positive charge 6, and negative charge 9, etc.
[0044] This embodiment effectively overcomes the problems of interface instability and significant wake-up effect caused by the reaction between TiN electrode and HfO2-based thin film in traditional HfO2 ferroelectric memory structure, and realizes the fabrication of high-performance HfO2-based ferroelectric memory with high remanent polarization and high reliability, effectively improving the remanent polarization performance and electrical reliability of the device.
[0045] Example 2 This embodiment provides a method for fabricating a high-performance HfO2-based ferroelectric memory. This embodiment takes a top electrode interface intercalation layer as an example, where the interface intercalation layer is located between the ferroelectric layer and the top electrode layer. The specific steps for sample preparation are as follows: A 4-inch Si / SiO2 wafer was used as substrate 4, with a Si thickness of 500 μm and a SiO2 thickness of 300 nm. Substrate 4 was then sequentially immersed in acetone and anhydrous ethanol for 3 min, rinsed with deionized water for 3 min, and dried to complete the cleaning of substrate 4.
[0046] TiN was deposited as the bottom electrode layer 1-1 on the cleaned substrate 4 by ion beam sputtering. The TiN target was set at a beam voltage of 800 V, a beam current of 46 mA, an accelerating voltage of 160 V, and an Ar / N2 mixed gas with flow rates of 8 sccm and 5 sccm, respectively. The thickness of the TiN bottom electrode layer 1-1 was 40 nm.
[0047] A hafnium zirconium oxide (HZO) thin film was deposited on the bottom electrode layer 1-1 using magnetron sputtering as the ferroelectric layer 2. ZrO2 and Hf elemental targets were selected, both with a purity of over 99%. The targets were mounted on a magnetron sputtering equipment, and an AC power supply was used. The sputtering power was set between 6W and 100W for Hf and between 30W and 200W for ZrO2. The Ar flow rate was 20 sccm, the O2 flow rate was 0-10 sccm, and the N2 flow rate was 0 sccm, resulting in a 10 nm hafnium zirconium oxide thin film deposition. During the hafnium zirconium oxide thin film deposition process, the oxygen content in the deposition atmosphere was adjusted by controlling the oxygen flow rate. By optimizing the oxygen flow rate, the concentration of oxygen vacancies in the ferroelectric layer was precisely controlled, increasing the formation and stability of the ferroelectric phase (especially the o phase) and achieving high remanent polarization.
[0048] Al₂O₃ layers of 1–5 nm were deposited on hafnium zirconium oxide films using atomic layer deposition (ALD) as interfacial intercalation layers. The Al₂O₃ interfacial intercalation avoids direct contact between the electrode and the ferroelectric layer, suppressing chemical reactions and the formation of defect states. The properties of oxides are utilized to suppress oxygen-related defects during electric field cycling. High electrical reliability, improved durability, and maintained performance are achieved through interface engineering and defect control.
[0049] In this embodiment, an Al2O3 top interface intercalation layer is used. This layer has low reactivity with the hafnium zirconium oxide thin film interface and can provide oxygen atoms to the interface through its own reduction reaction, effectively suppressing the formation of oxygen vacancies in the film and interface, thereby suppressing the interface defect concentration and achieving high electrical reliability. Furthermore, the Al2O3 top interface intercalation layer can act as an insulating layer to reduce device leakage current and improve device reliability. During the annealing process, the Al2O3 top interface intercalation layer can provide mechanical stress, promoting the formation of the o-phase, increasing the proportion of the o-phase, and optimizing the ferroelectric properties of the device.
[0050] Coat with photoresist (negative photoresist 1500), preheat at 150℃ for 2 minutes, expose, postheat at 120℃ for 2 minutes, immerse in developer for 45 seconds, rinse with deionized water, and blow dry.
[0051] TiN was deposited as the top electrode layer 1-2 by ion beam sputtering. The TiN target was set at a beam voltage of 800V, a beam current of 46 mA, an accelerating voltage of 160V, and an Ar / N2 mixed gas with flow rates of 8 sccm and 5 sccm, respectively. The thickness of the TiN top electrode layer 1-2 was 40 nm.
[0052] The obtained device was immersed in acetone solution until the photoresist and excess metal were removed; then it was immersed in anhydrous ethanol to remove the acetone; then it was rinsed with deionized water and dried.
[0053] The rinsed and dried device was annealed at 500°C for 30 seconds in a N2 atmosphere to obtain an HfO2-based ferroelectric memory.
[0054] The high-performance HfO2-based ferroelectric memory structure with top electrode interface intercalation obtained in this embodiment is as follows: Figure 5 As shown, the internal structure is as follows Figure 6 As shown, from bottom to top, it includes: substrate 4, TiN bottom electrode layer 1-1, ferroelectric layer 2, Al2O3 interface intercalation layer 3, and top electrode layer 1-2. Ferroelectric layer 2 contains ferroelectric dipole arrangement 11, oxygen atoms 7, oxygen vacancies 8, positive charge 6, and negative charge 9, etc.
[0055] This embodiment effectively overcomes the problems of interface instability and significant wake-up effect caused by the reaction between TiN electrode and HfO2-based thin film in traditional HfO2 ferroelectric memory structure, realizing a high-performance HfO2-based ferroelectric memory with high remanent polarization and high reliability, effectively improving the remanent polarization performance and electrical reliability of the device.
[0056] Example 3 This embodiment provides an HfO2-based ferroelectric memory, such as Figure 7 As shown, from bottom to top, it includes: substrate 4, bottom electrode layer 1-1, ferroelectric layer 2, and top electrode layer 1-2. The specific fabrication steps are as follows: A 4-inch Si / SiO2 wafer was used as substrate 4, with a Si thickness of 500 μm and a SiO2 thickness of 300 nm. Substrate 4 was then sequentially immersed in acetone and anhydrous ethanol for 3 min, rinsed with deionized water for 3 min, and dried to complete the cleaning of substrate 4.
[0057] TiN was deposited as the bottom electrode layer 1-1 on the cleaned substrate 4 by ion beam sputtering. The TiN target was set at a beam voltage of 800 V, a beam current of 46 mA, an accelerating voltage of 160 V, and an Ar / N2 mixed gas with flow rates of 8 sccm and 5 sccm, respectively. The thickness of the TiN bottom electrode layer 1-1 was 40 nm.
[0058] A hafnium zirconium oxide (HZO) thin film was deposited on the TiN bottom electrode layer 1-1 as the ferroelectric layer 2 using magnetron sputtering. ZrO2 and Hf elemental targets were selected, both with a purity of over 99%. The targets were mounted on a magnetron sputtering equipment, and an AC power supply was used. The sputtering power was set between 6W and 100W for Hf and between 30W and 200W for ZrO2. The flow rate of Ar was 20 sccm, the flow rates of O2 were 0, 0.2, 0.4, and 0.6 sccm, and the flow rate of N2 was 0 sccm. A 10 nm hafnium zirconium oxide thin film was deposited.
[0059] Coat with photoresist (negative photoresist 1500), preheat at 150℃ for 2 minutes, expose, postheat at 120℃ for 2 minutes, immerse in developer for 45 seconds, rinse with deionized water, and blow dry.
[0060] TiN was deposited as the top electrode layer 1-2 by ion beam sputtering. The TiN target was set at a beam voltage of 800V, a beam current of 46 mA, an accelerating voltage of 160V, and an Ar / N2 mixed gas with flow rates of 8 sccm and 5 sccm, respectively. The thickness of the TiN top electrode layer 1-2 was 40 nm.
[0061] The obtained device was immersed in acetone solution until the photoresist and excess metal were removed; then it was immersed in anhydrous ethanol to remove the acetone; then it was rinsed with deionized water and dried.
[0062] The rinsed and dried device was annealed at 500°C for 30 seconds in a N2 atmosphere to obtain an HfO2-based ferroelectric memory.
[0063] The performance of ferroelectric devices obtained under different oxygen flux levels was tested and found to be as follows: Figure 8 As shown, from 0.6 to 0 sccm, the oxygen flux decreased, the oxygen vacancy concentration inside the ferroelectric thin film increased, the residual polarization intensity of the ferroelectric film gradually increased, and the performance of the device was optimized.
[0064] In summary, this invention optimizes the polarization performance of ferroelectric thin films by controlling the oxygen flux to regulate the oxygen vacancy concentration inside the films. Furthermore, oxide interface intercalation is used to reduce the oxygen vacancy concentration near the interface, thereby optimizing the reliability of the device. This invention enables the fabrication of high-performance ferroelectric memory with high residual polarization and high reliability.
[0065] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.
[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method of fabricating a ferroelectric memory, comprising: The method comprises the following steps: S1, depositing a bottom electrode layer on a substrate by an ion beam sputtering process; S2, depositing a ferroelectric layer by a magnetron sputtering process; during the deposition of the ferroelectric layer, the oxygen content in the deposition atmosphere is adjusted by controlling the oxygen flow, so as to control the concentration of oxygen vacancies in the ferroelectric layer; S3, performing photolithography on the device; S4, depositing a top electrode layer by an ion beam sputtering process, removing the excess photoresist and excess metal, and obtaining a ferroelectric memory; Between S1 and S2 or between S2 and S3, the following step is further included: Depositing an oxide as an interface interlayer by an atomic layer deposition process.
2. The method of claim 1, wherein the ferroelectric memory is prepared by a method comprising: Step S1 comprises: Providing a substrate, and sequentially immersing and cleaning the substrate in acetone, anhydrous ethanol, and deionized water, and then blowing dry to complete the cleaning of the substrate; Sputtering and depositing a bottom electrode layer on the cleaned substrate by an ion beam sputtering process, wherein the ion beam sputtering process uses a TiN target, the beam voltage is 700-900 V, the beam current is 40-60 mA, the acceleration voltage is 150-170 V, and the gas is Ar / N2 mixed gas, and the flow rate of the input Ar is controlled to be 7-9 sccm, and the flow rate of the N2 is controlled to be 4-6 sccm.
3. The method of claim 1, wherein the ferroelectric memory is prepared by a method comprising: In step S2, the magnetron sputtering process uses a ZrO2 target and a Hf single-element target, and the purity of the two target materials is more than 99%; the target materials are installed on a magnetron sputtering coating equipment, an alternating current power supply is used, and the sputtering power is set, wherein the power of the Hf single-element is 6-100 W, and the sputtering power of the ZrO2 is 30-200 W; the flow rate of the input Ar is controlled to be 10-50 sccm, the flow rate of the O2 is controlled to be 0-10 sccm, and the flow rate of the N2 is controlled to be 0-10 sccm.
4. The method of claim 1, wherein the ferroelectric memory is prepared by a method comprising: Step S3 comprises: coating a photoresist, pre-baking at 150°C for 2 min, post-baking at 120°C for 2 min after exposure, immersing and developing for 45 s, rinsing with deionized water, and blowing dry.
5. The method of claim 1, wherein the ferroelectric memory is prepared by a method comprising: Step S4 comprises: Sputtering and depositing a top electrode layer by an ion beam sputtering process, wherein the ion beam sputtering process uses a TiN target, and Ar / N2 mixed gas is used as the working gas; immersing the obtained device in an acetone solution until the photoresist and excess metal fall off, immersing in anhydrous ethanol to remove the acetone, rinsing with deionized water, and blowing dry; annealing the rinsed and blown dry device under the condition of N2 atmosphere and 500°C to obtain a ferroelectric memory.
6. A ferroelectric memory, comprising: The ferroelectric memory is prepared by the method of any one of claims 1-5, and comprises, from bottom to top, a substrate, a bottom electrode layer, a ferroelectric layer, and a top electrode layer; an oxide is deposited as an interface interlayer between the bottom electrode layer and the ferroelectric layer or between the ferroelectric layer and the top electrode layer.
7. The ferroelectric memory of claim 6, wherein, The interface interlayer material is Al2O3, and the thickness of the interface interlayer is 1-5 nm.
8. The ferroelectric memory of claim 6, wherein, The ferroelectric layer material is hafnium-zirconium-oxygen, and the thickness of the ferroelectric layer is 10 nm.
9. The ferroelectric memory of claim 6, wherein, The thickness of the bottom electrode layer is 40 nm, and the thickness of the top electrode layer is 40 nm.
10. The ferroelectric memory of claim 6, wherein, The substrate material uses silicon or silicon / silicon dioxide, the thickness of the silicon is 500 μm, and the thickness of the silicon dioxide is 300 nm.