Synchronization method based on dynamic sparse attention mechanism, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a synchronization method based on a dynamic sparse attention mechanism, electronic equipment and a storage medium, and relates to the technical field of wireless communication, and the method comprises the following steps: setting a plurality of parallel frequency domain channels to carry out frequency compensation on an input signal, the number of the plurality of parallel frequency domain channels is the same as the number of frequencies used by the synchronization section; carrying out sliding correlation operation on the signals of each channel after frequency compensation, and then carrying out double-threshold peak detection and time consistency detection; extracting the following characteristics from the detected threshold peak values: related peak amplitude, peak-to-average ratio, frequency consistency, kurtosis coefficient and peak value number; and on the basis of the extracted features, a feature importance probability is calculated by adopting an attention network based on dynamic sparseness, and the arrival time for synchronization processing is determined according to the feature importance probability. The method can effectively resist interferences such as synchronous forwarding and frequency hopping following, and improves the anti-interference capability of a communication or data link system.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and more specifically, to a synchronization method, electronic device, and storage medium based on a dynamic sparse attention mechanism. Background Technology

[0002] By rapidly switching carrier frequencies between communication pulses, pulse frequency hopping communication systems make it difficult for the enemy to lock onto and interfere with specific frequencies, thus effectively evading enemy detection and interference. The combination of pulse frequency hopping and ultra-short burst pulses greatly enhances the anti-interception and anti-jamming capabilities of wireless communication systems. Pulse frequency hopping possesses extremely strong anti-jamming and low interception capabilities, and is also the most complex implementation of ultra-high-speed frequency hopping communication systems. Frequency-hopping communication relies on precise frequency synthesizers and synchronization mechanisms to ensure stable connections between communicating parties using the same frequency-hopping sequence. Synchronization technology plays a crucial role in wireless communication systems, encompassing three dimensions: time synchronization, frequency synchronization, and phase synchronization. Time synchronization ensures that both parties can frame, transmit, receive, sample, demodulate, and deframe signals on the same time reference, avoiding signal collisions or loss due to time deviations. Frequency synchronization guarantees that both transmitters and receivers use the same carrier frequency, preventing signal interference or distortion caused by frequency offsets. Phase synchronization maintains signal coherence, ensuring the accuracy of modulation and demodulation processes. In wireless communication systems, synchronization accuracy directly determines the system's anti-interference capability and communication quality. To achieve efficient frequency-hopping communication, both parties must maintain strict frequency and time synchronization.

[0003] Ultra-short bursts and pulse frequency hopping pose significant challenges to the reliability of frequency-hopping communication. Because the duration of each hopping pulse is extremely short, typically on the order of microseconds, it is difficult for frequency-domain analysis-based time and frequency synchronization methods to achieve high accuracy. Therefore, for wireless communication systems using ultra-short bursts and pulse frequency hopping, the communication system typically employs a multi-layered synchronization mechanism, including different stages such as coarse synchronization, fine synchronization, and synchronization tracking. Correspondingly, dedicated synchronization segments are set up, i.e., transmitting dedicated synchronization pulse trains that meet predetermined rules to assist communication terminals using this type of system in establishing time and frequency synchronization.

[0004] In tactical communications, rapid synchronization is crucial, especially in frequency-hopping communications, where synchronization acquisition time directly impacts the system's anti-interception and anti-jamming capabilities. However, rapid synchronization typically requires a higher signal-to-noise ratio or a more complex synchronization header design, which conflicts with the requirement of low probability of interception. By tracking the target's transmitted pulse parameters (e.g., frequency, amplitude, direction, position), or even tracking the pulse samples transmitted by the target, tracking pulse jamming can dynamically adjust the jamming pulse to precisely interfere with the target. The most common implementations of tracking jamming are frequency tracking and pulse repeater jamming, characterized by a high degree of similarity between the jamming signal and the target's communication signal in the frequency domain and pulse structure, making it a highly targeted and efficient narrowband jamming technique. Combined with simultaneous multi-channel jamming, tracking pulse jamming can achieve highly targeted jamming on most frequency points of the target's communication system, creating an effect similar to strong multipath interference. In complex electromagnetic environments, factors such as interference, obstruction, and multipath effects can continuously disrupt established synchronization. In ultra-short burst communication systems, due to the extremely short duration of the signal (usually in the millisecond or even microsecond range), the synchronization window is very narrow. Frequency tracking and pulse relay interference make it difficult for the receiver to correctly identify the synchronization header or cause synchronization acquisition and locking failures.

[0005] In pulse frequency hopping communication systems, the impact mechanism of pulse-based relay-smart jamming is more complex. Synchronization in a frequency hopping system involves two key aspects: frequency hopping pattern synchronization and time slot synchronization. By intercepting and analyzing the frequency hopping signal, a jammer can reconstruct some or all of the characteristics of the frequency hopping sequence, and then use relay-smart jamming to precisely target the synchronization channel or key frequency hopping points. A typical jamming method is to transmit strong jamming signals at the time slots and frequencies where the synchronization header appears, preventing the receiver from correctly acquiring the synchronization information. Another more covert jamming method is "frequency hopping follower jamming," where the jamming device tracks the changes in the frequency hopping sequence in real time and transmits appropriately delayed jamming pulses at each frequency hopping point. This jamming highly overlaps with the real signal in the time and frequency domain, making it difficult for the receiver to filter out using conventional methods. The impact of pulse-based relay-smart jamming on the synchronization of frequency hopping systems is mainly reflected in three aspects: First, it prolongs the synchronization acquisition time. In a jamming environment, the system may need to attempt to establish initial synchronization multiple times, which directly reduces the timeliness of communication; second, it increases the probability of synchronization loss. The established synchronization state may be interrupted due to jamming, leading to fluctuations in communication quality. Summary of the Invention

[0006] The embodiments of this application provide a synchronization method, electronic device, and storage medium based on a dynamic sparse attention mechanism to solve the technical problems existing in the prior art.

[0007] Other features and advantages of this application will become apparent from the following detailed description, or may be learned in part from practice of this application.

[0008] According to a first aspect of the embodiments of this application, a synchronization method based on a dynamic sparse attention mechanism is provided, comprising: Multiple parallel frequency domain channels are set up to perform frequency compensation on the input signal. The number of parallel frequency domain channels is the same as the number of frequencies used in the synchronization segment. After frequency compensation, the signals of each channel are first subjected to sliding correlation calculation, and then dual-threshold peak detection and time consistency verification are performed. The following features are extracted from the detected threshold peak values: relevant peak amplitude, peak-to-average ratio, frequency consistency, kurtosis coefficient, and number of peak values; Based on the extracted features, a dynamic sparse attention network is used to calculate the feature importance probability, and the arrival time for synchronization processing is determined according to the feature importance probability.

[0009] In some embodiments of this application, frequency compensation is performed based on the foregoing scheme using the following formula: ; in, Indicates the compensated frequency. Indicates the frequency before compensation. Indicates the number of parallel frequency domain channels. It is the first The nominal frequency of each channel, It is the sampling rate.

[0010] In some embodiments of this application, based on the foregoing scheme, the step of performing a sliding correlation operation on the signals of each channel after frequency compensation includes: After the frequency-compensated signal is taken out, the sign bit is sent to multiple independent sliding correlators for sign correlation calculation. Among them, multiple independent sliding correlators correspond to the number of synchronization pulses and the pseudocode length contained in the synchronization segment, dividing the pseudocode into multiple sub-segments for parallel synchronization pulse capture; the multiple independent sliding correlators adopt a segmented parallel structure, and the local reference signals of the parallel sliding correlators are the pseudocodes of each sub-segment.

[0011] In some embodiments of this application, dual-threshold peak detection is performed based on the aforementioned scheme, including: Level 1 threshold detection: Set a fixed threshold ,in, Let be the standard deviation of the noise, where It is a preset constant; Candidate peak conditions: ; Level 2 threshold detection: Dynamic threshold Take history The relevant peak value of the quantile is used as the threshold. This is a preset constant; Confirm peak conditions: .

[0012] In some embodiments of this application, based on the aforementioned scheme, a time consistency check is performed, including: The effective peak values ​​obtained after dual-threshold detection are then subjected to the following verification: The effective peak value satisfies: ,in, For the first The peak position of each detection cycle, i.e., the arrival time of the pulse, where, It is a preset constant; The maximum peak channel in the frequency domain satisfies: ,in, This indicates that the absolute value is being calculated.

[0013] In some embodiments of this application, based on the foregoing scheme, the step of calculating the feature importance probability using a dynamically sparse attention network based on the extracted features, and determining the arrival time for synchronization processing based on the feature importance probability, includes: Nonlinear transformation and dynamic standardization of features are performed. The processed features are input into a dynamic sparse attention network to calculate the feature importance probabilities of four categories: pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise. When the probability of the signal plus noise having the highest characteristic importance is greater than the set threshold, the arrival of the synchronization pulse is finally indicated, and its arrival time is output.

[0014] In some embodiments of this application, based on the foregoing scheme, nonlinear transformation processing is performed on the features, including: The following formula is used to construct higher-order interactions for features: ; in, Indicates features, It is the relevant peak amplitude. It is the peak-to-average power ratio. It's about frequency consistency. It is the kurtosis factor. It is the peak number. It is a non-zero positive infinitesimal, instantiated as The expanded feature dimension is 9.

[0015] In some embodiments of this application, based on the aforementioned scheme, feature dynamic standardization processing is performed, including: Dynamic feature standardization is performed using adaptive instance normalization: ; in, The parameters learned by the network enable adaptive scaling for different signal-to-noise ratio conditions; yes standard deviation yes The mean.

[0016] According to a second aspect of the embodiments of this application, a computer-readable storage medium is provided, the storage medium storing computer instructions that, when executed on a computer, cause the computer to perform the method as described in the first aspect.

[0017] According to a third aspect of the embodiments of this application, an electronic device is provided, characterized in that it includes: a memory and a processor; The memory is used to store computer instructions; The processor is configured to invoke computer instructions stored in the memory, causing the electronic device to execute the method described in the first aspect.

[0018] The technical solution of this application significantly optimizes the detection capability and efficiency of synchronization pulses by employing multi-channel parallel frequency domain compensation, parallel sliding symbol correlation, and adaptive dual-threshold detection. Furthermore, it identifies the probability of the detection result conforming to four types of features: "pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise" through time consistency verification, multi-feature extraction, and judgment based on dynamic sparse attention network. This effectively indicates the arrival of the synchronization pulse and outputs its arrival time, which is used to guide communication or data link terminals to perform fine synchronization processing, avoid interference and misjudgment, effectively resist interference such as synchronization forwarding and frequency hopping following, and significantly improve synchronization performance in interference environments.

[0019] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. In the drawings: Figure 1A flowchart illustrating the steps of a synchronization method based on a dynamic sparse attention mechanism according to an embodiment of this application is shown. Figure 2 A schematic diagram of the JTIDS Link16 STDP time slot structure according to an embodiment of this application is shown; Figure 3 A schematic diagram of the processing flow of a synchronization method based on a dynamic sparse attention mechanism according to an embodiment of this application is shown. Figure 4 A partial structural diagram of a dynamically sparse attention network according to an embodiment of this application is shown; Figure 5 A block diagram of an electronic device according to one embodiment of this application is shown; Figure 6 A schematic diagram of the structure of a computer system suitable for implementing the electronic device of the present application is shown. Detailed Implementation

[0021] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0022] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0023] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0024] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily need to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0025] It should be noted that "multiple" as mentioned in this article refers to two or more.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such uses of these terms can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described.

[0027] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0028] The following detailed description of some embodiments of this application will be provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0029] See Figure 1 The diagram illustrates a step flow of a synchronization method based on a dynamic sparse attention mechanism according to an embodiment of this application.

[0030] like Figure 1 As shown, a synchronization method based on a dynamic sparse attention mechanism is demonstrated, specifically including steps S100 to S400.

[0031] refer to Figure 1 Step S100: Set up multiple parallel frequency domain channels to perform frequency compensation on the input signal, wherein the number of multiple parallel frequency domain channels is the same as the number of frequencies used in the synchronization segment.

[0032] In some feasible embodiments, frequency compensation is performed using the following formula based on the aforementioned scheme: ; in, Indicates the compensated frequency. Indicates the frequency before compensation. Indicates the number of parallel frequency domain channels. It is the first The nominal frequency of each channel, It is the sampling rate.

[0033] Continue to refer to Figure 1In step S200, the signals of each channel after frequency compensation are first subjected to sliding correlation calculation, and then dual-threshold peak detection and time consistency check are performed.

[0034] In some feasible embodiments, based on the aforementioned scheme, the step of performing a sliding correlation operation on the signals of each channel after frequency compensation includes: After the frequency-compensated signal is taken out, the sign bit is sent to multiple independent sliding correlators for sign correlation calculation. Among them, multiple independent sliding correlators correspond to the number of synchronization pulses and the pseudocode length contained in the synchronization segment, dividing the pseudocode into multiple sub-segments for parallel synchronization pulse capture; the multiple independent sliding correlators adopt a segmented parallel structure, and the local reference signals of the parallel sliding correlators are the pseudocodes of each sub-segment.

[0035] It should be noted that, in this embodiment, in order to reduce processing complexity and improve anti-interference capability, the sign bit of the signal output by each frequency compensation channel is first taken, and then sent to multiple independent sliding correlators.

[0036] It should be noted that in this embodiment, the sliding correlation operation adopts a sign-bit simplification algorithm, which only retains the sign bit of the input signal for multiplication and accumulation, greatly reducing the computational complexity.

[0037] For example, the spreading code segmentation process includes: The number of synchronization pulses contained in the synchronization segment Similarly, the spreading code is divided into Segments, each segment of the spreading code is [length missing]. : ; Each sub-segment Equipped with independent related computing units ( ,common (Units).

[0038] Each segment is accessed independently A sliding correlator, output ,in, These represent the synchronization segment number, frequency domain channel number, and sampling number, respectively.

[0039] The sliding window control process includes: Input signal The phase is continuously slidable by a shift register, moving 1 sampling point per sampling clock cycle.

[0040] The symbolic operation process includes: Only retain the signal With the sign bit (1 for positive, -1 for negative), multiplication simplifies to an XOR operation: ; Related calculations are simplified: .

[0041] In some feasible embodiments, based on the aforementioned scheme, dual-threshold peak detection is performed, including: Level 1 threshold detection: Set a fixed threshold ,in, Let be the standard deviation of the noise, where It is a preset constant; Candidate peak conditions: ; Level 2 threshold detection: Dynamic threshold Take history The relevant peak value of the quantile is used as the threshold. This is a preset constant; Confirm peak conditions: .

[0042] It is understood that in this embodiment, the first-level threshold is set with reference to the noise floor and is used to initially screen candidate peaks; the second-level threshold adopts a dynamic adjustment mechanism with reference to the statistical characteristics of the historical correlator output.

[0043] In some feasible embodiments, based on the aforementioned scheme, a time consistency check is performed, including: The effective peak values ​​obtained after dual-threshold detection are then subjected to the following verification: The effective peak value satisfies: ,in, For the first The peak position of each detection cycle, i.e., the arrival time of the pulse, where, It is a preset constant; The maximum peak channel in the frequency domain satisfies: ,in, This indicates that the absolute value is being calculated.

[0044] It should be noted that, in this embodiment, in order to further combat the time delay characteristics of frequency tracking and repeater interference, a time consistency check step is added, which requires that the effective peak value of the correlator must meet the consistency principle of peak position deviation.

[0045] Continue to refer to Figure 1 In step S300, the following features are extracted from the detected threshold peak values: relevant peak amplitude, peak-to-average ratio, frequency consistency, kurtosis coefficient, and number of peak values.

[0046] For example, the feature extraction process is as follows: 1. Extract the relevant peak amplitude using the following formula: .

[0047] 2. Extract the peak-to-average ratio (PARR) using the following formula: .

[0048] 3. Extract frequency consistency using the following formula: ; in, It is the first Estimated frequency values ​​for each channel: ; In the above formula, This indicates the angle to be calculated for a complex number.

[0049] 4. Extract the kurtosis coefficient using the following formula: For the relevant output sequence ,definition: ; The kurtosis coefficient is the normalized fourth moment: .

[0050] 5. Extract the number of peak values ​​using the following formula: ; in, It is a preset constant. This represents an indicator function that takes the value 1 when the condition is met, and 0 otherwise.

[0051] Continue to refer to Figure 1 In step S400, based on the extracted features, a dynamic sparse attention network is used to calculate the feature importance probability, and the arrival time for synchronization processing is determined according to the feature importance probability.

[0052] In some feasible embodiments, based on the foregoing scheme, the step of calculating the feature importance probability using a dynamically sparse attention network based on the extracted features, and determining the arrival time for synchronization processing based on the feature importance probability, includes: Nonlinear transformation and dynamic standardization of features are performed. The processed features are input into a dynamic sparse attention network to calculate the feature importance probabilities of four categories: pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise. When the probability of the signal plus noise having the highest characteristic importance is greater than the set threshold, the arrival of the synchronization pulse is finally indicated, and its arrival time is output.

[0053] In some feasible embodiments, based on the aforementioned scheme, the features are subjected to nonlinear transformation processing, including: The following formula is used to construct higher-order interactions for features: ; in, Indicates features, It is the relevant peak amplitude. It is the peak-to-average power ratio. It's about frequency consistency. It is the kurtosis factor. It is the peak number. It is a non-zero positive infinitesimal, instantiated as The expanded feature dimension is 9.

[0054] In some feasible embodiments, based on the aforementioned scheme, feature dynamic standardization processing is performed, including: Dynamic feature standardization is performed using adaptive instance normalization: ; in, The parameters learned by the network enable adaptive scaling for different signal-to-noise ratio conditions; yes standard deviation yes The mean.

[0055] It should be noted that, in this embodiment, the attention network based on dynamic sparsity consists of a feature enhancement layer, a sparse attention layer, and a decision output layer.

[0056] Among them, the feature enhancement layer: It consists of 9 input channels, which are converted into 128 output channels through three convolutional layers of 9×32, 32×64 and 64×128. The size of the convolutional kernel is 3×3. After each convolution, it is activated by SiLU and normalized before being output to the next layer.

[0057] SiLU activation: ; Layer normalization: , Calculated along the feature dimension, These are the learning parameters of the network. Among them, and These represent the input and output of the current layer, respectively. This indicates element-wise multiplication.

[0058] Sparse attention layer: Attention weights are generated using a 128×128 linear fully connected layer. , This refers to the SIGMOD function.

[0059] Feature weighting: ; GeLU activation: ,in, It is the CDF function of the standard normal distribution.

[0060] Decision output layer: This refers to the probability of the importance of four categories: pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise. When the probability of "signal plus noise" is the highest and greater than the threshold, the arrival of the synchronization pulse is finally indicated, and its arrival time is output. This is used to guide the communication or data link terminal to perform fine synchronization processing and avoid interference and misjudgment.

[0061] In addition, the training process for the attention network is as follows: Main loss function: ; in, It is a sample For real labels The predicted probability, For preset focus parameters, the typical value is... .

[0062] Sparse regularization terms (L1 constraints): ; The output of the dynamic attention layer Dimensional weights, The hyperparameter controlling sparsity intensity is typically set to... .

[0063] Overall objective function: ; Training method: The parameters of the network are obtained by backpropagation using the AdamW optimizer.

[0064] Below is a specific example of this method.

[0065] Taking the JTIDS Link16 series data link as an example, the JTIDS Link16 series data link is a typical ultra-short burst and pulse frequency hopping wireless communication system. Its basic unit of transmitted signal is the pulse, with each pulse lasting 6.4 µs and a pulse repetition period of 13 µs, forming a signal like... Figure 2The time slot structure shown: The Link16 data link time slot structure consists of the following six parts: 1) Jitter: Commonly known as time skipping, it is the preparatory work before each time slot transmits data, used to improve the system's anti-interference and confidentiality.

[0066] 2) Coarse synchronization: Contains 16 double-pulse symbols, totaling 32 pulses, used by the Link16 terminal to capture synchronization pulse signals, establish time slots and pulse synchronization, and confirm frequency hopping patterns.

[0067] 3) Fine synchronization: Contains 4 double pulse symbols, used to establish sampling synchronization in the Link16 terminal.

[0068] 4) Header: Contains 16 pulse symbols, mainly used to mark important information of the transmitted data, including time slot type, encryption device and source track number, etc., which plays a guiding and identification role in data transmission.

[0069] 5) Data: Used for payload transmission. The number of pulse symbols contained in the data portion varies depending on the data encapsulation structure. The data types transmitted in time slots can be mainly divided into four categories: fixed format (J sequence), variable format (VMF), free text, and round-trip time (RTT).

[0070] 6) Transmission Protection: Corresponding to segment T3 of the time slot structure. Given the differences in signal propagation characteristics and interference conditions at different operating distances, the protection time for information transmission will also vary slightly. This ensures the accuracy and stability of data transmission.

[0071] To establish and maintain network synchronization in the Link 16 data link system, a hierarchical synchronization architecture is established. The coarse synchronization segment is a crucial component and is susceptible to frequency tracking and pulse relay interference. Taking the Link 16 coarse synchronization segment as an example, the specific steps for implementing this patent and its benefits are explained below: Taking Link16 as an example, the coarse synchronization segment of Link16 contains 32 pulses. The 32 coarse synchronization pulses use pulse frequency hopping and 8 carrier frequencies. The carrier frequencies of the 4 coarse synchronization pulses are the same. This invention is used to improve the anti-interference performance of its coarse synchronization segment, especially the anti-frequency tracking and pulse forwarding interference.

[0072] Specifically as follows: See Figure 3The 1024-bit spreading code is divided into 32 segments of 32 chips each. Frequency domain processing employs 8-channel parallel frequency compensation. Before sliding correlation, 8 parallel digital down-conversion channels are set up. The signal output from each frequency channel, after removing the sign bit, is fed into 4 independent sliding correlators. Time domain processing uses a parallel acquisition architecture based on sliding correlation. The sliding correlators adopt a segmented parallel structure, dividing the 1024-bit spreading code into 32 segments of 32 chips each, corresponding to 32 sliding correlators. The local reference signals for the 32 sliding correlators are pseudocodes for the 32 segments, corresponding to the transmit frequency usage rules of the Link 16 coarse synchronization band. Each frequency compensation channel is configured with 4 sliding correlators, each equipped with an independent correlation operation unit. A phase-continuous sliding window is implemented through a shift register. The correlation operation uses a sign-bit simplification algorithm, retaining only the sign bit of the input signal for multiplication and accumulation, significantly reducing computational complexity. The relevant results are sent to the peak detection module, which employs a dual-threshold detection strategy: the first threshold is set to three times the standard deviation of the noise floor for initial screening of candidate peaks; the second threshold uses a dynamic adjustment mechanism, taking the 95th percentile value as the confirmation threshold based on the statistical characteristics of the first 100 relevant outputs. To combat the time delay characteristics of repeater-type interference, a time consistency check module is added, requiring that the effective peak must maintain a position fluctuation of no more than two sampling points within three consecutive detection cycles. Five features—relevance peak amplitude, peak-to-average power ratio, frequency consistency, kurtosis coefficient, and number of peaks—are extracted from the outputs of the 32 sliding correlators in the 8 frequency compensation channels and the peaks exceeding the threshold. A dynamic sparse attention network is then used for multi-feature joint decision-making to further determine the relevant peaks exceeding the threshold, ultimately indicating the arrival of the coarse synchronization pulse and outputting its arrival time. This guides the Link16 receiver in processing the fine synchronization pulse, avoiding interference.

[0073] Step 1: Frequency Domain Parallel Time Domain Piecewise Sliding Sign Correlation 1. Multi-channel parallel frequency compensation: Number of frequencies used with coarse synchronization band Corresponding settings One parallel frequency domain channel It is the first The nominal frequency of each channel, It is the sampling rate.

[0074] .

[0075] 2. Spread code segmentation: The spreading code \( c \) of 1024 chips is divided into 32 sub-segments, each with 32 chips: ; Each sub-segment Equipped with independent related computing units ( (A total of 32 units).

[0076] 32 independently connected sliding correlators, outputting 32 segments. ,in, These represent the segment number, frequency domain channel number, and sampling number of the coarse synchronization, respectively.

[0077] 3. Sliding window control: Input signal The phase is continuously slidable by a shift register, moving 1 sampling point per sampling clock cycle.

[0078] 4. Symbol-related operations: Only retain the signal With the sign bit (1 for positive, -1 for negative), multiplication simplifies to an XOR operation: ; Related calculations are simplified: .

[0079] 5. Dual-threshold peak detection Level 1 threshold (coarse detection): Set a fixed threshold ,in, Let be the standard deviation of the noise, where It is a preset constant.

[0080] Candidate peak conditions: .

[0081] Second-level threshold (precision detection): Dynamic threshold Take history The relevant peak value of the quantile is used as the threshold. This is a preset constant.

[0082] Confirm peak conditions: .

[0083] Time consistency check: The effective peak value must meet the following requirements: ; in, For the first The peak position of each detection cycle.

[0084] Frequency domain maximum peak channel detection: ,in, This indicates that the absolute value is being calculated.

[0085] Step 2: Feature Extraction 1. Relevant peak amplitude: ; 2. Peak-to-average power ratio (PARR): ; 3. Frequency consistency: ; in, It is the first Estimated frequency values ​​for each channel: ; In the above formula, This indicates the angle to be calculated for a complex number.

[0086] 4. Kurtosis coefficient: For the relevant output sequence ,definition: ; The kurtosis coefficient is the normalized fourth moment: .

[0087] 5. Peak quantity: ; in, This represents an indicator function that takes the value 1 when the condition is met, and 0 otherwise.

[0088] Step 3: Joint Decision Based on Multiple Features 1. Characteristic Nonlinear Transformation For original features Constructing higher-order interactions: ; in, It is a non-zero positive infinitesimal, instantiated as The expanded feature dimension is 9.

[0089] 2. Feature dynamic standardization Dynamic feature standardization is performed using Adaptive Instance Normalization (AdaIN): ; in, The parameters learned by the network enable adaptive scaling for different signal-to-noise ratio conditions.

[0090] 3. Weight Calculation Based on Dynamic Sparse Attention Networks like Figure 4 As shown, the network consists of a feature enhancement layer, a sparse attention layer, and a decision output layer, wherein: Feature enhancement layer: It consists of 9 input channels, which are converted into 128 output channels through three depth convolutional layers of 9×32, 32×64 and 64×128. The size of the convolutional kernel is 3×3. After each convolution, it is activated by SiLU and normalized before being output to the next layer.

[0091] SiLU activation: ; Layer normalization: , Calculated along the feature dimension, These are the learning parameters of the network. Among them, and These represent the input and output of the current layer, respectively. This indicates element-wise multiplication.

[0092] Sparse attention layer: Attention weights are generated using a 128×128 linear fully connected layer. , This refers to the SIGMOD function.

[0093] Feature weighting: ; GeLU activation: ,in, It is the CDF function of the standard normal distribution.

[0094] Decision output layer: This refers to the probability of the importance of four categories: pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise. When the probability of "signal plus noise" is the highest and greater than the threshold, the arrival of the synchronization pulse is finally indicated, and its arrival time is output. This is used to guide the communication or data link terminal to perform fine synchronization processing and avoid interference and misjudgment.

[0095] 4. Network Training Main loss function: ; in, It is a sample For real labels The predicted probability, For preset focus parameters, the typical value is... .

[0096] Sparse regularization terms (L1 constraints): ; The output of the dynamic attention layer Dimensional weights, The hyperparameter controlling sparsity intensity is typically set to... .

[0097] Overall objective function: ; Training method: The parameters of the network are obtained by backpropagation using the AdamW optimizer.

[0098] In summary, this invention targets the synchronization segment of physical layer signal frames in communication and data link systems. Corresponding to the number of carriers used in the synchronization segment pulses, multi-channel parallel frequency compensation is employed for frequency domain processing. To reduce processing complexity and improve anti-interference capability, the signal output from each frequency compensation channel, after removing the sign bit, is fed into multiple independent sliding correlators. Corresponding to the number of synchronization pulses and the pseudocode length in the synchronization segment, the pseudocode is divided into multiple sub-segments for parallel synchronization pulse capture. The sliding correlators employ a segmented parallel structure, with the local reference signals for each sub-segment being the pseudocode. Each correlator is equipped with an independent correlation operation unit, and a phase-continuous sliding window is implemented through a shift register. The correlation operation uses a sign-bit simplification algorithm, retaining only the sign bit of the input signal for multiplication and accumulation, significantly reducing computational complexity. The correlation results are fed into a peak detection module, employing a dual-threshold detection strategy: the first-level threshold is set with the noise floor as a reference for initial screening of candidate peaks; the second-level threshold uses a dynamic adjustment mechanism, referencing the statistical characteristics of historical correlator outputs. To further combat the time delay characteristics of frequency tracking and repeater-type interference, a time consistency verification module is added, requiring that the effective peak values ​​of the correlator must meet the consistency principle of peak position deviation. Five features are extracted from the outputs of multiple frequency compensation channels and multiple sliding correlators, as well as peak values ​​exceeding the threshold: correlation peak amplitude, peak-to-average power ratio, frequency consistency, kurtosis coefficient, and number of peak values. Furthermore, a decision-maker based on a dynamic sparse attention network is employed to calculate the feature importance probabilities of "pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise." When the probability of "signal plus noise" is the highest and exceeds the threshold, the arrival of the synchronization pulse is finally indicated, and its arrival time is output. This guides the communication or data link terminals to perform precise synchronization processing, avoiding interference and misjudgment.

[0099] like Figure 5 As shown, this application embodiment also provides an electronic device 500, including a memory 510, a processor 520, and a computer program 511 stored in the memory 510 and executable on the processor. When the processor 520 executes the computer program 511, it implements the steps of the above-mentioned synchronization method based on a dynamic sparse attention mechanism.

[0100] Since the electronic device described in this embodiment is a device used to implement a synchronization method based on a dynamic sparse attention mechanism according to the embodiments of this application, those skilled in the art can understand the specific implementation method and various variations of the electronic device in this embodiment based on the method described in the embodiments of this application. Therefore, how the electronic device implements the method in the embodiments of this application will not be described in detail here. Any device used by those skilled in the art to implement the method in the embodiments of this application falls within the scope of protection of this application.

[0101] In practice, when the computer program 511 is executed by the processor, it can implement any of the embodiments corresponding to the first aspect.

[0102] Figure 6 A schematic diagram of the structure of a computer system suitable for implementing the electronic device of the present application is shown.

[0103] It should be noted that, Figure 6 The computer system 600 of the electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0104] like Figure 6 As shown, the computer system 600 includes a Central Processing Unit (CPU) 601, which can perform various appropriate actions and processes based on programs stored in Read-Only Memory (ROM) 602 or programs loaded from Storage Unit 608 into Random Access Memory (RAM) 603, such as performing the methods described in the above embodiments. The RAM 603 also stores various programs and data required for system operation. The CPU 601, ROM 602, and RAM 603 are interconnected via a bus 604. An Input / Output (I / O) interface 605 is also connected to the bus 604.

[0105] The following components are connected to I / O interface 605: an input section 606 including a keyboard, mouse, etc.; an output section 607 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN (Local Area Network) card, modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to I / O interface 605 as needed. A removable medium 611, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 610 as needed so that computer programs read from it can be installed into storage section 608 as needed.

[0106] Specifically, according to embodiments of this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 609, and / or installed from removable medium 611. When the computer program is executed by central processing unit (CPU) 601, it performs various functions defined in the system of this application.

[0107] It should be noted that the computer-readable medium shown in the embodiments of this application can be a computer-readable signal medium, a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, optical fiber, portable compact disc read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such transmitted data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to wireless, wired, etc., or any suitable combination thereof.

[0108] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. Each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0109] The units described in the embodiments of this application can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the specific unit itself.

[0110] In another aspect, this application also provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform a synchronization method based on a dynamic sparse attention mechanism as described in the above embodiments.

[0111] In another aspect, this application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiments; or it may exist independently and not assembled into the electronic device. The computer-readable medium carries one or more programs, which, when executed by the electronic device, cause the electronic device to implement the synchronization method based on a dynamic sparse attention mechanism described in the above embodiments.

[0112] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to the embodiments of this application, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0113] Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, touch terminal, or network device, etc.) to execute the methods according to the embodiments of this application.

[0114] Other embodiments of this application will readily conceive of by those skilled in the art upon consideration of the specification and practice of the embodiments disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. It should be understood that this application is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A synchronization method based on a dynamic sparse attention mechanism, characterized in that, include: Multiple parallel frequency domain channels are set up to perform frequency compensation on the input signal. The number of parallel frequency domain channels is the same as the number of frequencies used in the synchronization segment. After frequency compensation, the signals of each channel are first subjected to sliding correlation calculation, and then dual-threshold peak detection and time consistency verification are performed. The following features are extracted from the detected threshold peak values: relevant peak amplitude, peak-to-average ratio, frequency consistency, kurtosis coefficient, and number of peak values; Based on the extracted features, a dynamic sparse attention network is used to calculate the feature importance probability, and the arrival time for synchronization processing is determined according to the feature importance probability.

2. The method according to claim 1, characterized in that, Frequency compensation is performed using the following formula: ； in, Indicates the compensated frequency. Indicates the frequency before compensation. Indicates the number of parallel frequency domain channels. It is the first The nominal frequency of each channel, It is the sampling rate.

3. The method according to claim 1, characterized in that, The step of performing a sliding correlation operation on the signals of each channel after frequency compensation includes: After the frequency-compensated signal is taken out, the sign bit is sent to multiple independent sliding correlators for sign correlation calculation. Among them, multiple independent sliding correlators correspond to the number of synchronization pulses and the pseudocode length contained in the synchronization segment, dividing the pseudocode into multiple sub-segments for parallel synchronization pulse capture; the multiple independent sliding correlators adopt a segmented parallel structure, and the local reference signals of the parallel sliding correlators are the pseudocodes of each sub-segment.

4. The method according to claim 1, characterized in that, Perform dual-threshold peak detection, including: Level 1 threshold detection: Set a fixed threshold ,in, Let be the standard deviation of the noise, where It is a preset constant; Candidate peak conditions: ; Level 2 threshold detection: Dynamic threshold Take history The relevant peak value of the quantile is used as the threshold. This is a preset constant; Confirm peak conditions: .

5. The method according to claim 4, characterized in that, Perform time consistency checks, including: The effective peak values ​​obtained after dual-threshold detection are then subjected to the following verification: The effective peak value satisfies: ,in, For the first The peak position of each detection cycle, i.e., the arrival time of the pulse, where, It is a preset constant; The maximum peak channel in the frequency domain satisfies: ,in, This indicates that the absolute value is being calculated.

6. The method according to claim 1, characterized in that, The extracted features are used to calculate feature importance probabilities using a dynamically sparse attention network, and the arrival time for synchronization processing is determined based on these feature importance probabilities, including: Nonlinear transformation and dynamic standardization of features are performed. The processed features are input into a dynamic sparse attention network to calculate the feature importance probabilities of four categories: pure noise, signal plus noise, interference plus noise, and interference plus signal plus noise. When the probability of the signal plus noise having the highest characteristic importance is greater than the set threshold, the arrival of the synchronization pulse is finally indicated, and its arrival time is output.

7. The method according to claim 6, characterized in that, Nonlinear transformation processing of features includes: The following formula is used to construct higher-order interactions for features: ； in, Indicates features, It is the relevant peak amplitude. It is the peak-to-average power ratio. It's about frequency consistency. It is the kurtosis factor. It is the peak number. It is a non-zero positive infinitesimal, instantiated as The expanded feature dimension is 9.

8. The method according to claim 6, characterized in that, Perform dynamic feature standardization, including: Dynamic feature standardization is performed using adaptive instance normalization: ； in, The parameters learned by the network enable adaptive scaling for different signal-to-noise ratio conditions; yes standard deviation yes The mean.

9. A computer-readable storage medium, characterized in that, The storage medium stores computer instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1-8.

10. An electronic device, characterized in that, include: Memory and processor; The memory is used to store computer instructions; The processor is configured to invoke computer instructions stored in the memory, causing the electronic device to perform the method as described in any one of claims 1-8.

Images