Silicon controlled electrostatic protection device and preparation method thereof

Abstract

The invention discloses a silicon controlled electrostatic protection device and a preparation method thereof, a metal block is arranged on the surface of a second N well and is in Schottky contact with the metal block, so that the second N well and the metal block form a Schottky diode, and an N + injection region in the second N well serves as a cathode of the silicon controlled electrostatic protection device. The P + injection region and the first N well form a PN junction diode, and the P + injection region is used as an anode of the silicon controlled electrostatic protection device, so that the PN junction diode and the Schottky diode form a trigger path of the silicon controlled electrostatic protection device, and the characteristics of low forward conduction voltage and fast conduction time and speed of the Schottky diode are utilized; the trigger voltage of the silicon controlled electrostatic protection device is effectively reduced, the failure current is improved, the latch-up effect can be effectively avoided under the ultra-low working voltage, and meanwhile the high protection level is achieved.

Description

Technical Field

[0001] This invention relates to the field of electrostatic discharge (ESD) protection, and in particular to a silicon controlled rectifier (SCR) ESD protection device and its preparation method. Background Technology

[0002] With advancements in semiconductor manufacturing processes, ESD (Electrostatic Discharge) has become an increasingly serious cause of failures in integrated circuit chips and electronic products. Providing ESD protection for electronic products and integrated circuit chips has become one of the major challenges faced by product engineers.

[0003] ESD-induced failure modes include hard failure, soft failure, and latent failure. The causes of these failures can be categorized into electrical failure and thermal failure. Thermal failure refers to the generation of a current of several to tens of amperes in a localized area of ​​the chip when an ESD pulse occurs. This current is short-lived but generates a large amount of heat, causing localized metal interconnects to melt or hot spots to form on the chip, leading to secondary breakdown. Electrical failure occurs when the electric field strength created by the voltage applied to the gate oxide layer exceeds the dielectric strength, causing surface breakdown or dielectric breakdown. As the threat posed by ESD to chips becomes increasingly serious, the study of its physical mechanisms is receiving increasing attention.

[0004] Therefore, existing technologies typically use DTSCRs (Diode-Triggered SCRs) for electrostatic discharge (ESD) protection. However, traditional DTSCRs cannot be used in ultra-low voltage ESD protection network designs due to their excessively high trigger voltage. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a silicon controlled rectifier (DTSCR) electrostatic discharge (ESD) device and its fabrication method, thereby reducing the trigger voltage of the DTSCR and enabling its application in ultra-low voltage ESD protection network design.

[0006] According to a first aspect of the present invention, a silicon controlled rectifier (SCR) electrostatic discharge (ESD) protection device is provided, comprising: Substrate; A first P-well, a first N-well, and a second N-well are sequentially disposed within the substrate along a first direction. The boundary of the first P-well is in contact with the boundary of the first N-well, and the first N-well and the second N-well are spaced apart from each other. The first P+ injection region and the first N+ injection region are independent of each other, and the first P+ injection region and the first N+ injection region are sequentially disposed in the first P-well along the first direction. The second P+ injection region, the second N+ injection region, and the third P+ injection region are independent of each other. The second P+ injection region, the second N+ injection region, and the third P+ injection region are sequentially disposed in the first N-well along the first direction. The second P+ injection region and the third P+ injection region are connected to the same potential and serve as the anode of the thyristor electrostatic discharge device. A first metal block and a third N+ injection region are provided. The first metal block is disposed on the surface of the third N-well and makes Schottky contact with the surface of the second N-well. The first metal block and the second N+ injection region are electrically connected. The third N+ injection region is disposed in the second N-well. The third N+ injection region, the first P+ injection region and the first N+ injection region are connected to the same potential and serve as the cathode of the silicon controlled rectifier electrostatic discharge (SCD) device.

[0007] Optionally, it further includes: a plurality of first oxygen isolation structures, wherein the plurality of first oxygen isolation structures are respectively disposed in a first P well between the first P+ injection region and the first N+ injection region, in a first P well and a first N well between the first N+ injection region and the second P+ injection region, in a first N well between the second P+ injection region and the second N+ injection region, in a first N well between the second N+ injection region and the third P+ injection region, in a gap region between the third P+ injection region and the first metal block, and in a second N well between the first metal block and the third N+ injection region.

[0008] Optionally, the anode is connected to an electrostatic voltage, the cathode is connected to ground, the first N-well and the second P+ injection region form a first PN junction diode, the first N-well and the third P+ injection region form a second PN junction diode, and the first metal block and the second N-well form a first Schottky diode.

[0009] Optionally, when the anode is connected to an electrostatic voltage and the cathode is connected to ground, the first N+ injection region, the first P-well, and the first N-well constitute an NPN transistor, and the first P-well, the first N-well, and the second P+ injection region constitute a PNP transistor.

[0010] Optionally, it also includes: a plurality of third N-wells, wherein the plurality of third N-wells are sequentially disposed in the substrate along a first direction, the first third N-well and the second N-well are adjacent, and in the first direction, the distance between the i-th third N-well and the second N-well is less than the distance between the (i+1)-th third N-well and the second N-well, the plurality of third N-wells are spaced apart from each other, i is a positive integer and i≥1; Each third N-well has a second metal block on its surface, and each second metal block is in Schottky contact with the corresponding third N-well surface. Each third N-well also has a fourth N+ injection region. The second metal block on the surface of the first third N-well is electrically connected to the third N+ injection region. The fourth N+ injection region in the i-th third N-well is connected to the second metal block on the surface of the (i+1)-th third N-well. The fourth N+ injection region in the last third N-well serves as the cathode of the silicon controlled rectifier electrostatic discharge device.

[0011] Optionally, it also includes: a plurality of second field oxygen isolation structures, wherein the plurality of second field oxygen isolation structures are respectively located between the second metal block on the surface of the third N+ injection region and the first third N well, within the i-th third N well between the second metal block on the surface of the i-th third N well and the fourth N+ injection region within the i-th third N well, and between the fourth N+ injection region within the i-th third N well and the second metal block on the surface of the (i+1)-th third N well.

[0012] Optionally, when the anode is connected to an electrostatic voltage and the cathode is connected to ground, the second metal block on the surface of the i-th third N-well and the i-th third N-well constitute the (i+1)-th Schottky diode.

[0013] Optionally, the work function of the first metal block and each of the second metal blocks can be adjusted.

[0014] According to a second aspect of the present invention, a method for fabricating a silicon-controlled rectifier (SCR) electrostatic discharge (ESD) device is provided, the method comprising: Provide substrate; A first P-well, a first N-well, and a second N-well are formed in the substrate, and the first P-well, the first N-well, and the second N-well are arranged along a first direction in the substrate. A first P+ injection region and a first N+ injection region are formed in the first P-well, respectively. The first P+ injection region and the first N+ injection region are independent of each other and are arranged sequentially along the first direction. A second P+ injection region, a second N+ injection region, and a third P+ injection region are formed in the first N-well, respectively. The second P+ injection region, the second N+ injection region, and the third P+ injection region are independent of each other, and the second P+ injection region, the second N+ injection region, and the third P+ injection region are arranged sequentially along the first direction. A third N+ injection region is formed within the second N-well; After each injection region is formed, a first metal block is formed on the surface of the second N-well, and the first metal block is in Schottky contact with the surface of the second N-well; After the first metal block is formed, the second P+ injection region and the third P+ injection region are connected to the same potential and serve as the anode of the thyristor electrostatic discharge (ESD) device; the third N+ injection region, the first P+ injection region, and the first N+ injection region are connected to the same potential and serve as the cathode of the thyristor ESD device; the first metal block and the second N+ injection region are electrically connected.

[0015] Optionally, after forming the first metal block, the method further includes forming a first field oxygen isolation structure in the first P-well between the first P+ injection region and the first N+ injection region, in the first P-well and the first N-well between the first N+ injection region and the second P+ injection region, in the first N-well between the second P+ injection region and the second N+ injection region, in the first N-well between the second N+ injection region and the third P+ injection region, in the interval region between the third P+ injection region and the first metal block, and in the second N-well between the first metal block and the third N+ injection region.

[0016] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: In the thyristor electrostatic discharge (ESD) device provided by this invention, the second P+ injection region and the third P+ injection region are connected to the same potential, serving as the anode of the thyristor ESD device. The third P+ injection region and the first N-well are equivalent to two parallel-connected PN junction diodes, with the positive terminal of the PN junction diode acting as the anode of the thyristor ESD device. Furthermore, the first metal block and the surface of the second N-well form a Schottky diode through Schottky contact. The first metal block and the second N+ injection region are electrically connected, equivalent to the positive terminal of the Schottky diode connecting to the negative terminal of the PN junction diode. The third N+ injection region is disposed within the second N-well and serves as the cathode of the thyristor ESD device, with the negative terminal of the Schottky diode acting as the cathode of the thyristor ESD device. When the anode and cathode of the thyristor ESD device are connected to the power supply and ground respectively, and the PN junction diode and Schottky diode are turned on, the thyristor ESD device is triggered. Therefore, this invention utilizes the characteristics of low forward conduction voltage and fast conduction time of Schottky diodes to effectively reduce the trigger voltage of thyristor electrostatic discharge (ESD) devices and increase the failure current, thereby effectively avoiding latch-up effects at ultra-low operating voltages while achieving a high protection level.

[0017] Furthermore, the present invention additionally provides a plurality of third N-wells, which are sequentially disposed in the substrate along a first direction. The first third N-well and the second N-well are adjacent to each other. In the first direction, the distance between the i-th third N-well and the second N-well is less than the distance between the (i+1)-th third N-well and the second N-well.

[0018] Since the second metal block on the surface of the first third N-well is electrically connected to the third N+ injection region, and the fourth N+ injection region in the i-th third N-well is connected to the second metal block on the surface of the (i+1)-th third N-well, the fourth N+ injection region in the last third N-well serves as the cathode of the silicon controlled rectifier (SCR) electrostatic discharge (ESD) device, thus realizing the series connection of several Schottky diodes. Furthermore, because the work function of each metal block is adjustable, the trigger voltage of the device is adjustable, thereby broadening the device's window adaptability. Attached Figure Description

[0019] Figure 1 This is a cross-sectional view of a traditional DTSCR. Figure 2 The equivalent circuit diagram of a traditional DTSCR; Figure 3 A cross-sectional view of a silicon controlled rectifier electrostatic discharge (SCR) device provided in an embodiment of the present invention; Figure 4 An equivalent circuit diagram of a silicon controlled rectifier electrostatic discharge (SCR) device provided in an embodiment of the present invention; Figure 5 A cross-sectional view of a silicon controlled rectifier electrostatic discharge (SCR) device provided for another embodiment of the present invention; Figure 6 An equivalent circuit diagram of a silicon controlled rectifier electrostatic discharge (SCR) device provided for another embodiment of the present invention; Figure 7 for Figure 5 and Figure 6 The TLP simulation results of the thyristor electrostatic discharge (ESD) device provided in the document; Figure 8 The results are TLP simulations of a conventional PN junction diode string-triggered silicon controlled rectifier (SCR) electrostatic discharge (ESD) device. Detailed Implementation

[0020] As described in the background section, existing technologies typically employ DTSCRs (Diode-Triggered SCRs) for electrostatic discharge (ESD) protection. However, existing DTSCRs cannot be used in ultra-low voltage ESD protection network designs due to their excessively high trigger voltage. The following section combines... Figure 1 and Figure 2 Please provide a detailed explanation.

[0021] Please refer to Figure 1 , Figure 1The DTSCR shown includes a first P-well 100, a first N-well 101, a second N-well 102, and a third N-well 103 arranged sequentially adjacent to each other within a P-type substrate. The first P-well 100 contains a first P+ injection region 104 and a first N+ injection region 105, which are electrically connected to each other and connected to ground, serving as the device's cathode. The first N-well 101 contains a second P+ injection region 106, a second N+ injection region 107, and a third P+ injection region 108, which are electrically connected to each other and connected to a power supply, serving as the device's anode. The second N-well 102 contains a fourth P+ injection region 109 and a third N+ injection region 110, with the second N+ injection region 107 and the fourth P+ injection region 109 being electrically connected. The third N-well 103 is provided with a fifth P+ injection region 111 and a fourth N+ injection region 112. The third N+ injection region 110 and the fifth P+ injection region 111 are electrically connected, and the fourth N+ injection region 112 is connected to the ground terminal to serve as the cathode of the device.

[0022] Please refer to Figure 2 ,based on Figure 1 The first P+ injection region 104 and the first P-well 100 are equivalent to resistors Rp; the first N+ injection region 105, the first P-well 100, and the first N-well 101 are equivalent to NPN transistors NPN1; the first P-well 100, the first N-well 101, and the second P+ injection region 106 are equivalent to PNP transistors PNP1; the second P+ injection region 106 and the first N-well 101 form a first PN junction diode D1; the third P+ injection region 108 and the first N-well 101 form a second PN junction diode D2; the fourth P+ injection region 109 and the second N-well 102 form a third PN junction diode D3; and the fifth P+ injection region 111 and the third N-well 103 form a fourth PN junction diode D4. The emitter of PNP transistor PNP1, the anode of the first PN junction diode D1, and the anode of the second PN junction diode D2 are interconnected and serve as the anode of the device. The base of PNP transistor PNP1 is connected to the cathodes of the first PN junction diode D1 and the second PN junction diode D2, respectively. The emitter of PNP transistor PNP1 is connected to one end of resistor Rp and the base of NPN transistor NPN1, respectively. The cathode of the first PN junction diode D1 is connected to the collector of NPN transistor NPN1. The cathode of the second PN junction diode D2 is connected to the anode of the third PN junction diode D3. The anode of the fourth PN junction diode D4 is connected to the cathode of the third PN junction diode D3. The other end of resistor Rp, the emitter of NPN transistor NPN1, and the cathode of the fourth PN junction diode D4 all serve as the cathode of the device.

[0023] When an electrostatic pulse reaches the anode of the device and the cathode is at a low potential, the trigger current enters from the anode, flows sequentially through the first PN junction diode D1, the second PN junction diode D2, the third PN junction diode D3, and the fourth PN junction diode D4, and finally exits from the cathode. When the current flows through the resistor Rp, forming a voltage drop of 0.7V, the PNP transistor PNP1 conducts and provides base current to the NPN transistor NPN1, thereby promoting the conduction of the NPN transistor NPN1. When the PNP transistor PNP1 and the NPN transistor NPN1 are turned on, a positive SCR path is formed, creating a positive feedback effect, at which point the device is successfully triggered.

[0024] The trigger voltage of the aforementioned DTSCR is determined by the sum of the turn-on voltages of the third PN junction diode D3 and the fourth PN junction diode D4, therefore, the trigger voltage of the aforementioned DTSCR is equal to 1.4V. However, for applications in ultra-low voltage ESD protection network designs, the trigger voltage of the DTSCR is typically required to be lower than 1.4V to protect ultra-low voltage devices. Therefore, the aforementioned DTSCR cannot be used in ultra-low voltage ESD protection network designs.

[0025] However, the DTSCR in the embodiment cannot be applied to the design of ultra-low voltage ESD protection networks because the trigger voltage is too high.

[0026] In view of this, the present invention provides a novel SCR (Silicon Controlled Rectifier) ​​ESD protection device. A metal block is disposed on the surface of the second N-well and makes Schottky contact with the metal block, so that the second N-well and the metal block constitute a Schottky diode. The N+ injection region in the second N-well serves as the cathode of the SCR ESD protection device. Furthermore, because the P+ injection region and the first N-well form a PN junction diode, and the P+ injection region serves as the anode of the SCR ESD protection device, the PN junction diode and the Schottky diode constitute the triggering path of the SCR ESD protection device. Utilizing the low forward conduction voltage and fast conduction time characteristics of the Schottky diode, the triggering voltage of the SCR ESD protection device is effectively reduced and the failure current is increased. This effectively avoids latch-up effects at ultra-low operating voltages while achieving a high protection level.

[0027] The following description, in conjunction with the accompanying drawings and embodiments, further illustrates the ESD protection design of the present invention applied to analog switch chips.

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0030] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0031] Please refer to Figure 3 The thyristor electrostatic discharge (ESD) device provided in this embodiment includes: a substrate 212, a first P-well 200, a first N-well 201, a second N-well 202, a first P+ injection region 204, a first N+ injection region 205, a second P+ injection region 206, a second N+ injection region 207, a third P+ injection region 208, a first metal block 209, and a third N+ injection region 210.

[0032] The first P-well 200, the first N-well 201, and the second N-well 202 are disposed in the substrate 212 along the first direction AA'. The boundary of the first P-well 200 is in contact with the boundary of the first N-well 201, and the first N-well 201 and the second N-well 202 are spaced apart from each other.

[0033] Specifically, the first direction AA' can be understood as the direction from the first P-well 200 to the second N-well 202, or it can be understood as... Figure 3 The direction from left to right in the middle.

[0034] The first P+ injection region 204 and the first N+ injection region 205 are disposed within the first P-well 200 along the first direction, and the first P+ injection region and the first N+ injection region are independent of each other.

[0035] Specifically, the cathode may be connected to ground or at a lower potential than the anode, without limitation.

[0036] The second P+ injection region 206, the second N+ injection region 207, and the third P+ injection region 208 are all disposed in the first N-well 201 along the first direction. The second P+ injection region, the second N+ injection region, and the third P+ injection region are independent of each other. The second P+ injection region 206 and the third P+ injection region 208 are electrically connected to serve as anodes.

[0037] Specifically, the anode is connected to an electrostatic pulse.

[0038] The first metal block 209 and the second N-well 202 are in Schottky contact, and the first metal block 209 and the second N+ injection region 207 are electrically connected. The third N+ injection region is disposed in the second N-well, and the third N+ injection region, the first P+ injection region, and the first N+ injection region are connected to the same potential and serve as the cathode of the silicon controlled rectifier electrostatic discharge (SCD) device.

[0039] Furthermore, the first metal block 209 and the second N-well 202 are in Schottky contact, which can be understood as the first metal block 209 and the second N-well 202 being in physical contact, the second N-well 202 being a lightly doped region, and the doping concentration of the second N-well 202 matching the work function of the first metal block 209.

[0040] Please refer to Figure 4 The first P+ injection region 204 and the first P-well 200 are equivalent to Figure 4 The resistor Rb in the middle.

[0041] Since the boundary of the first P-well is in contact with the boundary of the first N-well, and the first N+ injection region is located within the first P-well and the second P+ injection region is located within the first N-well, the first N+ injection region 205, the first P-well 200, and the first N-well 201 are equivalent to Figure 4 The NPN transistor NPN2 is shown in the image. The first P-well 200, the first N-well 201, and the second P+ injection region 206 are equivalent to... Figure 4 The PNP transistor PNP2 in the middle.

[0042] Since the second P+ injection region and the third P+ injection region are independently located within the first N-well, the second P+ injection region 206 and the first N-well 201 are equivalent to Figure 4 The first PN junction diode D5 is formed by the third P+ injection region 208 and the first N-well 201. Figure 4The second PN junction diode D6 is connected to the base of the first PN junction diode D5 and the second PN junction diode D6. The emitter of the PNP transistor PNP2 is connected to one end of the resistor Rb and the base of the NPN transistor NPN2. The cathode of the first PN junction diode D5 is connected to the collector of the NPN transistor NPN2.

[0043] Since the second P+ injection region and the third P+ injection region are connected to the same potential, the emitter of PNP transistor PNP2, the anode of the first PN junction diode D5, and the anode of the second PN junction diode D6 are interconnected and together serve as the anode of the device.

[0044] Since the first metal block 209 is located on the surface of the second N-well 202 and is in Schottky contact with the surface of the second N-well 202, the first metal block 209 and the second N+ injection region 207 are electrically connected, and the third N+ injection region 210, the first P+ injection region 204, and the first N+ injection region 205 all serve as cathodes. Therefore, the first metal block 209 and the second N-well 202 constitute a... Figure 4 The first Schottky diode SBD1 is connected to the first Schottky diode SBD1. The negative terminal of the second PN junction diode D6 is connected to the positive terminal of the first Schottky diode SBD1. The negative terminal of the first Schottky diode SBD1, the other end of the resistor Rb, and the emitter of the NPN transistor NPN2 all serve as the cathodes of the device.

[0045] When an electrostatic pulse reaches the anode of the device, and the cathode is connected to a low potential or ground, the trigger current path consists of two parallel-connected first PN junction diodes D5 and D6, and a first Schottky diode SBD1 connected in series with the second PN junction diode D6. Once the first PN junction diode D5, the second PN junction diode D6, and the first Schottky diode SBD1 are turned on, the trigger current path will provide the trigger current.

[0046] When a voltage drop of 0.7V is formed by the resistor Rb flowing through the first N-well, PNP transistor PNP2 is turned on and provides base current to NPN transistor NPN2, thus promoting the conduction of NPN transistor NPN2. When both PNP transistor PNP2 and NPN transistor NPN2 are turned on, a positive SCR path is formed, creating a positive feedback effect. At this point, the device is successfully triggered.

[0047] Since the trigger voltage of the DTSCR in this embodiment is determined by the forward voltage of the first Schottky diode SBD1, and the forward voltage of the first Schottky diode SBD1 is typically less than 0.7V, the trigger voltage of the DTSCR in this embodiment is less than 0.7V. This allows the thyristor electrostatic discharge (ESD) device provided in this embodiment to be applied in ultra-low voltage ESD protection network designs. Simultaneously, by utilizing the high failure current characteristic of the Schottky diode, a high protection level is achieved while effectively avoiding latch-up effects at ultra-low operating voltages.

[0048] Please continue to refer to this. Figure 3 The thyristor electrostatic discharge (ESD) device provided in this embodiment further includes: a plurality of first field oxygen isolation structures 211, wherein the plurality of first field oxygen isolation structures 211 are used to electrically isolate the first P+ injection region 204, the first N+ injection region 205, the second P+ injection region 206, the second N+ injection region 207, the third P+ injection region 208, the first metal block 209, and the third N+ injection region 210.

[0049] In this embodiment, the first field oxygen isolation structure 211 is respectively disposed in the first P-well to the left of the first P+ injection region 204, in the first P-well between the first P+ injection region 204 and the first N+ injection region 205, in the interval region between the first N+ injection region 205 and the second P+ injection region 206, in the first N-well between the second P+ injection region 206 and the second N+ injection region 207, in the first N-well between the second N+ injection region 207 and the third P+ injection region 208, in the interval region between the third P+ injection region 208 and the first metal block 209, in the second N-well between the first metal block 209 and the third N+ injection region 210, and on the right side of the third N+ injection region 210.

[0050] by Figure 3 As shown in the example, this embodiment also provides a method for fabricating a silicon controlled rectifier (SCR) electrostatic discharge (ESD) device, including the following steps: Substrate 212 is provided.

[0051] A first P-well 200, a first N-well 201, and a second N-well 202 are formed in a substrate 212, and the first P-well 200, the first N-well 201, and the second N-well 202 are arranged in a first direction in the substrate 212.

[0052] A first P+ injection region 204 and a first N+ injection region 205 are formed within the first P-well 200.

[0053] A second P+ injection region 206, a second N+ injection region 207, and a third P+ injection region 208 are formed within the first N-well 201.

[0054] A first field oxygen isolation structure 211 is formed in the substrate 212 in which the first P+ implantation region 204, the first N+ implantation region 205, the second P+ implantation region 206, the second N+ implantation region 207, the third P+ implantation region 208, the first metal block 209, and the third N+ implantation region 210 are spaced apart from each other.

[0055] After the first oxygen isolation structure 211 is formed, all injection regions are annealed to eliminate the migration of impurities in the injection regions.

[0056] After annealing all the injection regions, the second P+ injection region 206 and the third P+ injection region 208 are connected to the same potential to serve as the anode of the silicon controlled rectifier (SCR) electrostatic discharge (ESD) device.

[0057] The first metal block 209 and the second N+ injection region 207 are electrically connected.

[0058] The third N+ injection region 210, the first P+ injection region 204, and the first N+ injection region 205 are connected to the same potential to serve as the cathode of the silicon controlled rectifier electrostatic discharge (SCD) device.

[0059] In summary, the thyristor-based electrostatic discharge (ESD) device provided in this embodiment utilizes the characteristics of low forward conduction voltage and fast conduction time of Schottky diodes to effectively reduce the trigger voltage of the thyristor-based ESD device and increase the failure current. It can effectively avoid latch-up effect at ultra-low operating voltage while achieving a high protection level.

[0060] To enable the device's trigger voltage to be adjustable to meet different electrostatic discharge (ESD) protection design requirements, the trigger voltage of the thyristor ESD protection device needs to be adjustable. Therefore, in another embodiment, the thyristor ESD protection device further includes a plurality of third N-wells, which are sequentially disposed in the substrate along a first direction. The first third N-well and the second N-well are adjacent to each other. In the first direction, the distance between the i-th third N-well and the second N-well is less than the distance between the (i+1)-th third N-well and the second N-well. The plurality of third N-wells are spaced apart from each other, where i is a positive integer and i≥1. Each third N-well has a second metal block on its surface, and each second metal block is in Schottky contact with the corresponding third N-well surface. Each third N-well also has a fourth N+ injection region. The second metal block on the surface of the first third N-well is electrically connected to the third N+ injection region. The fourth N+ injection region within the i-th third N-well is connected to the second metal block on the surface of the (i+1)-th third N-well. The fourth N+ injection region within the last third N-well serves as the cathode of the silicon controlled rectifier (SCR) electrostatic discharge (ESD) device. Therefore, several third N-wells and their corresponding second metal blocks constitute a second Schottky diode. The first second Schottky diode is connected in series with the first Schottky diode, and the remaining second Schottky diodes are also connected in series sequentially. The negative terminal of the last second Schottky diode is connected to ground and serves as the cathode, thus forming a series-connected path for several Schottky diodes.

[0061] Furthermore, the work function of both the first metal block and each of the second metal blocks can be adjusted.

[0062] Therefore, this device can control the trigger voltage by adjusting the number of series Schottky diodes or the work function of the metal according to the requirements of the electrostatic protection design window in different application scenarios. When the work function of the metal and the number of series Schottky diodes increase, the trigger voltage of the device increases.

[0063] The thyristor electrostatic discharge (ESD) device also includes several second-field oxygen isolation structures. These second-field oxygen isolation structures are respectively located between the second metal block on the surface of the third N+ injection region and the first third N-well, within the i-th third N-well between the second metal block on the surface of the i-th third N-well and the fourth N+ injection region within the i-th third N-well, and in the interval region between the fourth N+ injection region within the i-th third N-well and the second metal block on the surface of the (i+1)-th third N-well. When the anode is connected to an ESD voltage and the cathode is connected to ground, the second metal block on the surface of the i-th third N-well and the i-th third N-well constitute the (i+11)-th Schottky diode.

[0064] Please refer to Figure 5 and Figure 6 The following section, using i=1, provides a detailed description of the thyristor electrostatic discharge (ESD) protection device provided in this embodiment: Since the connection and positional relationships of the substrate 212, the first P-well 200, the first N-well 201, the second N-well 202, the first P+ injection region 204, the first N+ injection region 205, the second P+ injection region 206, the second N+ injection region 207, the third P+ injection region 208, the first metal block 209, and the third N+ injection region 210 have been described in detail in the above embodiments, they will not be repeated here.

[0065] The third N-well 213 and the second N-well 202 are adjacent to each other.

[0066] A second metal block 214 is disposed on the surface of the third N-well 213, and the second metal block 214 and the third N-well 213 are in Schottky contact to form a structure. Figure 6 The second Schottky diode SBD2 is located in the first Schottky diode. The second metal block 214 is also electrically connected to the third N+ injection region 210, thereby realizing the series connection of the second Schottky diode SBD2 and the first Schottky diode SBD1.

[0067] The third N-well 213 also contains a fourth N+ injection region 215, which also serves as the cathode of the device, thus forming... Figure 6 The negative terminal of the second Schottky diode SBD2 is connected to ground.

[0068] Please continue to refer to this. Figure 5 The second oxygen isolation structure 216 is respectively disposed in the third N well 213 between the second metal block 214 and the fourth N+ injection region 215, and in the third N well 213 to the right of the fourth N+ injection region.

[0069] Figure 7 for Figure 5 and Figure 6 The TLP simulation results of the thyristor electrostatic discharge protection device provided in the article. Figure 8 The results are TLP simulations of a conventional PN junction diode string-triggered silicon controlled rectifier (SCR) electrostatic discharge (ESD) device.

[0070] Please refer to Figure 7 and Figure 8 It is evident that, based on the traditional DTSCR, the DTSCR in this embodiment has a lower trigger voltage.

[0071] In summary, this embodiment additionally includes several third N-wells sequentially disposed within the substrate along a first direction. Each third N-well surface has a second metal block with a Schottky contact, and each third N-well also contains a fourth N+ injection region. The second metal block on the surface of the first third N-well is electrically connected to the third N+ injection region. The fourth N+ injection regions in the i-th third N-well are all connected to the second metal blocks on the surface of the (i+1)-th third N-well. The fourth N+ injection region in the last third N-well serves as the cathode of the silicon controlled rectifier (SCR) electrostatic discharge (ESD) device, realizing the series connection of several Schottky diodes. Furthermore, because the work function of the first metal block and each second metal block is adjustable, the trigger voltage of the device is adjustable, thereby broadening the device's window adaptability.

[0072] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A silicon controlled rectifier (SCR) electrostatic discharge (ESD) protection device, characterized in that, include: Substrate; A first P-well, a first N-well, and a second N-well are sequentially disposed within the substrate along a first direction. The boundary of the first P-well is in contact with the boundary of the first N-well, and the first N-well and the second N-well are spaced apart from each other. The first P+ injection region and the first N+ injection region are independent of each other, and the first P+ injection region and the first N+ injection region are sequentially disposed in the first P-well along the first direction. The second P+ injection region, the second N+ injection region, and the third P+ injection region are independent of each other. The second P+ injection region, the second N+ injection region, and the third P+ injection region are sequentially disposed in the first N-well along the first direction. The second P+ injection region and the third P+ injection region are connected to the same potential and serve as the anode of the thyristor electrostatic discharge device. A first metal block and a third N+ injection region are provided. The first metal block is disposed on the surface of the third N-well and makes Schottky contact with the surface of the second N-well. The first metal block and the second N+ injection region are electrically connected. The third N+ injection region is disposed in the second N-well. The third N+ injection region, the first P+ injection region and the first N+ injection region are connected to the same potential and serve as the cathode of the silicon controlled rectifier electrostatic discharge device.

2. The thyristor electrostatic discharge protection device according to claim 1, characterized in that, Also includes: A plurality of first-field oxygen isolation structures are respectively disposed in a first P-well between the first P+ injection region and the first N+ injection region, in a first P-well and a first N-well between the first N+ injection region and the second P+ injection region, in a first N-well between the second P+ injection region and the second N+ injection region, in a first N-well between the second N+ injection region and the third P+ injection region, in a gap region between the third P+ injection region and the first metal block, and in a second N-well between the first metal block and the third N+ injection region.

3. The thyristor electrostatic discharge protection device according to claim 1, characterized in that, The anode is connected to an electrostatic voltage, the cathode is connected to ground, the first N-well and the second P+ injection region form a first PN junction diode, the first N-well and the third P+ injection region form a second PN junction diode, and the first metal block and the second N-well form a first Schottky diode.

4. The thyristor electrostatic discharge protection device according to claim 1, characterized in that, When the anode is connected to an electrostatic voltage and the cathode is connected to ground, the first N+ injection region, the first P-well, and the first N-well constitute an NPN transistor, and the first P-well, the first N-well, and the second P+ injection region constitute a PNP transistor.

5. The thyristor electrostatic discharge protection device according to claim 1, characterized in that, Also includes: A plurality of third N-wells are sequentially disposed in the substrate along a first direction. The first third N-well and the second N-well are adjacent to each other. In the first direction, the distance between the i-th third N-well and the second N-well is less than the distance between the (i+1)-th third N-well and the second N-well. The plurality of third N-wells are spaced apart from each other. i is a positive integer and i≥1. Each third N-well has a second metal block on its surface, and each second metal block is in Schottky contact with the corresponding third N-well surface. Each third N-well also has a fourth N+ injection region. The second metal block on the surface of the first third N-well is electrically connected to the third N+ injection region. The fourth N+ injection region in the i-th third N-well is connected to the second metal block on the surface of the (i+1)-th third N-well. The fourth N+ injection region in the last third N-well serves as the cathode of the silicon controlled rectifier electrostatic discharge device.

6. The thyristor electrostatic discharge protection device according to claim 5, characterized in that, Also includes: A plurality of second-field oxygen isolation structures are respectively located between the third N+ injection region and the second metal block on the surface of the first third N well, in the i-th third N well between the second metal block on the surface of the i-th third N well and the fourth N+ injection region in the i-th third N well, and in the interval region between the fourth N+ injection region in the i-th third N well and the second metal block on the surface of the (i+1)-th third N well.

7. The thyristor electrostatic discharge protection device according to claim 5, characterized in that, When the anode is connected to an electrostatic voltage and the cathode is connected to ground, the second metal block on the surface of the i-th third N-well and the i-th third N-well constitute the (i+1)-th Schottky diode.

8. The thyristor electrostatic discharge protection device according to claim 7, characterized in that, The work function of both the first metal block and each of the second metal blocks can be adjusted.

9. A method for preparing a silicon controlled rectifier (SCR) electrostatic discharge (ESD) device, characterized in that, The method includes: Provide substrate; A first P-well, a first N-well, and a second N-well are formed in the substrate, and the first P-well, the first N-well, and the second N-well are arranged in the substrate along a first direction. The boundary of the first P-well is in contact with the boundary of the first N-well, and the first N-well and the second N-well are spaced apart from each other. A first P+ injection region and a first N+ injection region are formed in the first P-well, respectively. The first P+ injection region and the first N+ injection region are independent of each other and are arranged sequentially along the first direction. A second P+ injection region, a second N+ injection region, and a third P+ injection region are formed in the first N-well, respectively. The second P+ injection region, the second N+ injection region, and the third P+ injection region are independent of each other, and the second P+ injection region, the second N+ injection region, and the third P+ injection region are arranged sequentially along the first direction. A third N+ injection region is formed within the second N-well; After each injection region is formed, a first metal block is formed on the surface of the second N-well, and the first metal block is in Schottky contact with the surface of the second N-well; After the first metal block is formed, the second P+ injection region and the third P+ injection region are connected to the same potential and serve as the anode of the thyristor electrostatic discharge (ESD) device; the third N+ injection region, the first P+ injection region, and the first N+ injection region are connected to the same potential and serve as the cathode of the thyristor ESD device; the first metal block and the second N+ injection region are electrically connected.

10. The method for preparing the thyristor electrostatic discharge (ESD) device according to claim 9, characterized in that, After forming the first metal block, the method further includes: forming a first field oxygen isolation structure in the first P well between the first P+ injection region and the first N+ injection region, in the first P well and the first N well between the first N+ injection region and the second P+ injection region, in the first N well between the second P+ injection region and the second N+ injection region, in the first N well between the second N+ injection region and the third P+ injection region, in the interval region between the third P+ injection region and the first metal block, and in the second N well between the first metal block and the third N+ injection region.

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