A method for fabricating InGaN full-color Micro-LED devices based on ion implantation

Abstract

This application discloses a method for fabricating InGaN full-color Micro-LED devices based on ion implantation, including fabricating red, green, and blue InGaN multi-quantum-well stacked epitaxial wafers; defining pixel patterns through photolithography, then implanting specific ions to form a high-resistivity insulating layer to achieve pixel electrical isolation; etching deep holes to expose the contact areas of each color emitting layer; depositing an insulating dielectric layer and etching back; fabricating and interconnecting electrodes through physical vapor deposition and lift-off processes; and obtaining the device through thinning, cutting, and packaging. This invention replaces multiple selective etching processes with ion implantation, fundamentally reducing quantum well damage, simplifying the process flow, and improving device luminous efficiency and consistency. The deep-hole vertical electrode structure enhances contact reliability and facilitates high-density integration. The device pixel density can reach 2000-5000 PPI, with a yield ≥88%, making it suitable for VR / AR, high-definition display, and other scenarios, and has significant application value.

Description

Technical Field

[0001] This invention relates to the field of Micro-LED display device fabrication technology, specifically to a method for fabricating InGaN full-color Micro-LED devices based on ion implantation. Background Technology

[0002] Micro-LED (micro-light-emitting diode) is the core direction of next-generation display technology. With its excellent characteristics such as high brightness, high contrast, low power consumption, long life and fast response, it has broad application prospects in high-definition display, virtual reality (VR), augmented reality (AR) and other fields. However, achieving high-performance and high-reliability full-color display is the key technical bottleneck for Micro-LED to move towards large-scale commercial application.

[0003] In existing technologies, the mainstream solutions for realizing full-color Micro-LEDs mainly include the following three categories:

[0004] The first type is mass transfer technology. This approach requires the separate fabrication of red, green, and blue Micro-LED chips, which are then precisely bonded to the driving substrate using mass transfer technology. However, this approach has significant drawbacks: the mass transfer efficiency is extremely low, making it difficult to meet the needs of large-scale production; the chip bonding yield is difficult to control, and problems such as misalignment and poor soldering are prone to occur; the cost of dedicated transfer equipment is high, resulting in high manufacturing costs; at the same time, red chips mostly use the AlInGaP material system, while blue and green chips use the InGaN material system. Chips with different material systems have differences in luminous efficiency, reliability, and lifespan, which increases the difficulty of controlling color consistency in full-color displays.

[0005] The second type is color conversion technology. This approach first prepares a Micro-LED array with a single wavelength (usually blue or ultraviolet light), and then uses conversion materials such as quantum dots (QDs) or phosphors to convert the light of some pixels into red and green light. Although this approach avoids the problem of mass transfer, it has inherent defects: there is a serious loss of light efficiency during the color conversion process, which leads to a reduction in the overall luminous efficiency of the device; quantum dot materials are prone to light decay under strong light irradiation, affecting the long-term stability of the device; and the color purity of the converted red and green light is low, which is difficult to meet the requirements of high-end displays for color reproduction.

[0006] The third type is monolithic integrated stacked structure technology. This approach involves epitaxially growing red, green, and blue InGaN multiple quantum well (MQW) stacked structures on a single substrate, and then using a complex selective etching process to etch from top to bottom to different active layers, thereby fabricating P / N electrodes separately. This approach achieves true monolithic integration, but the process is extremely cumbersome: it requires multiple high-precision selective etching and dielectric filling processes. When the size of Micro-LEDs shrinks to the micrometer or even submicrometer scale, multiple etching processes can cause severe damage to the sidewalls of the quantum wells, generating a large number of non-radiative recombination centers, which significantly reduces the internal quantum efficiency (IQE) and luminous efficiency of the device. At the same time, the complex step structure and dielectric layer formed by etching bring great difficulties to the subsequent electrode fabrication and wire bonding, resulting in reduced electrode contact reliability and a decline in fabrication yield. In addition, existing monolithic integration solutions cannot achieve true "single-core full color", as their sub-pixels are mostly spatially discrete structures rather than vertically stacked, which limits the improvement of pixel density.

[0007] Therefore, there is an urgent need in the field for a new method for the monolithic fabrication of full-color Micro-LEDs that can simplify process steps, reduce quantum well sidewall damage, improve device luminous efficiency and fabrication yield, and facilitate high-density integration. Summary of the Invention

[0008] The purpose of this invention is to overcome the technical defects of existing red Micro LEDs and provide a method for fabricating InGaN full-color Micro-LED devices based on ion implantation. This method addresses the problems of cumbersome process steps and high process complexity caused by multiple selective etching steps in existing stacked Micro-LED fabrication processes; it also solves the problem that etching processes at the micrometer scale cause severe damage to the quantum well sidewalls, leading to a sharp decline in device luminous efficiency; it addresses the problem that electrode fabrication in existing structures is affected by the step structure, resulting in low contact reliability and difficulty in improving yield; and it addresses the problem that existing solutions are not conducive to high-density integration and cannot meet the requirements of high pixel density displays.

[0009] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0010] A method for fabricating InGaN full-color Micro-LED devices based on ion implantation includes the following steps:

[0011] S1, Epitaxial wafer preparation: An epitaxial substrate is provided, and an InGaN-based red, green, and blue tri-color light-emitting structure stacked epitaxial wafer is sequentially grown on the substrate by metal-organic chemical vapor deposition. The stacked epitaxial wafer includes, from bottom to top, a low-temperature nucleation layer, an undoped GaN layer, an N-type GaN layer, a blue InGaN multiple quantum well light-emitting layer, an electron blocking layer, a P-type GaN layer, a green InGaN multiple quantum well light-emitting layer and its corresponding P-type GaN layer, and a red InGaN multiple quantum well light-emitting layer and its corresponding P-type GaN layer.

[0012] S2, ion implantation for electrical isolation, defining pixel area patterns through photolithography, implanting specific ions in the isolation areas between pixels to form a high-resistivity insulating layer, dividing the stacked epitaxial wafer into independent, individually addressable Micro-LED pixel units;

[0013] S3, Deep hole etching to prepare contact points. At least two deep holes are etched in each independent pixel unit by photolithography and dry etching processes. The first deep hole is etched to the N-type GaN layer of the green InGaN multi-quantum well light-emitting layer. The second deep hole continues to be etched downward in a selected area within the first deep hole, penetrating the green InGaN multi-quantum well to the N-type GaN layer of the red InGaN multi-quantum well light-emitting layer.

[0014] S4, Electrode fabrication and interconnection: Deposit an insulating dielectric layer in the deep hole and etch it back; fill the metal through photolithography, physical vapor deposition and lift-off processes to form ohmic contacts and metal wires in each layer.

[0015] S5, the subsequent processes, involve thinning, polishing, cutting, testing and packaging to obtain a full-color Micro-LED device.

[0016] In a preferred embodiment, in step S1, the epitaxial substrate is sapphire, silicon, or GaN substrate; the blue InGaN multiple quantum well light-emitting layer emits light at a wavelength of 440-460 nm, the green InGaN multiple quantum well light-emitting layer emits light at a wavelength of 520-540 nm, and the red InGaN multiple quantum well light-emitting layer emits light at a wavelength of 610-630 nm.

[0017] In a preferred embodiment, in step S1, an etch stop layer and a tunnel junction are provided between each layer of the epitaxial wafer in the stacked structure, and the tunnel junction includes an N-terminal structure composed of n-GaN.

[0018] In a preferred embodiment, after step S1 and before step S2, a bonding and substrate stripping step is further included: a bonding metal layer is prepared by electron beam evaporation and bonded to the substrate at a bonding temperature of 400-700℃, a bonding pressure of 3000-9000 kg, and a bonding time of 10-60 minutes; subsequently, the epitaxial substrate is removed by laser stripping, chemical mechanical polishing, or dry / wet etching processes.

[0019] In a preferred embodiment, the bonding metal layer is a Cr / Pt / Au multilayer structure, with each layer having a thickness of 300nm, 300nm, and 200nm, and a deposition rate of 0.1-5nm / s.

[0020] In a preferred embodiment, in step S2, the specific ion is selected from... , , , or One or more of them.

[0021] In a preferred embodiment, in step S2, the ion implantation energy is 50-200 keV, and the total implantation dose is... Magnitude.

[0022] In a preferred embodiment, in step S3, the dry etching employs an inductively coupled plasma etching process.

[0023] In a preferred embodiment, in step S4, the insulating dielectric layer is selected from... or The physical vapor deposition is performed by sputtering or electron beam evaporation, and the metal material is a Cr / Pt / Au multilayer thin film.

[0024] In a preferred embodiment, in step S4, the fabricated device has four pins for each pixel: a top contact A for the blue sub-pixel, a top contact B for the green sub-pixel / bottom contact B for the blue sub-pixel, a bottom contact C for the green sub-pixel / top contact C for the red sub-pixel, and a contact D bonded to the backplane. The lighting combination of different colored sub-pixels is achieved by controlling the potential difference between contacts A and D.

[0025] Due to the application of the above technical solution, the beneficial effects of this application compared with the prior art are as follows:

[0026] 1. Greatly simplified process flow: This invention replaces the selective etching and dielectric filling steps that need to be performed multiple times in the existing stacked structure preparation with a one-time ion implantation process, which significantly reduces the number of photolithography and etching steps, greatly reduces process complexity and manufacturing costs, and improves production efficiency.

[0027] 2. Effectively protects the quantum well structure and improves luminescence efficiency: Ion implantation is a bulk modification technique that only changes the electrical properties of the implanted region, with minimal impact on the crystal quality of the non-implanted region. This invention avoids directly etching the sidewalls of the active region of the quantum well containing the luminescent core, fundamentally eliminating sidewall damage and non-radiative recombination centers caused by etching, thus significantly improving the internal quantum efficiency and luminescence efficiency of each color sub-pixel.

[0028] 3. Improve device reliability and fabrication yield: Simplified process and elimination of sidewall damage directly improve the consistency of device performance; at the same time, the use of deep hole contact structure and vertical lead-out of electrodes from the top of the device avoids the complex step coverage problem in existing solutions, making electrode contact more stable and reliable, and significantly improving the fabrication yield of devices.

[0029] 4. Compact structure, conducive to high-density integration: The Micro-LED pixels prepared by this invention have no complex steps and dielectric layer structure, and each pixel occupies a small space and has a compact structure, which provides favorable conditions for realizing high pixel density micro-display arrays and can meet the high resolution requirements of high-end displays such as VR / AR. Attached Figure Description

[0030] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0031] Appendix Figure 1 This is a flowchart illustrating a method for fabricating an InGaN full-color Micro-LED device based on ion implantation, according to the present invention.

[0032] Appendix Figure 2 This is a flowchart (including optional steps) of a method for fabricating an InGaN full-color Micro-LED device based on ion implantation according to the present invention. Detailed Implementation

[0033] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing the invention and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0036] Furthermore, some of the aforementioned terms, besides indicating direction or positional relationships, may also have other meanings. For example, the term "above" may, in certain circumstances, indicate a dependency or connection. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0037] Furthermore, the terms "installation," "setup," "equipped with," "connection," "linking," and "socketing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0038] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0039] Example 1

[0040] Please see Figure 1 and Figure 2 The present invention discloses a method for fabricating an InGaN full-color Micro-LED device based on ion implantation, comprising the following steps:

[0041] S1, Epitaxial wafer preparation:

[0042] An epitaxial substrate is provided, the epitaxial substrate being selected from sapphire, silicon, or GaN substrates, and an epitaxial wafer of InGaN-based red, green, and blue three-color light-emitting structures stacked on the substrate is sequentially epitaxially grown using a metal-organic chemical vapor deposition (MOCVD) method.

[0043] The epitaxial wafer of the stacked structure, from bottom to top, includes: a low-temperature nucleation layer, an undoped GaN layer (u-GaN), an N-type GaN layer (n-GaN), a blue InGaN multiple quantum well light-emitting layer, an electron blocking layer, a P-type GaN layer (p-GaN), a green InGaN multiple quantum well light-emitting layer and its corresponding P-type GaN layer, and a red InGaN multiple quantum well light-emitting layer and its corresponding P-type GaN layer.

[0044] To optimize electrical and optical performance, etch stop layers and tunnel junctions can be added between the layers of the stacked structure. The tunnel junctions include an N-terminal structure composed of n-GaN to achieve efficient charge transport between the light-emitting layers. Specifically, the blue InGaN multi-quantum-well light-emitting layer has an emission wavelength of 440-460 nm, the green InGaN multi-quantum-well light-emitting layer has an emission wavelength of 520-540 nm, and the red InGaN multi-quantum-well light-emitting layer has an emission wavelength of 610-630 nm.

[0045] S2, (optional) Bonding and substrate stripping:

[0046] A bonding metal layer is prepared on the front side (non-substrate side) of the epitaxial wafer obtained in S1 by electron beam evaporation (EB). The bonding metal layer is a Cr / Pt / Au multilayer structure with thicknesses of 300nm, 300nm, and 200nm for each layer, and the deposition rate is controlled at 0.1-5nm / s. The epitaxial wafer with the bonding metal layer is then bonded to a substrate (such as a silicon substrate or a matching integrated circuit board). The bonding process is carried out in a high-pressure bonding machine, with the bonding temperature controlled at 400-700℃, the bonding pressure at 3000-9000kg, and the bonding time at 10-60 minutes, so that the metal layers fuse together to form a stable electromechanical connection structure.

[0047] After bonding is completed, the original epitaxial substrate is removed by laser lift-off, chemical mechanical polishing or dry-wet etching process, wherein the laser power of the laser lift-off process is preferably 1-1000W.

[0048] S3, electrical isolation via ion implantation:

[0049] Photoresist is spin-coated onto the surface of an epitaxial wafer after S1 or S2 processing. A photolithography process is then used to define pixel regions (e.g., rectangular pixel arrays) that require electrical isolation from each other. The sample with the defined patterns is placed in an ion implanter, and specific ions, selected from [specific ion types], are implanted into the isolation regions between the pixels. , , , or One or more of them.

[0050] The ion implantation energy and dose are precisely designed, with the implantation energy ranging from 50 to 200 keV and the total implantation dose being [missing value]. The scale ensures that the implanted ions can penetrate to a sufficient depth inside the epitaxial wafer to form a high-resistivity insulating layer in the isolation region, thereby dividing the originally electrically connected stacked epitaxial wafers into independent, individually addressable Micro-LED pixel units.

[0051] S4, Deep hole etching to prepare contact points:

[0052] On the ion-implanted isolated chip, P-contact hole and N-contact hole patterns are defined by a second photolithography process, followed by inductively coupled plasma (ICP) dry etching to etch at least two deep holes within each individual pixel unit:

[0053] The first deep hole: an N-type GaN layer etched into the green InGaN multi-quantum-well light-emitting layer, serving as an electrical contact channel between the green and blue sub-pixels;

[0054] Second deep hole: Continue etching downwards in the designated area within the first deep hole, penetrating the green light-emitting structure (including the green InGaN multi-quantum-well light-emitting layer and its corresponding P-type GaN layer) until the underlying red InGaN multi-quantum-well light-emitting layer's N-type GaN layer is exposed, serving as the electrical contact channel for the red sub-pixel.

[0055] S5, Electrode fabrication and interconnection:

[0056] An insulating dielectric layer was deposited over the entire sample surface using plasma-enhanced chemical vapor deposition (PECVD), the insulating dielectric layer being selected from... or The deposition thickness is about 200 nm; then, the sample is etched back using reactive ion etching (RIE) to remove the insulating dielectric layer on the sample surface, leaving only the insulating dielectric layer on the sidewall of the deep hole to achieve insulation isolation between the electrodes.

[0057] The electrode pattern is defined by the third photolithography process. Cr / Pt / Au multilayer metal films are deposited sequentially using physical vapor deposition (PVD) methods (such as sputtering or electron beam evaporation) to fill deep holes and form ohmic contacts with the P-type GaN or N-type GaN layers of each light-emitting layer. Finally, excess photoresist and the metal above are removed by a lift-off process to form ohmic contacts and corresponding metal wires for each layer of the chip.

[0058] At this time, a single pixel of the device has four pins: top contact A of the blue sub-pixel, top contact B of the green sub-pixel / bottom contact of the blue sub-pixel, bottom contact C of the green sub-pixel / top contact of the red sub-pixel, and contact D bonded to the backplane. By controlling the potential difference between contacts A and D, the independent or combined lighting of sub-pixels of different colors can be achieved.

[0059] S6, subsequent processes:

[0060] After completing the electrode interconnection, the chip undergoes routine thinning and polishing, followed by dicing and performance testing. Finally, the qualified chip is flip-chip bonded to a silicon-based CMOS driver backplane and wire bonding and other steps are performed to obtain a full-color Micro-LED device.

[0061] Example 2

[0062] This application provides a method for fabricating InGaN full-color Micro-LED devices based on ion implantation, the specific steps of which are as follows:

[0063] S1, Epitaxial wafer preparation: Select a 4-inch c-plane sapphire substrate and use an MOCVD device to grow the following layers sequentially: a low-temperature GaN nucleation layer, a 2μm thick undoped GaN layer (u-GaN), and a 3μm thick N-type GaN layer (n-GaN); then grow a blue InGaN / GaN MQW structure with an emission wavelength of 450nm and a P-type GaN layer; next, grow a thin n-GaN layer as the N-terminus of the tunnel junction, and continue to grow a green InGaN / GaN MQW structure with an emission wavelength of 530nm and a P-type GaN layer; finally, grow a red InGaN / GaN MQW structure with an emission wavelength of 620nm and the top P-type GaN layer to obtain an RGB three-color stacked epitaxial wafer.

[0064] S2, Bonding and Substrate Removal: A 150nm thick indium tin oxide (ITO) layer (indium-tin molar ratio 9:1, deposition rate 1nm / s) is deposited on the front side of the epitaxial wafer by electron beam evaporation. Subsequently, a 300nm Cr / 300nm Pt / 200nm Au layer is deposited sequentially on the ITO layer as a bonding metal layer (deposition rate 1nm / s). The same bonding metal layer with the same structure is deposited on the silicon substrate using the same method. The bonding metal layers of the epitaxial wafer and the silicon substrate are aligned and bonded together, and then placed in a high-pressure bonding machine and bonded for 30 minutes at 450℃ and 4500kg pressure. The sapphire substrate is removed using a 20W laser lift-off process.

[0065] S3, Ion Implantation Electrical Isolation: Photoresist is spin-coated onto the sample surface, and a 200μm × 20μm rectangular pixel array pattern is defined by photolithography, with a pixel spacing of 2μm; the sample is placed in an ion implanter, and ion implantation is performed. Ions, implantation energy of 100keV, total implantation dose of This process transforms the epitaxial layer at the pixel gap into a high-resistivity state, forming independent pixel units; after injection, the photoresist is removed.

[0066] S4, Deep hole etching to prepare contact points: Perform a second photolithography to define the P contact hole and N contact hole patterns; use ICP dry etching process to etch the first deep hole at one end of each pixel unit, stopping at the p-GaN surface of the green light-emitting layer; at the other end of the pixel unit, continue etching the second deep hole, penetrating the red and green light-emitting layers until the n-GaN layer of the blue light-emitting layer is exposed.

[0067] S5, Electrode fabrication and interconnection: A 200 nm thick electrode was deposited on the sample surface using PECVD. Insulating layer; surface removed by RIE process. Preserve the sidewalls of the deep hole Insulating layer; Cr / Pt / Au multilayer metal thin films are deposited sequentially by electron beam evaporation to fill deep holes and form ohmic contacts; metal wires are formed by lift-off process to bring out four pins A, B, C, and D.

[0068] S6, Subsequent processes: The chip is thinned and polished, and then cut and tested for photoelectric performance; qualified chips are flip-chip bonded to a silicon-based CMOS driver backplane and wire bonded to obtain a full-color Micro-LED device.

[0069] The full-color Micro-LED device prepared in this embodiment has a luminous efficiency of ≥80lm / W for blue sub-pixels, ≥120lm / W for green sub-pixels, and ≥30lm / W for red sub-pixels. The pixel density can reach 3000PPI, and the yield is ≥90%, which meets the requirements of high-end display applications.

[0070] Example 3

[0071] This application provides a method for fabricating InGaN full-color Micro-LED devices based on ion implantation, the specific steps of which are as follows:

[0072] S1, Epitaxial Wafer Preparation: Select a 6-inch GaN substrate and use a high-performance MOCVD equipment to sequentially grow: a low-temperature GaN nucleation layer, a 3μm thick undoped GaN layer (u-GaN), and a 5μm thick N-type GaN layer (n-GaN); then grow a blue InGaN / GaN MQW structure with an emission wavelength of 460nm and a P-type GaN layer; next, grow a high-conductivity n-GaN layer as the N-terminus of the tunnel junction, and continue growing a green InGaN / GaN MQW structure with an emission wavelength of 540nm and a P-type GaN layer; finally, grow a red InGaN / GaN MQW structure with an emission wavelength of 630nm and the top P-type GaN layer, with additional layers added between each emitting layer. Etching the stop layer and tunnel junction yields a high-performance RGB three-color stacked epitaxial wafer.

[0073] S2, Bonding and Substrate Removal: A 200nm thick indium tin oxide (ITO) layer (indium-tin molar ratio 9:1, deposition rate 5nm / s) is deposited on the front side of the epitaxial wafer by electron beam evaporation. Subsequently, a 300nm Cr / 300nm Pt / 200nm Au layer is deposited sequentially on the ITO layer as a bonding metal layer (deposition rate 5nm / s). The same bonding metal layer with the same structure is deposited on the high-integration integrated circuit substrate using the same method. The bonding metal layers of the epitaxial wafer and the integrated circuit substrate are precisely aligned and bonded, and placed in a high-pressure bonding machine for 60 minutes at 700℃ and 9000kg pressure. The GaN substrate is removed using a 1000W laser lift-off process to obtain a substrate-free stacked epitaxial structure.

[0074] S3, Ion Implantation Electrical Isolation: High-resolution photoresist is spin-coated onto the sample surface, and a high-density rectangular pixel array pattern of 100μm × 10μm is defined using deep ultraviolet lithography, with a pixel pitch of 1μm; the sample is then placed in a high-precision ion implanter for implantation. Ions, implantation energy of 200 keV, total implantation dose of The injection process ensures that the implanted ions penetrate the entire thickness of the epitaxial layer, completely transforming the epitaxial layer at the pixel gap into a high-resistivity insulating state, forming independent high-density Micro-LED pixel units; after injection, the photoresist is removed by plasma ashing.

[0075] S4, Deep Hole Etching for Contact Point Preparation: A second deep ultraviolet lithography step is performed to precisely define the P- and N-contact hole patterns; a high-performance inductively coupled plasma (ICP) dry etching process is used to etch the first deep hole at one end of each pixel unit, precisely controlling the etching depth and stopping at the p-GaN surface of the green emitting layer; at the other end of the pixel unit, a second deep hole is etched using high-precision etching control technology, penetrating the entire structure of the red and green emitting layers until the n-GaN layer of the blue emitting layer is precisely exposed, ensuring a smooth and undamaged contact interface.

[0076] S5, Electrode Fabrication and Interconnection: A 200 nm thick electrode was deposited on the sample surface using plasma-enhanced chemical vapor deposition (PECVD). Insulating dielectric layer; high-precision etching back is performed using reactive ion etching (RIE) to completely remove the impurities from the sample surface. Insulating layer, only the sidewalls of the deep holes are retained. An insulating layer ensures insulation performance between electrodes. A fine electrode pattern is defined through a third photolithography process. Cr / Pt / Au multilayer metal films are sequentially deposited using sputtering in physical vapor deposition (PVD). These films uniformly fill deep holes and form low-resistance ohmic contacts with the P-type or N-type GaN layers of each light-emitting layer. Finally, a lift-off process removes excess photoresist and the metal above, forming high-precision metal wires that lead out four pins A, B, C, and D, ensuring no short circuits between the pins.

[0077] S6, Subsequent processes: The chip is deeply thinned and chemically mechanically polished to obtain a flat device surface; the chip is divided into independent devices through a high-precision cutting process and subjected to comprehensive optoelectronic performance testing; the qualified chips are flip-chip bonded to a high-performance silicon-based CMOS driver backplane, and interconnection is completed using a precision wire bonding packaging process, finally obtaining a high-density full-color Micro-LED device.

[0078] The full-color Micro-LED device fabricated in this embodiment has a luminous efficiency of ≥75 lm / W for blue sub-pixels, ≥110 lm / W for green sub-pixels, and ≥28 lm / W for red sub-pixels. The pixel density can reach 5000 PPI (due to the use of upper limit process parameters to achieve higher integration). The overall device yield is ≥88%, meeting the stringent requirements of high resolution and high color purity for high-end display scenarios such as ultra-high-definition VR / AR.

[0079] Example 4

[0080] This application provides a method for fabricating InGaN full-color Micro-LED devices based on ion implantation, the specific steps of which are as follows:

[0081] S1, Epitaxial Wafer Preparation: Select a 4-inch sapphire substrate and use conventional MOCVD equipment to grow the following layers sequentially: a low-temperature GaN nucleation layer, a 1.5μm thick undoped GaN layer (u-GaN), and a 2μm thick N-type GaN layer (n-GaN); then grow a blue InGaN / GaN MQW structure with an emission wavelength of 440nm and a P-type GaN layer; next, grow a lightly doped n-GaN layer as the N-terminus of the tunnel junction, and continue growing a green InGaN / GaN MQW structure with an emission wavelength of 520nm and a P-type GaN layer; finally, grow a red InGaN / GaN MQW structure with an emission wavelength of 610nm and the top P-type GaN layer, with additional layers between each emitting layer. Etching the stop layer and tunnel junction ensures basic electrical performance, resulting in an RGB three-color stacked epitaxial wafer.

[0082] S2, Bonding and Substrate Separation: A 100 nm thick indium tin oxide (ITO) layer (indium-tin molar ratio 9:1, deposition rate 0.1 nm / s) is deposited on the front side of the epitaxial wafer by electron beam evaporation. Subsequently, a 300 nm Cr / 300 nm Pt / 200 nm Au layer is deposited sequentially on the ITO layer as a bonding metal layer (deposition rate 0.1 nm / s). The same bonding metal layer with the same structure is deposited on a conventional silicon substrate using the same method. The bonding metal layers of the epitaxial wafer and the silicon substrate are aligned and bonded together, and then placed in a high-pressure bonding machine and bonded for 10 minutes at 400 °C and 3000 kg pressure. The sapphire substrate is removed using a 1 W laser lift-off process to obtain a stable stacked epitaxial structure.

[0083] S3, Ion Implantation Electrical Isolation: Conventional photoresist is spin-coated onto the sample surface, and a 300μm × 30μm rectangular pixel array pattern is defined using ultraviolet lithography, with a pixel pitch of 3μm; the sample is then placed in an ion implanter for implantation. Ions, implantation energy of 50 keV, total implantation dose of The injection depth is increased to ensure that the injected ions penetrate to a preset depth, so that the epitaxial layer at the pixel gap is transformed into a high-resistivity insulating state, forming an independent Micro-LED pixel unit; after injection, the photoresist is removed by conventional wet stripping process.

[0084] S4, Deep Hole Etching to Prepare Contact Points: Perform a second ultraviolet lithography to define the P-contact hole and N-contact hole patterns; use conventional inductively coupled plasma etching (ICP) dry etching process to etch the first deep hole at one end of each pixel unit, precisely controlling the etching depth and stopping at the p-GaN surface of the green emitting layer; at the other end of the pixel unit, continue etching the second deep hole through the basic etching control technology, penetrating the red and green emitting layers until the n-GaN layer of the blue emitting layer is precisely exposed, ensuring that there are no residual impurities at the contact interface.

[0085] S5, Electrode Fabrication and Interconnection: A 150 nm thick electrode was deposited on the sample surface using plasma-enhanced chemical vapor deposition (PECVD). Insulating dielectric layer; conventional etching back is performed using reactive ion etching (RIE) to remove the sample surface... Insulating layer, only the sidewalls of the deep holes are retained. An insulating layer ensures insulation performance between electrodes. The electrode pattern is defined by a third photolithography process, and Cr / Pt / Au multilayer metal films are deposited sequentially using electron beam evaporation in physical vapor deposition (PVD). The deep holes are uniformly filled and stable ohmic contacts are formed with the P-type GaN or N-type GaN layers of each light-emitting layer. Finally, excess photoresist and the metal above are removed by a lift-off process to form regular metal wires, leading out four pins A, B, C, and D, ensuring good insulation between the pins.

[0086] S6, Subsequent Processes: The chip undergoes conventional thinning and chemical mechanical polishing to obtain a flat device surface; the chip is divided into independent devices using conventional dicing processes for comprehensive optoelectronic performance testing; the tested and qualified chips are flip-chip bonded to a conventional silicon-based CMOS driver backplane, and interconnection is completed using standard wire bonding packaging processes to finally obtain a high-reliability full-color Micro-LED device.

[0087] The full-color Micro-LED device prepared in this embodiment has a mild process and high fault tolerance. The luminous efficiency of the blue sub-pixel is ≥70lm / W, the luminous efficiency of the green sub-pixel is ≥100lm / W, the luminous efficiency of the red sub-pixel is ≥25lm / W, the pixel density can reach 2000PPI, and the overall device yield is ≥92%, which meets the requirements of stability and cost control for conventional high-end display scenarios such as high-definition TVs and tablet computers.

[0088] Finally, it should be noted that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for fabricating InGaN full-color Micro-LED devices based on ion implantation, characterized in that, Includes the following steps: S1, Epitaxial wafer preparation: An epitaxial substrate is provided, and an InGaN-based red, green, and blue tri-color light-emitting structure stacked epitaxial wafer is sequentially grown on the substrate by metal-organic chemical vapor deposition. The stacked epitaxial wafer includes, from bottom to top, a low-temperature nucleation layer, an undoped GaN layer, an N-type GaN layer, a blue InGaN multiple quantum well light-emitting layer, an electron blocking layer, a P-type GaN layer, a green InGaN multiple quantum well light-emitting layer and its corresponding P-type GaN layer, and a red InGaN multiple quantum well light-emitting layer and its corresponding P-type GaN layer. S2, ion implantation for electrical isolation, defining pixel area patterns through photolithography, implanting specific ions in the isolation areas between pixels to form a high-resistivity insulating layer, dividing the stacked epitaxial wafer into independent, individually addressable Micro-LED pixel units; S3, Deep hole etching to prepare contact points. At least two deep holes are etched in each independent pixel unit by photolithography and dry etching processes. The first deep hole is etched to the N-type GaN layer of the green InGaN multi-quantum well light-emitting layer. The second deep hole continues to be etched downward in a selected area within the first deep hole, penetrating the green InGaN multi-quantum well to the N-type GaN layer of the red InGaN multi-quantum well light-emitting layer. S4, Electrode fabrication and interconnection: Deposit an insulating dielectric layer in the deep hole and etch it back; fill the metal through photolithography, physical vapor deposition and lift-off processes to form ohmic contacts and metal wires in each layer. S5, the subsequent processes, involve thinning, polishing, cutting, testing and packaging to obtain a full-color Micro-LED device.

2. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, In step S1, the epitaxial substrate is sapphire, silicon, or GaN substrate; the blue InGaN multiple quantum well light-emitting layer has an emission wavelength of 440-460nm, the green InGaN multiple quantum well light-emitting layer has an emission wavelength of 520-540nm, and the red InGaN multiple quantum well light-emitting layer has an emission wavelength of 610-630nm.

3. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, In step S1, an etch stop layer and a tunnel junction are provided between each layer of the epitaxial wafer in the stacked structure, and the tunnel junction includes an N-terminal structure composed of n-GaN.

4. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, After step S1 and before step S2, there is also a bonding and substrate peeling step: a bonding metal layer is prepared by electron beam evaporation and bonded to the substrate. The bonding temperature is 400-700℃, the bonding pressure is 3000-9000kg, and the bonding time is 10-60 minutes. The epitaxial substrate is then removed using laser lift-off, chemical mechanical polishing, or dry / wet etching processes.

5. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 4, characterized in that, The bonding metal layer is a Cr / Pt / Au multilayer structure, with each layer having a thickness of 300nm, 300nm, and 200nm, and a deposition rate of 0.1-5nm / s.

6. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, In step S2, the specific ion is selected from... , , , or One or more of them.

7. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1 or 6, characterized in that, In step S2, the ion implantation energy is 50-200 keV, and the total implantation dose is... Magnitude.

8. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, In step S3, the dry etching process employs inductively coupled plasma etching.

9. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, In step S4, the insulating dielectric layer is selected from... or The physical vapor deposition is performed by sputtering or electron beam evaporation, and the metal material is a Cr / Pt / Au multilayer thin film.

10. The method for fabricating InGaN full-color Micro-LED devices based on ion implantation according to claim 1, characterized in that, In step S4, the fabricated device has four pins for each pixel: a top contact A for the blue sub-pixel, a top contact B for the green sub-pixel / bottom contact B for the blue sub-pixel, a bottom contact C for the green sub-pixel / top contact C for the red sub-pixel, and a contact D bonded to the backplane. By controlling the potential difference between contacts A and D, different color sub-pixels can be lit in combination.

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