Continuous wave receiving and conditioning circuit

By processing continuous wave signals through a fully differential link and a passive bandpass filter circuit, the amplitude limiting problem of underwater sonar receiving circuits in receiving continuous wave signals is solved, achieving low noise performance and high signal-to-noise ratio, which is suitable for receiving continuous wave underwater sonar signals.

CN121578281APending Publication Date: 2026-02-27ZHONG SHENG HAI YANG ZHUANG BEI (ZHE JIANG) YOU XIAN GONG SI
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Patent Information

Application Number
CN202511912722.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-18
Publication Date
2026-02-27

AI Technical Summary

Technical Problem

Existing underwater sonar receiving circuits have low isolation between receiving and transmitting continuous wave signals, resulting in excessively strong received signals. This makes it easy for the preamplifier circuit to limit the signal, and the adjustable gain circuit is not very effective, making it difficult to maintain low noise levels.

Method used

The continuous wave receiver conditioning circuit employs a fully differential link, including a signal input terminal, a signal output terminal, a power supply module, an impedance matching module, a pre-stage differential instrumentation amplifier module, a passive bandpass filter module, and a level conversion module. Signal processing is performed through the fully differential instrumentation amplifier and the passive bandpass filter. Combined with a high PSRR and low-noise LDO power supply, the power supply filtering network is optimized to reduce power supply noise.

Benefits of technology

Maintaining low noise performance without amplitude limiting improves the signal-to-noise ratio, effectively filters out out-of-band noise, enhances output drive capability, attenuates large signals to the sampling range of the ADC chip, and improves the common-mode interference immunity and signal gain of the receiving system.

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Abstract

The invention provides a continuous wave receiving and conditioning circuit, which is used for performing low-noise amplification and filtering on a continuous wave analog signal received by a transducer, and then inputting the continuous wave analog signal into an analog-to-digital converter (ADC) for conversion. Comprising a signal input end, a signal output end, a power supply module, an impedance matching module, a front-stage differential instrument amplification module, a passive band-pass filtering module and a level conversion module. The signal input end, the impedance matching module, the front-stage differential instrument amplification module, the passive band-pass filtering module, the level conversion module and the signal output end are connected in sequence, and the power supply module is used for supplying power to the front-stage differential instrument amplification module and the level conversion module. According to the invention, the preceding stage adopts a fully differential instrument operational amplifier, so that signals can be effectively amplified without amplitude limiting, the influence of post-stage noise on the preceding stage can be reduced, and the signal-to-noise ratio is effectively improved; a passive band-pass filter circuit is adopted in the middle to effectively filter out-of-band noise; the post-stage level conversion module not only can improve the output driving capability, but also can attenuate a large signal to a sampling range of the ADC.
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Description

Technical Field

[0001] This invention relates to the field of underwater acoustic signal processing technology, and in particular to a continuous wave receiving conditioning circuit. Background Technology

[0002] A typical underwater sonar receiving circuit consists of a fixed-gain amplifier circuit, a filter circuit, and an adjustable-gain circuit. The fixed-gain amplifier circuit generally uses a low-noise instrumentation amplifier. The low-noise characteristic is achieved by configuring the pre-amplifier to a high gain. This type of circuit is suitable for receiving pulsed sonar signals, where signal reception and transmission are staggered in time, and the received signal is generally a weak signal.

[0003] However, the receiver is also operating simultaneously with the transmission of continuous waves. The isolation between transmission and reception is low, resulting in a relatively strong received signal. If a high-gain preamplifier circuit is used, amplitude limiting will occur. In addition, the received signal of continuous waves includes not only the echo reflected from the object but also a large signal directly generated by the transmitting sonar. Therefore, the received signal is always a large signal, making adjustable gain circuits less useful. Summary of the Invention

[0004] (a) Technical problems to be solved

[0005] Based on this, the present invention provides a continuous wave receiving conditioning circuit that can maintain low noise performance without amplitude limiting, and is suitable for continuous wave underwater sonar signal receiving scenarios.

[0006] (II) Technical Solution

[0007] To achieve the above objectives, the present invention provides a continuous wave receiving conditioning circuit, comprising: a signal input terminal, a signal output terminal, a power supply module, an impedance matching module, a pre-stage differential instrumentation amplifier module, a passive bandpass filter module, and a level conversion module; the signal input terminal, the impedance matching module, the pre-stage differential instrumentation amplifier module, the passive bandpass filter module, the level conversion module, and the signal output terminal are connected sequentially; the power supply module is used to supply power to the pre-stage differential instrumentation amplifier module and the level conversion module; the signal input terminal is used to receive the input of the transducer continuous wave signal; the signal output terminal is used to transmit the output signal of the receiving conditioning circuit to the ADC analog-to-digital converter;

[0008] The impedance matching module includes capacitors C5 and C7, resistors R5 and R11, and diodes D1 and D2; the pre-amplifier differential instrumentation amplifier module includes a fully differential instrumentation amplifier INA851RGTR, resistor R7, and capacitors C1 and C9; the passive bandpass filter module includes resistors R1, R6, R12, and R13, and capacitors C2, C3, C10, C11, and C6; the level conversion module includes an operational amplifier THS4551, resistors R2, R3, R4, R8, R9, R10, and R14, and capacitors C4 and C8.

[0009] In the impedance matching module, one end of resistor R5 and diode D1 is grounded, and the other end of resistor R5 and diode D1 is connected to pin 1 of the fully differential instrumentation amplifier in the front-stage differential instrumentation amplifier module and one end of capacitor C5. The other end of capacitor C5 is connected to the negative terminal of the signal input terminal. Symmetrically, one end of resistor R11 and diode D2 is grounded, and the other end of resistor R11 and diode D2 is connected to pin 4 of the fully differential instrumentation amplifier in the front-stage differential instrumentation amplifier module and one end of capacitor C7. The other end of capacitor C7 is connected to the positive terminal of the signal input terminal.

[0010] In the pre-amplifier differential instrumentation amplifier module, pin 13 of the fully differential instrumentation amplifier is grounded; pins 14 and 16 are connected to the +15V power supply module, and pins 7, 5, and 17 are connected to the -15V power supply module; pin 2 is connected to pin 3 through resistor R7; one end of capacitor C1 is connected to pin 15, and the other end of C1 is connected to pin 11 and one end of capacitor C2 of the passive bandpass filter module; one end of capacitor C9 is connected to pin 6, and the other end of C9 is connected to pin 10 and one end of capacitor C10 of the passive bandpass filter module.

[0011] In the passive bandpass filter module, one end of C2 is connected to the other end of C1 in the pre-stage differential instrumentation amplifier module, the other end of C2 is connected to one end of R1 and R6, the other end of R6 is grounded, the other end of R1 is connected to C3, C6 and one end of R8 in the level conversion module, and the other end of C3 is grounded; symmetrically, one end of C10 is connected to the other end of C9 in the pre-stage differential instrumentation amplifier module, the other end of C10 is connected to one end of R12 and R13, the other end of R13 is grounded, the other end of R12 is connected to C11, one end of R10 in the level conversion module and the other end of C6, and the other end of C11 is grounded;

[0012] In the level conversion module, one end of R8 is connected to one end of C6 and C3 in the passive bandpass filter module and the other end of R1. The other end of R8 is connected to pin 8 of the operational amplifier and one end of R2. The other end of R2 is connected to pin 5 of the operational amplifier and one end of R3. The other end of R3 is connected to the negative terminal of the signal output and one end of C4. The other end of C4 is grounded. One end of R10 is connected to the other end of C6 and R12 in the passive bandpass filter module and one end of C11. The other end of R10 is connected to pin 1 of the operational amplifier and one end of R14. The other end of R14 is connected to pin 4 of the operational amplifier and one end of R9. The other end of R9 is connected to the positive terminal of the signal output and one end of C8. The other end of C8 is grounded. Pin 6 of the operational amplifier is grounded. Pin 7 is connected to the +5.1V of the power supply module through R4. Pin 3 is connected to the +5.1V of the power supply module. Pin 2 is connected to the +2.5V of the power supply module.

[0013] Specifically, in the power supply module, ±16V power is provided externally. The +16V power is output as +15V through an LDO low-dropout linear regulator to provide positive power to the instrumentation amplifier in the front-end differential instrumentation amplifier module. The -16V power is output as negative power to the instrumentation amplifier in the front-end differential instrumentation amplifier module through an LDO. At the same time, the +16V power is output as +6V through a DC / DC power supply module, and then converted to +5.1V by an LDO to provide power to the operational amplifier in the level conversion module. The +5.1V is output as 2.5V through a reference voltage chip to provide common-mode voltage to the operational amplifier in the level conversion module.

[0014] Specifically, in the impedance matching module, the values ​​of capacitors C5 and C7 are set to 100nF, and the values ​​of resistors R5 and R11 are set to 10kΩ.

[0015] Specifically, in the pre-stage differential instrumentation amplification module, the values ​​of capacitors C1 and C9 are set to 120pF, and the value of resistor R7 is set to 240Ω.

[0016] Specifically, in the passive bandpass filter module, the values ​​of capacitors C2 and C10 are set to 22nF, the values ​​of capacitors C3 and C11 are set to 2.2nF, the value of capacitor C6 is set to 47pF, the values ​​of resistors R6 and R13 are set to 1.1kΩ, and the values ​​of resistors R1 and R12 are set to 499Ω.

[0017] Specifically, in the level conversion module, the values ​​of resistors R8 and R10 are set to 3kΩ, the values ​​of resistors R2 and R14 are set to 560Ω, the values ​​of resistors R3 and R9 are set to 499Ω, the value of resistor R4 is set to 5.1kΩ, and the values ​​of capacitors C4 and C8 are set to 2.2nF.

[0018] Specifically, when the signal output terminal is input to the ADC in the form of a single-ended signal, the total input range of the ADC is 0 to 5V; when the signal output terminal is input to the ADC in the form of a differential signal, the total input range of the ADC is -5V to +5V.

[0019] (III) Beneficial Effects

[0020] As can be seen from the above technical solution, the beneficial effects of the continuous wave receiving conditioning circuit proposed in this invention are as follows:

[0021] This invention employs a fully differential link, which effectively improves the common-mode interference rejection capability and doubles the gain. The front-end uses a fully differential instrumentation amplifier, which can effectively amplify the signal without limiting the amplitude and reduce the impact of noise from the subsequent stage on the front-end, thus effectively improving the signal-to-noise ratio. The intermediate stage uses a passive bandpass filter circuit to effectively filter out out-of-band noise. The subsequent level conversion module can improve the output drive capability and attenuate large signals to the sampling range of the ADC chip. Attached Figure Description

[0022] The features and advantages of the invention will be more clearly understood by referring to the accompanying drawings, which are schematic and should not be construed as limiting the invention in any way. In the drawings:

[0023] Figure 1 This is a schematic diagram of the continuous wave receiving conditioning circuit according to an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of the power module structure according to an embodiment of the present invention;

[0025] Figure 3 This is a circuit diagram of the impedance matching module according to an embodiment of the present invention;

[0026] Figure 4 This is a circuit diagram of the front-stage differential instrumentation amplifier module according to an embodiment of the present invention;

[0027] Figure 5 This is a circuit diagram of the passive bandpass filter module according to an embodiment of the present invention;

[0028] Figure 6 This is a circuit diagram of the level conversion module according to an embodiment of the present invention;

[0029] Figure 7 This is a circuit diagram of the receiving conditioning circuit according to an embodiment of the present invention;

[0030] Figure 8 This is a physical diagram of the receiving conditioning circuit according to an embodiment of the present invention - the front of the PCB board;

[0031] Figure 9 This is a physical diagram of the receiving conditioning circuit of this invention - the reverse side of the PCB board. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] like Figure 1 As shown, this invention provides a continuous wave receiver conditioning circuit for low-noise amplification and filtering of continuous wave analog signals received by a transducer, followed by input to an ADC (Analog-to-Digital Converter) for conversion. The circuit includes: a signal input terminal, a signal output terminal, a power supply module, an impedance matching module, a pre-stage differential instrumentation amplifier module, a passive bandpass filter module, and a level conversion module. The signal input terminal, impedance matching module, pre-stage differential instrumentation amplifier module, passive bandpass filter module, level conversion module, and signal output terminal are connected sequentially. The power supply module provides power to the pre-stage differential instrumentation amplifier module and the level conversion module.

[0034] The signal input terminal is used to receive the input of the transducer's continuous wave signal; the signal output terminal is used to transmit the output signal of the receiving conditioning circuit to the ADC.

[0035] like Figure 2 As shown, the power supply module converts the ±16V external power supply to ±15V, 5.1V and 2.5V; among them, ±15V and 5.1V are used to power the amplifier, and 2.5V is used to raise the common-mode voltage, raising the output signal to the range of the ADC input signal.

[0036] In this embodiment of the invention, an external ±16V power supply is provided. A low-dropout linear regulator (LDO) with high PSRR (Power Supply Rejection Ratio) and ultra-low noise is selected and filtered by a capacitor to power the amplifier. Simultaneously, a high-precision, low-noise reference power supply chip is used to provide a 2.5V common-mode voltage to the output of the operational amplifier. Specifically, the +16V power supply outputs +15V through the LDO to provide positive power to the preamplifier (the instrumentation amplifier in the preamplifier differential instrumentation amplifier module), and the -16V power supply outputs negative power to the preamplifier through the LDO. Simultaneously, the +16V power supply outputs +6V through a DC / DC power module, and then the +6V is converted to +5.1V by the LDO to power the subsequent amplifier (the operational amplifier in the level conversion module). The +5.1V is then output as a high-precision 2.5V through a reference voltage chip to provide a common-mode voltage to the subsequent amplifier.

[0037] This invention reduces power supply noise in the receiving conditioning circuit by selecting a high PSRR and low noise LDO, arranging a suitable power supply filtering network, and optimizing the PCB layout and routing.

[0038] like Figure 3As shown, the impedance matching module includes capacitors C5 and C7, resistors R5 and R11, and diodes D1 and D2. One end of resistor R5 and diode D1 is grounded, and the other end of resistor R5 and diode D1 is connected to pin 1 (IN-) of the fully differential instrumentation amplifier INA851RGTR in the pre-amplifier differential instrumentation amplifier module and one end of capacitor C5. The other end of capacitor C5 is connected to the negative terminal of the signal input. Symmetrically, one end of resistor R11 and diode D2 is grounded, and the other end of resistor R11 and diode D2 is connected to pin 4 (IN+) of the fully differential instrumentation amplifier INA851RGTR in the pre-amplifier differential instrumentation amplifier module and one end of capacitor C7. The other end of capacitor C7 is connected to the positive terminal of the signal input. In this embodiment, the values ​​of capacitors C5 and C7 are set to 100nF, and the values ​​of resistors R5 and R11 are set to 10kΩ.

[0039] An impedance matching module is used to match the receiving transducer. Capacitors are used for DC signal isolation and filtering. Diodes are used for input signal limiting. The input signal is obtained by voltage division between the resistor and the internal resistance of the receiving transducer. When the resistor value is small, the resistor's thermal noise is low, but the signal loss is high and the signal-to-noise ratio is poor. When the resistor value is too large, the resistor's thermal noise is high, which will reduce the sensitivity of the receiving system. In this embodiment of the invention, considering both the signal-to-noise ratio and sensitivity requirements, the values ​​of resistors R5 and R11 are set to 10kΩ.

[0040] like Figure 4 As shown, the pre-amplifier differential instrumentation amplifier module includes: a fully differential instrumentation amplifier INA851RGTR, resistor R7, and capacitors C1 and C9. Pin 13 (VOCM) of the fully differential instrumentation amplifier is grounded; pins 14 (VS+) and 16 (VCLAMP+) are connected to the +15V power supply of the power module; pins 7 (VS-), 5 (VCLAMP-), and 17 (EP) are connected to the -15V power supply of the power module; pin 2 (RG1) is connected to pin 3 (RG2) via R7; one end of C1 is connected to pin 15 (FDA_IN-), and the other end of C1 is connected to pin 11 (OUT+) and one end of C2 of the passive bandpass filter module; one end of C9 is connected to pin 6 (FDA_IN+), and the other end of C9 is connected to pin 10 (OUT-) and one end of C10 of the passive bandpass filter module. In this embodiment, the values ​​of capacitors C1 and C9 are set to 120pF, and the value of resistor R7 is set to 240Ω.

[0041] The pre-amplifier differential instrumentation amplifier module uses a fully differential instrumentation amplifier. Compared with ordinary amplifiers, fully differential instrumentation amplifiers have the advantages of low noise, high bandwidth, high impedance, and simple circuit design. The receiving transducer impedance is approximately 4kΩ, which is relatively high. Therefore, the instrumentation amplifier selected is the INA851RGTR, which has low current noise (0.8pA / √Hz), input voltage noise (3.2nV / √Hz), and output voltage noise (52nV / √Hz). The instrumentation amplifier has an input impedance of 100GΩ and a bandwidth of 15MHz at gain 1, meeting the operating frequency requirements of underwater acoustic signals. The instrumentation amplifier uses differential input and differential output. Compared with common single-ended output instrumentation amplifiers, differential output provides an additional 6dB of gain without limiting. This 6dB gain effectively reduces the impact of back-end noise on the front end, improving the signal-to-noise ratio. Testing revealed that the equivalent short-circuit input noise of the pre-amplifier using a fully differential instrumentation amplifier is 1.6nV / √Hz lower than that of a single-ended instrumentation amplifier. The fully differential instrumentation amplifier can be powered by ±4V to ±18V. In this embodiment, ±15V is used. Using a higher voltage power supply can increase the amplification factor. When the peak-to-peak value of the input signal is 2Vpp, the maximum unlimited amplification factor is 27.2 times when powered by ±15V. In this embodiment, the amplification factor is configured to 26 times through the gain resistor R7.

[0042] like Figure 5 As shown, the passive bandpass filter module includes resistors R1, R6, R12, R13 and capacitors C2, C3, C10, C11, C6; one end of C2 is connected to the other end of C1 in the pre-stage differential instrumentation amplifier module, the other end of C2 is connected to one end of R1 and R6, the other end of R6 is grounded, the other end of R1 is connected to C3, C6 and one end of R8 in the level conversion module, and the other end of C3 is grounded; symmetrically, one end of C10 is connected to the other end of C9 in the pre-stage differential instrumentation amplifier module, the other end of C10 is connected to one end of R12 and R13, the other end of R13 is grounded, the other end of R12 is connected to C11, one end of R10 in the level conversion module and the other end of C6, and the other end of C11 is grounded. In this embodiment, the values ​​of capacitors C2 and C10 are set to 22nF, the values ​​of capacitors C3 and C11 are set to 2.2nF, the value of capacitor C6 is set to 47pF, the values ​​of resistors R6 and R13 are set to 1.1kΩ, and the values ​​of resistors R1 and R12 are set to 499Ω.

[0043] The passive bandpass filter module uses resistors and capacitors to build a filter network, achieving a 1.2dB attenuation at the center frequency and a bandwidth of approximately 90kHz. Compared to active filters, passive filters offer advantages such as lower noise and stronger anti-interference capabilities. Testing shows that the passive filter circuit has 3.6nV / √Hz lower equivalent front-end short-circuit noise than the active filter circuit.

[0044] like Figure 6As shown, the level conversion module includes: an operational amplifier, resistors R2, R3, R4, R8, R9, R10, and R14, and capacitors C4 and C8. One end of R8 connects to one end of C6 and C3 in the passive bandpass filter module and the other end of R1. The other end of R8 connects to pin 8 (IN+) of the operational amplifier and one end of R2. The other end of R2 connects to pin 5 (OUT-) of the operational amplifier and one end of R3. The other end of R3 connects to the negative terminal of the signal output and one end of C4. The other end of C4 is grounded. One end of R10 connects to the other end of C6, R12, and C11 in the passive bandpass filter module. The other end of R10 connects to pin 1 (IN-) of the operational amplifier and one end of R14. The other end of R14 connects to pin 4 (OUT+) of the operational amplifier and one end of R9. The other end of R9 connects to the positive terminal of the signal output and one end of C8. The other end of C8 is grounded. Pin 6 (VS-) of the operational amplifier is grounded. Pin 7 (PD) is connected to the +5.1V of the power supply module through R4. Pin 3 (VS+) is connected to the +5.1V of the power supply module. Pin 2 (VOCM) is connected to the +2.5V of the power supply module. In this embodiment, the values ​​of resistors R8 and R10 are set to 3kΩ, the values ​​of resistors R2 and R14 are set to 560Ω, the values ​​of resistors R3 and R9 are set to 499Ω, the value of resistor R4 is set to 5.1kΩ, and the values ​​of capacitors C4 and C8 are set to 2.2nF.

[0045] The level conversion module includes a low-noise operational amplifier (OPA) THS4551, powered by a single 5.1V supply. This OPA converts the pre-amplified underwater acoustic continuous wave signal into an input signal acceptable to the ADC. The ADC chip has two input pins (from its output), which can accept either differential or single-ended signals. Both pins have an input range of 0–5V, and the total input is the difference between the two pins. With single-ended input, the total input range is 0–5V; with differential input, it ranges from -5V to +5V. The level conversion module uses an OPA with low noise, high bandwidth, high common-mode rejection ratio (CMRR), and high differential slew rate to improve the output drive capability of the receiving circuit.

[0046] The circuit diagram of the receiving conditioning circuit in this embodiment of the invention is as follows: Figure 7 As shown. This invention balances gain and low noise, achieving continuous signal amplification and filtering. Testing revealed that the equivalent short-circuit input noise density of the receiving conditioning circuit in this embodiment is approximately 5nV / √Hz (millivolts per hertz), and the maximum signal input is 2.09Vpp without amplitude limiting.

[0047] The power consumption of a single channel in the receiving conditioning circuit is related to the amplitude of the input signal. When a large signal is continuously input, heat dissipation measures are required. In this embodiment, a double-sided PCB is used, such as... Figure 8-9As shown, receiving and conditioning circuits are arranged on both sides of the PCB. Heat sinks are installed on both sides of the PCB to conduct heat and dissipate heat, while fans are used to assist in heat dissipation.

[0048] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A continuous wave receiving conditioning circuit, characterized in that, include: The system comprises a signal input terminal, a signal output terminal, a power supply module, an impedance matching module, a pre-amplifier differential instrumentation module, a passive bandpass filter module, and a level conversion module. These components are connected sequentially. The power supply module provides power to the pre-amplifier differential instrumentation module and the level conversion module. The signal input terminal receives the continuous wave signal from the transducer. The signal output terminal is used to transmit the output signal of the receiving conditioning circuit to the ADC analog-to-digital converter; The impedance matching module includes capacitors C5 and C7, resistors R5 and R11, and diodes D1 and D2; the pre-amplifier differential instrumentation amplifier module includes a fully differential instrumentation amplifier INA851RGTR, resistor R7, and capacitors C1 and C9; the passive bandpass filter module includes resistors R1, R6, R12, and R13, and capacitors C2, C3, C10, C11, and C6; the level conversion module includes an operational amplifier THS4551, resistors R2, R3, R4, R8, R9, R10, and R14, and capacitors C4 and C8. In the impedance matching module, one end of resistor R5 and diode D1 is grounded, and the other end of resistor R5 and diode D1 is connected to pin 1 of the fully differential instrumentation amplifier in the front-stage differential instrumentation amplifier module and one end of capacitor C5. The other end of capacitor C5 is connected to the negative terminal of the signal input terminal. Symmetrically, one end of resistor R11 and diode D2 is grounded, and the other end of resistor R11 and diode D2 is connected to pin 4 of the fully differential instrumentation amplifier in the front-stage differential instrumentation amplifier module and one end of capacitor C7. The other end of capacitor C7 is connected to the positive terminal of the signal input terminal. In the pre-amplifier differential instrumentation amplifier module, pin 13 of the fully differential instrumentation amplifier is grounded; pins 14 and 16 are connected to the +15V power supply module, and pins 7, 5, and 17 are connected to the -15V power supply module; pin 2 is connected to pin 3 through resistor R7; one end of capacitor C1 is connected to pin 15, and the other end of C1 is connected to pin 11 and one end of capacitor C2 of the passive bandpass filter module; one end of capacitor C9 is connected to pin 6, and the other end of C9 is connected to pin 10 and one end of capacitor C10 of the passive bandpass filter module. In the passive bandpass filter module, one end of C2 is connected to the other end of C1 in the pre-stage differential instrumentation amplifier module, the other end of C2 is connected to one end of R1 and R6, the other end of R6 is grounded, the other end of R1 is connected to C3, C6 and one end of R8 in the level conversion module, and the other end of C3 is grounded; symmetrically, one end of C10 is connected to the other end of C9 in the pre-stage differential instrumentation amplifier module, the other end of C10 is connected to one end of R12 and R13, the other end of R13 is grounded, the other end of R12 is connected to C11, one end of R10 in the level conversion module and the other end of C6, and the other end of C11 is grounded; In the level conversion module, one end of R8 is connected to one end of C6 and C3 in the passive bandpass filter module and the other end of R1. The other end of R8 is connected to pin 8 of the operational amplifier and one end of R2. The other end of R2 is connected to pin 5 of the operational amplifier and one end of R3. The other end of R3 is connected to the negative terminal of the signal output and one end of C4. The other end of C4 is grounded. One end of R10 is connected to the other end of C6 and R12 in the passive bandpass filter module and one end of C11. The other end of R10 is connected to pin 1 of the operational amplifier and one end of R14. The other end of R14 is connected to pin 4 of the operational amplifier and one end of R9. The other end of R9 is connected to the positive terminal of the signal output and one end of C8. The other end of C8 is grounded. Pin 6 of the operational amplifier is grounded. Pin 7 is connected to the +5.1V of the power supply module through R4. Pin 3 is connected to the +5.1V of the power supply module. Pin 2 is connected to the +2.5V of the power supply module.

2. The method according to claim 1, characterized in that, In the power supply module, ±16V power is provided externally. The +16V power is output as +15V through an LDO low-dropout linear regulator to provide positive power to the instrumentation amplifier in the front-end differential instrumentation amplifier module. The -16V power is output as negative power to the instrumentation amplifier in the front-end differential instrumentation amplifier module through an LDO. At the same time, the +16V power is output as +6V through a DC / DC power supply module, and then converted to +5.1V by an LDO to provide power to the operational amplifier in the level conversion module. The +5.1V is output as 2.5V through a reference voltage chip to provide common-mode voltage to the operational amplifier in the level conversion module.

3. The method according to claim 2, characterized in that, In the impedance matching module, the values ​​of capacitors C5 and C7 are set to 100nF, and the values ​​of resistors R5 and R11 are set to 10kΩ.

4. The method according to claim 3, characterized in that, In the pre-stage differential instrumentation amplification module, the values ​​of capacitors C1 and C9 are set to 120pF, and the value of resistor R7 is set to 240Ω.

5. The method according to claim 4, characterized in that, In the passive bandpass filter module, the values ​​of capacitors C2 and C10 are set to 22nF, the values ​​of capacitors C3 and C11 are set to 2.2nF, the value of capacitor C6 is set to 47pF, the values ​​of resistors R6 and R13 are set to 1.1kΩ, and the values ​​of resistors R1 and R12 are set to 499Ω.

6. The method according to claim 5, characterized in that, In the level conversion module, the values ​​of resistors R8 and R10 are set to 3kΩ, the values ​​of resistors R2 and R14 are set to 560Ω, the values ​​of resistors R3 and R9 are set to 499Ω, the value of resistor R4 is set to 5.1kΩ, and the values ​​of capacitors C4 and C8 are set to 2.2nF.

7. The method according to claim 6, characterized in that, When the signal output terminal is input to the ADC in the form of a single-ended signal, the total input range of the ADC is 0 to 5V; when the signal output terminal is input to the ADC in the form of a differential signal, the total input range of the ADC is -5V to +5V.