GPU parallel multi-processing design method for radar display and control terminal

Abstract

The invention belongs to the technical field of GPU parallel multi-processing. The invention provides a radar display and control terminal GPU parallel multi-processing method. According to the embodiment of the invention, multiple paths of to-be-processed data are obtained through a multi-channel data acquisition device, data integration processing is carried out on a CPU, and the multiple paths of data are converted into multiple pieces of single data; and copying the data from the CPU to the GPU to wait for processing. In the GPU, firstly, storage space distribution is carried out according to the number of data to be processed, each piece of data corresponds to one thread block, each thread in each thread block corresponds to one kernel program, and therefore processing is carried out. And after the processing is finished, a processing result is returned back to the CPU, and then the plurality of single-path data are decomposed and converted into a plurality of data results after integration processing, so that the processing process is completed.

Description

Technical Field

[0001] This disclosure relates to the field of GPU parallel multiprocessing technology, and in particular to a GPU parallel multiprocessing design method for a radar display and control terminal. Background Technology

[0002] The radar display and control terminal is a crucial component of a radar system. As the human-machine interface, it is primarily responsible for controlling the radar system and displaying information such as radar echoes and radar status. Traditional radar display and control terminals are mainly implemented using dedicated hardware, resulting in poor versatility, long development cycles, and high manufacturing costs. With the rapid development of computer technology, image processing technology, and software technology, using general-purpose computers as radar display and control terminals has become a trend.

[0003] The volume of data acquired and processed by radar is increasing, which places higher demands on data processing and analysis. There is an urgent need for fast, effective, and high-performance data processing, and the analysis and processing capabilities required for high-performance data processing are of great significance.

[0004] Traditional processing involves step-by-step processing. With the rise of multiprocessors and cloud computing, this processing has been parallelized, improving speed. However, because analytical processing involves intensive numerical computation, using multiprocessors and cloud computing to process this type of data wastes a significant amount of the logical analysis resources of these computing facilities.

[0005] Therefore, it is necessary to improve one or more of the problems existing in the above-mentioned related technical solutions.

[0006] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0007] The purpose of this disclosure is to provide a parallel multiprocessing design method for a radar display and control terminal GPU, thereby overcoming, at least to some extent, one or more problems caused by the limitations and defects of related technologies.

[0008] According to embodiments of this disclosure, a parallel multiprocessing design method for a radar display and control terminal GPU is provided, comprising: The CPU acquires multiple radar data streams and integrates them into a single data block. The integrated block of data is copied from the CPU to the GPU's display memory; In the GPU, storage space is allocated according to the amount of data. Each data block corresponds to a thread block, and each thread block contains multiple threads. Each thread executes the corresponding kernel program to perform parallel data processing. Once the data processing is complete, the processing results are copied from the GPU back to the CPU; On the CPU side, the processing result is decomposed into multiple independent processed data blocks.

[0009] Furthermore, the step of acquiring multiple radar data streams at the CPU level and integrating them into a single data block includes: Multiple radar data streams are acquired using a multi-channel data acquisition device; The CPU integrates multiple data streams into a unified single-block data format.

[0010] Furthermore, the step of allocating storage space in the GPU based on the amount of data includes: Based on the amount of data n to be processed, allocate n storage blocks in the GPU; Each storage block corresponds to a thread block, and each thread block contains one or more threads, with each thread executing a kernel program.

[0011] Furthermore, each thread block contains multiple threads, and each thread executes a corresponding kernel program for parallel data processing, including the following steps: By utilizing the multiprocessor architecture of GPUs and a grid structure composed of multiple thread blocks, parallel processing of multiple data streams can be achieved. Each thread independently processes its corresponding data portion to complete numerical calculations or image processing tasks.

[0012] Furthermore, GPU parallel processing is implemented based on a heterogeneous general-purpose computing programming architecture, preferably the NVIDIA CUDA architecture.

[0013] According to a second aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the radar display and control terminal GPU parallel multiprocessing method described in any of the above embodiments.

[0014] According to a third aspect of the present disclosure, an electronic device is provided, comprising: Processor; and Memory for storing the executable instructions of the processor; The processor is configured to execute the steps of the GPU parallel multiprocessing method for radar display and control terminal described in any of the above embodiments by executing the executable instructions.

[0015] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects: In the embodiments of this disclosure, the aforementioned parallel multiprocessing method for radar display and control terminals using GPUs involves two aspects. First, multiple channels of data to be processed are acquired through a multi-channel data acquisition device. The CPU performs data integration processing, converting the multiple data channels into multiple single data blocks. The data is then copied from the CPU to the GPU for processing. On the GPU, storage space is first allocated according to the number of data channels to be processed. Each data channel corresponds to a thread block, and each thread within a thread block corresponds to a kernel program for processing. After processing, the results are sent back to the CPU. Then, the multiple single data channels are decomposed and transformed into multiple integrated data results, completing the processing. Second, this method integrates multiple radar data channels into a single data block, and then utilizes a heterogeneous general-purpose computing programming architecture for data processing on the GPU. This achieves parallel processing of multiple radar data channels, improving data processing efficiency and increasing the utilization rate of GPU multiprocessor resources.

[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0018] Figure 1 This diagram illustrates the steps of a GPU parallel multiprocessing method for a radar display and control terminal in an exemplary embodiment of this disclosure. Figure 2 This diagram illustrates a simplified flowchart of parallel processing of large amounts of radar data based on CUDA technology in an exemplary embodiment of this disclosure. Figure 3 This diagram illustrates a specific implementation of an exemplary embodiment of the present disclosure. Figure 4 This illustration shows a schematic diagram of a computer-readable storage medium according to an exemplary embodiment of the present disclosure; Figure 5 This diagram illustrates an electronic device according to an exemplary embodiment of the present disclosure. Detailed Implementation

[0019] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0020] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0021] This example implementation first provides a parallel multiprocessing method for a radar display and control terminal using a GPU. This method can be applied to a terminal device, such as a mobile phone, personal digital assistant, laptop, tablet, smartwatch, or other mobile terminal [adjusted flexibly according to specific circumstances, such as a server]. Reference Figure 1 As shown, the method may include the following steps: Step S101: Acquire multiple radar data streams on the CPU and integrate them into a single data block; Step S102: Copy the integrated single block of data from the CPU to the GPU's display memory; Step S103: Allocate storage space in the GPU according to the amount of data. Each data block corresponds to a thread block. Each thread block contains multiple threads. Each thread executes the corresponding Kernel program to perform parallel data processing. Step S104: After the data processing is complete, copy the processing results from the GPU back to the CPU; Step S105: On the CPU side, the processing result is decomposed into multiple independent processed data blocks.

[0022] The aforementioned parallel multiprocessing method using a GPU in a radar display and control terminal achieves two main objectives. First, multiple channels of data are acquired through a multi-channel data acquisition device. The CPU integrates and processes this data, converting it into multiple single data blocks. The data is then copied from the CPU to the GPU for further processing. On the GPU, storage space is allocated based on the number of data points. Each data point corresponds to a thread block, and each thread within a thread block corresponds to a kernel program for processing. After processing, the results are sent back to the CPU. Then, the multiple single data points are decomposed and transformed into multiple integrated data results, completing the processing. Second, this method integrates multiple radar data points into a single data block and then utilizes a heterogeneous general-purpose computing architecture for data processing on the GPU. This achieves parallel processing of multiple radar data points, improving data processing efficiency and increasing the utilization of GPU multiprocessor resources.

[0023] Below, we will refer to Figures 1 to 3 The steps of the method described above in this example embodiment will be explained in more detail.

[0024] In one embodiment, traditional radar data processing is done step by step. With the rise of multiprocessor technology, the multiprocessor characteristics of GPUs can be used to achieve parallel processing of multiple data streams.

[0025] To achieve the above objectives, the present invention includes the following: Figure 2 The diagram shows a simplified flowchart of parallel processing of large amounts of radar data based on CUDA technology.

[0026] 1. First, the CPU acquires the data to be processed and copies it to the GPU for processing.

[0027] 2. Based on the amount of data, allocate storage space on the GPU, that is, allocate storage blocks according to the amount of data. For ease of explanation, the number of monitoring sources is n. Therefore, n storage blocks can be allocated on the GPU. Each storage block corresponds to storing one piece of data. From the relationship between threads and storage blocks in CUDA, we know that each storage block corresponds to one thread block. Figure 2 As we can see, each piece of data corresponds to a storage block, each storage block corresponds to a thread block, and each piece of data corresponds to a processing thread within the thread block.

[0028] 3. Once the GPU storage space allocation is complete, relevant data processing algorithms are used to perform calculations on each processing thread to complete the relevant data processing operations.

[0029] 4. After data processing is complete, copy the experimental results from the GPU back to the CPU, and decompose the single block of data into multiple independent blocks of processed data.

[0030] like Figure 3 The diagram shown is a schematic representation of the specific implementation and application.

[0031] In one specific embodiment, this embodiment illustrates the underlying GPU-accelerated logic of a radar data processing system, primarily used for processing radar target data, track data, and system status information. The following is a detailed description of its underlying logic: I. Data Structure Definition Three core data structures are defined, each used to store different types of data: FirstTarget (Single Target Data) Includes raw target information detected by radar, such as: Azimuth, distance, velocity, altitude, signal-to-noise ratio (SNR), Doppler information, etc.

[0032] Each target also includes coordinate information (x, y, px, py) and GPS time, etc.

[0033] Use the array first_target[FIRSTSECTOR] to store multiple targets.

[0034] secondTarget (track target data) Used to store target trajectory information after tracking processing.

[0035] It includes target ID, track status, alarm area markers, coordinates, speed, altitude, etc.

[0036] Use the array m_secondTarget

[1001] to store multiple tracks.

[0037] TRadarSysStatusStruct (Radar System Status) Store the operating status and parameters of the radar equipment, such as: Operating mode, frequency, beam control, antenna angle, transmit / receive status, etc.

[0038] II. GPU Memory Management Process The system uses CUDA for GPU acceleration, and its memory management process is as follows: 1. GPU memory allocation (cudaMalloc) Allocate memory on the GPU for each of the three data structures: m_GPU_first_target m_GPU_secondTarget m_GPU_TRadarSysStatusStruct 2. Data is copied from the host to the device (cudaMemcpy) Copy data from the host machine to GPU memory using udaMemcpyHostToDevice.

[0039] For example: cpp cudaMemcpy(m_GPU_first_target,&first_target[m], ...,cudaMemcpyDeviceToDevice); 3. GPU processing function calls The data copied to the GPU is processed by calling GPU kernel functions (not shown in the documentation): Processing radar data (FirstTarget) Processing track data (secondTarget) Processing system status data (TRadarSysStatusStruct) 4. Copy the results from the device back to the host (cudaMemcpy) Copy the GPU-processed results back to host memory using cudaMemcpyDeviceToHost.

[0040] For example: cpp cudaMemcpy(&m_Host_first_target, m_GPU_first_target, ...,cudaMemcpyDeviceToHost); 5. GPU memory release (cudaFree) After processing is complete, release the memory allocated on the GPU to prevent memory leaks.

[0041] III. System Logic Summary Data preparation: Prepare radar target, track and system status data on the host (CPU).

[0042] GPU-accelerated processing: Copy the data to the GPU; Perform parallel computations (such as target association, filtering, state updates, etc.) on the GPU. Copy the results back to the host machine.

[0043] Resource cleanup: Free up GPU memory.

[0044] It can be seen that the technical characteristics of the above method are: Heterogeneous computing architecture: CPU is responsible for data management and control flow, while GPU is responsible for high-performance parallel processing.

[0045] Zero-copy optimization: The documentation uses cudaMemcpyDeviceToDevice, which may be used for data transfer in a multi-GPU or unified memory architecture.

[0046] Modular processing: Targets, track targets, and system status are processed separately, facilitating maintenance and expansion.

[0047] It should be noted that although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that these steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps. Furthermore, it is readily understood that these steps may be executed synchronously or asynchronously, for example, in multiple modules / processes / threads.

[0048] In exemplary embodiments of this disclosure, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, can implement the steps of the GPU parallel multiprocessing method for radar display and control terminals described in any of the above embodiments. In some possible implementations, various aspects of the invention can also be implemented as a program product comprising program code, which, when run on a terminal device, causes the terminal device to perform the steps of the various exemplary embodiments of the invention described in the above-described section on the GPU parallel multiprocessing method for radar display and control terminals.

[0049] refer to Figure 4 As shown, a program product 300 for implementing the above-described method according to an embodiment of the present invention is described. It may employ a portable compact disc read-only memory (CD-ROM) and include program code, and may run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto. In this document, the readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0050] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0051] The computer-readable storage medium may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0052] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0053] In exemplary embodiments of this disclosure, an electronic device is also provided, which may include a processor and a memory for storing executable instructions of the processor. The processor is configured to perform the steps of the GPU parallel multiprocessing method for radar display and control terminals described in any of the above embodiments by executing the executable instructions.

[0054] Those skilled in the art will understand that various aspects of the present invention can be implemented as systems, methods, or program products. Therefore, various aspects of the present invention can be specifically implemented in the following forms: entirely in hardware, entirely in software (including firmware, microcode, etc.), or in a combination of hardware and software, collectively referred to herein as “circuit,” “module,” or “system.”

[0055] The following reference Figure 5 To describe an electronic device 600 according to this embodiment of the present invention. Figure 5 The electronic device 600 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of the present invention.

[0056] like Figure 5 As shown, the electronic device 600 is presented in the form of a general-purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different system components (including storage unit 620 and processing unit 610), a display unit 640, etc.

[0057] The storage unit stores program code that can be executed by the processing unit 610, causing the processing unit 610 to perform the steps described in the above-described section of the radar display and control terminal GPU parallel multiprocessing method according to various exemplary embodiments of the present invention. For example, the processing unit 610 can perform, as follows: Figure 1 The steps are shown in the figure.

[0058] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 6201 and / or a cache storage unit 6202, and may further include a read-only memory unit (ROM) 6203.

[0059] The storage unit 620 may also include a program / utility 6204 having a set (at least one) program module 6205, such program module 6205 including but not limited to: an operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0060] Bus 630 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0061] Electronic device 600 can also communicate with one or more external devices 700 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 600, and / or with any device that enables electronic device 600 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 650. Furthermore, electronic device 600 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 660. Network adapter 660 can communicate with other modules of electronic device 600 via bus 630. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0062] Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, or network device, etc.) to execute the above-described radar display and control terminal GPU parallel multiprocessing method according to the embodiments of this disclosure.

[0063] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A parallel multiprocessing method for a radar display and control terminal using a GPU, characterized in that, include: The CPU acquires multiple radar data streams and integrates them into a single data block. The integrated block of data is copied from the CPU to the GPU's display memory; In the GPU, storage space is allocated according to the amount of data. Each data block corresponds to a thread block, and each thread block contains multiple threads. Each thread executes the corresponding kernel program to perform parallel data processing. Once the data processing is complete, the processing results are copied from the GPU back to the CPU; On the CPU side, the processing result is decomposed into multiple independent processed data blocks.

2. The GPU parallel multiprocessing method for radar display and control terminals according to claim 1, characterized in that, The steps of acquiring multiple radar data streams on the CPU side and integrating them into a single data block include: Multiple radar data streams are acquired using a multi-channel data acquisition device; The CPU integrates multiple data streams into a unified single-block data format.

3. The GPU parallel multiprocessing method for radar display and control terminals according to claim 2, characterized in that, The steps involved in allocating storage space in a GPU based on the amount of data include: Based on the amount of data n to be processed, allocate n storage blocks in the GPU; Each storage block corresponds to a thread block, and each thread block contains one or more threads, with each thread executing a kernel program.

4. The GPU parallel multiprocessing method for radar display and control terminals according to claim 3, characterized in that, Each thread block contains multiple threads, and each thread executes a corresponding kernel program to perform parallel data processing steps, including: By utilizing the multiprocessor architecture of GPUs and a grid structure composed of multiple thread blocks, parallel processing of multiple data streams can be achieved. Each thread independently processes its corresponding data portion to complete numerical calculations or image processing tasks.

5. The parallel multiprocessing method for GPU in a radar display and control terminal according to claim 4, characterized in that, GPU parallel processing is implemented based on a heterogeneous general-purpose computing programming architecture, preferably the NVIDIA CUDA architecture.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps of the GPU parallel multiprocessing method for radar display and control terminal as described in any one of claims 1 to 5.

7. An electronic device, characterized in that, include: processor; as well as Memory for storing the executable instructions of the processor; The processor is configured to execute the steps of the GPU parallel multiprocessing method for radar display and control terminal according to any one of claims 1 to 5 by executing the executable instructions.

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