Efficient color conversion using multiple lookup tables

Abstract

The invention relates to efficient color conversion using multiple lookup tables. Disclosed are systems and techniques for efficient color conversion. The techniques include receiving a first lookup table (LUT), a corresponding first range, a second LUT, and a corresponding second range. The first range is smaller than the second range. The techniques include receiving first color data of a first color space from a first computer system component. The techniques include, in response to determining that the first color data is within a first range corresponding to the first LUT, converting the first color data of the first color space to second color data of a second color space using the first LUT. The techniques include providing second color data of a second color space to a second computer system component.

Description

Technical Field

[0001] At least one embodiment relates to a technique for efficient color conversion using multiple lookup tables. Background Technology

[0002] Color transformations are frequently performed in computer and video processing systems, such as for tone mapping, gamut mapping, display panel color correction, and / or creative applications like color stretching and custom color effects. Implementing these color processing algorithms in hardware or computer shaders can be complex and costly, and can also impact system performance and / or power consumption. To overcome these challenges, three-dimensional lookup tables (3D LUTs) can be used. A 3D LUT maps input R, G, B color values ​​to stored output R, G, B color values. The output values ​​can be pre-computed using any number of operations and stored in memory, thus transforming an input color value into an output color value becomes a simple memory lookup operation for any given input. Attached Figure Description

[0003] Figure 1 This is a block diagram of an example computer system for efficient color conversion using multiple lookup tables, according to at least one embodiment.

[0004] Figure 2 This is a block diagram of an example dual 3D lookup table (LUT) circuit for efficient color conversion using multiple lookup tables, according to at least one embodiment.

[0005] Figure 3 This is a flowchart of an example method for efficient color conversion using multiple lookup tables, according to at least one embodiment.

[0006] Figure 4 This is a flowchart of an example method for efficient color conversion using multiple lookup tables, according to at least one embodiment.

[0007] Figure 5 This is a block diagram illustrating an exemplary computer system according to at least one embodiment of the present disclosure. Detailed Implementation

[0008] A 3D LUT for 10-bit color data might require 1024 * 1024 * 1024 * 30 bits = 4.03 GB of memory. To reduce memory storage, a sparse representation of the 3D LUT can be used, and interpolation algorithms (e.g., trilinear, tetrahedral, prism, pyramid, etc.) can be used to recover missing entries. Performing the transformation in a perceptually uniform space may be more advantageous, so shaper functions (e.g., gamma and inverse gamma) can be applied to the input and / or output color data. In some cases, the shaper function is implemented as a 1D LUT, such that the R input value is transformed using a first 1D LUT, the G input value using a second 1D LUT, and the B input value using a third 1D LUT. There may be corresponding inverse transformation 1D LUTs to transform the output R, G, and B values.

[0009] There is a trade-off between color accuracy and the size of sparse 3D LUTs. For example, a 17×17×17 LUT is sufficient for most color transformations in standard dynamic range (SDR) color, but not enough for high dynamic range (HDR) color transformations. For HDR color transformations, a 33×33×33 or larger LUT is typically required. As another example, for color calibration of organic light-emitting diode (OLED) panels, it can be difficult to calibrate the panel to achieve perfect color accuracy using a 17×17×17 LUT due to the nonlinearity and crosstalk between the RGB channels.

[0010] In a 12-bit pipeline, a single 33×33×33 LUT would require 161,717 bytes of memory (e.g., random access memory (RAM) storage). Since many instances of such 3D LUTs are typically needed to support high throughput and multiple data processing pipelines, this can be very costly for high-performance graphics processing units (GPUs), central processing units (CPUs), and / or systems-on-chips (SoCs).

[0011] Depending on the complexity of the one or more algorithms used to determine the output value and memory bandwidth, larger LUTs also significantly increase LUT generation and loading times. Some systems load the entire LUT data during the vertical blanking time, which leads to high memory bandwidth requirements, especially with shorter blanking times and higher refresh rate displays. Other systems double the LUT's memory storage, allowing one set of memory to be loaded over the entire frame time, while another set is used for lookup operations.

[0012] Doubling the size of a small 3D LUT in each RGB dimension would result in an almost 8-fold increase in memory size and load time or memory bandwidth. To support dynamic updates across frames, memory could also be doubled, leading to an approximately 16-fold increase in memory for a single 3DLUT.

[0013] This disclosure addresses these and other technical challenges by providing a system and technique for efficient color transformation using multiple lookup tables. Similar color accuracy to that of a larger (e.g., 33×33×33) 3D LUT with dynamic support can be achieved by using two small (e.g., 17×17×17) 3D LUTs. When both small 3D LUTs are active, one LUT can be used for normal-precision color transformations across the entire input range, while the other LUT can be used for high-precision color transformations within a narrowed range. Dynamic updates can be achieved by reconfiguring one or both 3D LUTs during data processing. For example, to load a new 3D LUT for a new color transformation, the high-precision 3D LUT can be temporarily (e.g., for one frame) disabled while the normal-precision 3D LUT for the new color transformation is loaded from memory. Although the high-precision 3D LUT is disabled, the normal-precision 3D LUT can be used for all transformations. Once the new normal-precision 3D LUT is loaded, the old normal-precision 3D LUT can be temporarily disabled (e.g., for one frame) while a high-precision 3D LUT for the new color transformation is loaded from memory. Although the new high-precision 3D LUT is being loaded into memory, the new normal-precision 3D LUT can be used for all transformations.

[0014] Therefore, 3D LUTs can be loaded and / or configured as normal-precision LUTs with a full range or high-precision LUTs with a limited range. Switching and reconfiguring between normal and high precision allows for dynamic updates, where quality is sacrificed only in a minimum (e.g., 1, 2, etc.) frames. In some cases, the color error (measured using Delta E 2000 (dE2000)) between dual 17×17×17 LUTs and a single 33×33×33 LUT described herein may be below the human visually detectable threshold.

[0015] Although dual 3D LUTs and 17×17×17 LUTs have been described herein, it should be understood that the ideas disclosed herein can be applied to LUTs of other sizes and numbers. For example, in some embodiments, using two 33×33×33 LUTs may be more advantageous. In some embodiments, having two 2D LUTs instead of two 3D LUTs is more advantageous. In some embodiments, using three 17×17×17 LUTs, each with a different corresponding range, is more advantageous.

[0016] The advantages of the disclosed techniques include, but are not limited to, high color conversion accuracy and reduced storage requirements. For example, as disclosed herein, dual 17×17×17 LUTs can be used to achieve color conversion accuracy comparable to a single 33×33×33 LUT, while requiring only approximately 28% of the storage space.

[0017] Figure 1 This is a block diagram of an example computer system 102 for efficient color conversion using multiple lookup tables, according to at least one embodiment. System 102 can perform one or more color conversion operations by transforming first color data into second color data using two or more 3D lookup tables (LUTs). System 102 may include memory 104, CPU 106, GPU 108, and display interface 112. Memory 104 may be communicatively coupled to CPU 106 and / or GPU 108. CPU 106 may be connected to GPU 108.

[0018] Memory 104 may include one or more registers, one or more caches (e.g., L1 cache, L2 cache, etc.) and / or main memory (e.g., random access memory (RAM), dynamic RAM (DRAM), static RAM (SRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), etc.). Memory 104 may store graphics data (e.g., pixels, images, windows, overlays, composites, etc.), color transformation data (e.g., lookup table values, etc.), and so on.

[0019] CPU 106 can execute one or more processes based on corresponding instructions (e.g., from memory 104). In some embodiments, as described herein, CPU 106 can use dual 3D LUTs to perform color transformation. For example, CPU 106 can load two (or more) 3D LUTs from memory 104, load input data (e.g., input color values) from memory 104, transform the input data using the 3D LUTs, and store the output data (e.g., output color values) back into memory 104. In some embodiments, the output data can be provided to another system component.

[0020] GPU 108 may include dual 3D LUT circuitry 110 for performing efficient color transformations. GPU 108 may provide input color data to dual 3D LUT circuitry 110 (e.g., during the rendering pipeline, before compositing, after compositing, etc.) to obtain transformed output color data. In some embodiments, GPU 108 may include a memory device (not shown) for storing graphics data and / or color transformation data.

[0021] GPU 108 can be connected to display interface 112. GPU 108 can provide input color data to dual 3D LUT circuitry 110 and transmit output color data to display interface 112. In some embodiments, GPU 108 performs multiple transformations on the color data before transmitting the output color data to display interface 112. For example, GPU 108 can apply a first color transformation to a first window (e.g., on a graphics user display) and apply a second color transformation to a second window. GPU 108 can then apply a third color transformation to the composition of the first and second windows. The output of the third color transformation can be provided to display interface 112.

[0022] Display interface 112 may include an interface for transmitting graphics data between system components. For example, display interface 112 may include a Video Graphics Array (VGA) interface, a Digital Vision Interface (DVI), an High-Definition Multimedia Interface (HDMI), a DisplayPort interface, a Mobile Industry Processor Interface (MIPI), a Display Serial Interface, and so on. In some embodiments, display interface 112 may include dual 3D LUT circuitry 114 for performing one or more efficient color conversions before transmitting received graphics data to another device. For example, display interface 112 may receive graphics data from GPU 108 and may apply one or more color transformations (e.g., for color correction) before transmitting output graphics data to display interface 122 of display 116.

[0023] System 102 can be connected to display 116 via display interface 112 and display interface 122. Display 116 may include a panel 120 for displaying graphic data from display interface 122. For example, panel 120 may be a liquid crystal display (LCD) panel, a light-emitting diode (LED) panel, and / or an organic LED (OLED) panel. Display interface 122 may include dual 3D LUT circuitry 118 and may receive data from system 102 (e.g., via display interface 112). Display interface 122 may provide graphic data received from display interface 112 to dual 3D LUT circuitry 118 for one or more color conversion operations before providing output data to panel 120. For example, dual 3D LUT circuitry 118 may be configured to apply one or more color correction operations to panel calibration before providing graphic data to panel 120 for display.

[0024] Figure 2 This is a block diagram of a dual 3D lookup table (LUT) circuit 202 for efficient color conversion according to at least one embodiment. The dual 3D LUT circuit 202 may include one or more normalization circuits (e.g., normalization 212a, normalization 212b, etc.), two or more 3D LUTs (e.g., 3D LUT circuits 214a, 3D LUT circuits 214b, etc.), selection logic (e.g., selection logic 216), and one or more selectors (e.g., selector 218, selector 220, etc.).

[0025] The dual 3D LUT circuit 202 can be configured to receive input data 204, which may include an input R value 206, an input G value 208, and an input B value 210, and to generate output data 222 using two or more 3D LUTs in the dual 3D LUT circuit 202. The output data 222 may include an output R value 224, an output G value 226, and an output B value 228. In some embodiments, a nonlinear transformation has been applied to the input data 204 before it is provided to the dual 3D LUT circuit 202. For example, a gamma correction transformation may be applied to the input data 204 before it is provided to the dual 3D LUT circuit 202. In some embodiments, an inverse (e.g., reverse) nonlinear transformation is applied to the output data 222 after it has been generated by the dual 3D LUT circuit 202. For example, an inverse gamma correction transformation may be applied to the output data 222 after it has been generated by the dual 3D LUT circuit 202.

[0026] Normalization 212a and normalization 212b can receive input data 204 and apply one or more normalization operations to the input data 204. In some embodiments, normalization 212a can scale the input data 204 to cover a range of values ​​corresponding to a 3D LUT stored in 3D LUT circuit 214a. For example, the values ​​of the input data 204 can have a 10-bit range (e.g., from 0 to 1023), and the 3D LUT stored in 3D LUT circuit 214a can be configured to receive values ​​between 0 and 1, thus scaling the input data 204 to fit within the 0 to 1 range. In some embodiments, normalization 212a can perform rounding, clamping, and / or offset operations on the scaled values ​​to align a restricted range (e.g., a high-precision range) within the input range in an appropriate manner. Normalization 212b can perform similar operations on the input data 204 based on the 3D LUT stored in 3D LUT circuit 214b.

[0027] Normalization 212a and normalization 212b can provide their normalized outputs to 3D LUT circuits 214a and 214b, respectively. 3D LUT circuit 214a can store a 3D LUT that maps input values ​​to output values ​​(e.g., loaded from a memory device). The 3D LUT can be generated by a processing device (such as a CPU or GPU) separate from the dual 3D LUT circuit 202. The 3D LUT can be configured such that the output value corresponding to the input value is the result of applying one or more transformation functions (e.g., linear functions, nonlinear functions, etc.) to the input value. In some embodiments, 3D LUT circuits 214a and 214b store sparse 3D LUTs and are configured to perform interpolation to obtain the output value corresponding to the input value. For example, 3D LUT circuit 214a can store a 17×17×17 LUT, and if each input value of the input data does not directly correspond to one of the 17 values ​​along its corresponding axis, 3D LUT circuit 214a can perform interpolation to generate an output value. In some embodiments, 3D LUT circuit 214a (and / or 3D LUT circuit 214b) can perform at least one of the following interpolation functions: trilinear interpolation, tetrahedral interpolation, prismatic interpolation, and pyramidal interpolation. In some embodiments, another interpolation function is used to generate appropriate output values ​​from the sparse LUT based on the input values.

[0028] 3D LUT circuits 214a and 214b can provide their outputs (e.g., the results of lookup operations in their respective LUTs) to a selector (e.g., selector 218). In some embodiments, selector 218 can be a multiplexer controlled by selection logic 216.

[0029] Selection logic 216 may include control circuitry selectively coupled to 3D LUT circuitry 214a and 3D LUT circuitry 214b. Selection logic 216 may receive normalized input data from normalizers 212a and 212b to determine which 3D LUT should be used to transform the input data. For example, each 3D LUT may have a supported set of corresponding input values. Some 3D LUTs may be used for transformations across the entire range of the color space (e.g., all 10-bit values, all 12-bit values, etc.). Some 3D LUTs may be used for transformations across a portion of the color space (e.g., input values ​​between 0 and 128, input values ​​between 256 and 512, etc.).

[0030] In some embodiments, selection logic 216 receives input data 204 before it is normalized. In some embodiments, input data 204 is provided to both 3D LUTs regardless of whether it falls within the range corresponding to the 3D LUT; and based on the range in which input data 204 falls, selector 218 selects the correct transformed value through selection logic 216. In some embodiments, input data 204 is only provided to 3D LUTs whose input data 204 falls within its range.

[0031] In some embodiments, the dual 3D LUT circuit 202 includes a selector 220. Selection logic 216 can use the selector 220 to bypass the 3D LUT and provide input data 204 as output data 222 without any transformation.

[0032] In some embodiments, one of the 3D LUT circuits 214a and 214b may be temporarily inactive, during which time the selection logic 216 can use the remaining active 3D LUT to perform all color conversions. For example, 3D LUT circuit 214a may be configured with a 3D LUT for performing SDR color conversion within a first range, while 3D LUT circuit 214b may be configured with a 3D LUT for performing HDR color conversion within a second range covering a portion of the first range. In this configuration, 3D LUT circuit 214a may be considered a "normal" precision 3D LUT, while 3D LUT circuit 214b may be considered a "high" precision 3D LUT. The "normal" precision 3D LUT and the "high" precision 3D LUT can be considered a pair used together.

[0033] In some embodiments, a new pair of 3D LUTs can be loaded into dual 3DLUT circuit 202 within two frames. For example, if the 3D LUTs need to be changed to perform a different set of color transformations (e.g., dynamic support), the 3D LUTs in the old pair configured as “high” precision 3D LUTs (e.g., 3D LUT circuit 214b in the previous example) can be deactivated, and the “normal” precision 3D LUTs of the new pair can be loaded from memory into 3D LUT circuit 214b. Although the old “high” precision 3D LUTs are deactivated, all color transformations can still be performed by the old “normal” precision 3D LUTs (3DLUT circuit 214a in the previous example), which remain active.

[0034] The new “normal” precision 3D LUT can be loaded throughout the entire frame, not just during the vertical blanking interval. This reduces memory bandwidth requirements because the old “normal” precision 3D LUT remains active and all color transformations can be performed during the frame in which the new “normal” precision 3D LUT is being loaded.

[0035] Continuing this example, once the new "normal" precision 3D LUT is loaded into 3D LUT circuit 214b, the old "normal" precision 3D LUT in 3D LUT circuit 214a can be deactivated. The new "high" precision 3D LUT can be loaded into 3D LUT circuit 214a in subsequent frames (e.g., after the frame used to load the new "normal" precision 3D LUT). While the new "high" precision 3D LUT is being loaded, the new "normal" precision 3D LUT in 3D LUT circuit 214b can perform all color transformations. After the new "high" precision 3D LUT is loaded into 3D LUT circuit 214a, selection logic 216 can continue to determine between the two 3D LUTs based on the input data. Therefore, 3D LUTs can be updated across two frames, and the "high" precision 3D LUT and the "normal" precision 3D LUT can alternate between 3D LUT circuit 214a and 3D LUT circuit 214b.

[0036] Figure 3 This is a flowchart of an example method 300 for efficient color conversion using multiple lookup tables, according to at least one embodiment. Figure 4 This is a flowchart of an example method 400 for efficient color conversion using multiple lookup tables, according to at least one embodiment.

[0037] Method 300 and / or method 400 may be executed using one or more processing units (e.g., CPU, GPU, accelerator, physical processing unit (PPU), data processing unit (DPU), etc.), which may include one or more memory devices (or communicate with such memory devices). In at least one embodiment, method 300 and / or method 400 may be executed using one or more processing devices. In at least one embodiment, method 300 may use... Figure 1 The method 400 is executed by the processing unit of system 102. In at least one embodiment, the method 400 can be performed by... Figure 2The dual 3D LUT circuit 202 is executed. In at least one embodiment, the processing unit executing any of the methods 300 and / or 400 may be executing instructions stored on a non-transitory computer-readable storage medium. In at least one embodiment, any of the methods 300 and / or 400 may be executed using multiple processing threads (e.g., CPU threads and / or GPU threads), individual threads executing one or more individual functions, routines, subroutines, or operations of the method. In at least one embodiment, the processing threads implementing any of the methods 300 and / or 400 may be synchronized (e.g., using semaphores, critical sections, and / or other thread synchronization mechanisms). Alternatively, the processing threads implementing any of the methods 300 and / or 400 may execute asynchronously with respect to each other. Figure 3 and / or Figure 4 Compared to the order shown, the various operations of method 300 and / or method 400 can be performed in different orders. Some operations of any of methods 300 and / or method 400 can be performed concurrently with other operations. In at least one embodiment, they may not always be performed... Figure 3 and / or Figure 4 One or more operations are shown.

[0038] refer to Figure 3 At block 302, the processing unit executing method 300 may receive a first lookup table (LUT), a corresponding first range, a second LUT, and a corresponding second range. In some embodiments, the first range is smaller than the second range. In some embodiments, the first range covers a portion of the second range.

[0039] At box 304, the processing unit can receive first color data of a first color space from the first computer system component. In some embodiments, the first computer system component is a parallel processing unit. In some embodiments, the first computer system component is a display interface.

[0040] At block 306, in response to determining that the first color data is within a first range corresponding to the first LUT, the processing unit can use the first LUT to convert the first color data in the first color space into second color data in the second color space. In some embodiments, to convert the first color data in the first color space into second color data in the second color space, the processing unit can apply an interpolation function to the first color data to obtain the second color data. In some embodiments, the interpolation function is at least one of the following: a trilinear interpolation function, a tetrahedral interpolation function, a prism interpolation function, or a pyramid interpolation function.

[0041] At box 308, the processing unit can provide second color data of the second color space to the second computer system component. In some embodiments, the second computer system component is a display interface. In some embodiments, the second computer system component is a display panel.

[0042] In some embodiments, at block 310, the processing unit performing method 300 may receive third color data in a first color space. At block 312, in response to determining that the third color data is within a second range corresponding to the second LUT, the processing unit may use the second LUT to convert the third color data in the first color space into fourth color data in the second color space. At block 314, the processing unit may (e.g., to a second computer system component) provide the fourth color data in the second color space.

[0043] In some embodiments, the processing unit executing method 300 may apply a nonlinear transformation (e.g., gamma correction transformation) to the first color data in the first color space before determining that the first color data is within a first range corresponding to the first LUT. In some embodiments, the processing unit executing method 300 may apply an inverse nonlinear transformation (e.g., inverse gamma correction transformation) to the second color data in the second color space before providing the second color data in the second color space.

[0044] In some embodiments, the processing unit performing method 300 may receive a third LUT, third color data corresponding to a third range, and a third color space. The processing unit may also, in response to determining that the third color data in the third color space is within a third range, use the third LUT to convert the third color data in the third color space into fourth color data in a fourth color space.

[0045] refer to Figure 4 At block 402, the processing unit performing method 400 can receive first color data of a first color space from the source component. In some embodiments, the source component is a parallel processing device. In some embodiments, the source component is a display interface.

[0046] At box 404, the processing unit can determine that the first color data of the first color space is within a first range corresponding to the first LUT. The first range may be smaller than the second range corresponding to the second LUT.

[0047] At block 406, the processing unit can provide first color data in a first color space to a first LUT circuit to obtain second color data in a second color space. In some embodiments, to obtain the second color data in the second color space, the first LUT circuit can apply an interpolation function to the first color data in the first color space. In some embodiments, the interpolation function is at least one of the following: a trilinear interpolation function, a tetrahedral interpolation function, a prism interpolation function, or a pyramid interpolation function.

[0048] At box 408, the processing unit can provide second color data of a second color space to the target component. In some embodiments, the target component is a display interface. In some embodiments, the target component is a display panel.

[0049] In some embodiments, the processing unit may receive third color data in a first color space, determine that the third color data in the first color space is within a second range corresponding to the second LUT, provide the third color data in the first color space to the second LUT circuit to obtain fourth color data in the second color space, and provide the fourth color data in the second color space.

[0050] In some embodiments, at block 410, the processing unit may replace the first LUT stored in the first LUT circuit with a third LUT. The third LUT may have a corresponding third range. At block 412, the processing unit may receive third color data in a third color space from the source component. At block 414, the processing unit may determine that the third color data in the third color space is within a third range corresponding to the third LUT. At block 416, the processing unit may provide the third color data in the third color space to the first LUT circuit to obtain fourth color data in a fourth color space. At block 418, the processing unit may provide the fourth color data in the fourth color space to the target component.

[0051] Figure 5 This is a block diagram illustrating an exemplary computer system according to at least one embodiment of the present disclosure. (As per...) Figure 1As described, computer system 500 may correspond to system 102. Computer system 500 may operate as a server or endpoint machine in an endpoint-server network environment or as a peer machine in a point-to-point (or distributed) network environment. A computer may be a television, personal computer (PC), tablet PC, set-top box (STB), personal digital assistant (PDA), cellular phone, web page device, server, network router, switch or bridge, or any machine capable of executing a set of instructions (in sequence, etc.) specifying the actions the machine should take. Furthermore, although only a single machine has been described, the term "machine" should also be considered to include any collection of machines that execute one or more sets of instructions individually or in combination to perform any one or more of the methods discussed herein.

[0052] Example computer system 500 includes a processing device (processor) 502 that communicates with each other via a bus 528, a main memory 504 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM), double data rate (DDR SDRAM) or DRAM (RDRAM), etc.), a static memory 506 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage device 516.

[0053] Processor (processing device) 502 represents one or more general-purpose processing devices (such as microprocessors, central processing units, etc.) and may include processing logic 522. More specifically, processor 502 may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, or a processor implementing other instruction sets, or more processors implementing combinations of instruction sets. Processor 502 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, etc. Processor 502 is configured to execute instructions 526 for performing the operations discussed herein (e.g., for generating threat indicator alerts).

[0054] The computer system 500 may also include a network interface device 508. The computer system 500 may also include a video display unit 510 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an input device 512 (e.g., a keyboard and alphanumeric keypad, a motion-sensing input device, a touchscreen), a cursor control device 514 (e.g., a mouse), and a signal generation device 518 (e.g., a speaker). In some embodiments, the computer system 500 may not include the video display unit 510, the input device 512, and / or the cursor control device 514 (e.g., a headless configuration).

[0055] Data storage device 516 may include a non-transitory machine-readable storage medium 524 (also a computer-readable storage medium) storing one or more instruction sets 526 embodying any one or more of the methods or functions described herein (e.g., for efficient color conversion using multiple lookup tables). The instructions 526 may also reside wholly or at least partially within main memory 504 and / or processor 502, which also constitute machine-readable storage media, during execution of these instructions 526 via computer system 500. Instructions may also be transmitted or received via network 520 via network interface device 508.

[0056] In one implementation, instruction 526 includes instructions for efficient color conversion using multiple lookup tables. While computer-readable storage medium 524 (machine-readable storage medium) is shown as a single medium in the exemplary implementation, the terms "computer-readable storage medium" and "machine-readable storage medium" should be considered to include a single medium or multiple media (e.g., a centralized or distributed database and / or associated caches and servers) storing one or more sets of instructions. The terms "computer-readable storage medium" and "machine-readable storage medium" should also be considered to include any medium capable of storing, encoding, or carrying a set of instructions for execution by a machine and causing the machine to perform any one or more methods of this disclosure. Therefore, the terms "computer-readable storage medium" and "machine-readable storage medium" should be considered to include, but are not limited to, solid-state memory, optical media, and magnetic media.

[0057] Other variations are also within the spirit of this disclosure. Therefore, while the disclosed technology is susceptible to various modifications and alternative constructions, certain illustrated embodiments are shown in the accompanying drawings and have been described in detail above. However, it should be understood that this disclosure is not intended to be limited to one particular form or more of the disclosed forms, but rather to cover all modifications, alternative constructions, and equivalents falling within the spirit and scope of this disclosure as defined in the appended claims.

[0058] Unless otherwise stated herein or obviously contradicted by the context, the terms “a,” “an,” and “the,” as well as similar pronouns, used in the context of describing the disclosed embodiments (particularly in the context of the following claims) should be interpreted as encompassing both the singular and plural, and should not be considered as a definition of the terms. Unless otherwise stated, the terms “comprising,” “having,” “including,” and “containing” are to be interpreted as open-ended terms (meaning “including, but not limited to”). “Connection,” when unmodified and referring to a physical connection, is to be interpreted as being partially or wholly contained therein, attached to, or combined with, even if an object is intermediate. Unless otherwise indicated herein, the enumeration of value ranges herein is intended only as a convenient way to refer to each individual value falling within the range, and each individual value is incorporated into the specification as if it were individually enumerated herein. In at least one embodiment, unless otherwise stated or contradicted by the context, the terms “set” (e.g., “itemset”) or “subset” are to be interpreted as a non-empty set comprising one or more components. Furthermore, unless otherwise stated or contradicted by the context, the term “subset” in the context of a corresponding set does not necessarily refer to an appropriate subset of the corresponding set, but a subset and a corresponding set may be equal.

[0059] Unless explicitly stated otherwise or clearly contradicted by the context, conjunction language (such as phrases of the form "at least one of A, B, and C" or "at least one of A, B, and C") is to be understood by context as generally representing any non-empty subset of the set of items, terms, etc., that can be A or B or C, or A and B and C. For example, in an illustrative example of a set with three components, the conjunction phrases "at least one of A, B, and C" and "at least one of A, B, and C" refer to any set of the following: {A}, {B}, {C}, {A, B}, {A, C}, {B, C}, {A, B, C}. Therefore, this conjunction language is generally not intended to imply that some embodiments require at least one of A, at least one of B, and at least one of C. Additionally, unless explicitly stated otherwise or contradicted by the context, the term "plural" indicates a plural state (e.g., "multiple items" indicates many items). In at least one embodiment, several of the multiple items are at least two, but when explicitly indicated or by context, there may be more. Furthermore, unless otherwise stated or explicitly stated in the context, the phrase “based on” means “at least partially based on” or “at least based on” rather than “based on only”.

[0060] Unless otherwise indicated herein or expressly contradicted by the context, the operations of the processes described herein may be performed in any suitable order. In at least one embodiment, processes such as those described herein (or variations and / or combinations thereof) are executed under the control of one or more computer systems configured with executable instructions and are implemented by hardware or a combination thereof as code (e.g., executable instructions, one or more computer programs, or one or more applications) that executes jointly on one or more processors. In at least one embodiment, the code (e.g., in the form of a computer program comprising a plurality of instructions executable by one or more processors) is stored on a computer-readable storage medium. In at least one embodiment, the computer-readable storage medium is a non-transitory computer-readable storage medium that excludes transient signals (e.g., propagating transient electrical or electromagnetic transmissions) but includes non-transitory data storage circuitry (e.g., buffers, caches, and queues) within a transceiver that includes transient signals. In at least one embodiment, code (e.g., executable code or source code) is stored on a set of one or more non-transitory computer-readable storage media (or other memory for storing executable instructions) that, when executed by one or more processors of a computer system (i.e., as a result of execution by one or more processors of the computer), cause the computer system to perform the operations described herein. In at least one embodiment, the set of non-transitory computer-readable storage media comprises a plurality of non-transitory computer-readable storage media, and one or more of the various non-transitory storage media lack all the code, while the plurality of non-transitory computer-readable storage media collectively store all the code. In at least one embodiment, the executable instructions are executed such that different instructions are executed by different processors—for example, the non-transitory computer-readable storage media store the instructions and the main central processing unit (“CPU”) executes some of the instructions, while the graphics processing unit (“GPU”) executes the others. In at least one embodiment, different components of the computer system have separate processors, and the different processors execute different subsets of instructions.

[0061] Therefore, in at least one embodiment, the computer system is configured to implement one or more services that individually or collectively perform the operations of the processes described herein, and such a computer system is configured with applicable hardware and / or software that enables the performance of the operations. Further, the computer system implementing at least one embodiment of this disclosure is a single device, while in another embodiment it is a distributed computer system comprising multiple devices that operate in different ways such that the distributed computer system performs the operations described herein, and that no single device performs all the operations.

[0062] The use of any and all examples or exemplary language (e.g., “such as”) provided herein is intended only to better illustrate embodiments of this disclosure and, unless otherwise required, does not constitute a limitation on the scope of this disclosure. No language in the specification should be construed as indicating that any unclaimed element is essential to the implementation of this disclosure.

[0063] All references listed herein, including publications, patent applications and patents, are incorporated herein by reference to the extent that each reference is individually and explicitly indicated to be incorporated by reference and its entire contents are stated herein.

[0064] In the description and claims, the terms “coupled” and “connected”, as well as their derivatives, may be used. It should be understood that these terms are not intended to be synonyms with each other. Rather, in specific examples, “connected” or “coupled” may be used to indicate direct or indirect physical or electrical contact between two or more elements. “Coupled” may also mean that two or more elements are not in direct contact with each other, but still operate or interact with each other.

[0065] Unless otherwise expressly stated, in some embodiments it should be understood that throughout the specification, terms such as “processing,” “computing,” “calculating,” “determining,” etc., refer to the actions and / or processes of a computer or computing system or similar electronic computing device that manipulate and / or transform data represented as physical (such as electrons) quantities in the registers and / or memory of the computing system into other data represented in a similar manner as physical quantities in the memory, registers, or other such information storage, transmission, or display devices of the computing system.

[0066] Similarly, the term "processor" can refer to any device or part of a device that processes electronic data from registers and / or memory and transforms that electronic data into other electronic data that can be stored in registers and / or memory. As a non-limiting example, a "processor" can be a CPU or a GPU. A "computing platform" can include one or more processors. As used herein, a "software" process can include, for example, software and / or hardware entities that perform work over time, such as tasks, threads, and intelligent agents. Furthermore, each process can refer to multiple processes for executing instructions sequentially or in parallel, continuously or intermittently. In at least one embodiment, the terms "system" and "method" are used interchangeably herein, with regard to the system embodying one or more methods and these methods being considered as a system.

[0067] In this document, the terms "acquiring analog or digital data," "receiving analog or digital data," "inputting analog or digital data" may be used. In at least one embodiment, the process of acquiring, obtaining, receiving, or inputting analog and digital data can be accomplished in various ways, such as by receiving data as a parameter of a function call or by calling an application programming interface (API). In at least one embodiment, the process of acquiring, obtaining, receiving, or inputting analog or digital data can be accomplished by transmitting data via a serial or parallel interface. In at least one embodiment, the process of acquiring, obtaining, receiving, or inputting analog or digital data can be accomplished by transmitting data from a providing entity to an acquiring entity via a computer network. In at least one embodiment, the terms "providing," "outputting," "transmitting," "sending," or "presenting" analog or digital data may also be used. In various examples, the process of providing, outputting, transmitting, sending, or presenting analog or digital data can be accomplished by transmitting data as an input or output parameter of a function call, a parameter of an application programming interface, or an inter-process communication mechanism.

[0068] While the description herein presents exemplary embodiments of the described technologies, other architectures may be used to implement the described functionality and are intended to fall within the scope of this disclosure. Furthermore, although specific assignments of duties have been described above for descriptive purposes, various functions and responsibilities may be allocated and divided in different ways depending on the circumstances.

[0069] Furthermore, although the subject matter has been described in language specific to structural features and / or methodological behavior, it should be understood that the subject matter claimed in the appended claims is not necessarily limited to the specific features or behaviors described. Rather, specific features and behaviors are disclosed as exemplary forms for implementing the claims.

Claims

1. A method comprising: Receive a first lookup table (LUT), a corresponding first range, a second LUT, and a corresponding second range, wherein the first range is smaller than the second range; Receive first color data of a first color space from a first computer system component; In response to determining that the first color data is within the first range corresponding to the first LUT, the first color data in the first color space is converted to second color data in the second color space using the first LUT; and Provide the second color data of the second color space to the second computer system component.

2. The method of claim 1, further comprising: Receive the third color data of the first color space; In response to determining that the third color data is within the second range corresponding to the second LUT, the third color data in the first color space is converted to fourth color data in the second color space using the second LUT; and Provide the fourth color data in the second color space.

3. The method of claim 1, wherein the first computer system component is a parallel processing device, and the second computer system component is a display interface.

4. The method of claim 1, wherein the first computer system component is a display interface, and the second computer system component is a display panel.

5. The method of claim 1, further comprising: Before determining that the first color data is within the first range corresponding to the first LUT, a nonlinear transformation is applied to the first color data in the first color space; as well as Before providing the second color data in the second color space, an inverse nonlinear transformation is applied to the second color data in the second color space.

6. The method of claim 1, wherein using the first LUT to convert the first color data in the first color space into the second color data in the second color space comprises: Applying an interpolation function to the first color data to obtain the second color data, wherein the interpolation function is at least one of the following: Trilinear interpolation function; Tetrahedral interpolation function; Prism interpolation function; or Pyramid interpolation function.

7. The method of claim 1, further comprising: Receive the third LUT, the corresponding third range, and the third color data of the third color space; as well as In response to determining that the third color data in the third color space is within the third range, the third color data in the third color space is converted into fourth color data in the fourth color space using the third LUT.

8. A system comprising: Memory; as well as The processor, communicatively coupled to the memory, performs operations including: Receive a first lookup table (LUT), a corresponding first range, a second LUT, and a corresponding second range, wherein the first range is smaller than the second range; Receive first color data of the first color space from the first system component; In response to determining that the first color data is within the first range corresponding to the first LUT, the first color data in the first color space is converted into second color data in the second color space using the first LUT; as well as Provide the second color data of the second color space to the second system component.

9. The system of claim 8, wherein the operation further comprises: Receive the third color data of the first color space; In response to determining that the third color data is within the second range corresponding to the second LUT, the third color data in the first color space is converted to fourth color data in the second color space using the second LUT; and Provide the fourth color data in the second color space.

10. The system of claim 8, wherein the first system component is a parallel processing device and the second system component is a display interface.

11. The system of claim 8, wherein the first system component is a display interface and the second system component is a display panel.

12. The system of claim 8, wherein the operation further comprises: Before determining that the first color data is within the first range corresponding to the first LUT, a nonlinear transformation is applied to the first color data in the first color space; as well as Before providing the second color data in the second color space, an inverse nonlinear transformation is applied to the second color data in the second color space.

13. The system of claim 8, wherein using the first LUT to convert the first color data in the first color space to the second color data in the second color space comprises: Applying an interpolation function to the first color data to obtain the second color data, wherein the interpolation function is at least one of the following: Trilinear interpolation function; Tetrahedral interpolation function; Prism interpolation function; or Pyramid interpolation function.

14. The system of claim 8, wherein the operation further comprises: Receive the third LUT, the corresponding third range, and the third color data of the third color space; as well as In response to determining that the third color data in the first color space is within the third range, the third color data in the third color space is converted into fourth color data in the fourth color space using the third LUT.

15. A circuit comprising: A first LUT circuit for storing a first lookup table LUT and a second LUT circuit for storing a second LUT, wherein the first LUT has a corresponding first range and the second LUT has a corresponding second range, wherein the first range is smaller than the second range; as well as A control circuit, selectively coupled to the first LUT circuit and the second LUT circuit, wherein the control circuit is used for: Receive first color data of the first color space from the source component; Determine that the first color data in the first color space is within the first range corresponding to the first LUT; The first color data in the first color space is provided to the first LUT circuit to obtain the second color data in the second color space; as well as The second color data of the second color space is provided to the target component.

16. The circuit of claim 15, wherein the control circuit is further configured to: Receive the third color data of the first color space; Determine that the third color data in the first color space is within the second range corresponding to the second LUT; The third color data of the first color space is provided to the second LUT circuit to obtain the fourth color data of the second color space; and Provide the fourth color data in the second color space.

17. The circuit of claim 15, wherein the source component is a parallel processing device and the target component is a display interface.

18. The circuit of claim 15, wherein the source component is a display interface and the target component is a display panel.

19. The circuit of claim 15, wherein, in order to obtain the second color data in the second color space, the first LUT circuit applies an interpolation function to the first color data in the first color space, wherein the interpolation function is at least one of the following: Trilinear interpolation function; Tetrahedral interpolation function; Prism interpolation function; or Pyramid interpolation function.

20. The circuit of claim 15, wherein the control circuit is further configured to: The first LUT stored in the first LUT circuit is replaced with a third LUT, wherein the third LUT has a corresponding third range; Receive third color data of the third color space from the source component; Determine that the third color data in the third color space falls within the third range corresponding to the third LUT; The third color data of the third color space is provided to the first LUT circuit to obtain the fourth color data of the fourth color space; as well as The fourth color data of the fourth color space is provided to the target component.

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