SIW power divider

Abstract

The invention discloses an SIW power divider which comprises a first dielectric substrate, a second dielectric substrate, a plurality of first metal through holes, a plurality of second metal through holes and a third metal through hole, the first dielectric substrate of the SIW power divider is provided with a first microstrip line, the second dielectric substrate is provided with a second microstrip line, the first microstrip line is used for inputting signals, and the third microstrip line is used for inputting signals. The second microstrip line is used for outputting a signal, an input signal of the first microstrip line is transmitted in the first transmission channel, the first microstrip line is connected with the third metal layer through a connecting band and a third metal through hole, and the third metal through hole serves as a transition conversion structure so as to realize transition conversion from a microstrip signal to an SIW signal; the converted SIW signal is transmitted in the second transmission channel, the second microstrip line converts the SIW signal into a microstrip signal again and transmits the microstrip signal in the second transmission channel, and compared with a traditional inter-board transition structure, the size is smaller, and the insertion loss is lower.

Description

Technical Field

[0001] This invention relates to the field of power divider technology, and in particular to a SIW power divider. Background Technology

[0002] Substrate integrated waveguides (SIWs) are an innovative microwave and millimeter-wave transmission line structure that cleverly utilizes mature printed circuit board (PCB) processing technology, which reduces production costs and improves production efficiency.

[0003] SIW constructs a nearly closed waveguide structure on a dielectric substrate, inheriting not only the excellent characteristics of low loss and high Q value, but also perfectly integrating the convenience of seamless integration with planar circuits, opening up vast possibilities for applications in the microwave and millimeter-wave high-frequency bands. With its unique advantages, SIW has demonstrated enormous potential and broad prospects in the design and application of high-performance devices such as millimeter-wave power combining amplifiers.

[0004] In related technologies, the transition design between microstrip lines and substrate integrated waveguides (SIWs) often employs a relatively intuitive geometry, thanks to the high similarity in their modal field distributions, allowing for good matching of the vertical components of the electric field in the microstrip and SIW regions. To construct a compact, single-layer microstrip-to-SIW transition structure, a traditional approach is to connect the conductor portion of the microstrip line to the upper metal wall of the SIW via a tapered microstrip transition section, while simultaneously connecting its ground plane to the bottom metal layer of the SIW. To reduce discontinuities, a sufficiently long and width-matched tapered microstrip section is required, sometimes reaching half a wavelength. While this tapered transition structure effectively reduces discontinuities caused by structural abrupt changes and ensures good impedance matching, a significant drawback is the need to place the microstrip line on the same layer as the SIW's metal wall, resulting in excessive size. Furthermore, directly connecting the microstrip line to the SIW introduces additional insertion loss. Summary of the Invention

[0005] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, the object of this invention is to propose a SIW power divider, wherein a first dielectric substrate has a first microstrip line, and a second dielectric substrate has a second microstrip line. The first microstrip line is used for input signals, and the second microstrip line is used for output signals. The input signal of the first microstrip line is transmitted in a first transmission channel. The first microstrip line is connected to a third metal layer through a connecting strip and a third metal via. The third metal via acts as a transition conversion structure to realize the transition conversion from microstrip signal to SIW signal. The converted SIW signal is transmitted in a second transmission channel. The second microstrip line then converts the SIW signal back into a microstrip signal and transmits it in the second transmission channel. Compared with traditional inter-board transition structures, this invention has a smaller size and lower insertion loss.

[0006] To achieve the above objectives, embodiments of the present invention provide an SIW power divider, comprising:

[0007] A first dielectric substrate and a second dielectric substrate, the first dielectric substrate including a first metal layer, a first dielectric substrate and a second metal layer stacked sequentially, the second dielectric substrate including a third metal layer, a second dielectric substrate and a fourth metal layer stacked sequentially, and at least a portion of the first metal layer and at least a portion of the fourth metal layer being stacked, the first metal layer forming a first clearance region, the first clearance region having a first microstrip line spaced apart from the first metal layer, the fourth metal layer forming a second clearance region, the second clearance region having a connecting band spaced apart from the fourth metal layer, the first microstrip line being connected to the connecting band, and the third metal layer forming at least one second microstrip line;

[0008] Multiple first metal vias are disposed on a first dielectric substrate and connected between a first metal layer and a second metal layer. The multiple first metal vias, together with the first metal layer and the second metal layer, define a first transmission channel. A first microstrip line is disposed within the first transmission channel.

[0009] Multiple second metal vias are disposed on the second dielectric substrate and connected between the third metal layer and the fourth metal layer. The multiple second metal vias, together with the third metal layer and the fourth metal layer, define a second transmission channel. At least one second microstrip line is disposed in the second transmission channel.

[0010] The third metal via is disposed on the second dielectric substrate and within the second transmission channel, and is connected between the connecting strip and the third metal layer.

[0011] According to an embodiment of the present invention, the SIW power divider has a first dielectric substrate having a first microstrip line and a second dielectric substrate having a second microstrip line. The first microstrip line is used for input signals, and the second microstrip line is used for output signals. The input signal of the first microstrip line is transmitted in a first transmission channel. The first microstrip line is connected to a third metal layer through a connecting strip and a third metal via. The third metal via acts as a transition conversion structure to realize the transition conversion from microstrip signal to SIW signal. The converted SIW signal is transmitted in a second transmission channel. The second microstrip line converts the SIW signal back into a microstrip signal and transmits it in the second transmission channel. Compared with the traditional inter-board transition structure, it has a smaller size and lower insertion loss.

[0012] According to some examples of the present invention, the third metal via, the first microstrip line, and the connecting strip are all centered along the first direction of the SIW power divider.

[0013] According to some examples of the present invention, the second transmission channel is symmetrically arranged with respect to the central axis of the first microstrip line, the third metal layer forms two second microstrip lines, and the two second microstrip lines are symmetrical with respect to the central axis of the first microstrip line. The SIW power divider also includes a fourth metal via, which is disposed on the second dielectric substrate and located in the second transmission channel. The fourth metal via connects the first metal layer and the second metal layer, and the fourth metal via is aligned with the third metal via along the center of the first direction.

[0014] According to some examples of the present invention, the second transmission channel includes: a first sub-channel, a second sub-channel and two third sub-channels, the first sub-channel extending along a first direction and communicating with the second sub-channel, a third metal via disposed in the first sub-channel, both third sub-channels communicating with the second sub-channel, and the two third sub-channels being symmetrical about the central axis of the first microstrip line, two second microstrip lines respectively disposed in the two third sub-channels, and a fourth metal via disposed in the second sub-channel.

[0015] According to some examples of the present invention, the width of the first sub-channel is greater than the width of the second sub-channel, and the width of the second sub-channel is greater than the width of the third sub-channel.

[0016] According to some examples of the present invention, the first sub-channel is perpendicular to the second sub-channel, and the third sub-channel is perpendicular to the second sub-channel.

[0017] According to some examples of the present invention, the distance dx1 between the four metal vias and the edge of the second sub-channel away from the first sub-channel satisfies the relationship: 0.7mm≤dx1≤0.85mm.

[0018] According to some examples of the present invention, it further includes: two fifth metal vias disposed on the second dielectric substrate and located within the first sub-channel, both fifth metal vias being disposed on the side of the third metal via away from the second sub-channel, the two fifth metal vias being spaced apart along the second direction of the SIW power divider, and the spacing between the two fifth metal vias being greater than the diameter of the third metal via.

[0019] According to some examples of the present invention, a plurality of second metal vias are formed with a first metal array and a second metal array, the second metal array being spaced apart from and surrounding the first metal array, and the first metal array, together with a third metal layer and a fourth metal, defining a second transmission channel.

[0020] According to some examples of the present invention, the diameters of the plurality of first metal through holes and the plurality of second metal through holes are all the same.

[0021] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0022] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0023] Figure 1 This is a schematic diagram of a SIW power divider according to an embodiment of the present invention;

[0024] Figure 2 This is a schematic diagram of the first metal layer according to an embodiment of the present invention;

[0025] Figure 3 This is a schematic diagram of the fourth metal layer according to an embodiment of the present invention;

[0026] Figure 4 This is a schematic diagram of the third metal layer according to an embodiment of the present invention;

[0027] Figure 5 This is a schematic diagram of simulation results according to an embodiment of the present invention.

[0028] Figure label:

[0029] SIW power divider 100;

[0030] First dielectric substrate 1; First metal layer 11; First clearance region 111;

[0031] Second dielectric substrate 2; Third metal layer 21; Second microstrip line 211; Fourth metal layer 22; Second clearance region 221;

[0032] First microstrip line 3;

[0033] Connecting strip 4;

[0034] First metal through-hole 5; First transmission channel 51;

[0035] Second metal through-hole 6; Second transmission channel 61; First sub-channel 611; Second sub-channel 612; Third sub-channel 613; First metal array 62; Second metal array 63;

[0036] Third metal through-hole 7;

[0037] Fourth metal through hole 8;

[0038] Fifth metal through hole 9;

[0039] First direction X; second direction Y. Detailed Implementation

[0040] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0041] It should be noted that within the vast electromagnetic spectrum, electromagnetic radiation between 30 GHz and 300 GHz is defined as the millimeter-wave band. Electromagnetic waves in this band exhibit unique advantages, including extremely wide bandwidth, highly focused narrow beams, and low absorption attenuation during atmospheric transmission. These characteristics collectively constitute its distinctive technical features. When millimeter-wave technology is integrated into communication systems, its superiority is particularly evident: strong anti-attenuation capabilities ensure stable signal transmission in complex environments; excellent anti-interference performance guarantees clear and accurate data transmission; enormous information carrying capacity greatly improves communication efficiency; and high confidentiality further enhances the security of the communication process. Given these numerous advantages, millimeter-wave technology has demonstrated enormous application potential and value in the field of communications. Whether in military communications requiring high confidentiality, high bandwidth, and rapid response, or in civilian communications seeking more efficient, stable, and secure communication solutions, millimeter-wave technology has become a research hotspot and a focus of application. Therefore, it has been extensively studied and widely applied globally, driving continuous innovation and development in communication technology.

[0042] Millimeter-wave power splitters / combiners are indispensable key components in millimeter-wave systems and core technologies for enhancing the output power of solid-state circuits. They have broad application prospects and technological advantages in various fields, including wireless communication systems (especially satellite communication and future 5G communication), radar systems (especially phased array radar and high-power transmission systems), testing, and measurement, continuously attracting high attention and in-depth research from scholars both domestically and internationally. This technology enhances output power by cleverly integrating the power of multiple coherent units or superimposing independent circuit modules. In terms of implementation, it mainly relies on two forms: metallic waveguides and planar microstrip circuits. Traditional metallic waveguides are known for their low loss and high Q value, but their high cost and weight pose a challenge to application. Conversely, while microstrip structures offer advantages in lightweight and planar design, their relatively high loss limits their widespread application.

[0043] Currently, substrate integrated waveguides (SIWs) are an innovative microwave and millimeter-wave transmission line structure that cleverly utilizes mature printed circuit board (PCB) processing technology, which reduces production costs and improves production efficiency.

[0044] SIW constructs a nearly closed waveguide structure on a dielectric substrate, inheriting not only the excellent characteristics of low loss and high Q value, but also perfectly integrating the convenience of seamless integration with planar circuits, opening up vast possibilities for applications in the microwave and millimeter-wave high-frequency bands. With its unique advantages, SIW has demonstrated enormous potential and broad prospects in the design and application of high-performance devices such as millimeter-wave power combining amplifiers.

[0045] In related technologies, the transition design between microstrip lines and substrate integrated waveguides (SIWs) often employs a relatively intuitive geometry, thanks to the high similarity in their modal field distributions, allowing for good matching of the vertical components of the electric field in the microstrip and SIW regions. To construct a compact, single-layer microstrip-to-SIW transition structure, a traditional approach is to connect the conductor portion of the microstrip line to the upper metal wall of the SIW via a tapered microstrip transition section, while simultaneously connecting its ground plane to the bottom metal layer of the SIW. To reduce discontinuities, a sufficiently long and width-matched tapered microstrip section is required, sometimes reaching half a wavelength. While this tapered transition structure effectively reduces discontinuities caused by structural abrupt changes and ensures good impedance matching, a significant drawback is the need to place the microstrip line on the same layer as the SIW's metal wall, resulting in excessive size. Furthermore, directly connecting the microstrip line to the SIW introduces additional insertion loss.

[0046] Based on this, the present invention proposes an SIW power divider 100. The first dielectric substrate 1 of the SIW power divider 100 has a first microstrip line 3, and the second dielectric substrate 2 has a second microstrip line 211. The first microstrip line 3 is used for input signals, and the second microstrip line 211 is used for output signals. The input signal of the first microstrip line 3 is transmitted in the first transmission channel 51. The first microstrip line 3 is connected to the third metal layer 21 through a connecting strip 4 and a third metal via 7. The third metal via 7 acts as a transition conversion structure to realize the transition conversion from microstrip signal to SIW signal. The converted SIW signal is transmitted in the second transmission channel 61. The second microstrip line 211 converts the SIW signal back into a microstrip signal and transmits it in the second transmission channel 61. Compared with the traditional inter-board transition structure, it has a smaller size and lower insertion loss.

[0047] The SIW power divider 100 according to an embodiment of the present invention is described below with reference to the accompanying drawings.

[0048] like Figures 1-4 As shown, the SIW power divider 100 according to an embodiment of the present invention includes: a first dielectric substrate 1, a second dielectric substrate 2, a plurality of first metal vias 5, a plurality of second metal vias 6, and a third metal via 7. The first dielectric substrate 1 includes a first metal layer 11, a first dielectric substrate, and a second metal layer stacked sequentially. The second dielectric substrate 2 includes a third metal layer 21, a second dielectric substrate, and a fourth metal layer 22 stacked sequentially, with at least a portion of the first metal layer 11 stacked with at least a portion of the fourth metal layer 22. The first metal layer 11 forms a first clearance region 111, and a first microstrip line 3 spaced apart from the first metal layer 11 is provided in the first clearance region 111. The fourth metal layer 22 forms a second clearance region 221, and a connecting strip 4 spaced apart from the fourth metal layer 22 is provided in the second clearance region 221. The first microstrip line 3... Connected to the connecting strip 4, the third metal layer 21 has at least one second microstrip line 211. Multiple first metal vias 5 are disposed on the first dielectric substrate and connected between the first metal layer 11 and the second metal layer. The multiple first metal vias 5, together with the first metal layer 11 and the second metal layer, define a first transmission channel 51. The first microstrip line 3 is disposed in the first transmission channel 51. Multiple second metal vias 6 are disposed on the second dielectric substrate and connected between the third metal layer 21 and the fourth metal layer 22. The multiple second metal vias 6, together with the third metal layer 21 and the fourth metal layer 22, define a second transmission channel 61. At least one second microstrip line 211 is disposed in the second transmission channel 61. A third metal via 7 is disposed on the second dielectric substrate and disposed in the second transmission channel 61. The third metal via 7 is connected between the connecting strip 4 and the third metal layer 21.

[0049] Specifically, such as Figure 2As shown, the length of the first dielectric substrate 1 is w1 and the width is h1+h2. The first dielectric substrate 1 includes a first metal layer 11, a first dielectric substrate and a second metal layer stacked in sequence. The dielectric used in the first dielectric substrate is Rogers RT3003. The thickness of the first dielectric substrate is 0.254mm. The thickness of the first metal layer 11 and the second metal layer is 0.035mm.

[0050] The first metal layer 11 has a first clearance region 111, and the first clearance region 111 is provided with a first microstrip line 3 spaced apart from the first metal layer 11, wherein, for example Figure 2 As shown, the first avoidance area 111 is a rectangular area, and the first microstrip line 3 is disposed within the rectangular area and spaced apart from the first metal layer 11 to prevent the first microstrip line 3 from contacting the first metal layer 11. Further, as... Figure 1 As shown, a plurality of arrayed first metal vias 5 are provided in the first dielectric substrate. These vias 5 are connected between the first metal layer 11 and the second metal layer. The vias 5, together with the first metal layer 11 and the second metal layer, define a first transmission channel 51. The first transmission channel 51 is used to transmit microstrip line signals. Quasi-TEM mode electromagnetic waves are transmitted on the first microstrip line 3. It can be understood that the width of the first transmission channel 51 is determined by two rows of oppositely arranged first metal vias 5. The distance between the centers of the two rows of first metal vias 5 is equal to the width of the first transmission channel 51. For example, the width of the first microstrip line 3 is w2, the width of the first clearance area 111 is w3, and the width of the first transmission channel 51 is w4. The first microstrip line 3 is used for input signals. w2, w3, and w4 together affect the impedance of the input port. In this example, the input port impedance is set to 50 ohms.

[0051] Further, the second dielectric substrate 2 has a length of w1 and a width of h1. The second dielectric substrate 2 includes a third metal layer 21, a second dielectric substrate, and a fourth metal layer 22 stacked sequentially. The second dielectric substrate uses Rogers RT3003 dielectric and has a thickness of 0.254 mm. The thicknesses of the third metal layer 21 and the fourth metal layer 22 are both 0.035 mm. When the first dielectric substrate 1 and the second dielectric substrate 2 are stacked, at least a portion of the first metal layer 11 is stacked with at least a portion of the fourth metal layer 22. Further, as... Figure 3 As shown, the fourth metal layer 22 forms a second clearance area 221. The second clearance area 221 is provided with a connecting strip 4 spaced apart from the fourth metal layer 22. The first microstrip line 3 is connected to the connecting strip 4. The overlap width between the first microstrip line 3 and the connecting strip 4 is b3. The second clearance area 221 is a rectangular area with a width of w3 and a width of w2 for the connecting strip 4.

[0052] Furthermore, the second dielectric substrate is provided with a plurality of arrayed second metal vias 6, which are connected between the third metal layer 21 and the fourth metal layer 22. The plurality of second metal vias 6, together with the third metal layer 21 and the fourth metal layer, define the second transmission channel 61. The third metal via 7 is disposed in the second dielectric substrate and in the second transmission channel 61. The third metal via 7 is connected between the connecting strip 4 and the third metal layer 21. Thus, the first microstrip line 3 is connected to the third metal layer 21 through the connecting strip 4 and the third metal via 7. The third metal via 7 acts as a transition conversion structure, converting the microstrip signal of the first microstrip line 3 into a SIW signal. The converted SIW signal is transmitted in the second transmission channel 61.

[0053] Furthermore, the third metal layer 21 has at least one second microstrip line 211, which is disposed within the second transmission channel 61. The second microstrip line 211 is used to output signals and converts the SIW signal back into a microstrip signal for transmission within the second transmission channel 61. The SIW-to-microstrip structure used in this invention is a direct conversion, rather than the conventional tapered transition structure. This is because the half-wavelength is relatively short in the millimeter wave band, and a tapered transition conversion structure would require high dimensional accuracy and be difficult to process and apply. The conversion structure used in this invention is more stable and has lower losses.

[0054] It should be noted that the diameter of the third metal via 7 is D1, which is 0.6mm-0.8mm. Furthermore, the third metal via 7 with a diameter of D1 acts as a probe used in the transition between the coaxial cable and a traditional waveguide. The size of the third metal via 7 should not be too small or too far inward, otherwise it will significantly affect signal transmission. In this example, considering the edge cutting issue in PCB processing, the final selection was a distance of 0.3mm from the edge to the third metal via 7. Figure 1 As shown, b2 is 0.3mm plus half of D1.

[0055] According to an embodiment of the present invention, the SIW power divider 100 has a first dielectric substrate 1 having a first microstrip line 3 and a second dielectric substrate 2 having a second microstrip line 211. The first microstrip line 3 is used for input signals, and the second microstrip line 211 is used for output signals. The input signal of the first microstrip line 3 is transmitted in the first transmission channel 51. The first microstrip line 3 is connected to the third metal layer 21 through a connecting strip 4 and a third metal via 7. The third metal via 7 acts as a transition conversion structure to realize the transition conversion from microstrip signal to SIW signal. The converted SIW signal is transmitted in the second transmission channel 61. The second microstrip line 211 converts the SIW signal back into a microstrip signal and transmits it in the second transmission channel 61. Compared with the traditional inter-board transition structure, it has a smaller size and lower insertion loss.

[0056] Understandably, using a substrate-integrated waveguide structure for planar circuit design achieves significant weight reduction compared to heavy metal waveguides. Furthermore, compared to pure microstrip structures, this design offers superior interference immunity and lower transmission loss. In addition, PCB fabrication significantly reduces manufacturing costs and effectively shortens the production cycle compared to integrated low-temperature co-fired ceramic (LTCC) technology.

[0057] Of particular note is the SIW-to-microstrip transition design employed in this invention, which, compared to the traditional tapered transition method, successfully achieves a significant reduction in transition size while ensuring good matching across the broadband range. This innovative design not only optimizes product performance but also provides more possibilities for subsequent applications.

[0058] In recent years, the rapid development of radio frequency (RF) and microwave technologies has greatly driven transformation across various industries, leading microwave circuits and systems towards miniaturization, low power consumption, low cost, and high integration. As Moore's Law gradually approaches its physical limits, the focus of chip development has shifted from simply pursuing reduced power consumption and improved performance to a more pragmatic goal of "surpassing Moore's Law"—meeting market demands more closely. Against this backdrop, System-in-Package (SIP) technology has emerged as a crucial way to break through traditional limitations. It achieves efficient connections between chips and substrates through various methods such as wire bonding and flip-chip bonding. Based on PCB technology, SIP technology leverages the advantages of PCB processes to integrate multiple active and passive devices and chips into a single package, forming fully functional modules or systems, exhibiting extremely high flexibility and adaptability. SIP packaging can take many forms, ranging from 2D multi-chip planar module layouts to compact 3D stacked structures, the latter being particularly effective in significantly reducing package area. In the long term, SIP technology will continue to optimize the performance and efficiency of electronic products to meet the diverse needs of the future market.

[0059] However, with the rapid development of high-frequency signal radio frequency systems, traditional high-frequency shortwave signal waveguide power dividers have gradually become unsuitable due to their high processing complexity, large size, and heavy weight. Therefore, the board-to-board structure designed in this invention is particularly suitable for SIP (System-in-Package) system-in-package technology based on PCB technology. SIP technology, with its small area, low cost, fast production cycle, and high-frequency, high-speed transmission characteristics, shows broad application prospects in portable electronic products such as power amplifiers (PAs), Bluetooth modules, and image sensing modules.

[0060] According to some examples of the invention, such as Figures 1-3 As shown, the third metal via 7, the first microstrip line 3, and the connecting strip 4 are all aligned with the center of the SIW power divider 100 along the first direction X. That is, the third metal via 7, the first microstrip line 3, and the connecting strip 4 are aligned with the center in the first direction X. This arrangement makes the third metal via 7, the first microstrip line 3, and the connecting strip 4 symmetrically arranged along the center line, which helps to improve the compactness of the SIW power divider 100 and ensures the consistency of the signal path during signal transmission.

[0061] According to some examples of the invention, such as Figure 1 As shown, the second transmission channel 61 is symmetrically arranged with respect to the central axis of the first microstrip line 3. The third metal layer 21 forms two second microstrip lines 211, and the two second microstrip lines 211 are symmetrical along the central axis of the first microstrip line 3. The SIW power divider 100 also includes a fourth metal via 8, which is disposed on the second dielectric substrate and located in the second transmission channel 61. The fourth metal via 8 is connected between the first metal layer 11 and the second metal layer, and the fourth metal via 8 is aligned with the third metal via 7 along the center of the first direction X.

[0062] Specifically, the second transmission channel 61 is constructed as a symmetrical structure centered on the central axis of the first microstrip line 3, and the third metal layer 21 forms two second microstrip lines 211. The two second microstrip lines 211 are symmetrical along the central axis of the first microstrip line 3, that is, the two second microstrip lines 211 are arranged symmetrically on the left and right. The width of the second microstrip line 211 is w6, and the two sides of the second microstrip line 211 are spaced apart from the third metal layer 21. The distance between the left and right edges of the spaced area is w5. w5 and w6 together affect the impedance of the output port.

[0063] Furthermore, the SIW power divider 100 also includes a fourth metal via 8, which is disposed on the second dielectric substrate and located within the second transmission channel 61. The fourth metal via 8 connects the first metal layer 11 and the second metal layer, and is aligned with the third metal via 7 along the center of the first direction X. The diameter of the fourth metal via 8 is D2, which is 0.2mm-0.25mm. The fourth metal via 8 with a diameter of D2 guides the power division, so that the SIW signal is equally divided into two paths and transmitted to the left and right sides respectively. The symmetrical structure design of the second transmission channel 61 and the position of the fourth metal via 8 ensure the consistency of the signal path during power distribution and synthesis. This arrangement can reduce the phase difference between the two output ports after power division, which is beneficial to improving the overall performance.

[0064] According to some examples of the invention, such as Figure 1 As shown, the second transmission channel 61 includes a first sub-channel 611, a second sub-channel 612, and two third sub-channels 613. The first sub-channel 611 extends along the first direction X and is connected to the second sub-channel 612. A third metal via 7 is disposed in the first sub-channel 611. Both third sub-channels 613 are connected to the second sub-channel 612, and the two third sub-channels 613 are symmetrical along the central axis of the first microstrip line 3. Two second microstrip lines 211 are respectively disposed in the two third sub-channels 613. A fourth metal via 8 is disposed in the second sub-channel 612. With this configuration, the third metal via 7 converts the microstrip signal of the first microstrip line 3 into a SIW signal. The converted SIW signal is transmitted in the first sub-channel 611. Then, the fourth metal via 8 guides the power divider, so that the SIW signal is equally divided into two paths in the second sub-channel 612 and transmitted to the left and right sides respectively. The SIW signal is converted into a microstrip signal through the second microstrip line 211 in the third sub-channel 613 respectively. The overall structure is simple and reliable.

[0065] According to some examples of the invention, such as Figure 1 As shown, the width of the first sub-channel 611 is greater than the width of the second sub-channel 612, and the width of the second sub-channel 612 is greater than the width of the third sub-channel 613. Specifically, the width of the first sub-channel 611 is a2, the width of the second sub-channel 612 is b1, and the width of the third sub-channel 613 is a4. a2 is greater than b1, and b1 is greater than a4. That is to say, the distance between the second metal vias 6 on both sides before the power divider is a2. After the power divider, the distance between the second metal vias 6 on both sides decreases to b1. Finally, the distance between the second metal vias 6 on both sides at the signal output point decreases from b1 to a4. This is mainly to prepare for the subsequent SIW signal to microstrip signal conversion and to adjust the port impedance in advance. It should be noted that in this example, the size of the second transmission channel 61 can also be changed by adjusting the dimensions of w1, h1, a2, and b1, thereby changing the resonant frequency to achieve the effect of a high-frequency filter.

[0066] According to some examples of the invention, such as Figure 1 As shown, the first sub-channel 611 is perpendicular to the second sub-channel 612, and the third sub-channel 613 is perpendicular to the second sub-channel 612. Specifically, the SIW signal is transmitted in the first sub-channel 611, and then guided by the fourth metal via 8. The first sub-channel 611 is perpendicular to the second sub-channel 612, so that the SIW signal is equally split into two paths in the second sub-channel 612 and transmitted horizontally to the left and right sides respectively. Furthermore, the third sub-channel 613 is perpendicular to the second sub-channel 612, and a 90° bend structure is used to further reduce the distance between the two second metal vias 6, so as to achieve impedance matching with the subsequent 50-ohm microstrip line.

[0067] According to some examples of the invention, such as Figure 1 As shown, the distance dx1 between the fourth metal through-hole and the edge of the second sub-channel 612 away from the first sub-channel 611 satisfies the relationship: 0.7mm ≤ dx1 ≤ 0.85mm. Specifically, dx1 also has a significant impact on the power distribution structure. dx1 determines the position of the cylindrical through-hole with a diameter of D2. The distance dx1 between the fourth metal through-hole 8 and the edge of the second sub-channel 612 away from the first sub-channel 611 is 0.7mm-0.85mm.

[0068] According to some examples of the invention, such as Figure 1 As shown, it also includes: two fifth metal through holes, which are disposed on the second dielectric substrate and located in the first sub-channel 611. Both fifth metal through holes are disposed on the side of the third metal through hole 7 away from the second sub-channel 612. The two fifth metal through holes are spaced apart along the second direction Y of the SIW power divider 100, and the spacing between the two fifth metal through holes is greater than the diameter of the third metal through hole 7.

[0069] Specifically, the SIW power divider 100 also includes two fifth metal vias. These two fifth metal vias are disposed on the second dielectric substrate and located within the first sub-channel 611. The center-to-center distance between the two fifth metal vias is a1. The two fifth metal vias are symmetrically arranged relative to the third metal via 7 and are both located on the side of the third metal via 7 furthest from the second sub-channel 612. The center-to-center distance between the two fifth metal vias is 2.2mm-2.4mm. Compared to a conventional SIW power divider structure, the addition of two fifth metal vias with a distance of a1 can prevent SIW signal loss and reduce overall loss. It should be noted that a1, a2, b1, and dx1 also have a significant impact on the power divider structure.

[0070] According to some examples of the invention, such as Figure 1As shown, multiple second metal vias 6 form a first metal array 62 and a second metal array 63. The second metal array 63 is spaced apart from and surrounds the first metal array 62. The first metal array 62, together with the third metal layer 21 and the fourth metal, defines the second transmission channel 61. Specifically, multiple second metal vias 6 form a first metal array 62 and a second metal array 63. The first metal array 62, together with the third metal layer 21 and the fourth metal, defines the second transmission channel 61. The second metal array 63 is spaced apart from and surrounds the first metal array 62. The outer second metal array 63 is mainly for further enhancing anti-interference, and the distance between the outer second metal array 63 and the inner first metal array 62 should be greater than 0.35 mm. The widths of the outer second metal array 63 corresponding to the first sub-channel 611, the second sub-channel 612, and the two third sub-channels 613 are a3, b11, and a44, respectively.

[0071] According to some examples of the invention, such as Figure 1 As shown, the diameters of the multiple first metal through holes 5 and the multiple second metal through holes 6 are all the same. Specifically, the diameter of the first metal through holes 5 and the second metal through holes 6 is D3, which is between 0.2mm and 0.3mm. The distance between two adjacent first metal through holes 5 and two adjacent second metal through holes 6 is 0.4mm to 0.55mm. This satisfies the requirement that the distance between the metal through holes is less than five times the radius of the metal through holes, thereby achieving good shielding of signals.

[0072] Furthermore, in order to explore the function of the SIW power divider 100, the present invention was simulated. The selected dielectric substrate material was Rogers RT3003, with a relative permittivity εr = 3.0, a loss tangent tanθ = 0.001, and a single-layer dielectric board thickness of 0.254 mm.

[0073] The simulation results of the S-parameters are shown below. Figure 5 S(1,1) represents the input port return loss, and S(2,1) and S(3,1) (the curves S(2,1) and S(3,1) coincide, but S(3,1) is not shown in the figure) represent the transmission coefficient. As can be seen from the S-parameter graph, the return loss of the S(1,1) curve is generally better than 15dB, indicating good matching. The two curves S(2,1) and S(3,1) completely coincide, with no obvious phase difference. The insertion loss in 71-76GHz and 81-86GHz is better than 3.56dB, and the curve is relatively flat in the broadband range. The fluctuation of the insertion loss is within ±0.1dB.

[0074] It should be noted that, in the description of this invention, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention. Furthermore, features defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0075] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0076] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0077] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0078] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A SIW power divider, characterized in that, include: A first dielectric substrate and a second dielectric substrate, the first dielectric substrate comprising a first metal layer, a first dielectric substrate and a second metal layer stacked sequentially, the second dielectric substrate comprising a third metal layer, a second dielectric substrate and a fourth metal layer stacked sequentially, wherein at least a portion of the first metal layer is stacked with at least a portion of the fourth metal layer, the first metal layer having a first clearance region, wherein a first microstrip line spaced apart from the first metal layer is provided in the first clearance region, the fourth metal layer having a second clearance region, wherein a connecting strip spaced apart from the fourth metal layer is provided in the second clearance region, wherein the first microstrip line is connected to the connecting strip, and the third metal layer having at least one second microstrip line; Multiple first metal vias are disposed on the first dielectric substrate and connected between the first metal layer and the second metal layer. The multiple first metal vias, together with the first metal layer and the second metal layer, define a first transmission channel. The first microstrip line is disposed in the first transmission channel. Multiple second metal vias are disposed on the second dielectric substrate and connected between the third metal layer and the fourth metal layer. The multiple second metal vias, together with the third metal layer and the fourth metal layer, define a second transmission channel. At least one second microstrip line is disposed within the second transmission channel. A third metal via is disposed on the second dielectric substrate and within the second transmission channel, and the third metal via is connected between the connecting strip and the third metal layer.

2. The SIW power divider according to claim 1, characterized in that, The third metal via, the first microstrip line, and the connecting strip are all aligned with the center of the SIW power divider along the first direction.

3. The SIW power divider according to claim 2, characterized in that, The second transmission channel is symmetrically arranged with respect to the central axis of the first microstrip line. The third metal layer forms two second microstrip lines, and the two second microstrip lines are symmetrical along the central axis of the first microstrip line. The SIW power divider also includes a fourth metal via, which is disposed on the second dielectric substrate and located within the second transmission channel. The fourth metal via is connected between the first metal layer and the second metal layer, and the fourth metal via is aligned with the center of the third metal via along the first direction.

4. The SIW power divider according to claim 3, characterized in that, The second transmission channel includes: a first sub-channel, a second sub-channel, and two third sub-channels. The first sub-channel extends along the first direction and communicates with the second sub-channel. The third metal via is disposed in the first sub-channel. Both third sub-channels are communicated with the second sub-channel, and the two third sub-channels are symmetrical about the central axis of the first microstrip line. The two second microstrip lines are respectively disposed in the two third sub-channels. The fourth metal via is disposed in the second sub-channel.

5. The SIW power divider according to claim 4, characterized in that, The width of the first sub-channel is greater than the width of the second sub-channel, and the width of the second sub-channel is greater than the width of the third sub-channel.

6. The SIW power divider according to claim 4, characterized in that, The first sub-channel is perpendicular to the second sub-channel, and the third sub-channel is perpendicular to the second sub-channel.

7. The SIW power divider according to claim 4, characterized in that, The distance dx1 between the four metal through holes and the edge of the second sub-channel away from the first sub-channel satisfies the relationship: 0.7mm≤dx1≤0.85mm.

8. The SIW power divider according to claim 4, characterized in that, Also includes: Two fifth metal vias are disposed on the second dielectric substrate and located within the first sub-channel. Both fifth metal vias are disposed on the side of the third metal via away from the second sub-channel. The two fifth metal vias are spaced apart along the second direction of the SIW power divider, and the spacing between the two fifth metal vias is greater than the diameter of the third metal via.

9. The SIW power divider according to claim 1, characterized in that, Multiple second metal vias form a first metal array and a second metal array, the second metal array being spaced apart from and surrounding the first metal array, and the first metal array, together with the third metal layer and the fourth metal, defining a second transmission channel.

10. The SIW power divider according to claim 1, characterized in that, The diameters of the plurality of first metal through holes and the plurality of second metal through holes are all the same.

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