Harmonic leakage suppression for wireless circuitry

Abstract

The invention relates to harmonic leakage suppression for wireless circuitry. A wireless circuit is provided that includes a radio frequency amplifier and a passive network coupled to the radio frequency amplifier. The passive network includes: a primary coil; a secondary coil magnetically coupled to the primary coil; and a harmonic suppression component coupled between the primary coil and the secondary coil and configured to suppress a harmonic signal generated by the radio frequency amplifier. The harmonic suppression component may be a capacitor. The harmonic suppression component may be configured to operate as an open circuit at a first frequency, and may also be configured to resonate with a portion of the secondary coil at a second frequency different from the first frequency.

Description

[0001] This application claims priority to U.S. Patent Application No. 18 / 814,215, filed August 23, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates in its entirety to electronic devices, including electronic devices having wireless communication circuitry. Background Technology

[0003] Electronic devices can possess wireless communication capabilities. Electronic devices with wireless communication capabilities have wireless communication circuits, which have one or more antennas. The wireless transceiver circuit within the wireless communication circuit uses the antennas to transmit and receive radio frequency signals.

[0004] The radio frequency (RF) signal transmitted by the antenna can be fed through a power amplifier configured to amplify the low-power analog signal into a high-power signal more suitable for long-distance transmission over the air. The RF signal received at the antenna can be fed through a low-noise amplifier configured to amplify the low-power analog signal into a high-power signal for processing at the receiver. However, if not handled carefully, the RF amplifier circuitry may introduce harmonic leakage, resulting in unwanted spurious emissions at the antenna. Summary of the Invention

[0005] One aspect of this disclosure provides a wireless circuit comprising: a radio frequency (RF) amplifier; and a passive network coupled to the RF amplifier. The passive network includes: a primary coil having opposite terminals coupled to the RF amplifier; a secondary coil magnetically coupled to the primary coil; and a harmonic suppression component coupled between the primary and secondary coils and configured to suppress harmonic signals generated by the RF amplifier. The secondary coil may have a first terminal coupled to an antenna and a second terminal coupled to a ground power supply line. The harmonic suppression component may include a capacitor having a first terminal coupled to a node disposed between a first coil portion and a second coil portion of the secondary coil. The capacitor may have a second terminal coupled to a center tap of the primary coil. The harmonic suppression component may be configured to suppress third harmonic signals generated by the RF amplifier.

[0006] One aspect of this disclosure provides a passive network comprising: a primary coil coupled to an amplifier; a secondary coil coupled to an antenna; and a harmonic suppression component having a first terminal coupled to a node in the primary coil and a second terminal coupled to a node in the secondary coil, wherein the harmonic suppression component is configured to operate as an open circuit at a first frequency and is further configured to resonate with a portion of the secondary coil at a second frequency different from the first frequency. The harmonic suppression component may include a capacitor having a first terminal coupled to a center tap of the primary coil and a second terminal coupled to a node disposed between the portion of the secondary coil and another portion of the secondary coil. The portion of the secondary coil may be shunt to a ground line.

[0007] One aspect of this disclosure provides a circuit comprising: a balun having a first coil and a second coil; and a harmonic suppression component having a first terminal coupled to a first node in the first coil and a second terminal coupled to a second node in the second coil. The harmonic suppression component can be configured to operate as an open circuit at a first frequency and can also be configured to resonate with a portion of the second coil at a second frequency different from the first frequency. Attached Figure Description

[0008] Figure 1 These are illustrations of exemplary electronic devices with wireless circuitry according to some implementation schemes.

[0009] Figure 2 It is a diagram of an exemplary wireless circuit with transmitting and receiving circuits according to some implementation schemes.

[0010] Figure 3 This is a diagram illustrating an exemplary passive matching network coupled between an amplifier and an antenna according to some implementation schemes.

[0011] Figure 4 It is a diagram of third harmonic distortion (HD3) and second harmonic distortion (HD2) drawn according to some implementation schemes.

[0012] Figure 5 This illustrates operation under differential mode according to some implementation schemes. Figure 3 A diagram illustrating the equivalent circuit of a passive matching network.

[0013] Figure 6 This illustrates operation under common mode according to some implementation schemes. Figure 3 A diagram illustrating the equivalent circuit of a passive matching network.

[0014] Figure 7It is a diagram of signal gain as a function of frequency for differential-mode and common-mode signals, based on some implementation schemes. Detailed Implementation

[0015] Such as Figure 1 The electronic equipment of device 10 may be provided with a wireless circuit including one or more harmonic filtering components. The wireless circuit may include: an antenna; a radio frequency (RF) transmitter amplifier configured to amplify an RF signal to be transmitted at the antenna; and an output network coupled between the RF amplifier and the antenna. The output network may be a transformer-based impedance matching network (balanced-to-unbalanced converter). The output network may include: a primary coil configured to receive a differential signal; a secondary coil coupled between the antenna and a ground line; and a harmonic suppression component coupled between the primary and secondary coils. The harmonic suppression component may be a capacitor having a first terminal coupled to a center tap of the primary coil and a second terminal coupled to a point along the winding of the secondary coil. An output network configured in this way is technically advantageous and beneficial for providing third harmonic filtering without reducing second harmonic suppression.

[0016] Figure 1 The electronic device 10 may be: a computing device, such as a laptop computer, desktop computer, computer monitor containing an embedded computer, tablet computer, cellular phone, media player, or other handheld or portable electronic device; a smaller device, such as a wristwatch, a wristband, a headset or handset, a device embedded in glasses; or other equipment worn on a user's head; or other wearable or micro-devices, televisions, computer monitors without an embedded computer, gaming devices, navigation devices, embedded systems (such as systems in which electronic equipment with a display is installed in a kiosk or vehicle), voice-controlled speakers connected to the wireless Internet, home entertainment devices, remote control devices, game controllers, peripheral user input devices, wireless base stations or access points, equipment that enables the functions of two or more of these devices; or other electronic equipment.

[0017] like Figure 1As shown in the functional block diagram, device 10 may include components located on or within an electronic device housing, such as housing 12. Housing 12 (sometimes referred to as a shell) may be formed of plastic, glass, ceramic, fiber composite material, metal (e.g., stainless steel, aluminum, metal alloys, etc.), other suitable materials, or combinations thereof. In some embodiments, part or all of housing 12 may be formed of dielectric or other low-conductivity materials (e.g., glass, ceramic, plastic, sapphire, etc.). In other embodiments, housing 12, or at least some of the structures constituting housing 12, may be formed of metallic elements.

[0018] Device 10 may include control circuitry 14. Control circuitry 14 may include storage devices, such as storage circuitry 16. Storage circuitry 16 may include hard disk drive storage devices, non-volatile memory (e.g., flash memory configured to form a solid-state drive or other electrically programmable read-only memory), volatile memory (e.g., static random access memory or dynamic random access memory), etc. Storage circuitry 16 may include storage devices integrated within device 10, and / or removable storage media.

[0019] Control circuitry 14 may include processing circuitry, such as processing circuitry 18. Processing circuitry 18 may be used to control the operation of device 10. Processing circuitry 18 may include one or more microprocessors, microcontrollers, digital signal processors, host processors, baseband processor integrated circuits, application-specific integrated circuits, central processing units (CPUs), etc. Control circuitry 14 may be configured to perform operations in device 10 using hardware (e.g., dedicated hardware or circuitry), firmware, and / or software. Software code used to perform operations in device 10 may be stored on storage circuitry 16 (e.g., storage circuitry 16 may include a non-transitory (tangible) computer-readable storage medium storing software code). This software code may sometimes be referred to as program instructions, software, data, commands, or code. The software code stored on storage circuitry 16 may be executed by processing circuitry 18.

[0020] Control circuitry 14 can be used to run software on device 10, such as satellite navigation applications, internet browsing applications, Voice over Internet Protocol (VoIP) telephone calling applications, email applications, media playback applications, operating system functions, etc. To support interaction with external equipment, control circuitry 14 can be used to implement communication protocols. Communication protocols that can be implemented using control circuitry 14 include Internet Protocol, Wireless Local Area Network (WLAN) protocols (e.g., IEEE 802.11 protocol—sometimes referred to as...). ), such as Protocols for other short-range wireless communication links, such as protocols for wireless personal area networks (WPANs) or other wireless personal area network (WPAN) protocols, IEEE 802.11ad protocols (e.g., ultra-wideband protocols), cellular phone protocols (e.g., 3G protocols, 4G (LTE) protocols, 5G protocols, etc.), sixth-generation (6G) protocols, sub-THz protocols, THz protocols, etc.), antenna diversity protocols, satellite navigation system protocols (e.g., Global Positioning System (GPS) protocols, Global Navigation Satellite System (GLONASS) protocols, etc.), antenna-based spatial ranging protocols (e.g., radio detection and ranging (RADAR) protocols or other desired distance detection protocols for signals transmitted at millimeter-wave and centimeter-wave frequencies), or any other desired communication protocol. Each communication protocol may be associated with a corresponding radio access technology (RAT), which specifies the physical connection method used to implement the protocol.

[0021] Device 10 may include input-output circuitry 20. Input-output circuitry 20 may include input-output device 22. Input-output device 22 may be used to allow data to be supplied to device 10 and to allow data to be provided from device 10 to external devices. Input-output device 22 may include user interface devices, data port devices, and other input-output components. For example, input-output device 22 may include touch sensors, displays (e.g., touch-sensitive displays and / or force-sensitive displays), light-emitting components such as displays without touch sensor capability, buttons (mechanical, capacitive, optical, etc.), scroll wheels, touchpads, keypads, keyboards, microphones, cameras, buttons, speakers, status indicators, audio jacks and other audio port components, digital data port devices, motion sensors (accelerometers, gyroscopes, and / or compasses for detecting motion), capacitive sensors, proximity sensors, magnetic sensors, force sensors (e.g., force sensors coupled to displays to detect pressure applied to displays), etc. In some configurations, keyboards, headphones, displays, pointing devices such as touchpads, mice and joysticks, and other input-output devices can be coupled to device 10 using wired or wireless connections (e.g., some input-output devices in input-output devices 22 can be peripherals coupled to the main processing unit or other parts of device 10 via wired or wireless links).

[0022] Input-output circuitry 20 may include wireless circuitry 24 to support wireless communication. Wireless circuitry 24 (sometimes referred to herein as wireless communication circuitry 24) may include one or more antennas. Wireless circuitry 24 may also include baseband processor circuitry, transceiver circuitry, amplifier circuitry, filter circuitry, switching circuitry, RF transmission lines, and / or any other circuitry for transmitting and / or receiving RF signals using antennas.

[0023] Wireless circuit 24 can transmit and / or receive radio frequency signals within a corresponding frequency band of a radio frequency (sometimes referred to herein as the communication band or simply the "band"). The frequency band processed by wireless circuit 24 may include the wireless local area network (WLAN) band (e.g., (IEEE 802.11) or other WLAN communication bands), such as the 2.4 GHz WLAN band (e.g., 2400 MHz to 2480 MHz), the 5 GHz WLAN band (e.g., 5180 MHz to 5825 MHz), 6E band (e.g., 5925MHz to 7125MHz) and / or others Frequency bands (e.g., 1875MHz to 5160MHz); Wireless Personal Area Network (WPAN) frequency bands, such as 2.4GHz. Frequency bands or other WPAN communication bands; cellular phone bands (e.g., bands from approximately 600 MHz to approximately 5 GHz, 3G bands, 4G LTE bands, 5G New Radio Frequency Range 1 (FR1) band below 10 GHz, 5G New Radio Frequency Range 2 (FR2) band between 20 GHz and 60 GHz, etc.), cellular sidebands, 6G bands between 100 GHz and 1000 GHz (e.g., sub-THz, THz, or THF bands), etc.), other centimeter or millimeter wave bands between 10 GHz and 300 GHz; near-field communication bands (e.g., 13.56 MHz); satellite navigation bands (e.g., GPS bands from 1565 MHz to 1610 MHz, Global Navigation Satellite System (GLONASS) bands, BeiDou Navigation Satellite System (BDS) bands, etc.); in IEEE Ultra-wideband (UWB) bands operating under the 802.15.4 protocol and / or other ultra-wideband communication protocols; communication bands under the 3GPP wireless communication standard family; communication bands under the IEEE 802.XX standard family; and / or any other desired bands of interest.

[0024] Figure 2 This is a diagram showing exemplary components within wireless circuit 24. (Example...) Figure 2As shown, wireless circuitry 24 may include processing circuitry (such as processing circuitry 26), radio frequency (RF) transceiver circuitry (such as RF transceiver 28), RF front-end circuitry (such as RF front-end module (FEM) 40), and antenna 42. Processing circuitry 26 may include a baseband processor, application processor, general-purpose processor, microprocessor, microcontroller, digital signal processor, host processor, dedicated signal processing hardware, and / or other types of processor. Processing circuitry 26 may be coupled to transceiver 28 via path 34. Transceiver 28 may be coupled to antenna 42 via RF transmission line path 36. RF front-end module 40 may be disposed on RF transmission line path 36 between transceiver 28 and antenna 42.

[0025] exist Figure 2 In the example, for clarity, wireless circuit 24 is illustrated as including only a single processing circuit 26, a single transceiver 28, a single front-end module 40, and a single antenna 42. Generally, wireless circuit 24 may include any desired number of processing units 26, any desired number of transceivers 28, any desired number of front-end modules 40, and any desired number of antennas 42. Each processing unit 26 may be coupled to one or more transceivers 28 via a corresponding path 34. Each transceiver 28 may include transmitter circuitry 30 configured to output uplink signals to antenna 42, may include receiver circuitry 32 configured to receive downlink signals from antenna 42, and may be coupled to one or more antennas 42 via a corresponding RF transmission line path 36. Each RF transmission line path 36 may have a corresponding front-end module 40 disposed thereon. If desired, two or more front-end modules 40 may be disposed on the same RF transmission line path 36. If desired, one or more RF transmission line paths 36 in wireless circuit 24 may be implemented without any front-end modules disposed thereon.

[0026] The RF transmit line path 36 can be coupled to an antenna feed section on the antenna 42. The antenna feed section may, for example, include a positive antenna feed terminal and a ground antenna feed terminal. The RF transmit line path 36 may have a positive transmit line signal path coupled to the positive antenna feed terminal on the antenna 42. The RF transmit line path 36 may also have a ground transmit line signal path coupled to the ground antenna feed terminal on the antenna 42. This example is merely illustrative, and in general, the antenna 42 can be fed using any desired antenna feeding scheme. If desired, the antenna 42 may have multiple antenna feed sections coupled to one or more RF transmit line paths 36.

[0027] RF transmission path 36 may include a means for communication with device 10 ( Figure 1The transmitting lines in device 10 route the radio frequency antenna signals within the device. The transmitting lines in device 10 may include coaxial cables, microstrip transmitting lines, stripline transmitting lines, edge-coupled microstrip transmitting lines, edge-coupled stripline transmitting lines, and transmitting lines formed by combinations of these types of transmitting lines. The transmitting lines in device 10 (such as the transmitting lines in radio frequency transmitting line path 36) may be integrated into rigid and / or flexible printed circuit boards.

[0028] During wireless transmission, processing circuitry 26 can provide a transmit signal (e.g., a digital signal or a baseband signal) to transceiver 28 via path 34. Transceiver 28 may also include circuitry for converting the transmit (baseband) signal received from processing circuitry 26 into a corresponding radio frequency (RF) signal. For example, transceiver circuitry 28 may include mixer circuitry for up-converting (or modulating) the transmit (baseband) signal to RF before transmission via antenna 42. The processing circuitry 26 communicates with transceiver 28. Figure 2 The examples provided are merely illustrative. Generally, transceiver 28 can communicate with a baseband processor, application processor, general-purpose processor, microcontroller, microprocessor, or one or more processors within circuit 18. Transceiver circuit 28 may also include digital-to-analog converter (DAC) circuitry and / or analog-to-digital converter (ADC) circuitry for converting signals between the digital and analog domains. Transceiver 28 can transmit radio frequency (RF) signals via transmitter (TX) 30 through RF transmission line path 36 and front-end module 40 via antenna 42. Antenna 42 can transmit the RF signal to external wireless equipment by radiating it into free space.

[0029] When performing wireless reception, antenna 42 can receive radio frequency (RF) signals from external wireless equipment. The received RF signals can be transmitted to transceiver 28 via RF transmission path 36 and front-end module 40. Transceiver 28 may include circuitry, such as receiver (RX) 32, for receiving signals from front-end module 40 and for converting the received RF signals into corresponding baseband signals. For example, transceiver 28 may include mixer circuitry for down-converting (or demodulating) the received RF signals to baseband frequencies before transmitting the received signals via path 34 to processing circuitry 26.

[0030] Front-end module (FEM) 40 may include RF front-end circuitry that operates on RF signals transmitted (transmitted and / or received) via RF transmit line path 36. For example, FEM 40 may include front-end module (FEM) components such as RF filter circuitry 44 (e.g., low-pass filter, high-pass filter, notch filter, band-pass filter, multiplexing circuitry, duplexer circuitry, antenna commons circuitry, triplexer circuitry, etc.), switching circuitry 46 (e.g., one or more RF switches), RF amplifier circuitry 48 (e.g., one or more power amplifier circuitry 50 and / or one or more low-noise amplifier circuitry 52), impedance matching circuitry (e.g., circuitry that helps match the impedance of antenna 42 to the impedance of RF transmit line 36), antenna tuning circuitry (e.g., a network of capacitors, resistors, inductors, and / or switches that adjust the frequency response of antenna 42), RF coupler circuitry, charge pump circuitry, power management circuitry, digital control and interface circuitry, and / or any other desired circuitry that operates on the RF signals transmitted and / or received by antenna 42. Each front-end module component can be mounted on a common (shared) substrate, such as a rigid printed circuit board substrate or a flexible printed circuit board substrate. If desired, the various front-end module components can also be integrated into a single integrated circuit chip. If desired, amplifier circuit 48 and / or other components in front-end 40 (such as filter circuit 44) can also be implemented as part of transceiver circuit 28.

[0031] Filter circuit 44, switching circuit 46, amplifier circuit 48, and other circuits may be disposed along RF transmission line path 36, may be incorporated into FEM 40, and / or may be incorporated into antenna 42 (e.g., to support antenna tuning, to support operation in a desired frequency band, etc.). These components (sometimes referred to herein as antenna tuning components) may be adjusted (e.g., using control circuit 14) to adjust the frequency response and wireless performance of antenna 42 over time.

[0032] The transceiver 28 can be separate from the front-end module 40. For example, the transceiver 28 can be formed on another substrate such as the main logic board of device 10, a rigid printed circuit board, or a flexible printed circuit that is not part of the front-end module 40. Although for clarity... Figure 1In the example, control circuitry 14 is shown separate from wireless circuitry 24, but wireless circuitry 24 may include processing circuitry and / or storage circuitry, the processing circuitry forming part of processing circuitry 18 and the storage circuitry forming part of storage circuitry 16 of control circuitry 14 (e.g., portions of control circuitry 14 may be implemented on wireless circuitry 24). As an example, portions of processing circuitry 26 and / or transceiver 28 (e.g., a host processor on transceiver 28) may form part of control circuitry 14. Control circuitry 14 (e.g., portions of control circuitry 14 formed on processing circuitry 26, portions of control circuitry 14 formed on transceiver 28, and / or portions of control circuitry 14 separate from wireless circuitry 24) may provide control signals (e.g., via one or more control paths in device 10) to control the operation of front-end module 40.

[0033] Transceiver circuitry 28 may include processing WLAN communication bands (e.g., (IEEE 802.11) or other WLAN communication bands, such as the 2.4 GHz WLAN band (e.g., 2400 MHz to 2480 MHz), the 5 GHz WLAN band (e.g., 5180 MHz to 5825 MHz), 6E band (e.g., 5925MHz to 7125MHz) and / or others Wireless LAN transceiver circuitry covering a frequency band (e.g., 1875MHz to 5160MHz); handling 2.4GHz. Wireless personal area network transceiver circuits for frequency bands or other WPAN communication bands; cellular phone transceiver circuits for processing cellular phone frequency bands (e.g., bands from about 600 MHz to about 5 GHz, 3G bands, 4G LTE bands, 5G New Radio Frequency Range 1 (FR1) band below 10 GHz, 5G New Radio Frequency Range 2 (FR2) band between 20 GHz and 60 GHz, etc.); near field communication (NFC) transceiver circuits for processing near field communication frequency bands (e.g., 13.56 MHz); satellite navigation receiver circuits for processing satellite navigation frequency bands (e.g., GPS band from 1565 MHz to 1610 MHz, Global Navigation Satellite System (GLONASS) band, BeiDou Navigation Satellite System (BDS) band, etc.); ultra-wideband (UWB) transceiver circuits for processing communications using the IEEE 802.15.4 protocol and / or other ultra-wideband communication protocols; and / or any other desired radio frequency transceiver circuits for covering any other desired communication frequency bands of interest.

[0034] Wireless circuit 24 may include one or more antennas, such as antenna 42. Antenna 42 can be formed using any desired antenna structure. For example, antenna 42 may be an antenna with a resonant element, formed from a loop antenna structure, patch antenna structure, inverted F-shaped antenna structure, slot antenna structure, planar inverted F-shaped antenna structure, helical antenna structure, monopole antenna, dipole, a combination of these designs, etc. Two or more antennas 42 may be arranged in one or more phased antenna arrays (e.g., for transmitting radio frequency signals at millimeter-wave frequencies). Parasitic elements may be included in antenna 42 to modulate antenna performance. Antenna 42 may be provided with a conductive cavity that supports the antenna resonant element of antenna 42 (e.g., antenna 42 may be a cavity-backed antenna, such as a cavity-backed slot antenna).

[0035] Figure 3 This is a diagram illustrating an exemplary passive output network (such as output network 100) coupled between an RF amplifier 50 and one or more antennas 42. The RF amplifier 50 may be a combination of... Figure 2 The described transmit (power) amplifier. RF amplifier 500 may have differential outputs (ports) and may be configured to output differential RF signals at its differential output ports. Output network 100 may be configured as an impedance matching network to provide optimal power transfer between RF amplifier 50 and antenna 42. Output network 100 may be configured to provide a target amount of impedance termination to antenna 42 (e.g., to provide 50 ohms, 75 ohms, 100 ohms, less than 50 ohms, greater than 50 ohms, 50 to 100 ohms, less than 100 ohms, or more than 100 ohms).

[0036] like Figure 3As shown, the output network 100 may include a primary coil (winding) having primary coil portions 102 and 104 and a secondary coil (winding) having secondary coil portions 110 and 112. The primary coil may have a center tap at node 103, which is located between the first primary coil portion 102 and the second primary coil portion 104. Since node 103, located between coil portions 102 and 104, is the center tap node of the primary coil, the inductance value of coil portion 102 is equal to the inductance value of coil portion 104. The output network 100 may also include an inductor, such as an inductor 106 coupled to the center tap node 103. Specifically, inductor 106 may have a first terminal coupled to the center tap 103 of the primary coil and may have a second terminal coupled to a power supply line 108 (e.g., a positive power supply terminal on which a positive power supply voltage Vsup is provided). This is exemplary. If desired, the second terminal of inductor 106 may alternatively be coupled to a ground power supply line, a reference voltage line, or other static voltage line. In other implementations, parasitic wiring paths can be used instead of inductor 106.

[0037] The secondary coil, having secondary coil portions 110 and 112, may have a first terminal coupled to antenna 42 and a second terminal coupled to ground power supply line 114 (e.g., a ground power supply terminal providing ground voltage Vss thereon). The primary and secondary coils may form part of a transformer. Specifically, this type of transformer, where one side (e.g., the primary side) is coupled to a differential port and the other side (e.g., the secondary side) has a shunt to ground, is sometimes referred to and defined herein as a “balanced-to-unbalanced converter.” Therefore, this type of impedance matching network 100 is sometimes referred to herein as a transformer-based output network or a balanced-to-unbalanced converter-based output network. An output network 100 comprising only passive electrical components (e.g., inductor and capacitor assemblies, and optionally one or more resistor assemblies) is sometimes referred to as a “passive” matching network.

[0038] Radio frequency amplifier 50 can be configured to process or output a signal at frequency f0. Frequency f0 may be referred to herein as the fundamental frequency (radio frequency). The term "harmonic" signal may refer to a signal having a frequency equal to an integer multiple of the associated fundamental frequency. Generally, amplifiers have linear and nonlinear operating ranges. To avoid signal distortion, amplifiers typically operate within the linear range. When operating within the nonlinear range, the ratio of input power to output power may not be constant. Therefore, as the input signal amplitude increases, the output signal amplitude and / or phase may increase disproportionately. The nonlinear behavior of such systems can sometimes generate undesirable harmonic signals, such as second harmonic signals (e.g., spurious signals at the second harmonic frequency 2*f0) and third harmonic signals (e.g., spurious signals at the third harmonic frequency 3*f0). Signal interference or distortion caused by the second harmonic signal may be referred to herein as second harmonic distortion (HD2), while signal interference or distortion caused by the third harmonic signal may be referred to herein as third harmonic distortion (HD3). Harmonic signals not only distort the desired signal but can also leak into the antenna, thus violating stringent emission spectrum standards. Such harmonics generated by amplifier 50 can be filtered out by output network 100.

[0039] Still referencing Figure 3 The primary coil can be magnetically coupled to the secondary coil, as illustrated in magnetic coupling line 120. The windings of the primary and secondary coils can also overlap at least partially with each other (e.g., primary coil portions 102 and / or 104 can be formed directly above or below at least a portion of secondary coil portions 110 and 112). Such overlap in the windings of the primary and secondary coils can result in distributed capacitive coupling along the windings, as schematically illustrated in capacitive coupling line 122.

[0040] Magnetic coupling between the primary and secondary windings induces currents that flow in opposite (equal and opposite) directions, resulting in “balanced” signal behavior. In contrast, capacitive coupling between the primary and secondary windings leads to “unbalanced” signal behavior sensed at the differential terminals across the primary winding (e.g., a small AC signal may be sensed at the positive terminal, while a virtual ground voltage may be sensed at the negative terminal). Generally, balanced (symmetric) signal behavior in the transformer-based output network 100 is desirable for optimal HD2 (leakage) suppression, while unbalanced (asymmetrical) signal behavior in the transformer-based output network 100 is desirable for optimal HD3 (leakage) suppression.

[0041] This expectation for mitigating the symmetric signal behavior of HD2 and the expectation for mitigating the asymmetric signal behavior of HD3 can impose a design constraint trade-off between HD2 suppression and HD3 suppression. Figure 4 This example illustrates such a compromise. Figure 4 This is a diagram illustrating the third harmonic distortion (HD3) and the second harmonic distortion (HD2). Curve 200 illustrates the trade-off between HD2 and HD3 in an output network based on a conventional transformer. As shown in curve 200, reducing HD2 will inevitably increase HD3, and reducing HD3 will inevitably increase HD2. Therefore, it is desirable to provide a technique that allows for the simultaneous reduction of HD2 and HD3, or at least allows for the reduction of HD3 without reducing HD2.

[0042] Re-reference Figure 3 According to some embodiments, the output network 100 may be configured with harmonic suppression capability (e.g., to suppress unwanted harmonic signals). The term "harmonic suppression" can generally refer to and is defined herein as the action of suppressing or filtering harmonic signals, which may include a second harmonic signal having a second harmonic frequency of 2*f0, a third harmonic signal having a third harmonic frequency of 3*f0, a fourth harmonic signal having a fourth harmonic frequency of 4*f0, a fifth harmonic signal having a fifth harmonic frequency of 5*f0, and other higher-order harmonic signals. Specifically, the output network 100 may include harmonic suppression components, such as harmonic suppression component 130 coupled (inserted) between the primary and secondary coils of a transformer / balanced-to-unbalanced converter. Harmonic suppression component 130 may be a capacitor having a first terminal coupled to a center tap 103 of the primary coil and a second terminal coupled along the secondary coil to a node 111. Node 111 may, but does not necessarily, be located at the center tap of the secondary coil. In other words, node 111 can be located anywhere along the winding of the secondary coil. In the scenario where node 111 is not at the center tap of the secondary coil, the inductance (value) of coil portion 110 will be different from the inductance (value) of coil portion 112.

[0043] Combination Figure 5 and Figure 6 This allows for the best understanding of the operation of the output network 100 within the context of HD2 and HD3. Figure 5 This is a diagram showing the equivalent circuit of the output network 100 operating in differential mode. As mentioned above, asymmetric signal behavior is related to HD3, and this asymmetric signal behavior can be analyzed when the output network 100 operates in differential mode. Figure 5As shown, in differential operation mode, center tap node 103 can behave like a virtual ground node (e.g., see virtual ground 114'). In analog (small) signal processing, the term "virtual ground" can refer to, and is defined herein, as a point in a circuit that remains at a stable voltage or reference level but is not physically connected to a ground line. This effectively shunts capacitor 130 to virtual ground 114'. Operating in this way, capacitor 130 and coil portion 112 can form a parallel resonant (slot) circuit 140 configured to resonate at a given resonant frequency. In other words, resonant slot 140 may include capacitor 130 and only a portion 112 of the secondary coil. The resonant frequency can be calculated as follows:

[0044] 2π(3*f0)=1 / (Ls*Cx) (1)

[0045] Where Ls represents the inductance of the secondary coil portion 112, and Cx represents the capacitance of capacitor 130. By setting Ls and Cx as functions of the third harmonic frequency 3*f0, the resonant slot circuit 140 can be configured to resonate at the third harmonic frequency and can behave like an open circuit at the third harmonic frequency. In other words, capacitor 130 can be configured to provide HD3 suppression to prevent unwanted third harmonic signals from leaking into antenna 42. Therefore, capacitor 130 can sometimes be referred to as an HD3 suppression or filtering component.

[0046] The above example of capacitor 130 being configured to provide HD3 suppression is illustrative. Alternatively, capacitor 130 can be configured to provide HD5 suppression (e.g., by inserting 5*f0 into Equation 1 above and setting the Ls and Cx values ​​accordingly). Alternatively, capacitor 130 can be configured to provide HD7 suppression (e.g., by inserting 7*f0 into Equation 1 above and setting the Ls and Cx values ​​accordingly). Generally, capacitor 130 can be configured to provide suppression of "odd" harmonic signals (e.g., to suppress signals with frequencies equal to odd multiples of the fundamental frequency).

[0047] on the contrary, Figure 6 This is a diagram showing the equivalent circuit of the output network 100 operating in common mode. As mentioned above, the symmetrical signal behavior is related to HD2, and this asymmetrical signal behavior can be analyzed when the output network 100 operates in common mode. Figure 6As shown, in common-mode operation, the second harmonic signal can leak from center-tapped node 103 to node 112 through capacitor 130. This common-mode behavior causes capacitor 130 to effectively behave as an open circuit between the series paths from nodes 102 and 112, as shown by circuit break 150. Since capacitor 130 itself behaves as an open-circuit component in common-mode, adding capacitor 130 to suppress HD3 will not affect HD2. In other words, the use of capacitor 130 can help to escape the design constraint trade-off between HD2 and HD3. See again Figure 4 Curve 202 illustrates the combination Figure 6 The description pertains to the relationship between HD2 and HD3 for the passive output network 100. As shown in curve 202, HD3 can be reduced without affecting HD2. In other words, the use of HD3 suppression capacitor 130 can provide HD3 mitigation without reducing HD2 (and without affecting HD4, HD6, or other "even-number" harmonic signal distortion). In other words, for signals with an even multiple of the fundamental frequency, capacitor 130 can act as an open circuit.

[0048] Figure 7 This is a diagram illustrating signal gain as a function of frequency for differential-mode and common-mode signals, based on some implementation schemes. Curve 300 represents the differential-mode gain distribution as a function of frequency, while curve 302 represents the common-mode gain distribution as a function of frequency. As shown by curve 300, high differential-mode gain can be achieved at the fundamental frequency f0, while significant HD3 suppression can be achieved at the third harmonic frequency 3*f0, as illustrated by arrow 310. The amount of HD3 suppression can optionally be tuned by adjusting the capacitance of capacitor 130, as shown by arrow 301. Capacitor 130 can be a fixed or adjustable capacitor. In some implementations, capacitor 130 can be an adjustable capacitor implemented as a set of switchable capacitors (e.g., a capacitor array, each capacitor in which is selectively activated by a corresponding switch), a variable capacitor sometimes referred to as a varactor, a varactor diode, a metal-oxide-semiconductor capacitor (MOSCAP), and / or other components configured to provide variable capacitance. Furthermore, as shown by curve 302, significant HD2 suppression can be achieved at the second harmonic frequency 2*f0, as illustrated by arrow 312. The amount of HD2 suppression can be minimally affected by adjusting the capacitance of capacitor 130, as shown by arrow 303.

[0049] The above text combined Figures 1 to 7The described methods and operations can be performed by components of device 10 using software, firmware, and / or hardware (e.g., dedicated circuitry or hardware). Software code for performing these operations can be stored on a non-transitory computer-readable storage medium (e.g., a tangible computer-readable storage medium) stored on one or more components of device 10 (e.g., ...). Figure 1 The storage circuit 16 and / or wireless communication circuit 24). This software code may sometimes be referred to as software, data, instructions, program instructions, or code. Non-transitory computer-readable storage media may include drives, non-volatile memory such as non-volatile random access memory (NVRAM), removable flash drives or other removable media, other types of random access memory, etc. The software stored on the non-transitory computer-readable storage medium may be processed by processing circuitry on one or more components of the device 10 (e.g., processing circuitry 26 in wireless circuitry 24, ...). Figure 1 The processing circuit 26 may be used to execute the processing (such as the processing circuit 18). The processing circuit 26 may include a microprocessor, application processor, digital signal processor, central processing unit (CPU), application-specific integrated circuit with processing circuitry, or other processing circuitry.

[0050] According to one embodiment, the wireless circuit includes a radio frequency amplifier and a passive network coupled to the radio frequency amplifier, wherein the passive network includes: a primary coil having opposite terminals coupled to the radio frequency amplifier; a secondary coil magnetically coupled to the primary coil; and a harmonic suppression component coupled between the primary coil and the secondary coil and configured to suppress harmonic signals generated by the radio frequency amplifier.

[0051] According to another implementation, the opposite terminals of the primary coil may be optionally coupled to the differential output port of the RF amplifier.

[0052] According to another embodiment, the secondary coil may optionally include a first terminal coupled to the antenna and a second terminal coupled to a ground power supply line.

[0053] According to another embodiment, the harmonic suppression component may optionally include a capacitor having a first terminal coupled to a node disposed between a first coil portion and a second coil portion of the secondary coil.

[0054] According to another embodiment, the first coil portion may optionally have a first inductance value, and the second coil portion may optionally have a second inductance value different from the first inductance value.

[0055] According to another embodiment, the first coil portion may optionally have a first inductance value, and the second coil portion may optionally have a second inductance value equal to the first inductance value.

[0056] According to another embodiment, the capacitor may optionally have a second terminal coupled to the center tap of the primary coil.

[0057] According to another embodiment, the wireless circuit may optionally also include an inductor having a first terminal coupled to a center tap of a primary coil and a second terminal coupled to an additional power supply line.

[0058] According to another embodiment, the harmonic suppression component may optionally be configured to suppress the third harmonic signal generated by the radio frequency amplifier.

[0059] According to another embodiment, the radio frequency amplifier is optionally configured to output a signal having a fundamental frequency, and the harmonic suppression component optionally includes a capacitor configured to resonate with a portion of the secondary coil at a third harmonic frequency equal to three times the fundamental frequency.

[0060] According to one embodiment, the passive network includes: a primary coil coupled to an amplifier; a secondary coil coupled to an antenna; and a harmonic suppression component having a first terminal coupled to a node in the primary coil and a second terminal coupled to a node in the secondary coil, wherein the harmonic suppression component is configured to operate as an open circuit at a first frequency and is also configured to resonate with a portion of the secondary coil at a second frequency different from the first frequency.

[0061] According to another embodiment, the harmonic suppression component may optionally include a capacitor having a first terminal coupled to a center tap of the primary coil.

[0062] According to another embodiment, the capacitor may optionally have a second terminal coupled to a node disposed between one portion of the secondary coil and another portion of the secondary coil.

[0063] According to another embodiment, the passive network may optionally also include an inductor having a first terminal coupled to a center tap of the primary coil and a second terminal coupled to a power supply line.

[0064] According to another implementation, this portion of the secondary coil may optionally be shunt to a grounding line.

[0065] According to another embodiment, the amplifier is optionally configured to process a signal at a given frequency, and the first frequency is equal to an even multiple of the given frequency.

[0066] According to another implementation, the second frequency may optionally be an odd multiple of a given frequency.

[0067] According to one embodiment, a circuit includes: a balun having a first coil and a second coil; and a harmonic suppression component having a first terminal coupled to a first node in the first coil and a second terminal coupled to a second node in the second coil.

[0068] According to another embodiment, the harmonic suppression component is optionally configured to operate as an open circuit at a first frequency, and is also configured to resonate with a portion of the second coil at a second frequency different from the first frequency.

[0069] According to another embodiment, the first node is optionally disposed between the first coil portion and the second coil portion; the first coil portion and the second coil portion of the first coil are optionally provided with equal inductance values; the second node is optionally disposed between the third coil portion and the fourth coil portion; and the third coil portion and the fourth coil portion of the second coil are optionally provided with different inductance values.

[0070] The foregoing is merely illustrative and various modifications can be made to the described implementation scheme. The foregoing implementation scheme can be implemented individually or in any combination.

[0071] As is widely recognized, the use of personally identifiable information should comply with privacy policies and practices that are generally accepted to meet or exceed industry or governmental requirements for protecting user privacy. Specifically, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of authorized use should be clearly explained to users.

Claims

1. A wireless circuit, the wireless circuit comprising: RF amplifier; and A passive network coupled to the radio frequency amplifier, wherein the passive network comprises: A primary coil having opposite terminals coupled to the radio frequency amplifier; Secondary coil, the secondary coil being magnetically coupled to the primary coil; and A harmonic suppression component is coupled between the primary coil and the secondary coil and is configured to suppress harmonic signals generated by the radio frequency amplifier.

2. The wireless circuit according to claim 1, wherein the opposite terminal of the primary coil is coupled to the differential output port of the radio frequency amplifier.

3. The wireless circuit according to claim 1, wherein the secondary coil includes a first terminal coupled to the antenna and a second terminal coupled to a ground power supply line.

4. The wireless circuit of claim 3, wherein the harmonic suppression component includes a capacitor having a first terminal coupled to a node disposed between a first coil portion of the secondary coil and a second coil portion of the secondary coil.

5. The wireless circuit of claim 4, wherein the first coil portion has a first inductance value, and wherein the second coil portion has a second inductance value different from the first inductance value.

6. The wireless circuit of claim 4, wherein the first coil portion has a first inductance value, and wherein the second coil portion has a second inductance value equal to the first inductance value.

7. The wireless circuit of claim 4, wherein the capacitor has a second terminal coupled to the center tap of the primary coil.

8. The wireless circuit according to claim 7, further comprising: An inductor having a first terminal coupled to the center tap of the primary coil and a second terminal coupled to an additional power supply line.

9. The wireless circuit of claim 1, wherein the harmonic suppression component is configured to suppress the third harmonic signal generated by the radio frequency amplifier.

10. The wireless circuit of claim 1, wherein the radio frequency amplifier is configured to output a signal having a fundamental frequency, and wherein the harmonic suppression component includes a capacitor configured to resonate with a portion of the secondary coil at a third harmonic frequency equal to three times the fundamental frequency.

11. A passive network, the passive network comprising: Primary coil, which is coupled to an amplifier; Secondary coil, which is coupled to the antenna; and A harmonic suppression component having a first terminal coupled to a node in the primary coil and a second terminal coupled to a node in the secondary coil, wherein the harmonic suppression component is configured to operate as an open circuit at a first frequency and is also configured to resonate with a portion of the secondary coil at a second frequency different from the first frequency.

12. The passive network of claim 11, wherein the harmonic suppression component includes a capacitor having a first terminal coupled to the center tap of the primary coil.

13. The passive network of claim 12, wherein the capacitor has a second terminal coupled to a node disposed between one portion of the secondary coil and another portion of the secondary coil.

14. The passive network according to claim 12, further comprising: An inductor having a first terminal coupled to the center tap of the primary coil and a second terminal coupled to a power supply line.

15. The passive network of claim 11, wherein a portion of the secondary coil is shunt to a ground line.

16. The passive network according to claim 11, wherein: The amplifier is configured to process a signal at a given frequency; and The first frequency is equal to an even multiple of the given frequency.

17. The passive network of claim 16, wherein the second frequency is an odd multiple of the given frequency.

18. A circuit, the circuit comprising: A balun has a first coil and a second coil. and A harmonic suppression component having a first terminal coupled to a first node in the first coil and a second terminal coupled to a second node in the second coil.

19. The circuit of claim 18, wherein the harmonic suppression component is configured to operate as an open circuit at a first frequency and is further configured to resonate with a portion of the second coil at a second frequency different from the first frequency.

20. The circuit according to claim 18, wherein: The first node is positioned between the first coil portion and the second coil portion; The first coil portion and the second coil portion of the first coil have equal inductance values; The second node is positioned between the third coil section and the fourth coil section; and The third and fourth coil portions of the second coil have different inductance values.

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