METHOD FOR RELAY COMPONENT PERFORMING PD E-Marker FUNCTION, INFORMATION PROCESSING DEVICE, AND ACTIVE CABLE

By loading and executing firmware in stages within the relay component, PD protocol interaction can be completed quickly within the tVconnStable time, solving the problem of the chip's inability to respond quickly after power-on in the prior art, and improving system compatibility and reliability.

CN121635927APending Publication Date: 2026-03-10EVERPRO TECH COMPANY
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-06
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

In the existing technology, chips with E-marker function have difficulty completing PD-related protocol communication and interaction quickly within the tVconnStable time after power-on, which leads to compatibility issues. In addition, existing solutions have design complexity, area redundancy and risk of collaborative compatibility.

Method used

The processor using relay components loads and executes firmware in stages within the tVconnStable time. Firmware 1 only implements basic E-marker functions, while firmware 2 implements relay unit configuration and full E-marker functions. It listens to CC signal line data and configures the relay unit through a serial communication device, thus shortening the firmware loading time.

Benefits of technology

This enables the relay component to quickly communicate with the source end via the PD protocol after power-on, meeting the USB-IF CTS test requirements, reducing design complexity and area redundancy, and improving system compatibility and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a method for a relay component to execute a PD E-marker function, an information processing device and an active cable, and relates to the technical field of communication, the relay component comprises a serial communication device and a processor, and the method comprises the following steps: in response to power-on, the processor completes loading of first firmware within tVconnStable time; the processor executes the first firmware to implement a PD E-marker function by using the serial communication device, the PD E-marker function comprising: returning cable information in response to a first USB PD command; the processor loads the second firmware and executes the second firmware. According to the method, the operation firmware of the relay assembly is subjected to functional splitting, only the first firmware related to the function of returning the cable information in response to the USB PD command is loaded in the tVconnStable time, the size of the firmware loaded in the tVconnStable time is shortened, and the purpose that the relay assembly with the eMarker function can quickly return the cable information based on the USB PD protocol after being powered on is achieved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, and in particular to a method for a relay assembly to perform a PDE-marker function, an information processing device, and an active cable. BACKGROUND

[0002] With the development of science and technology, higher requirements are put forward for the transmission speed of data. As a new USB interface technology, USB4 uses a USB Type-C connector, supports multiple protocols and double-channel transmission, and is seen at the link https: / / www.usb.org / document-library / usb4r-specification-v20. While inheriting the stability and reliability of the USB standard, it greatly improves the speed and transmission efficiency of data, reduces power consumption, and breaks down the barriers of device connection through multi-protocol compatibility.

[0003] An Electronically Marked Cable (eMarker Cable) can be understood as a Type-C cable with an E-marker function. The Type-C cable with the E-marker function responds to the USB PD Discover Identity command sent by the source end to reply information about the cable, so as to facilitate the source end to identify the characteristics or capabilities of the cable.

[0004] The Type-C cable with the E-marker function uses a relay assembly to implement the E-marker function. The relay assembly is a chip with a Redriver and / or Retimer function and an E-marker function.

[0005] To ensure compatibility, security, response speed, and system stability when multiple devices are interconnected, the USB-IF Association has designed a specific CTS test standard for E-marker functionality. This standard requires cables with E-marker functionality to initiate USB PD protocol communication immediately after the tVconnStable time interval following power-on. However, the tVconnStable time is relatively short. tVconnStable represents the time interval from power supply to VCONN to the point where communication is possible (SOP' / SOP''). According to the USB Type-C 2.0 protocol (https: / / www.usb.org / sites / default / files / USB%20Type-C%20Spec%20R2.0%20-%20August%202019_0.pdf), the value of tVconnStable should not exceed 50ms. In cables with E-marker functionality, if a chip with an MCU is used to implement the USB PD protocol by executing firmware, the MCU can only start after receiving power from VCONN. After starting, it still needs to go through a boot process and firmware loading before it can work, which is difficult to complete within the time required by tVconnStable. Using a high-speed MCU with a faster processing speed would significantly increase the manufacturing cost of the cable.

[0006] In existing technologies, to enable chips with E-marker functionality to quickly perform PD-related protocol communication after power-on, both a full hardware solution and a dual-IC separation solution can be adopted. The following will describe the full hardware solution and the dual-IC separation solution separately: I. Dual IC Separation Solution: This scheme incorporates two independently functioning IC chips (see...). Figure 1 The E-Marker chip is specifically responsible for the PD E-marker function, which is used to identify the power transmission capability of the cable, while another repeater chip is responsible for the repeater function, which is used for signal enhancement.

[0007] The disadvantages of using this approach are as follows: 1. High design complexity: E-Marker chips and relay chips need to be purchased and packaged separately, and additional PCB (printed circuit board) space is required to arrange the connection circuits of E-Marker chips and relay chips, resulting in high design complexity.

[0008] 2. Increased risk of incompatibility: When the E-Marker chip and the relay chip are from different manufacturers, there may be problems such as communication timing mismatch and signal interference.

[0009] 3. Design area redundancy: The E-Marker chip and the relay chip each require their own silicon wafer area and packaging space, resulting in design area redundancy.

[0010] II. All-hardware solution: In the all-hardware solution (see also) Figure 2 The E-Marker function (stores cable parameters and performs PD protocol interaction) and the Redriver / Retimer function (signal amplification and timing compensation to ensure high-speed signal transmission quality) are integrated into a single IC through pure hardware logic, which can be called a dual-function integrated chip.

[0011] The disadvantages of this approach are as follows: 1. Poor flexibility: The functions of E-Marker (such as supported PD protocol versions and parameter updates) depend entirely on the hardware circuit design. If new requirements need to be met, the hardware must be redesigned, resulting in high iteration costs.

[0012] 2. High design complexity: It is necessary to coordinate the communication interaction of PD-related protocols and the hardware logic of the relay unit within the dual-function integrated chip. The circuit characteristics of the two (such as power supply voltage and signal frequency) are very different, which can easily cause interference (such as electromagnetic interference of high-speed signals to PD protocol interaction), increasing the design difficulty and debugging cycle.

[0013] 3. Design area redundancy: In order to be compatible with two functions, dual-function integrated chips need to reserve more hardware resources (such as additional logic gates and pins), which leads to an increase in the area of ​​dual-function integrated chips.

[0014] In summary, how to enable a chip with E-marker function to quickly communicate with the source after power-on and to configure itself based on the received PD protocol content has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0015] In view of this, the purpose of the present invention is to provide a method, information processing device and active cable for a relay component to perform the PD E-marker function, so as to solve the above problems.

[0016] In a first aspect, a method for a relay component to perform a PD E-marker function is provided. The relay component includes a serial communication device and a processor. The method includes: in response to power-on, the processor loads a first firmware within a tVconnStable time period; the processor executes the first firmware to implement a PD E-marker function using the serial communication device. The PD E-marker function implemented by the processor in the first firmware includes: returning cable information in response to a first USB PD command; the processor loads a second firmware; and executes the second firmware.

[0017] In the embodiments provided in this application, the running firmware of the relay component is functionally split, and only the firmware related to the function of returning cable information in response to USB PD commands is loaded within the tVconnStable time. This shortens the size of the firmware loaded within the tVconnStable time, and enables the destination and source ends of the chip with E-marker function to quickly interact based on PD-related protocols and return cable information after power-on.

[0018] One possible approach is the first USB PD command, which includes an identification command, an SVID discovery command, a discovery mode command, an enter mode command, an exit mode command, a built-in self-test message, a soft reset command, and a get manufacturer information message.

[0019] One possible approach is to make the first USB PD command a part of the USB PD command sent by the source end, in order to reduce the size of the first firmware, so that the processor can complete the loading of the first firmware within tVconnStable time.

[0020] One possible approach is that the first USB PD command does not include Ra-weakened.

[0021] One possible approach is that the second firmware is larger than the first firmware. The second firmware is also used to implement the configuration functions of the relay unit, including the configuration functions of the Redriver and / or Retimer.

[0022] One possible approach is for the processor to execute a second firmware: at runtime, it utilizes a serial communication device to implement the full PD e-marker functionality; or The processor executes the second firmware, which includes implementing a PDemarker function that does not exist in the first firmware at runtime using a serial communication device.

[0023] One possible approach is that the processor executes a second firmware in response to a second USB PD command and implements the Ra-Weaken function, wherein the second USB PD command includes the Ra-Weaken command.

[0024] One possible approach is that the processor executes a second firmware to implement the PD E-marker function using a serial communication device. The PD E-marker function implemented by the processor in the second firmware includes: returning cable information in response to a second USB PD command, with the first firmware and the second firmware stored at different addresses.

[0025] One possible approach is a second USB PD command, which also includes identification commands, SVID discovery commands, discovery mode commands, enter mode commands, exit mode commands, built-in self-test messages, soft reset commands, and get manufacturer information messages.

[0026] One possible approach is for the processor to execute the first firmware and also load the second firmware; or The processor executes the first firmware and loads the third firmware, and the processor executes the third firmware and loads the second firmware.

[0027] One possible approach is that, while the processor is executing the first firmware to load the second firmware, if the second firmware has finished loading and the first firmware has completed a data interaction with an AMS unit, then the processor executes the second firmware.

[0028] One possible approach is that the first firmware is also used to implement bootloader functionality, which loads the second firmware.

[0029] One possible approach is that, while the processor is executing the third firmware to load the second firmware, if the second firmware has finished loading and the third firmware has completed a data exchange with an AMS unit, then the processor executes the second firmware.

[0030] One possible approach is that the first firmware is a first bootloader used to load the third firmware; the third firmware is a second bootloader used to load the second firmware.

[0031] One possible approach is that the first firmware does not include the function to load the second firmware, and the function to load the second firmware is provided by the third firmware.

[0032] One possible approach is that the relay component also includes static random access memory, and the processor executes first firmware to listen for configuration information of a first high-speed signal emitted from the source and stores the configuration information of the first high-speed signal in the static random access memory.

[0033] One possible approach is that the static random access memory (SRAM) also includes: a common area: The public area is used to store the first high-speed signal configuration information shared by the first firmware and the second firmware.

[0034] One possible approach is that the second firmware is also used to read the first high-speed signal configuration information from the public area and to configure the relay unit using the first high-speed signal configuration information, so as to realize the configuration function of the relay unit.

[0035] One possible approach is for the processor to execute first firmware to listen for first high-speed signal configuration information emitted from the source and store the first high-speed signal configuration information in static random access memory.

[0036] One possible approach is for the processor to execute the portion of the first firmware that sends a USB PD command as the source in response to the first USB PD command, listen to the first high-speed signal configuration information, and not use the first high-speed signal configuration information to configure the relay unit, thereby reducing the size of the first firmware and enabling the processor to complete the loading of the first firmware within the tVconnStable time.

[0037] One possible approach is that the processor executes the first firmware to also load the third firmware, which in turn executes the third firmware to listen for the configuration information of the first high-speed signal emitted from the source and stores the configuration information of the first high-speed signal in static random access memory.

[0038] One possible approach is to omit the function of monitoring the configuration information of the first high-speed signal emitted by the source in the first firmware, in order to further reduce the size of the first firmware and enable the processor to complete the loading of the first firmware within the tVconnStable time.

[0039] One possible approach is that the processor executes the second firmware to also listen for the configuration information of the first high-speed signal emitted by the source and store the configuration information of the first high-speed signal in static random access memory, as well as receive the configuration information of the relay unit.

[0040] One possible approach is that the relay component also includes: non-volatile memory, Non-volatile memory: used to store the first firmware and the second firmware.

[0041] One possible approach is that the first firmware includes a first firmware interrupt handler; In response to an interrupt event, the processor executes the interrupt handler in the first firmware to return cable information; An interrupt event is generated by a serial communication device in response to receiving data from the CC signal line. The data received from the CC signal line that causes an interrupt event includes USB PD commands.

[0042] One possible approach is that, in response to an interrupt event, the processor executes the interrupt handler in the first firmware to return cable information during the process: The interrupt handler for the first firmware also includes: It identifies whether the current AMS unit's data interaction has been completed, and sets the firmware flag to either the first or second state based on the identification result.

[0043] One possible approach is for the processor to execute the first firmware to check the firmware flag. If the firmware flag is in the second state, the second firmware is executed; otherwise, the firmware flag is checked again.

[0044] One possible approach is that the processor executes the first firmware and also loads the third firmware; The processor executes the third firmware to check the firmware flag. If the firmware flag is in the second state, the second firmware is executed.

[0045] One possible approach is that the second firmware includes a second firmware interrupt handler; In response to an interrupt event, the processor executes the interrupt handler of the second firmware to respond to the received USB PD command; An interrupt event is generated by a serial communication device in response to receiving data from the CC signal line.

[0046] One possible approach is for the processor to execute a second firmware, replacing the first firmware's interrupt handler with the second firmware's interrupt handler to respond to interrupt events.

[0047] One possible approach is that the interrupt handler in the first firmware or the interrupt handler in the second firmware includes the following processing flow: Determine if the received data packet is a USB PD command; If the data packet is not a USB PD command, exit the interrupt handler of the first firmware or the interrupt handler of the second firmware.

[0048] One possible approach is that, if the data packet is a USB PD command, the interrupt handler in the first firmware would also include determining the target recipient of the USB PD command. If the target transmission object is not a cable, exit the interrupt handler of the first firmware. In response to the target being a cable, the first interrupt service routine determines whether the USB PD command is an E-marker command. If the USB PD command is a read E-marker command, the information of the cable corresponding to the read E-marker command is output to the host via the serial communication device. If the USB PD command is not a read E-marker command, it determines whether the USB PD command is an alternative mode negotiation. If the USB PD command is an alternative mode negotiation, the relevant information is recorded. If the USB PD command is not an alternative mode negotiation, the first interrupt service routine exits.

[0049] One possible approach is that, if the data packet is a USB PD command, the interrupt handler in the second firmware would also include determining the target recipient of the USB PD command. In response to the target being a cable, the second interrupt service routine processes the corresponding USB PD command; If the target transmission object is not a cable, exit the interrupt handler in the second firmware.

[0050] In a second aspect, this application provides an information processing device, including a memory, a processor, and a program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method according to the first aspect.

[0051] Thirdly, this application provides an active cable, including: at least one end of the active cable includes a relay component according to any one of the first aspects.

[0052] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained in accordance with the structures particularly pointed out in the description, claims and drawings.

[0053] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0054] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0055] Figure 1 Diagram of the existing dual-IC separation scheme Figure 2 Diagram of dual-function integrated chip structure in existing technology Figure 3 This is a structural diagram of a relay component provided in an embodiment of the present invention; Figure 4(a) is a flowchart of a method for a relay component to perform the PD E-marker function according to an embodiment of this application; Figure 4(b) is a schematic diagram of a relay component loading firmware provided in an embodiment of this application; Figure 5 A flowchart illustrating the execution of a PD E-marker via a cable with a relay component, provided as an embodiment of this application; Figure 6(a) is a flowchart of another method for a relay component to perform the PD E-marker function provided in an embodiment of this application; Figure 6(b) is a schematic diagram of another relay component loading firmware provided in an embodiment of this application; Figure 7 A flowchart illustrating another method for a relay component to perform the PD E-marker function provided in this application embodiment; Figure 8 A flowchart illustrating a method for a relay component to perform the PD E-marker function, provided in an embodiment of this application; Figure 9 A flowchart illustrating the loading of firmware 2 into firmware 1 is provided in an embodiment of this application. Figure 10 A flowchart of an interrupt handler for firmware 1 provided in an embodiment of this application; Figure 11 A flowchart of an interrupt handler for firmware 1 provided in an embodiment of this application; Figure 12 A flowchart illustrating the operation of firmware 2 provided in this application embodiment; Figure 13 A flowchart illustrating the interrupt routine of firmware 2 provided in this application embodiment; Figure 14 A flowchart of an interrupt handler for a second firmware provided in an embodiment of this application; Figure 15 This is a structural diagram of an active cable provided in an embodiment of this application.

[0056] icon: 10. Relay unit; 20. Serial communication device; 30. Non-volatile memory; 40. Processor. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0058] This application proposes a method for a relay component to perform PD E-marker functionality.

[0059] First, refer to Figures 1 to 3 The relay component in the embodiments of this application will be described in detail below: The relay component is a chip with relay (ReDriver / Retimer) and E-marker functions. The relay component performs the method described in this application differently. Figure 1 The dual-chip separation solution shown is also different. Figure 2 A fully hardware-based solution. The relay components in the embodiments provided in this application are such as... Figure 3 As shown, it includes a relay unit 10, a serial communication device 20, a non-volatile memory 30, and a processor 40.

[0060] Repeater unit 10 may include, for example, an active component that includes a ReDriver (signal booster) / Retimer (signal regeneration). Specifically, the ReDriver / Retimer active component is used to implement the ReDriver / Retimer function. The ReDriver function is used to boost the signal by amplifying the amplitude of the signal after it has attenuated through the transmission link (such as a cable or connector) to compensate for the attenuation. The Retimer not only amplifies the signal amplitude but also retims the signal and eliminates jitter to restore the timing integrity of the original signal.

[0061] For example, repeater 10 is a repeater unit as defined in the USB Type-C 2.0 protocol. According to the USB Type-C 2.0 protocol, repeater 10 is any active component capable of processing signals, its function being to increase the physical distance over which signals can be successfully transmitted and to reduce connection losses between signals. Repeaters include ReTimer and ReDriver. In communication scenarios requiring high-speed transmission (such as DisplayPort, USB4, or Thunderbolt), using ReDriver / Retimer active components can extend the effective transmission distance. If a USB Type-C interface is used, its PD communication channel can be reused for power negotiation to ensure stable transmission of high-bandwidth signals in complex links, reducing the bit error rate at the receiving end and improving system reliability.

[0062] The serial communication device 20 is connected to the configuration channel (CC) signal line defined by the USB Type-C protocol to listen to the data signal on the CC signal line.

[0063] Data signals on the CC pin refer to signals transmitted on the CC signal line, including USB PD commands, system resource allocation requests, and data transfer control signals. USB PD commands are primarily used for device role identification, power negotiation, and connection detection. For example, by changing the resistance value of the CC pin, a device connected to the CC pin can determine whether it is a power provider or a power consumer. Simultaneously, the device uses the data signals on the CC pin to negotiate appropriate voltage and current values ​​to meet its power requirements.

[0064] The data signal transmitted on the CC signal line conforms to the serial communication protocol, thus allowing the serial communication device 20 to monitor and receive data on the CC signal line and interact with the source end on the CC signal line. The serial communication device 20 includes a first pin and a second pin, the first pin being connected to the CC1 pin of the Type-C connector, and the second pin being connected to the CC2 pin of the Type-C connector.

[0065] In one possible implementation, the serial communication device 20 can be an SPI (Serial Peripheral Interface) communication device, the first pin can be the clock pin of the SPI communication device, such as SPI_SCK of the SPI communication device; the second pin can be the data pin of the SPI communication device.

[0066] In another possible implementation, the serial communication device 20 can also be a UART communication device. The first pin can be a pin with clock rate detection function of the UART communication device, and the second pin can be a data pin of the UART communication device. The UART communication device can support single-wire half-duplex transmission mode.

[0067] It is understood that, in addition to the two devices mentioned above, other serial communication devices 20 are also within the scope of protection of this invention, and will not be listed here one by one.

[0068] Specifically, the serial communication device 20 is mainly used to respond to the data signals received on CC, and in some situations, the received data signals can be buffered.

[0069] In one embodiment of this application, the ReDriver / Retimer active component 10 and the serial communication device 20 are integrated on the same chip. This chip utilizes the serial communication device 20 to implement the CC data signal monitoring function, reducing design difficulty and complexity, and minimizing chip design redundancy. It is understood that the serial communication device 20 can also be implemented on a different chip than the ReDriver / Retimer active component.

[0070] Figure 3 The relay component also includes a processor 40, static random-access memory (SRAM), and non-volatile memory 30. The serial communication device 20 is connected to the source end via a CC (CC receiver). The input terminals of the processor 40 are connected to both the serial communication device 20 and the SRAM, and the output terminal of the processor 40 is connected to the relay unit 10. The non-volatile memory 30 includes firmware. The processor 40 executes the firmware to implement the E-Marker function and configures the relay unit 10 according to the parameters obtained from the CC.

[0071] After the relay component powers on, it first loads firmware so that the processor 40 can execute it. Loading firmware includes, for example, reading firmware from non-volatile memory 30 and placing it in a designated location in SRAM. To shorten the firmware loading time so that the processor 40 can respond to the USB PD command sent by the source within the tVconnStable time, the firmware executed by the processor 30 is divided into two parts, firmware 1 and firmware 2, so that the size of each part is smaller than the complete firmware, thereby making the time required to load firmware 1 less than the time required to load the complete firmware.

[0072] After the relay component powers on, within the tVconnStable time period, the processor 40 completes the loading of firmware 1. The serial communication device 20 listens for data from the source and provides it to the processor 30. In response to the USB PD command sent by the source, the processor 40 executes firmware 1 and responds to the USB PD command to enable rapid PD-related protocol interaction after power-on, meeting USB-IFCTS testing and system platform compatibility requirements. The serial communication device 20 also listens for high-speed configuration information transmitted on the CC. The processor 40 executes firmware 1 and stores the high-speed configuration information in static random access memory. The high-speed configuration information is used to configure the relay unit 10, but to reduce the size of firmware 1, firmware 1 does not include code for configuring the relay unit 10 using the high-speed configuration information. The processor executing firmware 1 also loads firmware 2. The processor 40 executes firmware 2 and reads the high-speed configuration information stored in static random access memory, and uses the high-speed configuration information to configure the relay unit 10. Understandably, if the serial communication device 20 detects a USB PD command on the CC while the processor 40 is executing firmware 2, the processor 40 executing firmware 2 can also respond to the corresponding USB PD command to implement the PD E-Marker function. Optionally, the SRAM is integrated inside the processor 40 and is part of the processor 40, or the SRAM is a separate chip.

[0073] exist Figure 3 Based on this, and referring to Figure 4(a), the following will describe a method for a relay component to perform the PDE-marker function in an embodiment of this application: After power-on, the relay component needs to respond to the USB PD command and perform PD-related protocol interactions within the tVconnStable time period to meet the USB-IF CTS testing and system platform compatibility requirements. In this application, the firmware stored in the non-volatile memory 30 is functionally divided into firmware 1 and firmware 2. Firmware 1 is used to implement the PDE-Marker function, and firmware 2 is used to implement the PDE-Marker function and configure the relay unit 10. Specifically, firmware 1 includes a time-sensitive portion of the PDE-Marker function, thereby ensuring that the processor completes the loading of firmware 1 within the tVconnStable time period. This allows the processor 40 to execute firmware 1 to respond to the USB PD command sent by the source after the tVconnStable time period. Based on this, in order to achieve fast loading of firmware 1, this application proposes several solutions to reduce the size of firmware 1. It is understood that firmware 1 including a time-sensitive portion of the PDE-Marker function means that firmware 1 includes the time-sensitive part of the PDE-Marker function, and does not mean that it only has the time-sensitive portion of the PDE-Marker function.

[0074] In this application, after the relay component is powered on, in response to the power-on, S101 is executed first: the processor completes the loading of firmware 1 within the tVconnStable time.

[0075] After the processor has finished loading firmware 1, it executes S102: The processor executes firmware 1 to implement the PD E-marker function using a serial communication device.

[0076] Here, the processor executes the PD E-marker function implemented in firmware 1, which includes returning cable information in response to the first USB PD command, thereby implementing the PD E-marker function.

[0077] Specifically, referring to Figure 4(b), a block diagram of the relay component loading firmware 1 is shown. The source end is connected to the relay component, and the serial communication device 20 of the relay component is connected to the source end via CC. The firmware 1 in the non-volatile memory 30 is loaded into the SRAM. The processor 40 executes the firmware 1 to return cable information in response to the USB PD command, and the source end can then obtain the cable information.

[0078] And also execute S103: the processor loads firmware 2, and executes firmware 2.

[0079] After the tVconnStable time following the power-on of the relay component, the source end may issue a USB PD command via CC at any time. The processor 40 can respond to the received USB PD command at any time by executing firmware 1. The processor 40 also loads firmware 2 by executing firmware 1. The loading of firmware 2 and the response to the USB PD command are time-divided; for example, if a USB PD command is received, the processor 40 responds to the USB PD command; if no USB PD command is received, or if the response to the USB PD command has been completed, the processor 40 loads firmware 2. Therefore, firmware 1 also includes the function of loading firmware 2.

[0080] Reference Figure 5 The following will describe in detail the process of performing PD E-marker on cables with repeater components: Once the active cable is connected to the communication system, specifically, after the plug at one end of the cable with the repeater component establishes a connection with the source, the source recognizes that the cable is connected and supplies power to the cable. Within the tVconnStable time after the cable plug is powered on, the processor 40 completes the loading of firmware 1. After the source supplies power to the cable for the tVconnStable time, it sends a USB PD Discover Identity command on the CC signal line to access the cable E-marker. The serial communication device 20 receives the first USB PD command on the CC, the processor executes firmware 1, and uses the serial communication device 20 to respond with the corresponding USB PD command to realize the PD E-marker function. The source sends a transmission command on the CC signal line to transmit the first high-speed signal configuration information. If firmware 2 has not yet been loaded, the processor 40 continues to execute firmware 1 to store the first high-speed signal configuration information related to the repeater unit in SRAM. If firmware 2 has been loaded, the processor 40 executes firmware 2 to store the first high-speed signal configuration information related to the repeater unit in SRAM.

[0081] During the execution of firmware 1, processor 40 also loads firmware 2 during the time when it does not need to respond to the source. Once firmware 2 is loaded, after processor 40 has completed a data interaction with an AMS unit using firmware 1, processor 40 executes firmware 2. Subsequently, processor 40 executes firmware 2 to respond to USB PD commands from the source. Processor 40 executing firmware 2 also identifies whether first high-speed signal configuration information related to the relay unit has been obtained. If the first high-speed signal configuration information related to the relay unit exists in SRAM, the relay unit 10 is configured using this first high-speed signal configuration information; if the first high-speed signal configuration information is not yet complete in SRAM, when the source transmits the first high-speed signal configuration information on the CC signal line, processor 40 executes firmware 2 to store the first high-speed signal configuration information in SRAM and uses this first high-speed signal configuration information to configure the relay unit 10.

[0082] The configuration information of the first high-speed signal sent by the source on the CC signal line is unrelated to the E-marker function.

[0083] In the embodiments provided in this application, the firmware of the processor of the relay component is split according to function. Only the basic firmware 1 with E-marker function is loaded within the tVconnStable time, which shortens the size of firmware 1 loaded within the tVconnStable time. This enables the cable with E-marker function to quickly communicate with the source end about the PD protocol after power-on, avoiding compatibility issues caused by the cable being unable to respond to the USB PD commands of the source end after the power-on tVconnStable time due to excessive firmware loading time.

[0084] The first USB PD command in the aforementioned embodiments is described below: The first USB PD command specifically includes the following commands defined in the relevant USB PD protocol specifications: Discover Identity, Discover SVIDs, Discover Modes, Enter Mode, Exit Mode, Built-In Self-Test Message, Soft Reset, and Get-Manufacturer-Info Message.

[0085] The Identify Identity command requests the connected device to provide its identity and basic capabilities information. The Discover SVID command requests the connected device to provide a list of all supported standards or vendor-defined standards or vendor IDs. The Discover Mode command, specifically for a particular vendor, requests the connected device to provide all specific operating modes supported by that vendor and their detailed configuration information. The Exit Mode command instructs the connected device to exit a currently active specific mode. The Soft Reset command requests the connected device to reset its USB PD protocol state machine. The Get Manufacturer Information message requests the connected device to provide its manufacturer-specific information.

[0086] In some embodiments, the aforementioned first USB PD command is a subset of various USB PD commands that the source may send, and these commands are time-sensitive, meaning the source may send these USB PD commands at any time after the tVconnStable time. Therefore, to reduce the size of firmware 1 and enable the processor to complete loading firmware 1 within the tVconnStable time, firmware 1 only supports these USB PD commands and does not include code for responding to other types of USB PD commands or code for implementing other functions (e.g., code for configuring relay unit 10 using the first high-speed signal configuration information). For time-insensitive USB PD commands, such as the Ra-Weaken function, since the Ra-Weaken function requires monitoring the power supply and VConn Swap AMS data packets from the source, and the VConn Swap AMS data packets are used in the USB PD protocol for a dedicated negotiation process to dynamically switch the cable power supply responsibility party (i.e., the VCONN Source role), which is not sensitive to power-on delay requirements, firmware 1 does not include code for implementing the Ra-Weaken function, thereby reducing the size of firmware 1 and shortening the loading time of firmware 1. Therefore, the processor cannot respond to Ra-weaken when executing firmware 1, as the first USB PD command in this example does not include Ra-weaken. Consequently, the PD E-marker function implemented by the processor in firmware 1 is an incomplete PD E-marker function. That is, when the processor executes firmware 1, it only responds to the portion of the USB PD commands on the CC that belongs to the first USB PD command.

[0087] The following describes firmware 2 in this application: In this application, firmware 2 is used to implement Figure 3The repeater unit 10 includes configuration functions and complete PD E-marker functionality. Specifically, the configuration functions of the repeater unit 10 include configuration functions for the Redriver and / or Retimer. Firmware 2 is larger than firmware 1. It should be noted that the configuration functions for the Redriver and / or Retimer can be considered as the repeater component configuring the ReDriver / Retimer active components to perform signal processing based on the received data. Firmware 1 does not include this function; therefore, firmware 2 is larger than firmware 1.

[0088] The processor 40 executes firmware 2 to implement the PD E-marker function using the serial communication device 20. The PD E-marker function implemented by the processor 40 in firmware 2 includes: returning cable information in response to a second USB PD command.

[0089] Optionally, firmware 2 is the complete firmware for processor 40. Still optionally, firmware 1 and firmware 2 together constitute the complete firmware for processor 40.

[0090] When the processor 40 executes firmware 1, it also loads firmware 2, which is loaded into SRAM at a different storage location than firmware 1.

[0091] Referring to Figure 6(a), the following will describe in detail the process of processor 40 executing firmware 2: When processor 40 executes firmware 2, if the first high-speed signal configuration information is already stored in SRAM, processor 40 uses this information to configure relay unit 10. If serial communication device 20 receives a command on CC, and this command is a USB PD command, then processor 40 uses serial communication device 20 to respond with the corresponding USB PD command to implement the PD E-maker function. After executing the USB PD command, processor 40 continues configuring relay unit 10 until the configuration of relay unit 10 is completed. If, when processor 40 executes firmware 2, the first high-speed signal configuration information is not yet fully stored in SRAM, and the first high-speed signal configuration information is transmitted on the CC signal line at the source end, processor 40 executes firmware 2 to store the first high-speed signal configuration information in SRAM.

[0092] It should be noted that when the processor 40 executes firmware 2, the operation of configuring the relay unit 10 and the operation of processing the USB PD command overlap in time, and the processor's operation of executing firmware 2 and processing the PD E-marker command takes precedence over the operation of configuring the relay unit 10. That is, even if the processor is configuring the relay unit, once the serial communication device 20 receives the USB PD command, the processor 40 suspends the configuration of the relay unit and uses the serial communication device 20 to respond to the USB PD command to implement the PD E-marker function.

[0093] In Figure 6(b), firmware 1 and firmware 2 are stored in different address ranges in SRAM. After the relay component powers on, firmware 1 is loaded first, and firmware 2 is loaded during the idle time while processing USB PD commands. After loading firmware 2, the processor does not execute firmware 2 immediately. Instead, the processor jumps to the address of firmware 2 and executes firmware 2 only after completing a data interaction of an AMS unit through the execution of firmware 1. This avoids interrupting the data interaction of the AMS unit processed by the processor when executing firmware 1. Allocating different storage addresses for firmware 1 and firmware 2 achieves modular isolation of the firmware, enhances the security of the relay component, optimizes the process, and improves the reliability of the relay component.

[0094] In some embodiments, when the processor executes firmware 2, it implements the configuration function of relay unit 10 and utilizes... Figure 3 The serial communication device 20 implements the PD E-marker function, which is not present in firmware 1.

[0095] Specifically, as mentioned above, in some scenarios, the processor cannot implement the Ra-Weaken function when executing firmware 1. In this example, the processor executes firmware 2 in response to a second USB PD command, which includes the Ra-Weaken command.

[0096] In yet another embodiment, when the processor executes firmware 2, in addition to implementing the configuration function of relay unit 10, it also utilizes... Figure 3 The serial communication device 20 implements complete PD E-marker functionality. Unlike the previous embodiment, when the processor executes firmware 2, it utilizes... Figure 3 In addition to implementing Ra-Weaken functionality, the serial communication device 20 utilizes... Figure 3 The serial communication device 20 can also return cable information.

[0097] In this embodiment, the second USB PD command includes a Ra-Weaken command, an identification command, an SVID discovery command, a discovery mode command, an enter mode command, an exit mode command, a built-in self-test message, a soft reset command, and a manufacturer information acquisition message. When the processor executes firmware 2, it responds to all commands in the second USB PD command and executes the corresponding functions. The processor can achieve complete PD E-marker functionality when executing firmware 2.

[0098] The following will explain the jump method from firmware 1 to firmware 2: During PD protocol communication, data packets are communicated in units of AMS (Atomic Message Sequence). An AMS represents a series of message exchanges (multiple data packets sent and received) that must occur completely between two devices to complete a single, specific, indivisible task or negotiation process. If the sequence is interrupted (e.g., protocol error, timeout, physical connection loss, preemption by a higher-priority event), the entire AMS is considered to have failed or not occurred. The protocol state machine typically rolls back to the state before the AMS began.

[0099] To prevent data loss or misinterpretation from being caused by interrupting the data interaction process of the AMS unit in firmware 1 when switching from firmware 1 to firmware 2, firmware 2 is not executed immediately after it is loaded. Instead, firmware 2 is executed only after the data interaction of one AMS unit has been completed by executing firmware 1.

[0100] Reference Figure 7 In some embodiments, firmware 2 is also loaded during the execution of firmware 1 by the processor. In this embodiment, firmware 1 also includes a bootloader function for loading firmware 2.

[0101] The processor executes firmware 1 to load firmware 2. Once firmware 2 is loaded, if firmware 1 has completed a data interaction with an AMS unit, the processor executes firmware 2.

[0102] If firmware 2 is loaded successfully, but firmware 1 has not completed the data interaction of one AMS unit, the processor will enter a sleep state and sleep for a specified time. After the sleep state ends, the processor will execute firmware 1 to re-determine whether the data interaction of one AMS unit has been completed. If the data interaction of one AMS unit has been completed, the processor will execute firmware 2.

[0103] Execute in the main body of firmware 1 Figure 7The processing flow is as follows. After firmware 2 is loaded, it periodically checks whether a data interaction with an AMS unit is complete to determine when to execute firmware 2. The code in firmware 1 used to handle AMS unit data interactions functions as, for example, an interrupt service routine. This code sets a flag when AMS unit data interaction begins to indicate that it is in progress, and modifies the flag after the interaction is complete to indicate that it is finished. Therefore, this flag is detected in the main processing flow of firmware 1 to identify whether a data interaction with an AMS unit is complete.

[0104] Those skilled in the art can set the hibernation time themselves; no restrictions are imposed here.

[0105] exist Figure 7 In this embodiment, firmware 1 includes a bootloader function for loading firmware 2. This increases the size of firmware 1, and the bootloader function is not necessary for responding to USB PD commands issued by the source after the tVconnStable time.

[0106] Reference Figure 8 In another embodiment, the function of loading firmware 2 is removed from firmware 1 of the previous embodiment, resulting in a new firmware 1 with a smaller size. The function of loading firmware 2 in the original firmware 1 is used as firmware 3. The new firmware 1 (unless otherwise specified, firmware 1 refers to the new firmware 1) includes the function of loading firmware 3. The code implementing loading firmware 3 in firmware 1 is simpler than the code implementing loading firmware 2 in firmware 3, thus making the new firmware 1 smaller than the original firmware 1. For example, the code for loading firmware 3 in firmware 1 does not need to detect whether the data interaction of the AMS unit is complete. By reducing the size of firmware 1, the loading time of firmware 1 is further shortened, enabling the cable to quickly perform PD protocol-related communication interactions at the source end. For another example, when firmware 1 loads firmware 3, it does not need to consider multiple versions of firmware 2, nor does it need to handle possible updates to firmware 2.

[0107] If, during the process of the processor executing new firmware 1 to load firmware 3 and the processor executing firmware 3 to load firmware 2, firmware 2 is loaded and firmware 3 completes a data interaction of an AMS unit, then the processor executes firmware 2.

[0108] If firmware 2 is loaded successfully, but firmware 3 has not completed the data interaction of one AMS unit, the processor will enter a sleep state. After the sleep state ends, it will re-determine whether firmware 3 has completed the data interaction of one AMS unit. If the data interaction of one AMS unit has been completed, the processor will execute firmware 2.

[0109] By using the above method, a jump can be performed after the data interaction of an AMS unit is completed, which can prevent data loss or misinterpretation caused by the interruption of the AMS sequence when jumping to execute firmware 2.

[0110] In one embodiment, firmware 1 includes a first bootloader for loading firmware 3, and firmware 3 is a second bootloader for loading firmware 2. Firmware 3 exists independently of firmware 1 as a second bootloader. When subsequent product functionality is expanded, boot parameters are adjusted, or security policies are updated, only firmware 3 needs to be upgraded, without re-flashing firmware 1, significantly reducing on-site maintenance costs and upgrade risks. It should be noted that in this solution, firmware 1 still has the function of responding to the first USB PD command, thus possessing partial PD E-Marker functionality; firmware 3 does not have the function of responding to USB PD commands, while firmware 2 has complete PD E-Marker functionality.

[0111] In conjunction with the foregoing, in the embodiments provided in this application, when the processor executes firmware 2, in order to realize the configuration function of the relay unit 10, it needs to obtain high-speed signal configuration information so as to configure the aforementioned relay unit 10 using the high-speed signal configuration information.

[0112] As previously mentioned, the relay component 10 includes Static Random-Access Memory (SRAM), which is divided into a common area. During the execution of firmware 1 by the processor 40, the source end may send high-speed configuration information. Firmware 1 also includes the function of listening to the high-speed configuration information sent by the source end through the serial communication device 20 and storing the high-speed configuration information in the common area of ​​the SRAM. However, even if the high-speed configuration information is received, the processor 40 executing firmware 1 will not use the high-speed configuration information to configure the relay unit 10. After the processor 40 executes firmware 2, it directly reads the high-speed configuration information from the common area of ​​the SRAM, and then configures the relay unit 10 according to these parameters. After the configuration is completed, the relay circuit 10 can normally send and receive signals according to the requirements of the source end. Thus, the high-speed signal configuration information is shared by firmware 1 and firmware 2, and the processor executes firmware 2 to read the first high-speed configuration information to implement the configuration function of redriver / retimer.

[0113] In some embodiments, when the processor is running firmware 1, it utilizes... Figure 3 The serial communication device 20 in the middle listens to the data signal on CC to listen to the high-speed signal configuration information sent from the source end, and stores the high-speed signal configuration information in static random access memory.

[0114] In this embodiment, when the processor is running firmware 2, it reads high-speed signal configuration information from the common area of ​​SRAM and uses the high-speed signal configuration information to configure the relay unit 10, thereby realizing the configuration function of the relay unit 10. In other words, when firmware 2 is running, the processor accesses the common area to read high-speed signal configuration information and uses the high-speed signal configuration information to configure the Redriver and / or Retimer.

[0115] When the processor executes firmware 1, it does not use high-speed signal configuration information to configure relay unit 10, so as to further reduce the size of firmware 1 and enable the processor to complete the loading of firmware 1 within tVconnStable time.

[0116] As described above, in another scenario, to reduce the size of firmware 1 and enable the processor to load firmware 1 within the tVconnStable time, the relay component includes firmware 3, which is loaded when the processor executes firmware 1. During the execution of firmware 3, the processor also uses the serial communication device 20 to listen for data signals on CC to monitor the high-speed signal configuration information emitted by the source and stores the high-speed signal configuration information in static random access memory, but does not use the high-speed signal configuration information to configure the relay unit 10.

[0117] In another embodiment, when the relay component includes firmware 3, the processor loads firmware 3 while running firmware 1. While running firmware 3, the processor uses the serial communication device 20 to listen to data signals on the CC to monitor high-speed signal configuration information emitted from the source end, and stores the high-speed signal configuration information in static random access memory. In this embodiment, firmware 1 may not include the function of loading firmware 2 (which is provided by firmware 3), nor may it include the function of monitoring high-speed signal configuration information emitted from the source end, nor the function of storing high-speed signal configuration information in static random access memory, further reducing the size of firmware 1 and enabling the processor to complete loading firmware 1 within tVconnStable time. Through this method, firmware 1 only retains the time-sensitive PD E-Marker function and the necessary code for loading firmware 3, significantly reducing code size and complexity, thus reducing the size of firmware 1 and shortening the time for the processor to load firmware 1.

[0118] Based on the aforementioned embodiments, in some scenarios, the processor executes firmware 2, in addition to using high-speed signal configuration information, it also listens to high-speed signal configuration information emitted by the source and stores the high-speed signal configuration information in static random access memory.

[0119] In an optional embodiment, the firmware utilizes an interrupt mechanism to receive data from the CC signal line.

[0120] For example, data received from the CC signal line may or may not be USB PD commands. This data may also include, for example, system resource allocation requests and data transfer control signals.

[0121] Firmware 1 includes a main body and an interrupt service routine. After receiving data from the CC signal line, the serial communication device 20 sends an interrupt to the processor 40. The processor 40 calls the interrupt service routine of firmware 1 to process the received data. In the interrupt service routine, it identifies whether the received data is a USB PD command, and if it belongs to the first USB PD command, it returns cable information to the source end to realize the PD E-Marker function. The main body of firmware 1 is used to load firmware 2 or firmware 3.

[0122] Reference Figure 9 This section describes the main body of firmware 1 and the processing flow of each interrupt service routine.

[0123] The main processing flow of firmware 1 includes: setting the interrupt service routine of firmware 1 to the interrupt service routine of serial communication device 20; starting serial communication device 20; setting AMS-Complete=False and loading firmware 2; after firmware 2 is loaded, reading the value of AMS-Complete to determine whether the data interaction of the current AMS unit is complete. If AMS-Complete=True, it means that the data interaction of the current AMS unit is complete, and firmware 2 is executed. If AMS-Complete=False, it means that the data interaction of the current AMS unit is not complete, and after a specified sleep time, reading AMS-Complete again to determine whether the data interaction of the AMS unit is complete.

[0124] The interrupt service routine flow of firmware 1 includes: In response to receiving an interrupt from the serial communication device 20, acquire the data received by the serial communication device 20 from the CC signal line; Determine whether the received data is a USB PD command. If it is not a USB PD command, proceed to determine whether the data interaction of the current AMS unit has been completed. If it is a USB PD command, execute the subsequent steps. Determine whether the received USB PD command is a read E-Marker command. If it is not a read E-Marker command, proceed to determine whether the data interaction of the current AMS unit has been completed. If it is, execute the subsequent steps. The serial device 20 outputs the cable information corresponding to the read E-marker command to the source. Determine whether the current AMS unit data interaction has been completed. If the current AMS unit data interaction has been completed, set AMS-Complete=True, exit the interrupt service routine of firmware 1, and execute firmware 2. If the current AMS unit data interaction has not been completed, set AMS-Complete=False and exit the interrupt service routine of firmware 1.

[0125] exist Figure 9 In the illustrated embodiment, after loading firmware 2 is completed in the main loop of firmware 1, the AMS-Complete function is checked to determine whether the data interaction of the current AMS unit is complete, and thus whether firmware 2 should be executed. In the interrupt service routine of firmware 1, the value of AMS-Complete is set accordingly based on the current data interaction status of the AMS unit.

[0126] Reference Figure 10 , Figure 10 A flowchart illustrating the interrupt service routine of firmware 1 according to another embodiment of this application is provided, specifically including: Acquire the data received by the serial communication device 20 from the CC signal line.

[0127] If the data is a USB PD command whose target is a cable, then the corresponding USB PD command is executed to provide a response to the PD command to the source.

[0128] If the data is not a USB PD command whose target is a cable, the data is parsed to obtain high-speed configuration information, and the high-speed configuration information is stored in the common area of ​​SRAM.

[0129] In this context, parsing CC data to obtain high-speed configuration information includes: high-speed signal direction, speed, and alternative negotiation mode. It's important to note that alternative negotiation mode allows the USB Type-C interface to switch to other protocols (such as DisplayPort, Thunderbolt, HDMI, etc.) in addition to USB data transmission. Specifically, the source sends an Enter Mode command to request entry into a specific alternative negotiation mode (such as DPAltMode and Thunderbolt AltMode). Firmware 1's interrupt service routine records this information, facilitating the processor to complete related operations when executing firmware 2.

[0130] Clear the interrupt flag.

[0131] The system identifies whether the data interaction of the current AMS unit has been completed, and sets the firmware flag to the first or second state based on the identification result. If the data interaction of the current AMS unit is completed, AMS-Complete=true is set; otherwise, if the data interaction of the current AMS unit is not completed, AMS-Complete=false is set.

[0132] In this application, it is determined whether the current data interaction with the AMS unit has been completed, and the firmware flag is set to a first state or a second state based on the determination result. By doing so, after the current data interaction with the AMS unit is completed, the interrupt handler of firmware 1 exits, thus preventing data loss or misinterpretation when the interrupt handler of firmware 1 exits.

[0133] Exit the interrupt service routine of firmware 1.

[0134] Furthermore, in Figure 10 In the processing flow, after identifying the received data as a USB PD command targeting a cable, it further identifies whether the USB PD command is the first USB PD command. If the USB PD command is the first USB PD command, the information of the cable corresponding to the read E-marker command is output to the source end through the serial communication device. If the USB PD command is not the first USB PD command, the process directly proceeds to the step of clearing the interrupt flag.

[0135] Figure 9 and Figure 10 The processing flow shown also applies to embodiments that do not include firmware 3.

[0136] Reference Figure 11 The following will describe the process of loading firmware 2 using firmware 1 and firmware 3.

[0137] After the relay component powers on, firmware 1 is loaded and run. Firmware 1 enables the processor to execute the following procedures: setting the interrupt service routine of the serial communication device 20 as the interrupt service routine of firmware 1; starting the serial communication device 20; setting AMS-Complete=False; loading firmware 3; and if firmware 3 is loaded successfully, the processor executes firmware 3. During this process, if the source end issues a USB PD command via CC, the interrupt service routine of firmware 1 is invoked in response to the USB PD command. The processing flow of the interrupt service routine of firmware 1 is similar to that of... Figure 9 or Figure 10 The interrupt service routine processing flow shown in the embodiments is consistent with that of the previous ones.

[0138] In this embodiment, when firmware 3 is executed, the interrupt service routine for the serial communication device is not changed. Therefore, during the execution of firmware 3, if the source end issues a USB PD command via CC, the interrupt service routine of firmware 1 is still invoked to respond to the USB PD command.

[0139] Firmware 3 is used to load firmware 2. The processor's execution flow for firmware 3 includes: loading firmware 2, reading AMS-Complete, determining whether the current AMS unit's data interaction is complete. If AMS-Complete=True, it means the current AMS unit's data interaction is complete, and firmware 2 is executed. If AMS-Complete=False, it means the current AMS unit's data interaction is not complete, and the processor sleeps for a specified time before continuing to read AMS-Complete to determine whether the AMS unit's data interaction is complete.

[0140] As mentioned earlier, during the execution of firmware 3, the interrupt handler of firmware 1 continues to be used to respond to interrupt events. Therefore, when firmware 2 is loaded using firmware 3, the interrupt service routine flow of firmware 1 remains unchanged.

[0141] Firmware 2 includes the main body of firmware 2 and the interrupt service routines of firmware 2. After firmware 2 is executed, the interrupt service routines of firmware 1 are replaced by firmware 2's own interrupt service routines.

[0142] Reference Figure 12 and Figure 13 The following will describe the processing flow of firmware 2.

[0143] Figure 12 The processing flow of the main body of firmware 2 is illustrated. The processing flow of the main body of firmware 2 includes: setting the interrupt service routine of the serial communication device 20 as the interrupt service routine of firmware 2; and reading the SRAM common area to obtain high-speed configuration information. The high-speed configuration information read here is the high-speed configuration information received from the CC signal line when firmware 1 or firmware 3 is executed.

[0144] Continuing with firmware 2, it checks if the high-speed configuration information in the SRAM common area has been updated. If updated, the relay unit 10 is configured with the updated high-speed configuration information. If not updated, it continues to check if the configuration information in the common area has been updated. The updated high-speed configuration information here is the high-speed configuration information received from the CC signal line when firmware 2 is executed. By determining that the high-speed configuration information has been updated through the main body of firmware 2, the relay unit 10 is configured in a timely manner. This ensures that the data monitoring and recovery functions on the CC are not lost during the entire firmware loading process, and prevents situations of no response or incorrect parsing. It can handle different scenarios where the source sends data via CC at any time after power-on.

[0145] Figure 13 This demonstrates the interrupt service routine processing flow of Firmware 2. The interrupt service routine flow of Firmware 2 includes: In response to receiving an interrupt from serial communication device 20, Acquire data received by serial communication device 20 from the CC signal line; Determine whether the received data is a USB PD command whose target is a cable. If so, output the cable information corresponding to the read E-marker command to the source through serial device 20, and exit the interrupt service routine of firmware 2. If the received data is not a USB PD command whose target is a cable, then it is further determined whether the received data is a Ra-Weaken related command (Vconn Swap AMS); if the received data is not a Ra-Weaken related command (Vconn Swap AMS), then the high-speed configuration information is obtained from the received data and stored in the common area of ​​SRAM, and the interrupt service routine of firmware 2 is exited. If the received data is a Ra-Weaken related command (Vconn Swap AMS), then execute the Ra-Weaken function and exit the firmware 2 interrupt service routine.

[0146] The following will further elaborate on the service flow of the interrupt routine in firmware 2: Reference Figure 14 , Figure 14 A flowchart illustrating the interrupt service routine of firmware 2 provided in this application embodiment specifically includes: S601: Determine whether the received data packet is a USB PD command.

[0147] S602a: If the data packet is not a USB PD command, exit the interrupt handler of firmware 2.

[0148] S602b: If the data packet is a USB PD command, determine the target recipient of the USB PD command.

[0149] S603: In response to the target transmission object being a cable, the USB PD command is executed to implement the PD E-marker function via a serial communication device.

[0150] In this scenario, if the target of the USB PD command is a cable, and the USB PD command is a read E-marker command (i.e., the source outputs a read E-marker command to the repeater component), then the repeater component returns the cable information corresponding to the read E-marker command, thus returning the cable information to the source.

[0151] If the target of the USB PD command is a cable, and the USB PD command is not a read E-marker command, determine whether the USB PD command is a Ra-Weaken command; if the USB PD command is a Ra-Weaken command, set the Ra-Weaken function.

[0152] In one embodiment, when the processor executes firmware 2, it utilizes the serial communication device 20 to implement the complete PD E-marker function. The complete PD E-marker function includes responding to both the first USB PD command and the second USB PD command described above.

[0153] Based on the foregoing embodiments, this application proposes a repeater component, which includes a memory, a processor, and a program stored in the memory and executable on the processor. When the processor executes the program, it implements the method provided in the foregoing embodiments.

[0154] Based on the foregoing embodiments, this application provides an active cable, at least one end of which includes a repeater component as provided in the foregoing embodiments.

[0155] An active cable includes connectors at both ends and a cable between the two connectors, with the two connectors connecting the source and destination ends respectively. At least one of the two connectors includes a repeater component as provided in the foregoing embodiments. To implement the PD E-Marker function, only one repeater component needs to respond to the USB PD command. When there is only one repeater component, to achieve long-distance signal transmission, the repeater component is preferably located within the connector connected to the source end. Of course, there can also be two repeater components within the cable. To avoid data conflicts caused by both repeater components responding to the USB PD command simultaneously, which would prevent the source end from correctly reading the cable information, one of the two repeater components can be configured as a master chip, which responds to the USB PD command from the source end, while the other is configured as a slave chip, forwarding the USB PD command to the master chip according to the cable's communication link. Alternatively, the two repeater components can be configured with different roles, so that when one responds to the USB PD command, the other does not. It is understood that when there are more repeater components in the cable, different roles can be assigned to each repeater component to achieve one component responding to the USB PD command.

[0156] Further reference Figure 15In the embodiments provided in this application, two relay components are connected to both sides of the cable. The two relay components are connected to the source end and the destination end respectively. The relay unit 10 is responsible for transmitting high-speed signals, while the serial communication device 20 is responsible for listening to the data signals received on the CC to configure the relay unit 10. In this way, the transmission of high-speed signals is realized.

[0157] Reference Figure 15 After the cable is connected to the source end, the source end supplies power to the two repeater components of the cable. In response, the processors of each of the two repeater components start and load firmware 1. The processors complete loading firmware 1 within the tVconnStable time after power-on. At this time, the source end issues a USB PD command to query cable information. The processor of one of the two repeater components responds to this USB PD command by executing firmware 1. The processor executing firmware 1 also loads firmware 2. Optionally, the processor executing firmware 1 loads firmware 3, and then loads firmware 2 by executing firmware 3. In order to achieve high-speed signal transmission, the repeater components on both sides of the cable receive configuration information of the repeater unit to configure the repeater unit.

[0158] In some cases, the active cable contains only copper wires, with a relay component located between the two connectors for transmitting the received high-speed signal, and also includes copper wires connected between the two connectors for transmitting low-speed signals, such as the copper wires connecting cc.

[0159] In some cases, the cable includes optical fiber, and the connector also includes a photoelectric conversion module. The repeater unit is connected to the photoelectric conversion module, and the photoelectric conversion module is connected to the optical fiber. The photoelectric conversion module converts the electrical signal received from the repeater unit into an optical signal and outputs it through the optical fiber, or converts the received optical signal into an electrical signal and outputs it to the repeater unit. It can be understood that, in some cases, the cable also includes copper wire, which is used to connect the CC or V-bus of the two connectors.

[0160] Based on the foregoing embodiments, this application provides an information processing device, which includes a memory, a processor, and a program stored in the memory and executable on the processor. When the processor executes the program, it implements the method provided in the foregoing embodiments.

[0161] It should be noted that the method provided in the foregoing embodiments is used to process the received information during transmission.

[0162] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer commands.

[0163] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of embodiments of the present invention, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0164] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of the invention pertain.

[0165] Depending on the context, the word "if" as used here can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."

[0166] In the embodiments provided in this invention, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0167] Furthermore, in the various embodiments of the present invention, the functional units can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0168] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0169] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for a relay component to perform PD E-marker function, characterized in that, The relay component includes a serial communication device and a processor, and the method includes: In response to power-up, the processor completes loading of the first firmware within tVconnStable time; The processor executes the first firmware to implement a PD E-marker function using the serial communication device, and the processor executing the PD E-marker function implemented by the first firmware includes returning cable information in response to a first USB PD command; The processor loads a second firmware, and executes the second firmware.

2. The method of claim 1, wherein: The first USB PD command includes an identify identity command, a discover SVID command, a discover mode command, an enter mode command, an exit mode command, a built-in self-test message, a soft reset command, and a get manufacturer information message.

3. The method according to claim 1 or 2, characterized in that, The second firmware has a size greater than the first firmware, and the second firmware is further configured to implement a configuration function of a relay unit, and the configuration function of the relay unit includes a configuration function of a Redriver and / or a Retimer.

4. The method of claim 3, wherein, The processor executes the second firmware to implement a PD E-marker function using the serial communication device, and the processor executing the PD E-marker function implemented by the second firmware includes returning cable information in response to a second USB PD command, and the first firmware and the second firmware have different storage addresses.

5. The method according to claim 3 or 4, characterized in that, The processor executes the second firmware to implement a complete PD e-marker function using the serial communication device. Or The processor executing the second firmware includes implementing a PD e-marker function that does not exist in the first firmware using the serial communication device.

6. The method of any one of claims 1-5, wherein: The first firmware includes an interrupt handling program of the first firmware; The processor executes the interrupt handling program of the first firmware to return the cable information in response to an interrupt event; The interrupt event is generated by the serial communication device in response to receiving data from a CC signal line, and the data received from the CC signal line that causes the interrupt event includes a USB PD command.

7. The method of claim 6, wherein: In the process of the processor executing the interrupt handling program of the first firmware to return the cable information in response to the interrupt event: Executing the interrupt handling program of the first firmware further includes: Identifying whether the current data interaction of the AMS unit is completed, and setting a firmware flag bit to a first state or a second state according to the identification result.

8. The method of claim 6 or 7, wherein: The processor executes the first firmware to check the firmware flag bit, executes the second firmware if the firmware flag bit is in the second state, and otherwise repeatedly checks the firmware flag bit.

9. The method of any one of claims 6-8, wherein: The second firmware includes an interrupt handling program of the second firmware; The processor executes an interrupt handler of the second firmware to respond to the received USB PD command in response to the interrupt event. The interrupt event is generated by the serial communication device in response to receiving data from the CC signal line.

10. The method of claim 9, wherein The processor executes the second firmware to replace the interrupt handler of the first firmware with an interrupt handler of the second firmware to respond to the interrupt event.

11. The method of any one of claims 6-10, wherein The interrupt handler of the first firmware or the interrupt handler of the second firmware comprises: determining whether the received data packet is a USB PD command; if the data packet is not a USB PD command, exiting the interrupt handler of the first firmware or the interrupt handler of the second firmware.

12. The method of claim 11, wherein if the data packet is a USB PD command, the interrupt handler of the first firmware further comprises determining a target of the USB PD command; in response to the target not being a cable, exiting the interrupt handler of the first firmware; in response to the target being a cable, the first interrupt service program determines whether the USB PD command is an E-maker command; if the USB PD command is a read E-marker command, outputting information of a cable corresponding to the read E-marker command to the host through the serial communication device; if the USB PD command is not a read E-marker command, determining whether the USB PD command is an alternate mode negotiation; if the USB PD command is an alternate mode negotiation, recording relevant information; and if the USB PD command is not an alternate mode negotiation, exiting the first interrupt service program.

13. The method of claim 12, wherein if the data packet is a USB PD command, the interrupt handler of the second firmware further comprises determining a target of the USB PD command; in response to the target not being a cable, exiting the interrupt handler of the second firmware; in response to the target being a cable, the second interrupt service program processes the corresponding USB PD command.

14. An information processing apparatus comprising a storage, a processor, and a program stored on the storage and capable of running on the processor, characterized by The processor executes the program to implement the method of any one of claims 1-13.

15. An active cable, characterized by The at least one end of the active cable comprises a relay component that executes the method of any one of claims 1-13. The at least one end of the active cable comprises a relay component that executes the method of any one of claims 1-13.