Deterministic time delay coroutine scheduling method and electronic equipment

Abstract

The invention relates to the technical field of computers, and discloses a deterministic time delay coroutine scheduling method and electronic equipment, which are used for controlling the running time of a coroutine and ensuring that the coroutine is executed on time. In the method, the electronic equipment determines operation time information of a first coroutine, and the operation time information of the first coroutine comprises a first expected operation duration and a first expected operation end moment; the electronic equipment determines target time information of the first coroutine according to the running time information of the first coroutine, the target time information of the first coroutine is used for indicating the estimated running time length of the first coroutine, and the target time information of the first coroutine comprises a first estimated starting moment and a first estimated ending moment. Therefore, the electronic equipment can estimate the starting moment and the ending moment of the operation of the first coroutine based on the expected operation duration and the expected ending moment of the first coroutine, so that the operation time of the coroutine can be controlled, the coroutine is ensured to be executed on time, and the time delay problem is avoided.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of computer, and particularly relate to a deterministic time delay coroutine scheduling method and an electronic device. BACKGROUND

[0002] An operating system supports a multi-thread mode to run, and in order to improve business performance, a large number of concurrent threads can be set in a business process. A thread contains one or more coroutine tasks, and in a time slice to which the thread belongs, the multiple coroutine tasks contained in the thread are executed alternately. Among them, the coroutine task in the current thread can be designed as a coroutine task with independent stack space, or as a coroutine task sharing a running stack. When the coroutine task in the thread is a coroutine task with independent stack space, the stack space used by the coroutine task when executing is the independent stack space of the coroutine task, so the coroutine scheduler only needs to switch the stack register of the coroutine task in the thread context to the stack register of another coroutine task to complete the switching of the coroutine task. For example, when the coroutine task in the thread shares a running stack, the coroutine scheduler needs to copy the data generated by the execution process of one coroutine task in the running stack to a memory, and load the context of another coroutine task into the context of the thread to realize the switching of the coroutine task. However, in the above two coroutine task switching modes, the coroutine scheduler only considers the memory problem when switching the coroutine task, and does not consider the time delay problem of the coroutine task, so during the execution of the coroutine task, the coroutine scheduler cannot guarantee that the coroutine task is completed on time, which may cause the thread to have a time delay problem. SUMMARY

[0003] Embodiments of the present application provide a deterministic time delay coroutine scheduling method and an electronic device to control the running time of the coroutine, guarantee the execution of the coroutine on time, and avoid the time delay problem.

[0004] In a first aspect, the embodiments of the present application provide a deterministic time delay coroutine scheduling method, which is applied to an electronic device. The method comprises:

[0005] The electronic device can determine the running time information of a first coroutine to be run on a first thread. The running time information of the first coroutine is used to represent the expected running time length of the first coroutine, and the running time information of the first coroutine includes a first expected running time length and a first expected running end time. The electronic device can also determine the target time information of the first coroutine according to the running time information of the first coroutine. The target time information of the first coroutine is used to indicate the estimated running time length of the first coroutine, and the target time information of the first coroutine includes a first estimated start time and a first estimated end time.

[0006] In the method, the electronic device can estimate the start time and the end time of the first coroutine running on the first thread by determining the running time information of the first coroutine, so as to control the running time of the coroutine on the thread, thereby ensuring the coroutine to be executed on time and avoiding time delay.

[0007] In a possible design, the first expected running duration is a preset running duration, or the first expected running duration is a duration determined based on a service type of the first coroutine, or the first expected running duration is a maximum value of the preset running duration and the duration determined based on the service type of the first coroutine.

[0008] In a possible design, when the first thread further includes a second coroutine, the electronic device can further determine running time information of the second coroutine, and determine target time information of the second coroutine according to the running time information of the second coroutine. The running time information of the second coroutine is used to represent an expected running duration of the second coroutine, and the running time information of the second coroutine includes a second expected running duration and a second expected running end time. The target time information of the second coroutine is used to indicate an estimated running duration of the second coroutine, and the target time information of the second coroutine includes a second estimated start time and a second estimated end time.

[0009] Through the design, the electronic device can determine the running time information of each coroutine to be run in the first thread, and estimate the target time information of each coroutine to be run on the first thread based on the determined running time information, so as to control the running time of each coroutine to be run on the first thread, thereby ensuring the coroutine to be executed on time and avoiding time delay.

[0010] In a possible design, when the second estimated start time is later than the first estimated start time and the second estimated start time is earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and the second estimated end time is earlier than the first estimated end time, the first coroutine starts running at the first estimated start time and ends running at the first estimated end time, the second coroutine is suspended at an overlapping time, and the second coroutine resumes running at a time between the second estimated start time and the second estimated end time except the overlapping time. The overlapping time is an overlapping part between the first estimated start time and the first estimated end time and between the second estimated start time and the second estimated end time. The priority of the second coroutine is lower than the priority of the first coroutine, and the priority of the second coroutine is determined based on a service type of the second coroutine, and the priority of the coroutine is determined based on a service type of the coroutine.

[0011] Through the design, when the running time of the first coroutine estimated by the electronic device overlaps with the running time of the second coroutine, the electronic device can determine that the first coroutine with high priority normally runs in the estimated running time, and determine that the second coroutine with low priority is suspended at the overlapping time, so that the coroutine with high priority can be guaranteed to be executed preferentially.

[0012] In a possible design, when the second coroutine is suspended at the overlapping time, the electronic device can further determine a third estimated start time and a third estimated end time. The second coroutine starts running at the third estimated start time, and the second coroutine is interrupted to be suspended at the third estimated end time. The length of time from the third estimated start time to the third estimated end time is the same as the length of time of the overlapping time. The third estimated end time is not later than the first estimated start time, and the third estimated end time is not later than the second estimated start time.

[0013] Through the design, when the second coroutine is suspended at the overlapping time, the electronic device can determine, before the second estimated start time, a time period composed of the third estimated start time and the third estimated end time, which has the same length of time as the overlapping time, for executing the second coroutine, so that the electronic device can be guaranteed to complete the task of the second coroutine before the second estimated end time of the second coroutine when the second coroutine is suspended at the overlapping time, and the problem of time delay can be avoided.

[0014] In a possible design, when the second estimated start time is later than the first estimated start time and earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and earlier than the first estimated end time, the electronic device can further perform a frequency raising operation to obtain updated target time information of the first coroutine and updated target time information of the second coroutine. The estimated running time indicated by the updated target time information of the first coroutine is lower than the estimated running time indicated by the target time information of the first coroutine, and the estimated running time indicated by the updated target time information of the second coroutine is lower than the estimated running time indicated by the target time information of the second coroutine. The updated target time information of the first coroutine includes an updated first estimated start time and an updated first estimated end time, and the updated target time information of the second coroutine includes an updated second estimated start time and an updated second estimated end time. The updated first estimated end time is not later than the first estimated end time, and the updated second estimated end time is not later than the second estimated end time.

[0015] Through the design, when the running time of the first coroutine and the running time of the second coroutine estimated by the electronic device overlap, the electronic device can perform frequency boosting, reduce the estimated running time of the first coroutine and the estimated running time of the second coroutine, so that the first coroutine and the second coroutine can both complete the task at the estimated end time, and the time delay problem is avoided.

[0016] In a possible design, when the updated second estimated start time is later than the updated first estimated end time, or the updated second estimated end time is earlier than the updated first estimated start time, the first coroutine starts running at the updated first estimated start time and ends running at the updated first estimated end time, and the second coroutine starts running at the updated second estimated start time and ends running at the updated second estimated end time.

[0017] In a possible design, when the second estimated start time is later than the first estimated end time, or the second estimated end time is earlier than the first estimated start time, the first coroutine starts running at the first estimated start time and ends running at the first estimated end time, and the second coroutine starts running at the second estimated start time and ends running at the second estimated end time.

[0018] Through the design, when the running time of the first coroutine and the running time of the second coroutine estimated by the electronic device do not overlap, the electronic device can determine that the first coroutine and the second coroutine can run within the running time estimated by the electronic device, so that the running time of each coroutine to be run on the first thread is controlled, and the coroutine can be guaranteed to be executed on time, and the time delay problem is avoided.

[0019] In a possible design, when the second estimated start time is later than the first estimated end time, the electronic device can also take the first coroutine as the currently executed coroutine at the first estimated start time; or, when the second estimated end time is earlier than the first estimated start time, the electronic device can also take the second coroutine as the currently executed coroutine at the second estimated start time.

[0020] In a possible design, when the running time of the first coroutine and the running time of the second coroutine estimated by the electronic device overlap, the electronic device can perform frequency boosting, reduce the estimated running time of the first coroutine and the estimated running time of the second coroutine, so that the first coroutine and the second coroutine can both complete the task at the estimated end time, and the time delay problem is avoided.

[0021] In a third aspect, the present application provides a computer readable storage medium, which stores a computer program. When the computer program is run on an electronic device, the electronic device is caused to perform the method described in any possible design of any one of the first aspect.

[0022] In a fourth aspect, the present application provides a computer program product, which includes a computer program or instructions. When the computer program or instructions are run on an electronic device, the electronic device is caused to perform the method described in any possible design of any one of the first aspect.

[0023] In a fifth aspect, the present application provides a chip system, which includes a processor and a memory. The memory stores instructions. When the instructions are executed by the processor, the method described in any possible design of any one of the first aspect is implemented. The chip system can be composed of a chip, or can include a chip and other discrete devices.

[0024] The beneficial effects of the second aspect to the fifth aspect are described in the description of the beneficial effects of the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 A schematic diagram of a coroutine scheduling provided exemplarily by the present application;

[0026] Figure 2A A schematic diagram of a possible hardware structure of an electronic device provided exemplarily by the present application;

[0027] Figure 2B A block diagram of a possible software structure of an electronic device provided by an embodiment of the present application;

[0028] Figure 3 A flowchart of a runtime length determination use case provided by the present application;

[0029] Figure 4A A schematic diagram of an initial time slice corresponding to a coroutine provided by the present application;

[0030] Figure 4B A schematic diagram of CPU frequency reduction provided by the present application;

[0031] Figure 4C A schematic diagram of time slice movement provided by the present application;

[0032] Figure 4D A schematic diagram of CPU frequency increase provided by the present application;

[0033] Figure 5A flowchart of a deterministic latency coroutine scheduling method provided in the present application is shown in the figure;

[0034] Figure 6 Another interstitial time slice diagram provided in the present application is shown in the figure;

[0035] Figure 7 Another interstitial time slice diagram provided in the present application is shown in the figure;

[0036] Figure 8 An overlapping region diagram provided in the present application is shown in the figure;

[0037] Figure 9 Another overlapping region diagram provided in the present application is shown in the figure;

[0038] Figure 10 Another overlapping region diagram provided in the present application is shown in the figure;

[0039] Figure 11 A time slice moving diagram provided in the present application is shown in the figure;

[0040] Figure 12 A CPU frequency increasing diagram provided in the present application is shown in the figure;

[0041] Figure 13 A multiple overlapping region moving diagram provided in the present application is shown in the figure;

[0042] Figure 14 Another multiple overlapping region moving diagram provided in the present application is shown in the figure;

[0043] Figure 15 A flowchart of a deterministic latency coroutine scheduling method provided in the present application is shown in the figure. DETAILED DESCRIPTION

[0044] The technical solutions in the embodiments of the present application will be described in detail below with reference to the accompanying drawings in the embodiments of the present application.

[0045] First, the concepts related to the embodiments of the present application are explained.

[0046] (1) A process can refer to a running activity of a program with certain independent functions, and is a carrier for running an application program. Alternatively, a process can be understood as a running instance of an application program, and is a dynamic execution of an application program. For example, when a user runs a Notepad program, the user creates a process for accommodating the code of Notepad.exe and the required dynamic link library. A process is an independent unit for resource allocation and scheduling of a system, and each process has its own memory space, and different processes are independent of each other.

[0047] (2) Thread refers to the smallest execution unit (basic unit) scheduled by the operating system. Among them, the thread is an independently executable unit inside the process, which shares the address space of the process, but each thread saves the state (i.e., context) required at runtime. A process contains at least one thread, and threads have concurrency, that is, a single process supports the execution of multiple concurrent threads, and each thread shares the memory space of the process, and each thread concurrently executes different tasks. For example, one thread can be used to write files to the disk, and another thread can be used to receive user key operations and respond in a timely manner, and the threads do not interfere with each other.

[0048] (3) Coroutines refer to a lightweight thread, and threads are the carriers of coroutines. However, compared with threads, coroutines are mostly in user mode rather than kernel mode. Multiple coroutines can share a thread. Different coroutines also have different independent context environments, including code segments and stacks. Similarly, the context of the coroutine mainly includes register values. Among them, each coroutine can correspond to a task, and sometimes the coroutine can also be referred to as a coroutine task. The stack of the coroutine is usually used to store local variables, function call parameters, return addresses, and other execution context information. In the embodiments of the present application, the coroutine can be designed as a coroutine with an independent stack, or as a coroutine sharing a running stack with other coroutines. Moreover, the coroutine in the embodiments of the present application can be a coroutine in a coroutine pool, or a coroutine in a thread. Among them, the coroutines in the coroutine pool are uniformly managed and scheduled by the coroutine pool, and the life cycle of the coroutine is more independent and does not directly depend on a single thread. The coroutine in the thread is directly managed by the thread, and the life cycle of the coroutine in the thread is closely related to the thread. Moreover, the number of coroutines in the thread is limited by the resource limit of the thread itself, while the coroutine pool creates a certain number of coroutines in advance and reuses them.

[0049] (4) Coroutine pool refers to a data structure for managing and reusing coroutines. The coroutine pool is used to limit the number of coroutines and control the creation and destruction of coroutines. Among them, the coroutine pool usually contains a task queue and a fixed number of worker coroutines. The task queue is used to store tasks to be processed, and the worker coroutine is used to take tasks from the task queue and execute them.

[0050] In order to better understand the technical solutions of the present application, the scheduling mode of the coroutine will be introduced next.

[0051] As shown in Figure 1 , the electronic device can include a thread, the electronic device stores a plurality of coroutines corresponding to the thread, and a coroutine scheduler for scheduling the coroutines. Among them, as shown in Figure 1As shown, a thread can support the following coroutines: coroutine 1, coroutine 2, ..., coroutine n. Coroutines 1, 2, ..., n can be designed as coroutines with independent stacks or as coroutines sharing a single execution stack. When coroutines 1, 2, ..., n are coroutines with independent stack spaces, the data generated by them during execution on the thread is stored in their respective independent stacks. When coroutines 1, 2, ..., n are coroutines sharing a single execution stack, the data generated by them during execution on the thread is stored in the execution stack. For example, when an electronic device performs a task, it can schedule the coroutines corresponding to that task through a coroutine scheduler, so that the coroutines corresponding to the task execute on threads to complete the task. Figure 1 When coroutines 1, 2, ..., n are located within a thread, the coroutine scheduler can be either a scheduler within that thread or a scheduler independent of the thread. Alternatively, when coroutines 1, 2, ..., n are located within a coroutine pool, the coroutine scheduler can be either a scheduler within the coroutine pool or a scheduler outside the coroutine pool. For example, when a thread or coroutine pool receives a task, the coroutine scheduler can determine the corresponding coroutines 1 and 2 from multiple coroutines and assign them to threads capable of executing the task. The coroutine scheduler can first select coroutine 1 from coroutine 1 and coroutine 2 for scheduling, loading the context of coroutine 1 into the thread's context, allowing the thread to schedule and execute the code of coroutine 1. The coroutine scheduler can schedule coroutine 2 after coroutine 1 has completed execution, or it can suspend coroutine 1 during its execution and schedule coroutine 2. The coroutine scheduler can load the context of coroutine 2 into the context of a thread, allowing the thread to execute the code of coroutine 2, thus completing the switch between coroutine 1 and coroutine 2. Specifically, when coroutine 1 and coroutine 2 are coroutines with independent stacks, the scheduler only needs to switch the context of coroutine 1 in the thread context to that of coroutine 2 when switching from coroutine 1 to coroutine 2. Alternatively, when coroutine 1 and coroutine 2 share a single execution stack, the scheduler needs to copy the data generated by coroutine 1 during its execution from the execution stack to another memory location when switching from coroutine 1 to coroutine 2. This copied data will then be copied back to the execution stack when the scheduler switches back to coroutine 1.

[0052] However, when scheduling coroutines, the coroutine scheduler only focuses on memory usage during scheduling and does not manage the execution time of the coroutines. In other words, the coroutine scheduler cannot control the execution time of coroutines, thus it cannot control the task execution time. Therefore, because the coroutine scheduler cannot control the execution time of coroutines when scheduling tasks, tasks may not complete on time, leading to latency issues.

[0053] In view of this, embodiments of this application provide a deterministic delay coroutine scheduling method. When an electronic device calls a thread to execute a task, it can determine the runtime information of the coroutines to be run within that thread. The runtime information of the coroutines to be run characterizes the expected runtime of the coroutines, including the expected runtime and the expected end time. The electronic device can determine the target time information of the coroutines to be run based on this runtime information. The target time information of the coroutines to be run indicates the estimated runtime of the coroutines, including the estimated start time and the estimated end time. The electronic device can schedule the coroutines to be run within a thread according to their target time information, thereby controlling the coroutine runtime and ensuring that the thread completes its task on time, avoiding latency issues.

[0054] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, and c can be single or multiple.

[0055] Unless otherwise stated, the ordinal numbers such as "first" and "second" mentioned in the embodiments of this application are used to distinguish multiple objects and are not used to limit the size, content, order, timing, priority, or importance of the multiple objects. For example, "first file" and "second file" are only used to distinguish different files and do not indicate that the two files are different in size, content, priority, or importance.

[0056] The embodiments of this application can be applied to various electronic devices with concurrent task execution capabilities. For example, the electronic device includes, but is not limited to, devices equipped with... Alternatively, it can be an electronic device with another operating system. The operating system of the electronic device may include multiple independently executing threads, and each thread may include multiple independently executable coroutines.

[0057] For example, electronic devices can refer to terminal devices such as mobile phones, tablets, wearable devices with wireless communication capabilities (e.g., watches, bracelets), in-vehicle terminal devices, augmented reality (AR) / virtual reality (VR) devices, laptops, ultra-mobile personal computers (UMPCs), netbooks, personal digital assistants (PDAs), smart home devices (e.g., smart TVs, smart speakers), smart robots, factory equipment, wireless terminals in self-driving, remote medical surgery, smart grids, transportation safety, smart cities, or smart homes, and flying equipment (e.g., smart robots, drones, airplanes). Wearable devices are portable devices that users can wear directly on their bodies or integrate into their clothing or accessories.

[0058] For example, electronic devices can also be servers or virtual machines (VMs).

[0059] Figure 2A A schematic diagram of the hardware structure of a possible electronic device is shown. (For example...) Figure 2AAs shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, a barometric pressure sensor 180C, a magnetic sensor 180D, an accelerometer sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0060] Processor 110 may include one or more processing units, such as application processors (APs), microcontroller units (MCUs), modem processors, GPUs, image signal processors (ISPs), controllers, memory, video codecs, digital signal processors (DSPs), baseband processors, and / or neural network processing units (NPUs). Different processing units may be independent devices or integrated into one or more processors. The controller may serve as the central nervous system and command center of the electronic device 100. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution. Processor 110 may also include memory for storing instructions and data. In some embodiments, the memory in processor 110 may be a cache memory. This memory can store instructions or data that processor 110 has recently used or is repeatedly used. If processor 110 needs to reuse an instruction or data, it can directly retrieve it from the memory. This avoids repeated access, reduces the waiting time of processor 110, and thus improves system efficiency.

[0061] USB interface 130 is a USB standard compliant interface, specifically a Mini USB interface, Micro USB interface, USB Type-C interface, etc. USB interface 130 can be used to connect a charger to charge electronic device 100, and can also be used for data transfer between electronic device 100 and peripheral devices. Charging management module 140 receives charging input from the charger. Power management module 141 connects battery 142, charging management module 140, and processor 110. Power management module 141 receives input from battery 142 and / or charging management module 140, providing power to processor 110, internal memory 121, external memory, display 194, camera 193, and wireless communication module 160, etc.

[0062] The wireless communication function of electronic device 100 can be implemented through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor, and baseband processor. Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover one or more communication frequency bands. Different antennas can also be multiplexed to improve antenna utilization. For example, antenna 1 can be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antennas can be used in conjunction with tuning switches.

[0063] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a Miniled LED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include one or N display screens 194, where N is a positive integer greater than 1. In this embodiment, the display screen 194 can be used to display a main interface, a user interface, granularity adjustment controls, etc.

[0064] Camera 193 is used to capture still images or videos. Camera 193 may include a front-facing camera and a rear-facing camera.

[0065] Internal memory 121 can be used to store computer executable program code, which includes instructions. Processor 110 executes various functional applications and data processing of electronic device 100 by running the instructions stored in internal memory 121. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system and software code for at least one application (e.g., Huawei Video, Changlian, etc.). The data storage area may store data generated during the use of electronic device 100 (e.g., images, videos, etc.). Furthermore, internal memory 121 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0066] The external storage interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions. For example, images, videos, and other files can be saved on the external memory card.

[0067] Electronic device 100 can implement audio functions, such as music playback and recording, through audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, and application processor.

[0068] In this embodiment, the processor 110 can determine the runtime information of a first coroutine to be run on a first thread. The runtime information of the first coroutine characterizes its expected runtime, and includes a first expected runtime and a first expected end time. Furthermore, the processor 110 can determine the target runtime information of the first coroutine based on its runtime information. The target runtime information indicates the estimated runtime of the first coroutine, and includes a first estimated start time and a first estimated end time.

[0069] Understandable, Figure 2A The components shown do not constitute a specific limitation on the electronic device. The electronic device may also include more or fewer components than shown, or combine some components, or split some components, or have different component arrangements. In the following embodiments, [the following text is incomplete and likely refers to a different embodiment]. Figure 2A The electronic device 100 shown is used as an example for introduction.

[0070] The software system of electronic device 100 can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. A layered architecture divides the software into several layers, each with a clear role and function. Layers communicate with each other through software interfaces. For example, ... Figure 2B As shown, the software architecture can be divided into four layers, from top to bottom: the application layer, the application framework layer (framework, FWK), the runtime and system libraries, and the (Linux) kernel layer.

[0071] The application layer is the top layer of the operating system and includes native operating system applications such as camera, gallery, calendar, Bluetooth, music, and video, as well as third-party applications. The applications discussed in this application embodiment are referred to as applications (APPs), which are software programs capable of performing one or more specific functions. Typically, multiple applications can be installed on an electronic device, such as a camera application. The applications mentioned below can be system applications pre-installed at the factory or third-party applications downloaded by the user from the network or obtained from other electronic devices during the use of the electronic device.

[0072] Of course, for developers, they can write applications and install them into this layer. In one possible implementation, the application can be developed using the Java language, by calling the application programming interface (API) provided by the application framework layer. Developers can then interact with the underlying operating system (such as the kernel layer) through the application framework to develop their own applications.

[0073] The application framework layer provides the API and programming framework for the application layer. It can include predefined functions. The application framework layer may include a window manager, content provider, view system, phone manager, resource manager, notification manager, etc.

[0074] The window manager is used to manage window programs. The window manager can obtain the screen size, determine if a status bar is present, lock the screen (or display), and capture the screen, among other things.

[0075] Content providers are used to store and retrieve data, making that data accessible to applications. This data may include files (e.g., documents, videos, images, audio), text, and other information.

[0076] A view system includes visual controls, such as controls that display text, images, documents, and other content. View systems can be used to build applications. An interface in a display window can consist of one or more views. For example, a display interface including a text message notification icon could include a view that displays text and a view that displays images.

[0077] The phone manager provides communication functionality for electronic devices. The notification manager allows applications to display notification information in the status bar; it can be used to convey informative messages and can disappear automatically after a short pause without user interaction.

[0078] The runtime includes the core libraries and the virtual machine. The runtime is responsible for system scheduling and management.

[0079] The system's core library consists of two parts: one part contains the functionalities that the Java language needs to call, and the other part is the system's core library. The application layer and application framework layer run in a virtual machine. Taking Java as an example, the virtual machine executes the Java files in the application layer and application framework layer as binary files. The virtual machine is used to perform functions such as object lifecycle management, stack management, thread management, security and exception management, and garbage collection.

[0080] The system library can include multiple functional modules. For example: a code converter, a media library, a 3D graphics processing library (e.g., OpenGL ES), a 2D graphics engine (e.g., SGL), and an image processing library. The code converter is used to convert between two languages. The media library supports playback and recording of various common audio and video formats, as well as still image files. The media library supports multiple audio and video encoding formats, such as MPEG4, H.564, MP3, AAC, AMR, JPG, and PNG. The 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing. The 2D graphics engine is the drawing engine for 2D graphics.

[0081] The kernel layer provides core system services for the operating system, such as security, memory management, process management, network protocol stack, and driver models, all of which are implemented based on the kernel layer. The kernel layer also serves as an abstraction layer between the hardware and software stacks. This layer contains many drivers related to electronic devices, including: display drivers; keyboard drivers as input devices; Flash drivers for memory-based devices; camera drivers; audio drivers; Bluetooth drivers; and WiFi drivers.

[0082] It is important to understand that the functional services described above are just an example. In practical applications, electronic devices may be divided into more or fewer functional services based on other factors, or the functions of each service may be divided in other ways, or they may not be divided into functional services but work as a whole.

[0083] The deterministic delay coroutine scheduling method is described in detail below with reference to specific embodiments. In various embodiments of this application, one or more coroutines scheduled by the electronic device using the coroutine scheduling method are executed on the same thread. To facilitate understanding of the deterministic delay coroutine scheduling method provided in this application, the following is combined with... Figures 3 to 15 The content shown describes the implementation process of the method provided in this application. In the accompanying drawings corresponding to the various embodiments of this application, all optional steps are indicated by dashed lines.

[0084] In some embodiments, after receiving a task, the electronic device can determine the corresponding coroutine from multiple coroutines to execute the task. The task can be a concurrent task, and each coroutine can be a coroutine contained within a thread or a coroutine from a coroutine pool. For example, after receiving one or more concurrent tasks, the electronic device can select one or more coroutines from the multiple coroutines contained in the thread or coroutine pool to complete the received one or more concurrent tasks. For instance, when processing an I / O task, the electronic device can determine a coroutine to be executed from multiple I / O coroutines contained in the I / O thread, or it can select a coroutine capable of executing the I / O task from the coroutine pool. The selected coroutine waits to be executed on the I / O thread. As another example, when processing multiple I / O tasks, the electronic device can determine multiple coroutines to be executed from multiple I / O coroutines contained in the I / O thread, or it can select multiple coroutines capable of executing I / O tasks from the coroutine pool. The multiple coroutines selected by the electronic device wait to be executed on one I / O thread. In some embodiments, after receiving a task, if the electronic device determines that there is no corresponding coroutine among the created coroutines, it may also create a coroutine corresponding to the task. For example, the electronic device can create a coroutine by executing a coroutine code segment stored in the electronic device. For instance, the electronic device can create a coroutine using the following format:

[0085] coroutine_t coroutine_create(coroutine_func co_fn,void*args){

[0086] coroutine_t co=_co_new(co_fn,args);

[0087] processors_submit(co);

[0088] return co;

[0089] }

[0090] After identifying a coroutine for performing a task, an electronic device can determine the coroutine's runtime information using a coroutine-based runtime estimation mechanism. This runtime information characterizes the coroutine's expected runtime. For example, after identifying a first coroutine for performing a task, the electronic device can designate this first coroutine as the coroutine to be run. The electronic device can determine the runtime information of this first coroutine. This runtime information characterizes the expected runtime of the first coroutine and includes a first expected runtime and a first expected completion time. The runtime information of the first coroutine can be determined when the electronic device creates or schedules the first coroutine.

[0091] The process of determining the runtime information of the first coroutine is explained below.

[0092] An electronic device can determine the first expected end time of a first coroutine based on its lifecycle. The lifecycle is preset by the user. For example, the lifecycle can be set to 30 seconds. Exemplarily, the electronic device can determine the first expected end time based on the time slice of a first thread and the lifecycle of the first coroutine. The time slice of the first thread represents the allowed running time of the first thread. For example, if the time slice of the first thread is 8:10:00am-8:11:00am, and the lifecycle of the first coroutine is 30 seconds, the electronic device can determine the first expected end time as 8:10:30am. The data format for 8:10:00am, 8:11:00am, and 8:10:30am is hour:minute:second.

[0093] The electronic device can also determine the first expected runtime of the first coroutine based on the runtime estimation mechanism in the coroutine structure. The runtime estimation mechanism is a mechanism within the first coroutine used to estimate its first expected runtime. For example, when compiling the coroutine structure of the first coroutine, the user can add a mechanism to the coroutine structure that can determine the first expected runtime of the first coroutine. In this way, when scheduling or creating the first coroutine, the electronic device can determine the first expected runtime of the first coroutine based on the runtime estimation mechanism in the coroutine structure. For example, the coroutine structure of the first coroutine compiled by the user can be as follows:

[0094] static coroutine_t_co_new(coroutine_func fn,void*args,void*params,intb_type){

[0095] / / Electronic devices with the necessary conditions can determine the expected runtime during the pre-compilation stage, or they can define a custom stage for determining the expected runtime: t_estimation, t_expectation = pre_infer(params, b_type); / / Define the expected runtime estimation mechanism

[0096] coroutine_t co=(coroutine_t)malloc(sizeof(struct coroutine));

[0097] if (co == NULL)

[0098] error_exit("co new failed!");

[0099] co->fn=fn;

[0100] co->fn_data = args;

[0101] co->stack = NULL;

[0102] co->stack_size = 0;

[0103] co->sched = NULL;

[0104] co->status = CO_RUNNABLE;

[0105] co->stack = NULL;

[0106] co->stack_size = 0;

[0107] co->t_estimation=t_estimation; / / Estimated duration definition

[0108] co->t_expectation = t_expectation; / / Definition of expected runtime

[0109] co->biz_type = b_type; / / Business type setting

[0110] INIT_LIST_HEAD(&co->list);

[0111] return co;

[0112] }

[0113] The runtime estimation mechanism determines the first expected runtime in a way that can be written by the user based on actual needs. For example, there are three ways to determine the first expected runtime: one is to use a preset runtime as the first expected runtime; another is to use the duration determined by the service type of the first coroutine as the first expected runtime; and the third is to use the maximum value between the duration determined by the service type of the first coroutine and the preset runtime as the first expected runtime. The service type can be game, GUI, IO, network, driver, etc., or it can be a user-defined coroutine service type. For example, the following describes the process of determining the first expected runtime of the first coroutine in an electronic device based on the three methods provided above.

[0114] Method 1: The runtime estimation mechanism determines the runtime by using the preset runtime as the first expected runtime.

[0115] In some embodiments, when an electronic device calls or creates a first coroutine, it can directly use the preset runtime of the first coroutine as the first expected runtime of the first coroutine. For example, when calling the first coroutine, the electronic device can also determine the current CPU base frequency and, based on a preset mapping between the CPU base frequency and the preset runtime, determine the first expected runtime of the first coroutine under the current circumstances. For example, if the CPU base frequency is 0.5 GHz and the preset runtime is 30 ms, the electronic device, upon determining that the current CPU base frequency is 0.5 GHz, determines the first expected runtime of the first coroutine to be 30 ms.

[0116] Method 2: The runtime estimation mechanism determines the runtime by taking the duration determined based on the service type of the first coroutine as the first expected runtime.

[0117] In some embodiments, the electronic device can determine a first expected runtime based on the service type of the first coroutine when invoking or creating it. For example, the electronic device can use the service type of the first coroutine as input to a service type empirical calibration fitting function f(service type), and output the first expected runtime based on f(service type). Here, f(service type) is a function fitted based on a large number of empirical values, including the service type and the actual runtime of the coroutines under that service type.

[0118] In other embodiments, when the electronic device calls or creates a first coroutine, it can also determine the first expected runtime based on the service type and first parameters of the first coroutine. The first parameter characterizes the complexity of the first coroutine. The first parameter is a user-preset parameter, and this user-set first parameter has a mapping relationship with the CPU base frequency. This mapping relationship is stored in the user-compiled first coroutine. The first parameter may include, but is not limited to: the number of lines of code, the main program structure of the coroutine, the number of variables, the type of functions, the number and relationships of objects, and the main data structure. The main data structure includes, but is not limited to: halstead volume (HV), cyclomatic complexity (CC), the number of I / O operations, and the time complexity exponent. For example, the electronic device can determine the first expected runtime based on the first parameters and service type of the first coroutine at the current CPU base frequency using the following formula:

[0119] t expectation =A*(B*f(first parameter)+C*f(business type))

[0120] Among them, t expectation Let A represent the first expected runtime, B represent the weight of the first parameter function f (first parameter), C represent the weight of the business type function f (business type), and f is the single-factor empirical calibration fitting function.

[0121] Method 3: The runtime estimation mechanism determines the runtime by taking the maximum value between the runtime determined by the service type based on the first coroutine and the preset runtime as the first expected runtime.

[0122] In some embodiments, after obtaining the duration determined based on the service type of the first coroutine, the electronic device can further select the maximum value from the preset runtime and the runtime determined based on the service type of the first coroutine as the first expected runtime, based on the expectation mechanism in the first coroutine. The method by which the electronic device determines the runtime based on the service type of the first coroutine is the same as the method for determining the first expected runtime in Method 2 described above; for details, please refer to the process for determining the first expected runtime in Method 2, which will not be repeated here. The preset runtime is the same as the preset runtime in Method 1, and will not be repeated here. For example, the electronic device can determine the runtime of the first coroutine based on the following formula:

[0123] t expectation =max(γ*t+t) self-defined )

[0124] Among them, t expectation Let t represent the first expected runtime. self-definedHere, t represents the preset runtime, γ represents the runtime determined based on the service type of the first coroutine, and γ represents the CPU base frequency coefficient. The value of γ ranges from 0.5 to 1.0. When electronic devices determine the first expected runtime of the first coroutine using the expected operating mechanism and runtime estimation mechanism set in the first coroutine, they can provide users with more flexible runtime planning.

[0125] After determining the first expected runtime of the first coroutine using any of the methods 1, 2, or 3 described above, the electronic device can save the first expected runtime of the first coroutine at the current CPU base frequency. This way, when the electronic device subsequently calls the first coroutine, it does not need to determine the first expected runtime of the first coroutine at the same CPU base frequency again. Alternatively, if the electronic device determines the first expected runtime of the first coroutine using any of the three methods described above but fails to save the determined first expected runtime, the electronic device will need to use all three methods again to determine the first expected runtime of the first coroutine when subsequently calling it.

[0126] Based on the content shown in the above embodiments, as Figure 3 As shown, this application provides a use case for determining the expected runtime. In this use case, the first coroutine is the coroutine to be executed on the first thread. Figure 3 As shown, this use case includes:

[0127] When the electronic device determines that the first thread includes the first coroutine, it can determine the first expected runtime of the first coroutine based on the first coroutine's runtime estimation mechanism. The first expected runtime can be determined in three ways, and the electronic device can do so by executing steps S301-1, S301-2, or S301-3. The steps for determining the first expected runtime are explained below.

[0128] In some embodiments, the method for determining the first expected runtime in the runtime estimation mechanism of the first coroutine can be to use a preset runtime as the first expected runtime. In this case, the electronic device can determine the first expected runtime of the first coroutine by executing step S1502-1.

[0129] S301-1: The electronic device uses the preset runtime in the first coroutine as the first expected runtime.

[0130] The process of determining the first expected runtime in step S301-1 is the same as the process of determining the first expected runtime in method 1 of the above embodiment, and will not be repeated here.

[0131] In other embodiments, the method for determining the runtime in the runtime estimation mechanism of the first coroutine can also be set by the user to use the duration determined based on the service type of the first coroutine as the first expected runtime. In this case, the electronic device can determine the runtime of the first coroutine by executing step S301-2.

[0132] S301-2: The electronic device determines the first expected runtime of the first coroutine based on the service type of the first coroutine.

[0133] The process of determining the first expected runtime in step S301-2 is the same as the process of determining the first expected runtime in method 2 of the above embodiment, and will not be repeated here.

[0134] In other embodiments, the method for determining the runtime in the runtime estimation mechanism of the first coroutine can also be set by the user to take the maximum value between the duration determined based on the service type of the first coroutine and a preset runtime as the first expected runtime. In this case, the electronic device can determine the first expected runtime by executing steps S301-3. S301-3 can consist of steps S301-3a and S301-3b.

[0135] S301-3a: Electronic devices determine the duration based on the service type of the first coroutine.

[0136] The process of determining the duration based on the service type of the first coroutine in step S301-3a is the same as the process of determining the first expected runtime based on the service type of the first coroutine in method 2 of the above embodiment, and will not be repeated here.

[0137] S301-3b: The electronic device uses the maximum value between the duration determined based on the service type of the first coroutine and the preset runtime as the first expected runtime of the first coroutine.

[0138] The process of determining the first expected runtime in step S301-3b is the same as the process of determining the first expected runtime in method 3 of the above embodiment, and will not be described again here.

[0139] based on Figure 3 As shown, electronic devices can control the first expected runtime of the first coroutine based on the runtime estimation mechanism and expected runtime mechanism set by the user in the first coroutine, thereby ensuring that the first coroutine completes its task on time during subsequent coroutine scheduling.

[0140] After determining the runtime information of the first coroutine, the electronic device can further determine the target runtime information of the first coroutine based on this runtime information. The target runtime information of the first coroutine indicates its estimated runtime and includes a first estimated start time and a first estimated end time. For example, the first estimated start time can be the start time of the initial time slice reserved by the electronic device for the first coroutine within the time slice of the first thread, and the first estimated end time can be the end time of the initial time slice reserved by the electronic device for the first coroutine within the time slice of the first thread. The time slice of the first thread indicates the allowed runtime of the first thread. For example, the electronic device can determine the target runtime information of the first coroutine in the following ways.

[0141] As an example, the electronic device can use the first expected end time of the first coroutine as the first estimated end time. The electronic device can also determine the first estimated start time based on the first expected runtime and the first estimated end time. Here, the first estimated end time is the time elapsed since the first estimated start time after the first expected runtime.

[0142] As another example, the electronic device can divide the time slice of the first thread into multiple time units. The electronic device can determine the time unit occupied by the first coroutine on the first thread based on the first expected runtime of the first coroutine. The electronic device can also use the first expected end time of the first coroutine as the end time of the time unit occupied by the first coroutine on the first thread, thus obtaining the initial time slice occupied by the first coroutine on the time slice of the first thread. Here, the first estimated start time is the start time of the initial time slice, and the first estimated end time is the end time of the initial time slice. Alternatively, the electronic device can determine the duration of the initial time slice occupied by the first coroutine on the time slice of the first thread using the following formula: Where t1 represents the duration of the initial time slice corresponding to the first coroutine, t expectation Let α represent the first expected runtime of the first coroutine, and t represent the coefficient. u Indicates the duration of a time unit.

[0143] Based on the above embodiments, the electronic device can reserve a time slice for the first coroutine in the time slice of the first thread based on the first expected runtime and the first expected end time of the first coroutine, so as to ensure that the first coroutine can complete the task on time and achieve deterministic completion of the task.

[0144] After determining the target time information of the first coroutine, the electronic device can schedule the first coroutine according to that target time information. For example, when the first thread includes only one coroutine to be run, the electronic device can select the first coroutine as the currently executing coroutine at the first estimated start time and execute the task. Alternatively, when the first thread includes multiple coroutines to be run, the electronic device needs to reserve time slices for each coroutine based on its target time information, and then select one coroutine from the time slices reserved for the first thread as the currently executing coroutine. The currently executing coroutine is the coroutine with the earliest start time of the reserved time slice on the first thread. The process of scheduling multiple coroutines to be run on the first thread by the electronic device is described below.

[0145] In some embodiments, when the coroutine to be run in the first thread further includes a second coroutine, the electronic device can determine the runtime information of the second coroutine and, based on the runtime information, determine the target runtime information of the second coroutine. The runtime information of the second coroutine characterizes the expected runtime of the second coroutine, and includes a second expected runtime and a second expected end time. The target runtime information of the second coroutine indicates the estimated runtime of the second coroutine, and includes a second estimated start time and a second estimated end time. The process by which the electronic device determines the runtime information of the second coroutine is the same as the process by which the electronic device determines the runtime information of the first coroutine in the above embodiments, and will not be repeated here. The process by which the electronic device determines the target runtime information of the second coroutine is the same as the process by which the electronic device determines the target runtime information of the first coroutine in the above embodiments, and will not be repeated here.

[0146] Upon receiving the target time information of the second coroutine, the electronic device can determine the initial time slice reserved for the second coroutine within the time slice of the first thread. Similarly, the electronic device can determine the initial time slice reserved for the first coroutine within the first thread based on the target time information of the first coroutine.

[0147] For example, such as Figure 4A As shown, the first thread contains a first coroutine and a second coroutine. The electronic device can reserve the initial time slice of the first coroutine within the time slice of the first thread, based on the first estimated start time and the first estimated end time of the first coroutine. The electronic device can also reserve the initial time slice of the second coroutine within the time slice of the first thread, based on the second estimated start time and the second estimated end time of the second coroutine.

[0148] After determining the initial time slices of the first and second coroutines, the electronic device can further sort these initial time slices to avoid overlap. For example, the electronic device can determine whether there is an overlap between the initial time slices of the first and second coroutines. The relationship between the initial time slices of the first and second coroutines can be divided into two cases: one where there is no overlap, and another where there is an overlap. The scheduling process of the first and second coroutines on the first thread by the electronic device will be described below based on these two cases.

[0149] Case 1: There is no overlap between the initial time slice of the first coroutine and the initial time slice of the second coroutine.

[0150] When the second estimated start time is later than the first estimated end time, or the second estimated end time is earlier than the first estimated start time, the electronic device can determine that there is no overlap between the initial time slices of the first and second coroutines. Specifically, the first coroutine can operate normally within its initial time slice; that is, the electronic device estimates that the first coroutine will start running at the first estimated start time and end running at the first estimated end time. Similarly, the second coroutine can operate normally within its initial time slice; that is, the electronic device estimates that the second coroutine will start running at the second estimated start time and end running at the second estimated end time.

[0151] When the electronic device determines that there is no overlap between the initial time slice of the first coroutine and the initial time slice of the second coroutine, it can also determine at least one empty time slice on the first thread. The at least one empty time slice is a period of time within the first thread's time slice that is not reserved for the coroutine. The end time of the at least one empty time slice is no later than either the first estimated end time or the second estimated end time. That is, any one of the at least one empty time slices is located before the initial time slice of the first coroutine or before the initial time slice of the second coroutine.

[0152] As an example, when at least one time slot is greater than or equal to a first time threshold, the electronic device can downclock the CPU, reducing the duration of the time slots. The electronic device can downclock the CPU based on the duration of at least one time slot and the chip state of the electronic device. After CPU downclocking, the initial time slots occupied by the first coroutine and the second coroutine on the first thread are proportionally amplified by a certain factor according to the specific CPU downclocking data. After CPU downclocking, the end times of the first and second coroutines in the first thread remain unchanged. That is, after CPU downclocking, the end time of the time slot occupied by the first coroutine on the first thread is still the first estimated end time, and the end time of the time slot occupied by the second coroutine on the first thread is still the second estimated end time. Furthermore, after CPU downclocking, there is still no overlap between the time slots occupied by the first and second coroutines on the first thread.

[0153] For example, such as Figure 4B As shown, the first thread contains a first coroutine and a second coroutine. The duration of time slice 1 before the first coroutine and the duration of time slice 2 between the first and second coroutines are both greater than the first time threshold. The electronic device can reduce the CPU frequency to reduce the duration of time slice 1 and time slice 2.

[0154] After the CPU frequency is reduced, the electronic device can schedule the first and second coroutines according to the time slices occupied by the first coroutine and the second coroutine on the first thread after the CPU frequency reduction. For example, when the second estimated end time is later than the first estimated end time, the electronic device can set the first coroutine as the currently executing coroutine at the start of the time slice occupied by the first coroutine on the first thread after the frequency reduction. As another example, when the second estimated end time is earlier than the first estimated end time, the electronic device can set the second coroutine as the currently executing coroutine at the start of the time slice occupied by the second coroutine on the first thread after the frequency reduction.

[0155] As another example, when at least one time slot has a time slot smaller than a first time threshold, the electronic device can schedule the first and second coroutines according to their initial time slots. For instance, when the second estimated start time is later than the first estimated end time, the electronic device can set the first coroutine as the currently executing coroutine at the first estimated start time. Similarly, when the second estimated end time is earlier than the first estimated start time, the electronic device can set the second coroutine as the currently executing coroutine at the second estimated start time.

[0156] Case 2: There is an overlap between the initial time slice of the first coroutine and the initial time slice of the second coroutine.

[0157] When the second estimated start time is later than the first estimated start time and the second estimated start time is earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and the second estimated end time is earlier than the first estimated end time, the electronic device can determine that there is an overlapping area between the initial time slice of the first coroutine and the initial time slice of the second coroutine.

[0158] When an electronic device determines that there is an overlap between the initial time slices of a first coroutine and a second coroutine, it can determine the priority of the first coroutine based on its service type, and the priority of the second coroutine based on its service type. The first coroutine has a higher priority than the second coroutine. For example, the electronic device can determine the priority of the first and second coroutines based on a mapping relationship between service type and priority. For instance, the mapping relationship between service type and priority can be shown in Table 1 below:

[0159] Table 1: Mapping Relationship between Business Type and Priority

[0160] Service type Priority (the smaller the value corresponding to the priority, the higher the priority) Game 2 GUI 4 IO 8 Network 16 Drive 32 Customize 0~63 (set by oneself)

[0161] Specifically, when the service type of the first coroutine is gaming and the service type of the second coroutine is networking, the priority of the first coroutine is 2, and the priority of the second coroutine is 16. This means the electronic device can determine that the priority of the second coroutine is lower than that of the first coroutine.

[0162] As an example, the electronic device can determine that a first coroutine can operate normally during its initial time slice, i.e., the electronic device estimates that the first coroutine will start running at the first estimated start time and end running at the first estimated end time. Furthermore, the electronic device can determine that a second coroutine is suspended in the overlapping region of its initial time slice and resumes operation in the region of its initial time slice excluding the overlapping region. That is, the second coroutine is suspended at the overlapping time and resumes operation at times other than the overlapping time between the second estimated start time and the second estimated end time. Here, the overlapping time is the overlapping portion between the first estimated start time and the first estimated end time and between the second estimated start time and the second estimated end time. In other words, the overlapping time can be any time within the overlapping region of the second coroutine's initial time slice. Specifically, the overlapping time can be either the time between the second estimated start time and the first estimated end time, or any time between the first estimated start time and the second estimated end time.

[0163] After identifying the overlapping region, the electronic device can also determine the empty time slices within the time slice of the first thread. The electronic device can determine whether a third estimated start time and a third estimated end time exist within these empty time slices. The second coroutine begins execution at the third estimated start time and is suspended at the third estimated end time. The duration from the third estimated start time to the third estimated end time is the same as the duration of the overlapping time. The third estimated end time is no later than the first estimated start time, and no later than the second estimated start time.

[0164] When a third estimated start time and a third estimated end time exist within the time slice gap, the electronic device can use the time slices occupied by the third estimated start time and the third estimated end time on the first thread as the time slice corresponding to the overlapping region of the second coroutine. In this way, the electronic device can estimate that the second coroutine starts running at the third estimated start time, interrupts and suspends its execution at the third estimated end time, and resumes execution at any time between the second estimated start time and the second estimated end time, excluding the overlapping time. In this case, the electronic device can set the second coroutine as the currently executing coroutine at the third estimated start time.

[0165] For example, such as Figure 4C As shown, the first thread contains a first coroutine and a second coroutine. The start time of the initial time slice of the first coroutine is the first estimated start time, and the end time of the initial time slice of the first coroutine is the first estimated end time. The start time of the initial time slice of the second coroutine is the second estimated start time, and the end time of the initial time slice of the second coroutine is the second estimated end time. The start time of the overlapping region between the initial time slices of the first and second coroutines is the second estimated start time, and the end time of the overlapping region is the first estimated end time. The second coroutine is suspended and does not execute during the overlapping region. When the electronic device determines that a third estimated start time and a third estimated end time exist in the time slice gap, the electronic device can move the time slice of the overlapping region of the second coroutine to the time slice occupied by the third estimated start time and the third estimated end time in the first thread. In this way, the electronic device can estimate the running time of the second coroutine based on the time slice occupied by the first thread: the second coroutine starts running at the third estimated start time, is interrupted and suspended at the third estimated end time, resumes execution at the first estimated end time, and ends running at the second estimated end time. Similarly, the electronic device can estimate the running time of the first coroutine based on the time slice occupied by the first coroutine on the first thread, predicting that the first coroutine starts running at the first estimated start time and ends running at the first estimated end time.

[0166] As another example, after identifying the overlapping region, the electronic device can also identify the empty time slices within the time slice of the first thread. When the electronic device determines that there is no third estimated start time and third estimated end time in the empty time slice, it performs a frequency upsampling operation to obtain updated target time information for the first coroutine and updated target time information for the second coroutine. The estimated runtime indicated by the updated target time information of the first coroutine is lower than the estimated runtime indicated by the target time information of the first coroutine, and the estimated runtime indicated by the updated target time information of the second coroutine is lower than the estimated runtime indicated by the target time information of the second coroutine. The updated target time information of the first coroutine includes the updated first estimated start time and the updated first estimated end time, and the updated target time information of the second coroutine includes the updated second estimated start time and the updated second estimated end time. The updated first estimated end time is no later than the first estimated end time, and the updated second estimated end time is no later than the second estimated end time. For example, an electronic device may increase the CPU frequency based on the duration of the overlapping region and the chip state of the electronic device to reduce the duration of the time slice occupied by the first and second coroutines on the first thread.

[0167] For example, such as Figure 4D As shown, the first thread contains a first coroutine and a second coroutine. The start time of the initial time slice of the first coroutine is the first estimated start time, and the end time of the initial time slice of the first coroutine is the first estimated end time. The start time of the initial time slice of the second coroutine is the second estimated start time, and the end time of the initial time slice of the second coroutine is the second estimated end time. The start time of the overlapping region between the initial time slices of the first and second coroutines is the second estimated start time, and the end time of the overlapping region is the first estimated end time. When the electronic device determines that the duration of the gap time slice on the first thread is less than the duration of the overlapping region, it performs a CPU frequency upscaling operation, reducing the duration of the time slices occupied by the first and second coroutines on the first thread.

[0168] When the updated second estimated start time is later than the updated first estimated end time, or when the updated second estimated end time is earlier than the updated first estimated start time, the first coroutine starts running at the updated first estimated start time and ends running at the updated first estimated end time; similarly, the second coroutine starts running at the updated second estimated start time and ends running at the updated second estimated end time. In this case, when the updated second estimated start time is later than the updated first estimated end time, the electronic device can set the first coroutine as the currently executing coroutine at the updated first estimated start time. As another example, when the updated second estimated end time is earlier than the updated first estimated start time, the electronic device can set the second coroutine as the currently executing coroutine at the updated second estimated start time.

[0169] Based on the above embodiments, the electronic device can determine the expected runtime and expected end time of the first and second coroutines based on the runtime estimation mechanism in the coroutine structure. Based on the determined expected runtime and expected end time, it can estimate the estimated start time and estimated end time of the first and second coroutines running on the first thread. This allows for time slice reservations for the first and second coroutines on the first thread, ensuring that the first and second coroutines can complete their tasks on time and achieve deterministic task completion.

[0170] Figure 5 This diagram illustrates a deterministic delay coroutine scheduling method provided in an embodiment of this application. The coroutine scheduling process is explained using the example of an electronic device determining that multiple coroutines performing a task are executed on a first thread. Figure 5 As shown, the method includes:

[0171] S501: The electronic device determines multiple coroutines to be executed on the first thread.

[0172] The multiple coroutines to be executed on the first thread include at least a first coroutine and a second coroutine. The process by which the electronic device determines the multiple coroutines to be executed on the first thread is the same as the process by which the multiple coroutines to be run on the first thread are determined in the above embodiments, and will not be repeated here.

[0173] S502: Electronic device determines the runtime information of each of the multiple coroutines.

[0174] The runtime information for each coroutine includes: the expected runtime of each coroutine and the expected end time of each coroutine. The process by which the electronic device determines the runtime information of each coroutine is the same as the process by which the electronic device determines the runtime information of the first coroutine in the above embodiment, and will not be repeated here.

[0175] S503: The electronic device can determine the target time information of each coroutine based on the running time information of each coroutine in multiple coroutines.

[0176] The target time information for each coroutine includes the estimated start time and the estimated end time of each coroutine. The process by which the electronic device determines the target time information for each coroutine is the same as the process by which the electronic device determines the target time information for the first coroutine in the above embodiment, and will not be described again here.

[0177] S504: The electronic device can determine the time slice of each of the multiple coroutines based on the target time information of each coroutine.

[0178] The time slice for each coroutine indicates the time period that each coroutine occupies on the first thread. The time slice for each coroutine characterizes the runtime of each coroutine on the first thread.

[0179] In some embodiments, the electronic device can determine the initial time slice of each coroutine based on the target time information of each coroutine. The start time of the initial time slice of each coroutine is the estimated start time of each coroutine, and the end time of the initial time slice of each coroutine is the estimated end time of each coroutine. For example, as... Figure 4A As shown, the multiple coroutines include a first coroutine and a second coroutine. The electronic device can determine the start time of the initial time slice of the first coroutine as a first estimated start time and the end time of the initial time slice of the first coroutine as a first estimated end time. The electronic device can determine the start time of the initial time slice of the second coroutine as a second estimated start time and the end time of the initial time slice of the second coroutine as a second estimated end time.

[0180] After determining the initial time slice for each coroutine, the electronic device can also determine whether there is an overlap between any two initial time slices occupied by multiple coroutines on the first thread.

[0181] As an example, when there is no overlap between any two initial time slices occupied by multiple coroutines, the electronic device can determine at least one gap time slice in the time slice of the first thread. The electronic device can determine whether at least one gap time slice is greater than or equal to a first time threshold. For example, when at least one gap time slice is greater than or equal to the first time threshold, the electronic device can downclock the CPU and update the initial time slice occupied by each of the multiple coroutines on the first thread. The electronic device can use the time slice occupied by each of the multiple coroutines on the first thread after CPU downclocking as the time slice of each coroutine. As another example, when there is a gap time slice less than the first time threshold in at least one gap time slice, the electronic device can use the initial time slice of each coroutine as the time slice of each coroutine. For example, as... Figure 6 As shown, the first thread contains three coroutines to be run: coroutine C1, coroutine C2, and coroutine C3. The duration of time slot 1 before coroutine C3's time slice, the duration of time slot 2 between coroutine C3 and coroutine C2, and the duration of time slot 3 between coroutine C2 and coroutine C1 are all less than the first time threshold. For example, as... Figure 7 As shown, the first thread contains three coroutines to be run: coroutine C1, coroutine C2, and coroutine C3. The duration of time slot 1 before the time slot of coroutine C3 and the duration of time slot 2 between coroutine C3 and coroutine C2 are both less than the first time threshold, while the duration of time slot 3 between coroutine C2 and coroutine C1 is greater than the first time threshold.

[0182] As another example, when there is an overlap between the initial time slices occupied by multiple coroutines, the electronic device can determine a first coroutine and a second coroutine from among the multiple coroutines whose initial time slices overlap. Specifically, the multiple coroutines include at least a first coroutine and a second coroutine, and the multiple coroutines contain at least one set of coroutines whose initial time slices overlap. For example, as... Figure 8 As shown, the first thread contains three coroutines to be run: coroutine C1, coroutine C2, and coroutine C3. There is an overlap between the initial time slices of coroutine C1 and coroutine C2. For example, as... Figure 9 As shown, the first thread contains five coroutines to be run: coroutine C1, coroutine C2, coroutine C3, coroutine C4, and coroutine C5. There is an overlap region 1 between the initial time slice of coroutine C3 and the initial time slice of coroutine C2, and an overlap region 2 between the initial time slice of coroutine C4 and the initial time slice of coroutine C5. For example, as... Figure 10As shown, the first thread contains five coroutines to be run: coroutine C1, coroutine C2, coroutine C3, coroutine C4, and coroutine C5. There is an overlap region 1 between the initial time slice of coroutine C4 and the initial time slice of coroutine C2, and an overlap region 2 between the initial time slice of coroutine C4 and the initial time slice of coroutine C5. The following example, using a set of first and second coroutines within a group of multiple coroutines, illustrates the process by which an electronic device determines the time slice of each coroutine among multiple coroutines. For example, the electronic device can determine the time slice of each coroutine among multiple coroutines through the following steps.

[0183] A1: Electronic devices can determine the priority of the first coroutine and the priority of the second coroutine based on the mapping relationship between service type and priority.

[0184] For example, such as Figure 8 As shown, the coroutines to be run within the first thread include coroutine C1, coroutine C2, and coroutine C3. There is an overlap between the initial time slices of coroutine C1 and coroutine C2. The electronic device can determine that coroutine C2 is the second coroutine and coroutine C1 is the first coroutine. The electronic device can determine that the business type of coroutine C1 is game, and the business type of coroutine C2 is IO. Therefore, the electronic device can determine that the priority of coroutine C1 is 2, and the priority of coroutine C2 is 8, thus determining that the priority of coroutine C1 is higher than that of coroutine C2.

[0185] A2: The electronic device can determine whether there is a gap time slice in the time region of the first thread preceding the initial time slice occupied by the second coroutine. If yes, proceed to step A3; otherwise, proceed to step A6.

[0186] A3: The electronic device can also determine whether a target time slot exists in at least one time slot; if yes, proceed to step A4; if no, proceed to step A6. The duration of the target time slot is greater than or equal to the duration of the overlapping region in the initial time slot of the second coroutine.

[0187] A4: The electronic device can move the overlapping area in the initial time slice of the second coroutine forward to the target gap time slice.

[0188] For example, such as Figure 11As shown, the coroutines to be run within the first thread include coroutines C1, C2, and C3. There is an overlap between the initial time slices of coroutine C1 and C2. Coroutine C1 has a higher priority than coroutine C2. The electronic device can determine the time slot between coroutine C3 and coroutine C1 as the target time slot. The duration of the time slot between coroutine C3 and coroutine C1 is greater than the duration of the overlapping area. The electronic device can move the overlapping area in the initial time slice of coroutine C2 forward to the target time slot between coroutines C3 and C1.

[0189] A5: After the overlapping area is moved forward, the electronic device can use the time slice occupied by each coroutine in the first thread's execution time as the time slice corresponding to each coroutine.

[0190] A6: Electronic devices can increase the CPU frequency to proportionally shorten the initial time slice occupied by multiple coroutines in the execution time of the first thread. Specifically, the electronic device can increase the CPU frequency based on the duration of the overlapping region and the chip state of the electronic device.

[0191] When an electronic device performs CPU frequency upscaling, it can obtain updated target time information for each of multiple coroutines. The updated target time information for each coroutine includes its updated estimated start time and its updated estimated end time. The updated estimated end time of each coroutine is no later than its original estimated end time.

[0192] For example, such as Figure 12 As shown, the coroutines to be run within the first thread include coroutine C1, coroutine C2, and coroutine C3. There is an overlap between the initial time slices of coroutine C1 and coroutine C2, and the time gap in the execution time of the first thread is not the target time gap. In this case, the electronic device can increase the CPU frequency based on the duration of the overlapping region and the chip state of the electronic device. For example... Figure 12 As shown, after the electronic device performs CPU frequency boosting, the initial time slice occupied by coroutines C3, C2, and C1 in the first thread's execution time changes.

[0193] A7: The electronic device updates the initial time slice occupied by each of the multiple coroutines on the first thread.

[0194] In this context, the start time of the updated initial time slice of each coroutine is the estimated start time of the updated coroutine, and the end time of the updated initial time slice of each coroutine is the estimated end time of the updated coroutine.

[0195] A8: The electronic device determines whether there is an overlapping region between the updated initial time slices of each of the multiple coroutines; if yes, proceed to step A2; if no, proceed to step A9.

[0196] A9: Electronic devices can use the time slice occupied by each of the multiple coroutines in the execution time of the first thread as the time slice of each coroutine in the multiple coroutines.

[0197] Based on the content shown in A1 to A9 above, when multiple coroutines contain multiple groups of first coroutines and second coroutines, the electronic device can process the overlapping areas of the second coroutines one group at a time, as shown in A1 to A9, until there is no overlap between the time slices occupied by each coroutine in the execution time of the first thread. The electronic device can move forward from the overlapping area of ​​the lowest priority coroutine according to the priority of the coroutines with overlapping areas. The electronic device can also use the time slice occupied by each coroutine in the execution time of the first thread as the time slice of each coroutine in the multiple coroutines.

[0198] For example, such as Figure 13 As shown, the first thread contains five coroutines to be run: coroutine C1, coroutine C2, coroutine C3, coroutine C4, and coroutine C5. There is an overlap region 1 between the initial time slices of coroutine C3 and coroutine C2, and an overlap region 2 between the initial time slices of coroutine C4 and coroutine C5. The five coroutines are ordered from lowest to highest priority as follows: coroutine C1, coroutine C5, coroutine C4, coroutine C3, and coroutine C2. Figure 13 As shown, when the electronic device determines that there is no target time slot in the execution time of the first thread, it can increase the CPU frequency. After increasing the CPU frequency, the initial time slots occupied by coroutines C1, C2, C3, C4, and C5 in the execution time of the first thread are shortened and replaced by updated initial time slots. Specifically, the overlap region 1 between the initial time slots of coroutine C3 and C2 disappears after the frequency increase. The overlap region 2 between the initial time slots of coroutine C4 and C5 is shortened after the frequency increase to the overlap region 3 between the updated initial time slots of coroutines C4 and C5. The duration of overlap region 3 is shorter than the target time slot between the updated initial time slots of coroutines C2 and C4. The electronic device can move the overlap region 3 of coroutine C5 into the target time slot. At this point, there is no overlap between the time slots occupied by the five coroutines in the first thread.

[0199] For example, such as Figure 14As shown, the first thread contains five coroutines to be run: coroutine C1, coroutine C2, coroutine C3, coroutine C4, and coroutine C5. There is an overlap region 1 between the initial time slices of coroutine C4 and coroutine C2, and an overlap region 2 between the initial time slices of coroutine C4 and coroutine C5. The five coroutines are ordered from lowest to highest priority as follows: coroutine C1, coroutine C5, coroutine C4, coroutine C3, and coroutine C2. Figure 14 As shown, the electronic device determines the gap time slice between the initial time slice of coroutine C2 and the initial time slice of coroutine C3, which precedes overlap region 1 and overlap region 2, as the target gap time slice. The electronic device can first move overlap region 2 of the lowest priority coroutine C5, moving overlap region 2 in the initial time slice of coroutine C5 to the target gap time slice. At this time, the target gap time slice before overlap region 1 changes to a new target gap time slice between the initial time slice of coroutine C3 and the overlap region 2 in the initial time slice of coroutine C5, and the duration of the new target gap time slice is greater than the duration of overlap region 1. The electronic device can then move overlap region 1 in the initial time slice of coroutine C4 to the new target gap time slice. At this time, there is no overlap between the time slices occupied by the five coroutines on the first thread.

[0200] S505: The electronic device selects a target coroutine from multiple coroutines as the currently executing coroutine.

[0201] In this context, the start time of the target coroutine's time slice is earlier than the start time of the time slices of the other coroutines in the multiple coroutines. The other coroutines are those other than the target coroutine.

[0202] When the target coroutine finishes execution or is suspended, the electronic device can re-execute step S504 to update the time slices of the coroutines to be executed on the first thread, and select the coroutine with the earliest start time of its time slice from the coroutines to be executed as the currently executing coroutine, until there are no coroutines to be executed on the first thread. Furthermore, after selecting the coroutine with the earliest start time of its time slice from the coroutines to be executed as the currently executing coroutine, the electronic device needs to switch the target coroutine to the newly selected currently executing coroutine.

[0203] Based on the above embodiments, the electronic device can determine the runtime and end time of a single coroutine based on the runtime estimation mechanism in the coroutine structure, and reserve time slices for coroutines to be executed on the same thread based on the obtained runtime and end time, so as to ensure that the coroutine can complete the task on time and achieve deterministic completion of the task.

[0204] Based on the above embodiments and the same technical concept, this application also provides a deterministic delay coroutine scheduling method, applied to electronic devices. For example...Figure 15 As shown, the method may include:

[0205] S1501: The electronic device determines the runtime information of the first coroutine to be run on the first thread.

[0206] The runtime information of the first coroutine is used to characterize the expected runtime of the first coroutine, which includes the first expected runtime and the first expected end time.

[0207] For example, the electronic device can be the electronic device in the foregoing embodiments, the first coroutine can be the first coroutine in the foregoing embodiments, the runtime information of the first coroutine can be the runtime information of the first coroutine in the foregoing embodiments, the first expected runtime can be the first expected runtime in the foregoing embodiments, and the first expected runtime end time can be the first expected runtime end time in the foregoing embodiments. Regarding the electronic device, please refer to the description of the electronic device in the foregoing embodiments; it will not be repeated here. Regarding the first coroutine, please refer to the description of the first coroutine in the foregoing embodiments; it will not be repeated here. Regarding the runtime information of the first coroutine, please refer to the description of the runtime information of the first coroutine in the foregoing embodiments; it will not be repeated here. Regarding the first expected runtime, please refer to the description of the first expected runtime in the foregoing embodiments; it will not be repeated here. Regarding the first expected runtime end time, please refer to the description of the first expected runtime end time in the foregoing embodiments; it will not be repeated here.

[0208] In some embodiments of this application, the first expected runtime is a preset runtime, or the first expected runtime is a duration determined based on the service type of the first coroutine, or the first expected runtime is the maximum of the preset runtime and the duration determined based on the service type of the first coroutine. The preset runtime can be the preset runtime as described in the foregoing embodiments. Regarding the preset runtime, please refer to the description of the preset runtime in the foregoing embodiments; it will not be repeated here.

[0209] The specific implementation method for determining the runtime information of the first coroutine by the electronic device can be referred to the relevant methods described in the foregoing embodiments, and will not be detailed here.

[0210] S1502: The electronic device determines the target time information of the first coroutine based on the running time information of the first coroutine.

[0211] The target time information of the first coroutine is used to indicate the estimated runtime of the first coroutine. The target time information of the first coroutine includes a first estimated start time and a first estimated end time. For example, the target time information of the first coroutine can be the target time information of the first coroutine in the aforementioned embodiments, the first estimated start time can be the first estimated start time in the aforementioned embodiments, and the first estimated end time can be the first estimated end time in the aforementioned embodiments. Regarding the target time information of the first coroutine, please refer to the description of the target time information of the first coroutine in the aforementioned embodiments; it will not be repeated here. Regarding the first estimated start time, please refer to the description of the first estimated start time in the aforementioned embodiments; it will not be repeated here. Regarding the first estimated end time, please refer to the description of the first estimated end time in the aforementioned embodiments; it will not be repeated here. The specific implementation method of the electronic device determining the target time information of the first coroutine can be implemented with reference to the relevant methods described in the aforementioned embodiments; it will not be detailed here.

[0212] In some embodiments of this application, when the first thread further includes a second coroutine, the electronic device can determine the runtime information of the second coroutine. The runtime information of the second coroutine is used to characterize the expected runtime of the second coroutine, and includes a second expected runtime and a second expected runtime end time. Based on the runtime information of the second coroutine, the target time information of the second coroutine is determined. The target time information of the second coroutine is used to indicate the estimated runtime of the second coroutine, and includes a second estimated start time and a second estimated end time. The second coroutine can be the second coroutine in the foregoing embodiments, the runtime information of the second coroutine can be the runtime information of the second coroutine in the foregoing embodiments, the second expected runtime can be the second expected runtime in the foregoing embodiments, the second expected runtime end time can be the second expected runtime end time in the foregoing embodiments, the target time information of the second coroutine can be the target time information of the second coroutine in the foregoing embodiments, the second estimated start time can be the second estimated start time in the foregoing embodiments, and the second estimated end time can be the second estimated end time in the foregoing embodiments, which will not be detailed here. The specific implementation of this method can be referred to the relevant methods described in the foregoing embodiments, which will not be detailed here.

[0213] As an optional implementation, when the second estimated start time is later than the first estimated start time and earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and earlier than the first estimated end time, the first coroutine starts running at the first estimated start time and ends running at the first estimated end time; the second coroutine is suspended at the overlap time; and the second coroutine resumes running at any time between the second estimated start time and the second estimated end time, excluding the overlap time. The overlap time is the portion overlapping between the first estimated start time and the first estimated end time and between the second estimated start time and the second estimated end time. The priority of the second coroutine is lower than the priority of the first coroutine, and the priority of the second coroutine is determined based on its service type. For example, the overlap time can be the overlap time in the foregoing embodiments, the priority of the coroutine can be the priority of the coroutine in the foregoing embodiments, and the service type can be the service type described in the foregoing embodiments, which will not be detailed here. The specific implementation of this method can be found in the methods described in the foregoing embodiments, and will not be detailed here.

[0214] Optionally, when the second coroutine is suspended at the overlap time, the electronic device can also determine the third estimated start time and the third estimated end time; the second coroutine starts running at the third estimated start time and is suspended at the third estimated end time; the duration from the third estimated start time to the third estimated end time is the same as the duration of the overlap time, and the third estimated end time is no later than the first estimated start time and no later than the second estimated start time. The third estimated start time can be the third estimated start time in the aforementioned embodiments, and the third estimated end time can be the third estimated end time in the aforementioned embodiments, which will not be detailed here. The specific implementation of this method can be referred to the relevant methods described in the aforementioned embodiments, which will not be detailed here.

[0215] As another optional implementation, when the second estimated start time is later than the first estimated start time and earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and earlier than the first estimated end time, the electronic device can also perform a frequency upsampling operation to obtain the updated target time information of the first coroutine and the updated target time information of the second coroutine; the estimated runtime indicated by the updated target time information of the first coroutine is lower than the estimated runtime indicated by the target time information of the first coroutine, and the estimated runtime indicated by the updated target time information of the second coroutine is lower than the estimated runtime indicated by the target time information of the second coroutine; the updated target time information of the first coroutine includes the updated first estimated start time and the updated first estimated end time, the updated target time information of the second coroutine includes the updated second estimated start time and the updated second estimated end time, the updated first estimated end time is not later than the first estimated end time, and the updated second estimated end time is not later than the second estimated end time.

[0216] Optionally, when the updated second estimated start time is later than the updated first estimated end time, or the updated second estimated end time is earlier than the updated first estimated start time, the first coroutine starts running at the updated first estimated start time and ends running at the updated first estimated end time, and the second coroutine starts running at the updated second estimated start time and ends running at the updated second estimated end time.

[0217] As another optional implementation, when the second estimated start time is later than the first estimated end time, or the second estimated end time is earlier than the first estimated start time, the first coroutine starts running at the first estimated start time and ends running at the first estimated end time; the second coroutine starts running at the second estimated start time and ends running at the second estimated end time. The specific implementation of this method can be referred to the relevant methods described in the foregoing embodiments, and will not be detailed here.

[0218] Optionally, when the second estimated start time is later than the first estimated end time, the electronic device can set the first coroutine as the currently executing coroutine at the first estimated start time; or, when the second estimated end time is earlier than the first estimated start time, the electronic device can also set the second coroutine as the currently executing coroutine at the second estimated start time. The currently executing coroutine can be the currently executing coroutine in the foregoing embodiments, which will not be detailed here. The specific implementation of this method can be referred to the relevant methods described in the foregoing embodiments, which will not be detailed here.

[0219] The specific steps performed by the electronic device in the above method can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0220] Based on the above and the same technical concept, this application provides an electronic device, including a memory and one or more processors. The memory is used to store computer program code, which includes computer instructions. The one or more processors are used to execute the computer program instructions stored in the memory, causing the electronic device to perform the steps performed by the electronic device in the above method embodiment.

[0221] Based on the above content and the same concept, this application provides a computer-readable storage medium storing a computer program or instructions. When the computer program or instructions are executed by a computing device, the computing device performs the steps executed by the electronic device in the above method embodiment.

[0222] Based on the above content and the same concept, this application provides a computer program product, which includes a computer program or instructions. When the computer program or instructions are executed by a computing device, the computing device performs the steps executed by the electronic device in the above method embodiment.

[0223] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0224] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0225] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0226] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0227] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A deterministic latency coroutine scheduling method, characterized in that, The method comprises: determining running time information of a first coroutine to be run on a first thread, the running time information of the first coroutine being used to represent an expected running duration of the first coroutine, the running time information of the first coroutine comprising a first expected running duration and a first expected running end time; determining target time information of the first coroutine according to the running time information of the first coroutine, the target time information of the first coroutine being used to indicate an estimated running duration of the first coroutine, the target time information of the first coroutine comprising a first estimated start time and a first estimated end time.

2. The method of claim 1, wherein, The first expected running duration is a preset running duration, or the first expected running duration is a duration determined based on a service type of the first coroutine, or the first expected running duration is a maximum value of the preset running duration and the duration determined based on the service type of the first coroutine.

3. The method according to claim 1 or 2, characterized in that, The first thread further comprises a second coroutine, and the method further comprises: determining running time information of the second coroutine, the running time information of the second coroutine being used to represent an expected running duration of the second coroutine, the running time information of the second coroutine comprising a second expected running duration and a second expected running end time; determining target time information of the second coroutine according to the running time information of the second coroutine, the target time information of the second coroutine being used to indicate an estimated running duration of the second coroutine, the target time information of the second coroutine comprising a second estimated start time and a second estimated end time.

4. The method of claim 3, wherein, When the second estimated start time is later than the first estimated start time and the second estimated start time is earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and the second estimated end time is earlier than the first estimated end time, the first coroutine starts running at the first estimated start time and ends running at the first estimated end time, the second coroutine is suspended at an overlapping time, and the second coroutine resumes running at a time between the second estimated start time and the second estimated end time except the overlapping time, the overlapping time being an overlapping part between a time from the first estimated start time to the first estimated end time and a time from the second estimated start time to the second estimated end time; The priority of the second coroutine is lower than the priority of the first coroutine, and the priority of the second coroutine is determined based on a service type of the second coroutine, and the priority of a coroutine is determined based on a service type of the coroutine.

5. The method of claim 4, wherein, When the second coroutine is suspended at the overlapping time, the method further comprises: determining a third estimated start time and a third estimated end time, the second coroutine starting running at the third estimated start time and being interrupted to be suspended at the third estimated end time, A duration from the third estimated start time to the third estimated end time is the same as a duration of the overlap time, the third estimated end time is not later than the first estimated start time, and the third estimated end time is not later than the second estimated start time.

6. The method of claim 3, wherein, When the second estimated start time is later than the first estimated start time and the second estimated start time is earlier than the first estimated end time, or when the second estimated end time is later than the first estimated start time and the second estimated end time is earlier than the first estimated end time, the method further comprises: performing a frequency raising operation to obtain updated target time information of the first coroutine and updated target time information of the second coroutine, an estimated running duration indicated by the updated target time information of the first coroutine is lower than an estimated running duration indicated by the target time information of the first coroutine, and an estimated running duration indicated by the updated target time information of the second coroutine is lower than an estimated running duration indicated by the target time information of the second coroutine, the updated target time information of the first coroutine comprises an updated first estimated start time and an updated first estimated end time, the updated target time information of the second coroutine comprises an updated second estimated start time and an updated second estimated end time, the updated first estimated end time is not later than the first estimated end time, and the updated second estimated end time is not later than the second estimated end time.

7. The method of claim 6, wherein, When the updated second estimated start time is later than the updated first estimated end time or the updated second estimated end time is earlier than the updated first estimated start time, the first coroutine starts running at the updated first estimated start time and ends running at the updated first estimated end time, and the second coroutine starts running at the updated second estimated start time and ends running at the updated second estimated end time.

8. The method of claim 3, wherein, When the second estimated start time is later than the first estimated end time or the second estimated end time is earlier than the first estimated start time, the first coroutine starts running at the first estimated start time and ends running at the first estimated end time, and the second coroutine starts running at the second estimated start time and ends running at the second estimated end time.

9. The method of claim 8, wherein, The method further comprises: when the second estimated start time is later than the first estimated end time, regarding the first coroutine as a currently executed coroutine at the first estimated start time; or when the second estimated end time is earlier than the first estimated start time, regarding the second coroutine as a currently executed coroutine at the second estimated start time.

10. An electronic device, comprising: comprise: one or more processors; one or more memories; the one or more memories are configured to store one or more computer programs and data information; wherein the one or more computer programs comprise instructions; the one or more memories are configured to store one or more computer programs and data information; wherein the one or more computer programs comprise instructions; When the instructions are executed by the one or more processors, the electronic device is caused to perform the method of any one of claims 1-9.

11. A computer readable storage medium, characterized in that, The computer-readable storage medium stores a computer program which, when running on a computer, causes the computer to perform the method of any one of claims 1-9.

12. A computer program product, characterised in that, The computer program product, when running on a computer, causes the computer to perform the method of any one of claims 1-9.

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