Dynamic graph mode matching method and device

Abstract

The embodiment of the invention provides a dynamic graph mode matching method and device. The method comprises the following steps: acquiring an execution plan set for matching a pattern pattern, wherein the execution plan set is obtained by combining equivalent matching sequences in matching sequence groups of all isomorphic edge classes; wherein the isomorphic edge class comprises at least two isomorphic edges which are isomorphic to each other in the pattern pattern; the matching sequence group comprises a matching sequence set taking one isomorphic edge in the isomorphic edge class as a starting edge; a plurality of tasks are generated based on the update edge set and the execution plan set of the dynamic graph, and each task comprises an update edge and an execution plan in the execution plan set; a task load of the tasks is evaluated, and a plurality of tasks are allocated to a plurality of GPUs based on the task load for execution of the tasks by the GPUs using a depth-first search algorithm.

Description

Technical Field

[0001] This specification relates to one or more embodiments in the field of computer technology, and more particularly to dynamic graph pattern matching methods and apparatus. Background Technology

[0002] Graphs in the real world often change over time; these are called dynamic graphs. Dynamic graph pattern matching aims to identify subgraphs that are added or deleted as the structure of a dynamic graph changes, and which are isomorphic to a given pattern graph.

[0003] However, graph pattern matching is an NP-complete problem. With the exponential growth of graph data size and the increasing demand for real-time updates, CPU-based graph pattern matching methods face severe performance bottlenecks in computational throughput. Porting existing incremental computation-based dynamic graph pattern matching models to GPUs still faces problems such as redundant computation, unbalanced load, and low resource utilization.

[0004] Therefore, we hope to find an improved solution to address at least one of the above problems. Summary of the Invention

[0005] This specification describes one or more embodiments of a dynamic graph pattern matching scheme, which can eliminate redundant matching through a redundancy elimination strategy and alleviate the load imbalance problem between different GPUs through a load-aware task allocation strategy.

[0006] According to a first aspect, a dynamic graph pattern matching method is provided, comprising: obtaining an execution plan set for matching a pattern graph, the execution plan set being obtained by merging equivalent matching orders in matching order groups of isomorphic edge classes; wherein the isomorphic edge class includes at least two isomorphic edges in the pattern graph; the matching order group includes a set of matching orders starting with an isomorphic edge in the isomorphic edge class; generating multiple tasks based on an update edge set of the dynamic graph and the execution plan set, each task including an update edge and an execution plan in the execution plan set; evaluating the task load of the tasks; and, based on the task load, allocating the multiple tasks to multiple GPUs for the GPUs to execute the tasks using a depth-first search algorithm.

[0007] Optionally, the execution plan set is generated by: analyzing the topological structure of the pattern graph to obtain a set of isomorphic edges of the pattern graph, wherein the set of isomorphic edges includes at least one isomorphic edge class; obtaining matching order groups of the isomorphic edge classes; merging equivalent matching orders in the matching order groups; and forming an execution plan based on the merged matching order groups to obtain the execution plan set.

[0008] Optionally, the merging of the equivalent matching orders in the matching order group and the generating of the execution plan set based on the merged matching order group and the set of update edges are performed as follows: determining target symmetric orders needed to be reserved in the set of symmetric orders for the matching order group, and merging the equivalent matching orders in the matching order group based on the target symmetric orders; and generating an execution plan for each matching order in the merged matching order group and the target symmetric order corresponding to the matching order group, to obtain the execution plan set.

[0009] Optionally, the determining of the target symmetric orders needed to be reserved in the set of symmetric orders for the matching order group is performed as follows: traversing each matching order in the set of symmetric orders for the matching order group, removing the currently traversed matching order from the set of symmetric orders, and determining whether the set of symmetric orders after the removal can eliminate all the equivalent matching orders in the matching order group; and if the set of symmetric orders after the removal cannot eliminate all the equivalent matching orders in the matching order group, determining the removed matching order as the target symmetric order needed to be reserved corresponding to the matching order group.

[0010] Optionally, the generating of the multiple tasks based on the set of update edges and the execution plan set is performed as follows: for each update edge, generating a task by combining the execution plan corresponding to the matching order in which the start edge of the execution plan can be mapped to the update edge, and the update edge.

[0011] Optionally, the evaluating of the task load of the task is performed as follows: calculating the size of the candidate vertex set of the to-be-matched pattern graph vertex in the matching order of the task; and determining the task load based on the size of the candidate vertex set, wherein the task load is positively correlated with the size of the candidate vertex set.

[0012] Optionally, the calculating of the size of the candidate vertex set of the to-be-matched pattern graph vertex in the matching order of the task is performed as follows: calculating the size of the candidate vertex set based on the initial candidate vertex number and the normalized degree factor of the preceding vertex adjacent to the to-be-matched pattern graph vertex in the matching order, wherein the normalized degree factor represents the ratio of the degree of the dynamic graph vertex corresponding to the preceding vertex to the number of vertices of the dynamic graph; if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices in the matching order which are mapped to the two vertices of the update edge, the initial candidate vertex number is equal to the number of the neighborhood intersection of the two vertices of the update edge; and if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices in the matching order which are mapped to the two vertices of the update edge, the initial candidate vertex number is equal to the number of vertices of the dynamic graph.

[0013] Optionally, if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices in the matching sequence which are mapped to the updated edge, the size of the candidate vertex set is equal to the number of the neighborhood intersection multiplied by the first normalized degree factor raised to the power of k, the first normalized degree factor is the ratio of the average degree of the dynamic graph to the number of vertices of the dynamic graph, and k is equal to the number of the preceding vertices adjacent to the to-be-matched pattern graph vertex in the matching sequence minus 2.

[0014] Optionally, if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices in the matching sequence which are mapped to the updated edge, the size of the candidate vertex set is equal to the number of vertices of the dynamic graph multiplied by the normalized degree factor of each preceding vertex adjacent to the to-be-matched pattern graph vertex, wherein the normalized degree factor of the preceding vertex is the ratio of the degree of the updated edge vertex to which the preceding vertex of the pattern graph is mapped to the number of vertices of the dynamic graph when the preceding vertex is the pattern graph vertex mapped to the updated edge vertex, and the normalized degree factor of the preceding vertex is the ratio of the average degree of the dynamic graph to the number of vertices of the dynamic graph when the preceding vertex is not the pattern graph vertex mapped to the updated edge vertex.

[0015] Optionally, the task load of the task is evaluated, and the method further comprises: calculating the possibility of a candidate vertex in the candidate vertex set being filtered by the symmetric sequence, wherein the task load is determined based on the size of the candidate vertex set, comprising: determining the task load based on the size of the candidate vertex set and the possibility of a candidate vertex in the candidate vertex set being filtered by the symmetric sequence.

[0016] Optionally, the current total load of each GPU in the plurality of GPUs is represented in a heap structure, wherein the top element of the heap is the GPU with the smallest current total load; and the plurality of tasks are allocated to the plurality of GPUs based on the task load, comprising: traversing the plurality of tasks and allocating a currently traversed task to the GPU indicated by the top element of the heap.

[0017] Optionally, the plurality of tasks are traversed, comprising: dividing the plurality of tasks into a plurality of task blocks; traversing the plurality of task blocks in descending order of total load, and traversing the tasks in a currently traversed task block in descending order of load.

[0018] Optionally, the method further comprises: evaluating a current task load of the thread bundle in the GPU, the current task load being positively correlated with a size of a current candidate vertex set of a current to-be-matched pattern graph vertex in a matching order of a corresponding task; if the current task load exceeds a first threshold, splitting a task processed by the thread bundle into a plurality of sub-tasks, one sub-task corresponding to one vertex in the current candidate vertex set; and placing at least part of the sub-tasks in a global task queue of a global memory of the GPU to be fetched by an idle thread bundle in the GPU from the global task queue.

[0019] Optionally, the iteration index of the thread bundle and the length of the current candidate vertex set are stored in a shared memory, and the method further comprises: an idle thread bundle determining whether a target thread bundle in a thread block is a high-load thread bundle based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and if the target thread bundle is determined to be a high-load thread bundle, stealing at least part of the sub-tasks from the target thread bundle.

[0020] Optionally, the determination of whether the target thread bundle is a high-load thread bundle based on the iteration index of the target thread bundle and the length of the current candidate vertex set comprises: calculating, by the idle thread bundle, a residual task load based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and determining whether the target thread bundle is a high-load thread bundle based on the residual task load, the residual task load being positively correlated with an execution plan load factor, a residual number of unprocessed vertices and a recursion level factor respectively, the execution plan load factor representing an overhead of an execution plan of a task currently executed by the target thread bundle, the residual number of unprocessed vertices representing a number of effective unprocessed vertices in the current candidate vertex set determined based on a symmetric order, and the recursion level factor representing an influence degree of an iteration level represented by the iteration index on the load.

[0021] Optionally, the method further comprises: distributing, by the thread bundle, at least part of the split sub-tasks to idle thread bundles in other thread blocks.

[0022] Optionally, the method further comprises: selecting candidate vertices from the current candidate vertex set of the thread bundle one by one until a total number of neighbor vertices of the selected candidate vertices is less than a second threshold or a number of the selected candidate vertices is greater than or equal to a third threshold, and stopping the selection; and distributing each neighbor vertex of the selected candidate vertices to one thread in the thread bundle to execute a calculation task corresponding to the neighbor vertex by the thread.

[0023] According to a second aspect, a dynamic graph pattern matching apparatus is provided, comprising: an obtaining unit configured to obtain a set of execution plans for matching a pattern graph, the set of execution plans being obtained by merging equivalent matching orders in each matching order group of isomorphic edge classes, wherein the isomorphic edge classes comprise at least two isomorphic edges in the pattern graph; the matching order group comprises a set of matching orders with one isomorphic edge in the isomorphic edge classes as a starting edge; a generating unit configured to generate a plurality of tasks based on a set of updated edges of a dynamic graph and the set of execution plans, each of the tasks comprising one updated edge and one execution plan in the set of execution plans; and an allocating unit configured to evaluate task loads of the tasks, and allocate the plurality of tasks to a plurality of GPUs based on the task loads, so as to execute the tasks by the GPUs using a depth-first search algorithm.

[0024] According to a third aspect, a computer program product is provided, comprising computer programs / instructions which, when executed by a processor, implement the steps of the method according to the first aspect.

[0025] According to a fourth aspect, a computer-readable storage medium is provided, having stored thereon a computer program which, when executed in a computer, causes the computer to perform the method according to the first aspect.

[0026] According to a fifth aspect, a computing device is provided, comprising a memory and a processor, wherein the memory stores executable codes, and the processor executes the executable codes to implement the method according to the first aspect.

[0027] In the embodiments of the present disclosure, the obtained set of execution plans is obtained by merging equivalent matching orders in each matching order group of isomorphic edge classes, and the matching order group comprises a set of matching orders with one isomorphic edge in the isomorphic edge classes as a starting edge, so as to eliminate redundant matching. Moreover, by allocating tasks to different GPUs for execution based on task loads, the problem of load imbalance among different GPUs can be alleviated. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0029] Figure 1 An example graph of dynamic graph pattern matching according to an embodiment is shown;

[0030] Figure 2AA flowchart illustrating generation of a set of execution plans for graph pattern matching according to one embodiment is shown;

[0031] Figure 2B A flowchart illustrating a dynamic graph pattern matching method according to one embodiment is shown;

[0032] Figure 3 An example graph illustrating dynamic graph pattern matching according to another embodiment is shown;

[0033] Figure 4 A flowchart illustrating an adaptive task splitting according to one embodiment is shown;

[0034] Figure 5 An overall architecture diagram illustrating performing dynamic graph pattern matching according to one embodiment is shown;

[0035] Figure 6 A structural diagram illustrating a dynamic graph pattern matching apparatus according to one embodiment is shown. DETAILED DESCRIPTION

[0036] The schemes provided in the present specification are described below with reference to the accompanying drawings.

[0037] In the description of the present specification, the words "exemplary", "for example", or "e.g." are used to mean serving as an example, instance, or illustration. Any embodiment or design scheme described as "exemplary", "for example", or "e.g." in the present specification should not be construed as being more preferred or advantageous than other embodiments or design schemes. In fact, the words "exemplary", "for example", or "e.g." are used to present relevant concepts in a specific manner.

[0038] In the description of the present specification, the term "and / or" is merely a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, B alone, and A and B together. In addition, unless otherwise specified, the term "a plurality of" means two or more.

[0039] In addition, the terms "first", "second", etc. are used only for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. The terms "include", "contain", "have" and their variants mean "include but are not limited to", unless otherwise specifically emphasized.

[0040] First, several concepts related to the schemes provided in the present specification are described.

[0041] Graph pattern matching is one of the important tasks in graph processing, which aims to find all subgraphs isomorphic to a given pattern graph from a data graph. This task plays an important role in analyzing complex relational structures and is widely used in network comparison, fake review detection, and chemical informatics. The graph pattern matching problem involves finding a subgraph structure isomorphic to a given pattern graph in a given data graph. An arbitrary graph can be represented as (V, E), where V represents the vertex set and E represents the edge set. A pattern graph can be denoted as P, where V(P) and E(P) represent the vertex set and edge set of the pattern graph, respectively.

[0042] Given a pattern graph P and a data graph G. If there exists a bijective function M acting on V(P) and V(G s ), and satisfies the following conditions: for any vertex u, u ′ ∈V(P), if there exists an edge (u, u ′ )∈E(P), the corresponding edge (M(u), M(u ′ ))∈E(G s ), then it can be considered that there is a subgraph isomorphic to P in G. Where G s is a subgraph of data graph G, V(G s ) represents the vertex set of subgraph G s , and E(G s ) represents the edge set of subgraph G s .

[0043] If there exists a bijective function M: V→V, such that for any pair of vertices u, v∈V, if (u, v)∈E, then (M(u), M(v))∈E, and vice versa. Then M is called an automorphism of the pattern graph P.

[0044] Let edges (u i , u j ), (u k , u w )∈E(P), if they satisfy any of the following conditions: M(u i )=u k and M(u j )=u w , or M(u j )=u k and M(u i )=u w , then (u i , u j ) and (u k , u w ) are called isomorphic edges.

[0045] Given a pattern graph P, the matching order is a permutation of the vertex set V(P) of the pattern graph, used to represent the matching order of the vertices. Figure 1 An example diagram of dynamic graph pattern matching according to one embodiment is shown. Figure 1 The dashed lines in the diagram represent added edges. For example, {A,B,C,D} is... Figure 1 The diagram shows a matching order for the pattern graph P. During execution, vertices A, B, C, and D will be matched sequentially. The subgraph obtained based on the matching order always matches the pattern, therefore isomorphism detection is unnecessary. For each edge in the pattern graph P, all possible matching orders can be generated using that edge as the starting edge. The set of all possible matching orders starting from all edges in the pattern graph P is the matching order set. The self-isomorphism existing in the pattern graph P leads to a large number of redundant (i.e., equivalent) matching orders in the matching order set.

[0046] Symmetric order is a method applied to a matching subgraph G s The constraint on the relative relationship between two vertices in the pattern graph P. More specifically, a symmetric order is a partial order relation imposed on data vertices that match a symmetric vertex in order to break the symmetry of symmetric vertices in the pattern graph. This partial order relation is usually represented by vertex ID size. A symmetric vertex is a pair of vertices in the pattern graph that can be interchanged by at least one automorphism mapping while maintaining the graph structure. For example, in Figure 1 In the graph, vertices A and C are symmetrical vertices, and vertices B and D are symmetrical vertices. Therefore, for vertices A and C, the symmetry order M(A) > M(C) (optionally, the symmetry order can also be set to M(A) < M(C)). For vertices B and D, the symmetry order M(B) > M(D) can be set, where M is the bijective function mentioned above. M(A) > M(C) means that the ID of the data vertex matching vertex A in the data graph (such as a dynamic graph) should be greater than the ID of the data vertex matching vertex C; correspondingly, M(B) > M(D) means that the ID of the data vertex matching vertex B in the data graph (such as a dynamic graph) should be greater than the ID of the data vertex matching vertex D. For convenience, M is omitted below. For example, the symmetry orders M(A) > M(C) and M(B) > M(D) can be represented as {A>C, B>D}.

[0047] Symmetric ordering is used to eliminate redundant matching caused by automorphism. Figure 1In the embodiment, the vertex A and the vertex C in the schema graph P can be mapped to the vertex 2 and the vertex 3 in the data graph respectively, or can be mapped to the vertex 3 and the vertex 2 in the data graph respectively. In the schema graph matching process, after the pre-set symmetric order A > C is applied, when the vertex A and the vertex C are mapped to the vertex 2 and the vertex 3 in the data graph respectively, since the symmetric order A > C is not satisfied, the subgraph of the branch will be eliminated, so as to achieve the purpose of eliminating redundant matching.

[0048] A matching order and a symmetric order of the schema graph P form an execution plan. Figure 1 In the embodiment, the matching order {A, B, C, D} and the symmetric order {A > C, B > D} of the schema graph P form an execution plan, which can be denoted as {{A, B, C, D} | A > C, B > D}.

[0049] The graph in the real world usually changes over time, and such a graph changing over time is referred to as a dynamic graph. Given a dynamic graph G and a schema graph P, a graph update sequence ΔG = {Δe1, Δe2, …}, where each update operation Δe = (+ / -, e) represents the addition or deletion of an edge e in G. Dynamic graph schema matching refers to identifying all added or deleted subgraphs isomorphic to the schema graph P after the structure of the dynamic graph G changes based on the graph update sequence ΔG, where each identified subgraph is unique and has no repetition.

[0050] The traditional incremental computing model generates an independent execution plan for each edge in the schema graph, and executes these execution plans starting from the updated edge in the dynamic graph to identify all added or deleted subgraphs isomorphic to the schema graph in the dynamic graph. However, due to the existence of isomorphic edges in the schema graph, this method will produce significant redundant computing overhead.

[0051] Therefore, the embodiments of the present specification propose a redundancy elimination strategy. The redundancy elimination strategy first identifies isomorphic edges in the schema graph by analyzing the topological characteristics of the schema graph, then merges the matching orders of the isomorphic edges to eliminate redundant matching, and then forms an execution plan based on the merged matching order, which can also be referred to as a shared execution plan.

[0052] In addition, there is also a load imbalance problem between different GPUs in dynamic graph schema matching. In view of this, the embodiments of the present specification also propose a load-aware task allocation mechanism. The mechanism first evaluates the task load of each task, and then allocates tasks to different GPUs for execution based on the task load, to alleviate the load imbalance problem between different GPUs.

[0053] Figure 2A A flowchart for generating an execution plan set of graph schema matching according to an embodiment is shown.

[0054] Referring to Figure 2A In step S21, topology of the schema graph is analyzed to obtain a set of isomorphic edges of the schema graph.

[0055] The schema graph can be a directed graph or an undirected graph. In a directed graph, an edge has a direction. In an undirected graph, an edge has no direction. For example, in a directed graph, an edge from vertex A to vertex B is different from an edge from vertex B to vertex A; in an undirected graph, an edge from vertex A to vertex B is the same as an edge from vertex B to vertex A.

[0056] By analyzing the topology of the schema graph, isomorphisms existing in the schema graph can be determined, and isomorphic edges in the schema graph can be identified, thereby obtaining a set of isomorphic edges. The set of isomorphic edges includes at least one isomorphic edge class. Each isomorphic edge class includes at least two isomorphic edges that are isomorphic to each other. Any two edges in the same isomorphic edge class can be referred to as isomorphic edges. Two edges belonging to different isomorphic edge classes are not isomorphic edges. For example Figure 1 In the schema graph P shown in FIG. 1, there is one isomorphic edge class, which includes four isomorphic edges, namely AB, AD, CB, and CD, where Figure 1 The schema graph P shown in FIG. 1 is an undirected graph, and therefore AB and BA are the same edge.

[0057] In step S22, a matching order group of the isomorphic edge class is obtained.

[0058] The matching order group includes a set of matching orders in which one isomorphic edge in the isomorphic edge class is a starting edge.

[0059] That is, for each isomorphic edge class, the present embodiments only retain a set of matching orders in which one isomorphic edge in the isomorphic edge class is a starting edge, thereby obtaining a matching order group of the isomorphic edge class.

[0060] For example, assume that an isomorphic edge class EC includes three edges: e1, e2, and e3. A set of matching orders in which e1 is a starting edge, a set of matching orders in which e2 is a starting edge, and a set of matching orders in which e3 is a starting edge are equivalent. Therefore, for the isomorphic edge class EC, only a set of matching orders in which one of the three edges e1, e2, and e3 (e.g., e1) is a starting edge needs to be retained to participate in generation of a subsequent execution plan.

[0061] In some example embodiments, each edge in the schema graph can be traversed. For a currently traversed edge e, it is determined whether there is an edge e ′ in the processed list that is isomorphic to the edge e. The processed list records a set of processed edges. If there is no edge e ′If the edge e is in the processed list, all match orders starting with the edge e and all match orders starting with other edges isomorphic to the edge e (i.e. the isomorphic edges of the isomorphic edge class that the edge e belongs to) can be generated, and the edge e is added to the set of processed edges. If there exists an edge isomorphic to the edge e in the processed list ′ If the edge e is in the processed list, all match orders starting with the edge e and all match orders starting with other edges isomorphic to the edge e (i.e. the isomorphic edges of the isomorphic edge class that the edge e belongs to) can be generated, and the edge e is added to the set of processed edges. If there exists an edge isomorphic to the edge e in the processed list

[0062] In step S23, the equivalent match orders in the match order groups are merged, and an execution plan is composed based on each of the merged match order groups to obtain a set of execution plans.

[0063] Equivalent match orders in the match order groups can still exist, and thus the equivalent match orders in the match order groups need to be further merged. In addition, the symmetric orders that need to be retained can be different for different match order groups.

[0064] In view of this, in some example embodiments, for each match order group, a target symmetric order that needs to be retained in the symmetric order set of the pattern graph can be determined, and the equivalent match orders in the match order group are merged based on the target symmetric order. In this way, the redundant match orders in the match order group can be eliminated, and only the necessary symmetric orders can be retained.

[0065] An example implementation of determining, for each match order group, a target symmetric order that needs to be retained in the symmetric order set of the pattern graph is as follows: for the match order group, each match order in the symmetric order set is traversed; the currently traversed match order is removed from the symmetric order set, and it is determined whether the symmetric order set after the removal can eliminate all equivalent match orders in the match order group; if the symmetric order set after the removal cannot eliminate all equivalent match orders in the match order group, it is indicated that the removed match order is necessary for eliminating the redundant match orders in the match order group, and the removed match order can be determined as the target symmetric order that needs to be retained corresponding to the match order group; otherwise, if the symmetric order set after the removal can still eliminate all equivalent match orders in the match order group, it is indicated that the removed match order is not necessary for eliminating the equivalent match orders in the symmetric order set, and the removed match order does not need to be retained.

[0066] When composing an execution plan based on each of the merged match order groups, each match order in the merged match order group and the target symmetric order corresponding to the match order group can be composed into an execution plan to obtain a set of execution plans. The execution plans in the set of execution plans are shared execution plans with redundancy elimination.

[0067] Figure 2B A flowchart of a dynamic graph pattern matching method is shown according to an embodiment.

[0068] In step S24, a set of execution plans for matching the pattern graph is obtained, wherein the set of execution plans is obtained by merging equivalent matching orders in each matching order group of isomorphic edge classes; the isomorphic edge classes include at least two isomorphic edges in the pattern graph; and the matching order group includes a set of matching orders with one isomorphic edge in the isomorphic edge classes as a starting edge. It can be understood that the set of execution plans can be generated in the manner of Figure 2A

[0069] In step S25, based on the set of updated edges and the set of execution plans, a plurality of tasks are generated, each task including one updated edge and one execution plan in the set of execution plans.

[0070] In some example embodiments, for each updated edge, the execution plan corresponding to the matching order in which the starting edge can be mapped to the updated edge in the set of execution plans can be combined with the updated edge to form a task. That is, the execution plan corresponding to the matching order in which the starting edge cannot be mapped to the updated edge does not form a task with the updated edge. The starting edge is the edge composed of the first two vertices in the matching order.

[0071] Figure 3 An example graph of dynamic graph pattern matching according to another embodiment is shown. G0 is the data graph before updating, and G1 is the data graph after updating, and the dashed line from vertex x5 to vertex x3 represents the updated edge (x5, x3). It is assumed that the matching orders after redundancy elimination based on the redundancy elimination strategy include {B, A, C, D} and {A, B, C, D}, and since the starting edge AB composed of the first two pattern graph vertices A and B in the matching order {A, B, C, D} cannot be mapped to the updated edge (x5, x3), the execution plan composed of the matching order {A, B, C, D} does not form a task with the updated edge (x5, x3).

[0072] In step S26, the task load of the tasks is evaluated, and based on the task load, the plurality of tasks are assigned to a plurality of GPUs for execution of the tasks by the GPUs using a Depth First Search (DFS) algorithm.

[0073] The dynamic graph scenario requires higher real-time performance of the system. The CPU is limited by the number of threads and faces a serious computing bottleneck when processing dynamic graph data. Unlike traditional CPU architecture, the GPU has stronger parallel computing capability and can more efficiently process dynamic graph pattern matching tasks. Therefore, the generation and distribution of tasks can be performed on the CPU side, and the tasks can be executed on the GPU side. That is, Figure 2A ,​Figure 2B The method can be executed by a CPU.

[0074] Existing GPU-accelerated graph pattern matching systems can be classified into BFS-based systems and DFS-based systems. Performing graph pattern matching using BFS algorithm can improve data locality and enhance parallelism. However, BFS usually causes exponential growth of intermediate computation results and consumes a large amount of GPU memory. When the device memory reaches the upper limit, the system has to frequently move data between the GPU memory and the CPU memory, which further reduces the performance. Performing graph pattern matching using DFS only needs to store the final result, avoiding the storage of a large amount of intermediate data, thereby significantly reducing the memory overhead.

[0075] The basic flow of performing a task using DFS algorithm can be summarized as follows: according to the matching order defined in the execution plan of the task, find the corresponding vertex of each vertex in the matching order in the data graph (i.e. dynamic graph) one by one, and perform pruning based on the symmetry order in the execution plan at each step to optimize performance.

[0076] Different from the conventional DFS algorithm, in the embodiments of the present specification, the first two vertices in the matching order are fixedly mapped to an updated edge in the dynamic graph, so that the search starts from the third vertex in the matching order when performing the task. That is, first generate an initial candidate vertex set for the third vertex in the matching order, traverse all candidate vertices in the set, check whether the traversed candidate vertex meets the constraints (such as whether it meets the limit condition and connectivity constraints); if the candidate vertex passes the check, it can be regarded as the dynamic graph vertex matched with the third vertex in the matching order, and then recursively find the matched dynamic graph vertex for the next vertex in the matching order; on the contrary, if the candidate vertex fails to pass the check, the next candidate vertex can be tried backtracking.

[0077] Step S26 includes two sub-steps of evaluating task load and assigning tasks. The exemplary implementation of the two sub-steps is described below respectively.

[0078] Assessing task load

[0079] In order to avoid the preprocessing operation of evaluating task load from becoming a bottleneck of the system, the overhead generated by evaluating task load needs to be small enough. To achieve this purpose, the input information required for evaluating task load can be limited to the information of the updated edge (such as the degrees d0, d1 of the two vertices of the updated edge), the information of the pattern graph (such as the execution plan) and the average degree of the dynamic graph.

[0080] The mechanism is motivated by the following considerations. First, the information of the edges and the information of the schema graph can be directly extracted, and the average degree of the dynamic graph supports incremental updates and cross-task reusability. The extraction of the information avoids complex dynamic graph traversal operations, and thus the overhead required for evaluating the task load is particularly low.

[0081] The task load is mainly determined by the number of intersection calculations (i.e., intersection operations), because the intersection calculation is the main task overhead in dynamic graph pattern matching. For example, assuming that the matching order is {B, A, C, D}, and the matching phase is currently proceeding to the vertex D (i.e., searching for a candidate vertex that matches the vertex D), the candidate vertex must maintain a corresponding topological relationship (which can be regarded as an adjacency relationship) with the vertices that have been matched, for example, {P(A) = x5, P(B) = x3, P(C) = x2}. Because the vertex D is adjacently connected to the vertex A and the vertex C in the schema graph, the candidate vertex set of the vertex D is the intersection of the neighbor set N(x5) of the vertex x5 and the neighbor set N(x2) of the vertex x2. Figure 3

[0082] The size of the candidate vertex set can reflect the intersection calculation overhead. Therefore, in some embodiments, the size of the candidate vertex set of the vertex of the schema graph to be matched in the matching order of the task in the dynamic graph can be calculated, and the task load can be determined based on the size of the candidate vertex set. The task load is positively correlated with the size of the candidate vertex set. The vertex of the schema graph to be matched can include other vertices of the schema graph in the matching order except for the first two vertices of the schema graph that are mapped to a fixed update edge in the dynamic graph, i.e., the third vertex and the subsequent vertices of the schema graph in the matching order. For each vertex of the schema graph to be matched except for the starting edge, the candidate vertex set thereof can be calculated. The candidate vertex set, i.e., the set of vertices of the dynamic graph that can be matched with the vertex of the schema graph to be matched. The candidate set of a vertex of the schema graph to be matched is usually the intersection of one or more neighbor nodes of the vertex.

[0083] In some example embodiments, the size of the candidate vertex set can be calculated based on the initial candidate vertex number, and the normalized degree factor of the vertex adjacently connected to the vertex to be matched in the matching order.

[0084] If the vertex of the schema graph to be matched is adjacently connected to two vertices of the schema graph that are mapped to the update edge in the matching order, the initial candidate vertex number can be equal to the number of the neighborhood intersection of the two vertices of the update edge. If the vertex of the schema graph to be matched is not adjacently connected to two vertices of the schema graph that are mapped to the update edge in the matching order, the initial candidate vertex number can be equal to the number of vertices of the dynamic graph.

[0085] ​The normalized degree factor represents the ratio of the degree of the vertex of the dynamic graph corresponding to the preceding vertex to the number of vertices of the dynamic graph. If the preceding vertex adjacent to the to-be-matched pattern graph vertex is not the pattern graph vertex mapped to the update edge, the degree of the vertex of the dynamic graph corresponding to the preceding vertex can be the average degree of the dynamic graph. The reason for introducing the average degree is that it can be assumed that the degrees of the vertices are uniformly distributed, regardless of the update edge. Even if the distribution of the degrees of the vertices of the dynamic graph with the power-law distribution characteristics in reality is highly skewed, this assumption is still reliable. Because the size of the intersection result usually mainly depends on the smaller set rather than the larger set, and in most pattern graphs, most of the vertices used to evaluate the number of intersections are related to the vertices of the update edge, and the average degree has limited influence on the evaluation result.

[0086] If the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices mapped to the update edge in the matching order, the size of the candidate vertex set is equal to the number of the neighborhood intersection of the two vertices of the update edge multiplied by the k-th power of the first normalized degree factor, the first normalized degree factor is the ratio of the average degree of the dynamic graph to the number of vertices of the dynamic graph, and k is equal to the number of the preceding vertices adjacent to the to-be-matched pattern graph vertex in the matching order minus 2, that is, the number of the preceding vertices in the matching order except for the first two fixed vertices.

[0087] If the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices mapped to the update edge in the matching order, the size of the candidate vertex set is equal to the number of vertices of the dynamic graph multiplied by the normalized degree factor of each preceding vertex adjacent to the to-be-matched pattern graph vertex. If the preceding vertex is the pattern graph vertex mapped to the vertex of the update edge, the normalized degree factor of the preceding vertex is the ratio of the degree of the vertex of the update edge to which the preceding vertex is mapped to the number of vertices of the dynamic graph, and if the preceding vertex is not the pattern graph vertex mapped to the vertex of the update edge, the normalized degree factor of the preceding vertex is the ratio of the average degree of the dynamic graph to the number of vertices of the dynamic graph.

[0088] For example, for a to-be-matched pattern graph vertex in the matching order, b1 and b2∈{0,1} can be used to represent whether the vertex is adjacent to the vertex of the pattern graph edge mapped to the update edge. If b1 and b2 are not 1 at the same time, it means that the vertex is not adjacent to the vertex mapped to the update edge at the same time. If b1 and b2 are 1 at the same time, it means that the vertex is adjacent to the vertex mapped to the update edge at the same time, that is, it means that the initial candidate vertex number of this vertex is the intersection of the neighborhood of the vertex of the update edge.

[0089] In an example, if b1 and b2 are not 1 at the same time, that is, the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices mapped to the update edge in the matching order, the size calculation formula of the candidate vertex set of the to-be-matched pattern graph vertex is:

[0090]

[0091] If both b1 and b2 are 1, i.e. the vertex of the pattern graph to be matched is adjacent to both the two vertices of the pattern graph mapped to the vertices of the update edge in the matching order, the size of the candidate vertex set of the vertex of the pattern graph to be matched is calculated as follows:

[0092]

[0093] In the formula (1) and (2), |V| is the number of vertices in the dynamic graph, num is the intersection of the neighborhoods of the two vertices of the update edge. k represents the number of vertices adjacent to the vertex to be matched in the matching order, which are mapped to the vertices other than the vertices of the update edge. k represents how many "non-update edge end point" vertices the vertex needs to be adjacent to, that is, how many times of additional intersection need to be done. The larger k is, the more stringent the screening is, the smaller the candidate set is, and the lighter the load is. avg is the average degree of the dynamic graph.

[0094] In the matching process, the symmetric order can eliminate redundant subgraphs. Therefore, the symmetric order has a certain impact on the size of the task load. Therefore, in some example embodiments, the possibility that the candidate vertices in the candidate vertex set are filtered by the symmetric order can also be calculated, and then the task load is determined based on the size of the candidate vertex set and the possibility that the candidate vertices in the candidate vertex set are filtered by the symmetric order, wherein the task load is positively correlated with the size of the candidate vertex set and is negatively correlated with the possibility that the candidate vertices are filtered by the symmetric order. For example, the task load can be equal to the accumulation of the sub-loads of multiple layers, and each layer of sub-load can be equal to the size of the candidate vertex set of the layer x (1-the possibility that the candidate vertices of the layer are filtered).

[0095] For example, f i measures the impact of the symmetric order on the task load. i refers to the possibility that a subgraph is filtered out by the symmetric order in the i-th round (i.e. the i-th layer). Each vertex to be matched in the matching order corresponds to a round (i.e. a layer), and f i represents the possibility that an element in the candidate vertex set of the i-th round is pruned by the symmetric order. For each round, the elements in the candidate vertex set of the current round that do not meet the symmetric order can be filtered out by using the symmetric order, and then the value of f i of the current round can be obtained by calculating the proportion of the filtered elements.

[0096] Assigning tasks

[0097] After obtaining the task load of each task in the plurality of tasks, when assigning the tasks based on the task load, the plurality of tasks should be distributed to the plurality of GPUs as evenly as possible. The problem is converted into: given n numbers {t1, t2, …, t n} into a plurality of groups such that the sum of the values of each group is minimized. This problem is proven to be NP-complete. Among others, {t1, t2, …, tn} represents the task load of each task in n tasks. n} represents the task load of each task in n tasks.

[0098] In some embodiments, the task allocation can be balanced by means of a heap data structure. More specifically, the current total load of each GPU in the plurality of GPUs is represented in a heap structure, i.e., the current total load of each GPU can be represented by a heap, in which the top element of the heap is always the GPU with the smallest current total load. Then, the plurality of tasks are traversed, and the currently traversed task is allocated to the GPU indicated by the top element of the heap. After each allocation, the load of the GPU is updated, and it is reinserted into the mini-heap, ensuring that the top of the heap is always the GPU with the smallest current load.

[0099] The overall execution time of the system depends on the GPU with the largest load, and in order to avoid the situation that the last single GPU is overloaded, the plurality of tasks can be divided into several (one, two or more) task blocks. The task loads of different task blocks are as same as possible. Then, the several task blocks can be arranged in descending order according to the total load from large to small, and this ordering helps to balance the impact of large loads as early as possible, avoiding the situation that the last single GPU is severely overloaded. Next, the several task blocks are traversed in descending order according to the total load from large to small, and for the currently traversed task block, the tasks in the task block are traversed in descending order according to the load from large to small, and the currently traversed task is allocated to the GPU indicated by the top element of the heap.

[0100] In summary, the dynamic graph pattern matching method proposed by the embodiments of the present specification generates a shared execution plan for the isomorphic edges of the pattern graph by analyzing the topological structure of the pattern graph, thereby reducing redundant calculations and symmetry checks in the dynamic graph pattern matching process. In addition, a load-aware task allocation strategy is also proposed to fully utilize the computing resources of the GPU. Specifically, the task allocation is guided based on the evaluated task load to alleviate the load imbalance among the multi-GPU devices.

[0101] In some embodiments, in order to balance the workload between different thread bundles in the GPU, a load-aware two-level balancing strategy is also proposed. The load-aware two-level balancing strategy combines a static task partitioning strategy and a dynamic work-stealing strategy to alleviate the load imbalance problem. Among them, the static task partitioning can also be called an adaptive task partitioning strategy, which can actively identify high-load tasks during task execution and partition the high-load tasks into a global task queue. The dynamic work-stealing strategy, when there is no available task in the global task queue, "steals" work from high-load thread bundles by analyzing the load size of other thread bundles. The adaptive task partitioning strategy avoids the lock overhead caused by frequent dynamic work-stealing. The dynamic work-stealing strategy further alleviates the load imbalance problem that still exists after active task partitioning.

[0102] The static task partitioning strategy and the dynamic work-stealing strategy are described below, respectively.

[0103] Static task partitioning strategy

[0104] The execution subject of the static task partitioning strategy is a thread bundle in the GPU, which can be, for example, the first thread in the thread bundle.

[0105] The static task partitioning strategy can identify high-load tasks and use a more fine-grained task partitioning method to reduce the load difference between different thread bundles and improve the utilization of GPU resources.

[0106] The basic process of the static task partitioning strategy can be summarized as follows: evaluating the current task load of the thread bundle in the GPU; if the current task load exceeds a first threshold, the task handled by the thread bundle is divided into multiple sub-tasks, and at least part of the sub-tasks are placed in a global task queue of the global storage of the GPU to be obtained by a low-load thread bundle (such as an idle thread bundle) in the GPU from the global task queue. Among them, a sub-task corresponds to a vertex in the current candidate vertex set. That is, each vertex in the candidate vertex set can be regarded as an independent task.

[0107] The number of candidate vertices of the current iteration level can represent the size of the task load. However, since there are different execution plans in dynamic graph pattern matching, the same update edge also has significant load difference when different execution plans are executed. Therefore, the influence of the execution plan needs to be considered when determining the task load.

[0108] Considering the above two key influencing factors of the task load size, the following two key indicators can be used to determine the task load size.

[0109] ① The number of effective vertices (len) in the current candidate vertex set that need to be processed

[0110] If the current iteration level has no symmetry order, len is the size of the candidate vertex set of the current iteration level, and if the current iteration level has symmetry order pruning, the number of valid vertices in the candidate vertex set is determined by the symmetry order. The larger the len, the more branches in the search tree, indicating that the search path is more likely to expand. Therefore, when the matching order is fixed, the larger the len, the larger the task load.

[0111] ②The number of non-neighbor vertices at the end of the matching order M

[0112] If the last M vertices searched in the matching order are not adjacent, it indicates that the candidate vertex set of the last M vertices is calculated in the outermost (N-M) iteration level, and there is no intersection calculation in the innermost M iteration level. Since the inner iteration is more time-consuming than the outer iteration during the execution of DFS, placing the intersection calculation in the outer iteration can generally achieve a relatively small amount of calculation. Therefore, when the update edge is the same, the smaller the M of the task matching order, the higher the task load.

[0113] Exemplarily, two indicators len and M can be used to automatically identify high-load tasks and achieve adaptive task segmentation. Specifically, a threshold M th and C th can be set for M and len respectively. In the execution process, the following two cases are divided. ① When M≤M th and len≥C th , it means that the current task load is much higher than the average level, and a more fine-grained task segmentation strategy is needed to process each vertex in the candidate set as an independent task, divide it into the global task queue, and assign it to different thread bundles for execution. In this way, the computational load of a single thread bundle can be efficiently reduced, and the resource utilization of the GPU can be improved. ② When M>M th or len<C th , the system regards such tasks as a task with relatively low computational overhead. Therefore, there is no need to segment the task, and the thread bundle continues to execute the task to avoid unnecessary task management overhead. Therefore, the overall computing efficiency is improved.

[0114] In order to avoid performance degradation caused by excessive fine-grained division, only when the iteration level is less than or equal to a predetermined threshold (for example, l≤3), tasks with large load can be detected and segmented. The adaptive task segmentation strategy can effectively balance the load of different thread bundles, while ensuring computing efficiency and avoiding waste of GPU computing resources.

[0115] During task segmentation, in order to efficiently manage the segmented subtasks, each candidate vertex in each candidate vertex set is regarded as a subtask and placed in the global task queue Q task in turn. As a globally shared data structure, the global task queue Qtask The enqueue and dequeue operations of different thread bundles need to be processed frequently, and their performance and scalability directly determine the overall performance of the system. In order to effectively reduce the overhead caused by the lock mechanism, a ring lock-free queue solution can be used to implement the task queue.

[0116] Figure 4 An adaptive task splitting flowchart is shown according to one embodiment.

[0117] As Figure 4 shown, a lock-free circular queue Q task based on a ring buffer can be used to implement high-concurrency task scheduling. The storage space of Q task is organized as an integer array with a capacity of N (N is an integer multiple of 4).

[0118] Taking the task with a large load only when l≤3 needs to be detected and split as an example, each task includes at most 3 matching vertices. The task in Q task is recorded as <v1, v2, v3, scheID>, where v1, v2, and v3 represent the matching vertices that have been identified, and scheID is a unique identifier of the execution plan. Since 4 integer spaces are needed to represent a task, the maximum number of tasks that Q task can accommodate is N / 4. Before performing dynamic graph pattern matching, Q task is allocated and initialized in the GPU global memory. The enqueue and dequeue operations are implemented at the thread bundle granularity.

[0119] In order to avoid competition between threads, the enqueue and dequeue operations of Q task can actually be performed by the first thread bundle in the thread bundle. When Q task is initialized, all positions are marked as -1, indicating that the positions are not occupied. Q task Addressing operations are implemented through the head pointer front and the tail pointer back, and the storage space is reused through modulo operation. Q task First, check whether the capacity of the queue is sufficient to accommodate the new task through atomic operation. If it can be accommodated, move the tail pointer back by 4 positions according to the ring buffer rule (atomicAdd(back, 4) mod N), and then write the task <v1, v2, v3, scheID> to the reserved position through atomic operation. Similarly, when performing a dequeue operation, Q task first check whether there is an available task in the queue through atomic operation. If there is an available task, move the head pointer front by 4 positions according to the ring buffer rule (atomicSub(front, 4) mod N) using atomic operation, and then read the task <v1, v2, v3, scheID> through atomic operation atomicExch.

[0120] Global lock-free queue Q based on ring buffer structure task Supports dynamic allocation and recycling of sub-tasks, which can fully utilize the queue capacity and reduce the delay caused by lock competition. Even in the task segmentation process involving frequent dequeue and enqueue operations, the system can still maintain a high throughput to meet the high-performance task management requirements in dynamic graph pattern matching.

[0121] Dynamic work-stealing strategy

[0122] Although the adaptive task segmentation strategy can alleviate the load imbalance problem between thread bundles by identifying high-load tasks and segmenting, load imbalance still exists between different thread bundles. To solve this problem, a dynamic work-stealing strategy can be used to allow idle thread bundles to steal tasks from other high-load thread bundles.

[0123] To support dynamic work-stealing within a thread block, three variables can be allocated for each thread bundle: a candidate vertex set C (array) saved in global storage, which is used to record the candidate vertex set of each layer of the pattern graph to be matched; an array cur and Clen saved in shared memory, which record the iteration index (i.e. iteration level) of each element in the candidate vertex set of each layer and the length of the candidate vertex set, respectively.

[0124] When there are no available tasks in the global task queue, since the shared memory of the thread bundles within the same thread block is not isolated, the idle thread bundle can quickly access the shared variables (i.e. array cur and Clen) of other thread bundles within the same thread block. Therefore, the idle thread bundle first tries to steal tasks from other high-load thread bundles within the same thread block. If there are no tasks to steal within the thread block, the task is stolen from other thread blocks for execution.

[0125] (1) Steal tasks from thread bundles within the thread block

[0126] When the global task queue Q taskWhen there is no task to process, the thread bundle will first try to steal some task execution from the thread bundle with high task load within the same thread block. Although it is most intuitive to measure the task load by the number of unprocessed candidate set vertices at the current level, however, different matching orders and recursion levels also affect the task load in dynamic graph pattern matching. Therefore, when selecting the target thread bundle of the stolen task, the remaining task load of the thread bundle can be determined by combining the number of remaining unprocessed vertices left nodes, the load factor of the execution plan a, and the recursion level factor l. The remaining task load left task can be represented as left nodes x a x l. How to obtain the load factor a of different execution plans, the number of remaining unprocessed vertices left nodes, and the recursion level factor l is described below.

[0127] ① Determination of the execution plan load factor a

[0128] a is determined by the predicted load of different execution plans. A performance prediction model (such as the performance prediction model mentioned in GraphPi) can be used to predict the predicted load of different execution plans. After obtaining the predicted load of different execution plans, the overheads (i.e. loads) of different execution plans can be sorted, and then the a of the execution plan with the lowest overhead is set to 1, and the a of other execution plans is set to the ratio of the overhead to the overhead of the lowest execution plan.

[0129] ② Determination of the number of remaining unprocessed vertices left nodes

[0130] If there is a symmetric order in this level, the candidate vertex set is filtered according to the symmetric order to obtain the number of remaining unprocessed vertices left nodes. If there is no symmetric order in this level, the number of remaining unprocessed vertices left nodes is the size of the current candidate vertex set.

[0131] ③ Determination of the recursion level factor l

[0132] The smaller the recursion level, the more expansion possibilities the thread bundle has, that is, the larger the load. However, considering that some high-load execution plans in dynamic graph pattern matching still have larger load than small-load execution plans even if they are recursively deeper. Therefore, when evaluating the load of the thread bundle, the load difference between thread bundles at different recursion levels needs to be considered.

[0133] To evaluate the impact of the recursion level, the assumption of average distribution of vertex degrees can be followed, and the load reduction factor d avg ) l-2 represents l, which means that for every level increase, the load is reduced by d avgThe recursion level / starts from the second layer since the top two layers have already matched to the two vertices of the update edge. The above mechanism considers the load status of each thread block, selects the thread block with high load, and steals tasks from the thread block.

[0134] During the processing, the thread block implementing task stealing will be in a busy waiting state, resulting in significant synchronization overhead. Since the shared variables of each thread block are frequently accessed by itself during the dynamic graph pattern matching execution, and also accessed by other thread blocks implementing task stealing, the thread block itself also needs to implement the same lock operation every time it accesses. During the stealing, in order to prevent data races in concurrent scenarios, the shared variables (including the iteration index cur of the candidate set, the candidate set length array Clen, and the candidate set C) of the thread block implementing task stealing and the target thread block (i.e., the thread block of the stolen task) can be locked by CUDA atomic instructions (such as atomicCAS and atomicExch).

[0135] In order to avoid frequent stealing operations, a regulation mechanism can be introduced: by adjusting the maximum stealing level DetectLevel to avoid triggering the dynamic stealing mechanism at a deep level, which effectively reduces the impact of synchronization overhead on the overall system performance. The maximum stealing level DetectLevel can be 3 or 4, for example. The thread block implementing task stealing only selects the thread block with high load within the current level of the thread block as the stealing target, and steals the task. In addition, the adaptive splitting strategy mentioned above is also used to actively split the high-load task to avoid unnecessary overhead caused by frequent dynamic task stealing of the thread block.

[0136] (2) Steal tasks from thread blocks outside the thread block

[0137] When other thread blocks in the thread block have no tasks to steal, the idle thread block will steal tasks from the thread blocks of other thread blocks. However, since the shared memory of different thread blocks is isolated from each other, the idle thread block cannot directly obtain the task load of the thread block in other thread blocks. Therefore, when performing dynamic graph pattern matching, the thread blocks of other thread blocks need to detect the status of the idle thread block and split the task. That is, at least part of the split sub-tasks can be allocated to the idle thread block in other thread blocks by the thread block.

[0138] When the thread block performs dynamic graph pattern matching, intersection calculation needs to be performed. The 32 threads of the thread block accelerate the calculation through a parallel binary search algorithm. However, since the dynamic graph usually follows a power-law distribution feature, the degrees of most vertices are much smaller than the number of threads in the thread block, resulting in some threads being in an idle state without obtaining valid calculation tasks.

[0139] To improve this problem, a fixed-step loop unrolling strategy can be adopted. At each iteration level, multiple sets of intersection computation corresponding to multiple candidate vertices are fused and processed simultaneously, generating multiple candidate vertex sets for the next iteration level. Although this way improves the parallelism of threads, when the neighbor set of a vertex is small, even after loop unrolling, the total number of elements is still much smaller than the number of threads in a thread bundle, resulting in some threads being idle.

[0140] In some embodiments, to solve the limitation of fixed-step loop unrolling, a load-fused dynamic loop unrolling mechanism is proposed. The load-fused dynamic loop unrolling mechanism calculates the number of idle threads in a thread bundle based on the neighborhood size (e.g., load size) of vertices in a candidate vertex set, and dynamically adjusts the step size of loop unrolling accordingly.

[0141] For example, candidate vertices can be selected one by one from the current candidate vertex set of the thread bundle until the total number of neighbor vertices of the selected candidate vertices is such that the number of idle threads in the thread bundle is below a second threshold, or the number of selected candidate vertices is greater than or equal to a third threshold (equivalent to reaching the maximum step limit), and the selection stops; then, each neighbor vertex of the selected candidate vertices is assigned to a thread in the thread bundle to perform the calculation task corresponding to the neighbor vertex by the thread. In this way, the number of idle threads in the thread bundle can be reduced, and the thread utilization rate can be improved.

[0142] For example, when the thread bundle obtains a candidate vertex set, the vertices in the candidate vertex set can be traversed to calculate the total number of neighbor vertices of the vertices: The number of current idle threads is quantified by idle = |(NS mod 32 - 32)|. If the number of idle threads is less than a preset threshold τ, or the cumulative number of vertices traversed m reaches the maximum step limit m max , the loop unrolling with a step size of m is triggered, and multiple sets of intersection computation (S1∩S,…,S m ∩S) are executed simultaneously.

[0143] The load-fused dynamic loop unrolling mechanism controls the number of idle threads within the preset threshold τ by considering the load size of the vertices in the candidate vertex set, thus improving the thread utilization rate in the thread bundle and the overall efficiency of the system. In addition, in the implementation of the scheme, a dynamic memory management mechanism can be used to replace the traditional fixed allocation strategy of on-demand allocation.

[0144] In subgraph matching using Depth-First Search (DFS), if backtracking occurs after processing only one candidate vertex at each level, threads frequently need to switch between levels (saving and restoring state), resulting in significant memory access and synchronization overhead. This also leads to frequent thread branching in the GPU, reducing utilization. Therefore, a better approach is to traverse the entire candidate set of the current level: once a level is entered, instead of immediately backtracking, all candidate vertices in that level are traversed before backtracking to the previous level all at once. The advantages are: avoiding frequent switching between levels and reducing the overhead of state restoration / saving; ensuring threads within the same thread bundle execute at the same level, preventing branch divergence; and facilitating loop unrolling, merging multiple candidate vertices for execution together, thus improving throughput.

[0145] In some implementations, when combining dynamic loop unrolling with dynamic work-stealing, to achieve dynamic work-stealing, only the remaining tasks in the candidate set of the current expansion iteration can be stolen. When calculating the number of remaining un-iterated vertices, the number of vertices not yet unrolled is calculated, and the end position of the candidate set is adjusted after the stealing strategy. By combining dynamic loop unrolling with work-stealing, the utilization of thread bundles can be significantly improved while ensuring computational correctness. Therefore, the overall computational efficiency of dynamic graph pattern matching is improved.

[0146] Figure 5 An overall architecture diagram for performing dynamic graph pattern matching according to one embodiment is shown.

[0147] See Figure 5 The overall architecture includes the CPU side and the GPU side.

[0148] The CPU side includes a pattern analysis module and a task allocation module.

[0149] The pattern analysis module includes a pattern analyzer. The pattern analyzer can generate multiple tasks based on the pattern graph and update edges, each task consisting of an execution plan and an update edge. Specifically, the pattern analysis module can analyze the topological structure of the pattern graph to generate shared execution plans for edges of isomorphic pattern graphs, thereby reducing redundant computation and symmetry checks during dynamic graph pattern matching. For details on the operations that the pattern analyzer can perform, please refer to the above. Figure 2A Steps S21 to S24 and Figure 2B Description of step S25.

[0150] The task allocation module includes a load prediction model and a task allocation model. The load prediction model predicts the task load. The task allocation model assigns multiple tasks to different GPUs based on their load. Details regarding the load prediction model and task allocation model can be found in the above text. Figure 2B Description of step S26.

[0151] The GPU end includes a pattern matching module and a memory management module.

[0152] The pattern matching module adopts a load-aware two-level load balancing strategy, perceives and splits high-load tasks through an adaptive task splitting method, and perceives high-load thread bundles and steals tasks thereof through a dynamic work stealing method, so as to relieve the load imbalance among different thread bundles in the GPU. The pattern matching module also implements a dynamic loop unrolling mechanism of load fusion by perceiving the load conditions of vertices in the candidate set, thereby improving thread utilization. The adaptive task splitting, dynamic work stealing, and dynamic loop unrolling can be referred to the relevant description above.

[0153] The memory management module can allocate memory for the pattern matching module in response to a memory request of the pattern matching module by using a dynamic memory management mechanism provided by a memory manager.

[0154] In summary, the embodiments of the present specification combine the characteristics of the GPU hardware architecture, design a thread bundle-centered iterative form DFS search strategy for performing dynamic graph pattern matching tasks, and achieve efficient processing by utilizing the GPU thread bundle-level parallelism. Secondly, a load-aware GPU-based dynamic graph pattern matching strategy is proposed to fully utilize the computing resources of the GPU. Specifically, in a multi-GPU environment, the task allocation is guided by predicting the task load to relieve the load imbalance among multi-GPU devices; in the GPU, a load-aware two-level load balancing strategy is adopted, high-load tasks are perceived and split through an adaptive task splitting method, and high-load thread bundles are perceived and their tasks are stolen through a dynamic work stealing method, so as to relieve the load imbalance among different thread bundles in the GPU; in the thread bundle, a dynamic loop unrolling mechanism of load fusion is implemented by perceiving the load conditions of vertices in the candidate set, and multiple intersection calculations are performed in parallel, thereby improving thread utilization.

[0155] Experiments show that compared with the current most advanced dynamic graph pattern matching system, the method proposed in the embodiments of the present specification improves performance and has good scalability in a multi-GPU environment.

[0156] According to an embodiment of another aspect, a dynamic graph pattern matching apparatus is provided. Figure 6 A structural diagram of a dynamic graph pattern matching apparatus according to an embodiment is shown, which can be deployed in any device, platform or device cluster with data storage, computing and processing capabilities. As shown, Figure 6 The dynamic graph pattern matching apparatus 600 includes:

[0157] The acquisition unit 61 is configured to acquire an execution plan set for matching a pattern graph, the execution plan set being obtained by merging equivalent matching orders in each isomorphic edge class matching order group; wherein the isomorphic edge class includes at least two isomorphic edges in the pattern graph; and the matching order group includes a set of matching orders with one isomorphic edge in the isomorphic edge class as a starting edge.

[0158] The generation unit 62 is configured to generate a plurality of tasks based on the updated edge set of the dynamic graph and the execution plan set, each task including one updated edge and an execution plan in the execution plan set.

[0159] The allocation unit 63 is configured to evaluate the task load of the tasks, and allocate the plurality of tasks to a plurality of GPUs based on the task load, so that the GPUs execute the tasks using a depth-first search algorithm.

[0160] In some embodiments, the dynamic graph pattern matching apparatus 600 further includes an execution plan set generation unit configured to analyze the topology of the pattern graph, obtain an isomorphic edge set of the pattern graph, the isomorphic edge set including at least one isomorphic edge class; acquire a matching order group of the isomorphic edge class; merge equivalent matching orders in the matching order group, and form an execution plan based on each merged matching order group to obtain an execution plan set.

[0161] In some embodiments, the execution plan set generation unit is specifically configured to: for the matching order group, determine a target symmetric order that needs to be retained in the symmetric order set, merge equivalent matching orders in the matching order group based on the target symmetric order; and form an execution plan for each matching order in the merged matching order group and the target symmetric order corresponding to the matching order group to obtain an execution plan set.

[0162] In some further embodiments, the execution plan set generation unit is configured to: for the matching order group, traverse each matching order in the symmetric order set, remove the currently traversed matching order from the symmetric order set, and determine whether the removed symmetric order set can eliminate all equivalent matching orders in the matching order group; if the removed symmetric order set cannot eliminate all equivalent matching orders in the matching order group, the removed matching order is determined as a target symmetric order that needs to be retained corresponding to the matching order group.

[0163] In some embodiments, the generation unit 62 is specifically configured to: for each updated edge, form a task for the updated edge and an execution plan in the execution plan set corresponding to a matching order in which the starting edge can be mapped to the updated edge.

[0164] In some embodiments, the assigning unit 63 is specifically configured to: calculate a size of a candidate vertex set of the to-be-matched pattern graph vertex in the matching order of the task; and determine the task load based on the size of the candidate vertex set, the task load being positively correlated with the size of the candidate vertex set.

[0165] In some further embodiments, the assigning unit 63 is configured to: calculate the size of the candidate vertex set based on an initial candidate vertex number, and a normalized degree factor of the preceding vertex adjacent to the to-be-matched pattern graph vertex in the matching order, the normalized degree factor representing a ratio of a degree of the dynamic graph vertex corresponding to the preceding vertex to a number of vertices of the dynamic graph, the initial candidate vertex number being equal to a number of neighborhood intersections of two vertices of the update edge if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices mapped to the two vertices of the update edge in the matching order, and the initial candidate vertex number being equal to the number of vertices of the dynamic graph if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices mapped to the two vertices of the update edge in the matching order.

[0166] In some further embodiments, the assigning unit 63 is configured to: calculate the size of the candidate vertex set based on an initial candidate vertex number, and a normalized degree factor of the preceding vertex adjacent to the to-be-matched pattern graph vertex in the matching order, the normalized degree factor representing a ratio of a degree of the dynamic graph vertex corresponding to the preceding vertex to a number of vertices of the dynamic graph, the initial candidate vertex number being equal to a number of neighborhood intersections of two vertices of the update edge if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices mapped to the two vertices of the update edge in the matching order, and the initial candidate vertex number being equal to the number of vertices of the dynamic graph if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices mapped to the two vertices of the update edge in the matching order.

[0167] In some further embodiments, the assigning unit 63 is configured to: calculate the size of the candidate vertex set based on an initial candidate vertex number, and a normalized degree factor of the preceding vertex adjacent to the to-be-matched pattern graph vertex in the matching order, the normalized degree factor representing a ratio of a degree of the dynamic graph vertex corresponding to the preceding vertex to a number of vertices of the dynamic graph, the initial candidate vertex number being equal to a number of neighborhood intersections of two vertices of the update edge if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices mapped to the two vertices of the update edge in the matching order, and the initial candidate vertex number being equal to the number of vertices of the dynamic graph if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices mapped to the two vertices of the update edge in the matching order.

[0168] In some further embodiments, the assigning unit 63 is configured to: calculate a possibility of a candidate vertex in the candidate vertex set being filtered by the symmetry order, and determine the task load based on the size of the candidate vertex set and the possibility of the candidate vertex in the candidate vertex set being filtered by the symmetry order.

[0169] In some embodiments, the current total load of each GPU in the plurality of GPUs is represented in a heap structure, wherein the top element of the heap is the GPU with the minimum current total load; and the allocation unit 63 is specifically configured to: traverse the plurality of tasks, and assign a currently traversed task to the GPU indicated by the top element of the heap.

[0170] In some further embodiments, the allocation unit 63 is specifically configured to: divide the plurality of tasks into a plurality of task blocks; traverse the plurality of task blocks in descending order of total load, and traverse the tasks in a currently traversed task block in descending order of load.

[0171] In some embodiments, the apparatus 600 can further include a splitting unit. The splitting unit is configured to: evaluate a current task load of a thread bundle in the GPU, the current task load being positively correlated to a size of a current candidate vertex set of a currently to-be-matched pattern graph vertex in a matching order of a corresponding task; split the task processed by the thread bundle into a plurality of sub-tasks if the current task load exceeds a first threshold, one sub-task corresponding to one vertex in the current candidate vertex set; and place at least part of the sub-tasks in a global task queue of a global memory of the GPU, so as to be acquired by an idle thread bundle in the GPU from the global task queue.

[0172] In some further embodiments, the iteration index of the thread bundle and the length of the current candidate vertex set are saved in a shared memory; and the idle thread bundle determines whether a target thread bundle in the thread block is a high-load thread bundle based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and steals at least part of the sub-tasks from the target thread bundle if the target thread bundle is determined to be a high-load thread bundle.

[0173] In some further embodiments, the idle thread bundle calculates a residual task load based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and determines whether the target thread bundle is a high-load thread bundle based on the residual task load, the residual task load being positively correlated to an execution plan load factor, a number of residual unprocessed vertices, and a recursion level factor respectively, the execution plan load factor representing an overhead of an execution plan of a task currently executed by the target thread bundle, the number of residual unprocessed vertices representing a number of effective unprocessed vertices in the current candidate vertex set determined based on a symmetric order, and the recursion level factor representing an influence degree of an iteration level represented by the iteration index on load.

[0174] In some further embodiments, the thread bundle assigns at least part of the split sub-tasks to idle thread bundles in other thread blocks.

[0175] In some embodiments, the apparatus 600 can further include an unfolding unit. The unfolding unit is configured to: select a candidate vertex from the current candidate vertex set of the thread bundle one by one until the total number of neighbor vertices of the selected candidate vertex is such that the number of idle threads in the thread bundle is lower than a second threshold, or the number of selected candidate vertices is greater than or equal to a third threshold, and stop selecting; and assign each neighbor vertex of the selected candidate vertex to a thread in the thread bundle for execution of a computing task corresponding to the neighbor vertex by the thread.

[0176] The specific implementation of each unit in the above apparatus can refer to the description in combination with FIG. 2. Through the above apparatus, redundant computation can be eliminated, and the load imbalance problem between different GPUs can be alleviated.

[0177] According to another aspect, embodiments further provide a computer readable storage medium having stored thereon a computer program which, when executed in a computer, causes the computer to perform the method described in combination with FIG. 2.

[0178] According to yet another aspect, embodiments further provide a computer program product comprising computer program / instructions which, when executed in a processor, implement the method steps described above in combination with FIG. 2.

[0179] According to still another aspect, embodiments further provide a computing device comprising a memory and a processor, the memory having stored thereon executable code that, when executed by the processor, is configured to perform the method described in combination with FIG. 2.

[0180] Those skilled in the art should be aware that, in one or more examples described above, the functions described in the present disclosure can be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, the functions can be stored in a computer readable medium or transmitted as one or more instructions or code on a computer readable medium.

[0181] The above detailed description sets forth the purposes, technical solutions, and beneficial effects of the present application. It should be understood that the above detailed description is merely a specific implementation of the present application, and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made on the basis of the technical solutions of the present application shall be included in the protection scope of the present application.

Claims

1. A method for dynamic graph pattern matching, comprising: obtaining a set of execution plans for matching a pattern graph, the set of execution plans being obtained by merging equivalent match orders in each isomorphic edge class match order group, wherein the isomorphic edge class comprises at least two isomorphic edges in the pattern graph, and the match order group comprises a set of match orders with a starting edge in the isomorphic edge class; generating a plurality of tasks based on a set of updated edges of the dynamic graph and the set of execution plans, each of the tasks comprising an updated edge and an execution plan in the set of execution plans; evaluating task loads of the tasks, and assigning the plurality of tasks to a plurality of GPUs based on the task loads, so that the tasks are executed by the GPUs using a depth-first search algorithm.

2. The method of claim 1, wherein, the set of execution plans is generated by: analyzing a topology of the pattern graph to obtain a set of isomorphic edges of the pattern graph, the set of isomorphic edges comprising at least one isomorphic edge class; obtaining match order groups of the isomorphic edge class; merging equivalent match orders in the match order groups to form execution plans based on the merged match order groups, thereby obtaining the set of execution plans.

3. The method of claim 2, wherein, merging equivalent match orders in the match order groups to form execution plans based on the merged match order groups, thereby obtaining the set of execution plans, comprises: determining target symmetric orders to be retained in a symmetric order set for the match order group, and merging equivalent match orders in the match order group based on the target symmetric orders; forming each match order in the merged match order group and a target symmetric order corresponding to the match order group into an execution plan, thereby obtaining the set of execution plans.

4. The method of claim 3, wherein, determining target symmetric orders to be retained in a symmetric order set for the match order group, comprises: traversing each match order in the symmetric order set for the match order group, removing the currently traversed match order from the symmetric order set, and determining whether the symmetric order set after removal can eliminate all equivalent match orders in the match order group; if the symmetric order set after removal cannot eliminate all equivalent match orders in the match order group, the removed match order is determined as the target symmetric order to be retained corresponding to the match order group.

5. The method of claim 1, wherein, generating a plurality of tasks based on a set of updated edges of the dynamic graph and the set of execution plans, comprises: for each of the updated edges, forming an execution plan corresponding to a match order in the set of execution plans with a starting edge that can be mapped to the updated edge and the updated edge into a task.

6. The method of claim 1, wherein, evaluating task loads of the tasks, comprises: calculating a size of a candidate vertex set of a pattern graph vertex to be matched in a match order of the task; determining the task load based on the size of the candidate vertex set, wherein the task load is positively correlated with the size of the candidate vertex set.

7. The method of claim 6, wherein, calculating a size of a candidate vertex set of a pattern graph vertex to be matched in a match order of the task, comprises: calculating a size of the candidate vertex set based on a number of initial candidate vertices, and a normalized degree factor of a preceding vertex adjacent to the to-be-matched pattern graph vertex in the matching order, the normalized degree factor representing a ratio of a degree of a dynamic graph vertex corresponding to the preceding vertex to a number of vertices of the dynamic graph, if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices in the matching order which are mapped to two vertices of the update edge, the number of initial candidate vertices is equal to a number of neighborhood intersection of the two vertices of the update edge, if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices in the matching order which are mapped to two vertices of the update edge, the number of initial candidate vertices is equal to the number of vertices of the dynamic graph.

8. The method of claim 7, wherein, if the to-be-matched pattern graph vertex is adjacent to two pattern graph vertices in the matching order which are mapped to two vertices of the update edge, the size of the candidate vertex set is equal to the number of neighborhood intersection multiplied by k-th power of a first normalized degree factor, the first normalized degree factor being a ratio of an average degree of the dynamic graph to the number of vertices of the dynamic graph, and k being equal to a number of preceding vertices adjacent to the to-be-matched pattern graph vertex in the matching order minus 2.

9. The method of claim 7, wherein, if the to-be-matched pattern graph vertex is not adjacent to two pattern graph vertices in the matching order which are mapped to two vertices of the update edge, the size of the candidate vertex set is equal to the number of vertices of the dynamic graph multiplied by a normalized degree factor of each preceding vertex adjacent to the to-be-matched pattern graph vertex, wherein, when a preceding vertex is a pattern graph vertex mapped to an update edge vertex, the normalized degree factor of the preceding vertex is a ratio of a degree of the update edge vertex mapped to by the preceding vertex to the number of vertices of the dynamic graph, when a preceding vertex is not a pattern graph vertex mapped to an update edge vertex, the normalized degree factor of the preceding vertex is a ratio of an average degree of the dynamic graph to the number of vertices of the dynamic graph.

10. The method of claim 6, wherein, evaluating a task load of the task, further comprising: calculating a possibility of a candidate vertex in the candidate vertex set being filtered by the symmetric order, wherein, determining the task load based on the size of the candidate vertex set, comprising: determining the task load based on the size of the candidate vertex set and the possibility of a candidate vertex in the candidate vertex set being filtered by the symmetric order.

11. The method of claim 1, wherein, current total loads of the GPUs are represented in a heap structure, wherein, a top element of the heap represents a GPU with a smallest current total load; and assigning the plurality of tasks to the plurality of GPUs based on the task load, comprising: traversing the plurality of tasks, and assigning a currently traversed task to a GPU indicated by the top element of the heap.

12. The method of claim 11, wherein, traversing the plurality of tasks, comprising: dividing the plurality of tasks into a plurality of task blocks; traversing the plurality of task blocks in a descending order of total loads, and traversing tasks in a currently traversed task block in a descending order of loads.

13. The method of claim 1, wherein, the method further comprising: evaluating a current task load of the thread bundle in the GPU, the current task load being positively related to a size of a current candidate vertex set of currently to-be-matched pattern graph vertices in a matching order of a corresponding task; if the current task load exceeds a first threshold, splitting a task processed by the thread bundle into a plurality of sub-tasks, one sub-task corresponding to one vertex in the current candidate vertex set; placing at least part of the sub-tasks in a global task queue of a global memory of the GPU, so as to be fetched by an idle thread bundle in the GPU from the global task queue.

14. The method of claim 13, wherein, the iteration index of the thread bundle and the length of the current candidate vertex set are saved in a shared memory, and the method further comprises: the idle thread bundle determines whether a target thread bundle in the thread block is a high-load thread bundle based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and if it is determined that the target thread bundle is a high-load thread bundle, at least part of the sub-tasks are stolen from the target thread bundle.

15. The method of claim 14, wherein, the idle thread bundle determines whether a target thread bundle in the thread block is a high-load thread bundle based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and if it is determined that the target thread bundle is a high-load thread bundle, at least part of the sub-tasks are stolen from the target thread bundle. the idle thread bundle determines whether a target thread bundle in the thread block is a high-load thread bundle based on the iteration index of the target thread bundle and the length of the current candidate vertex set, and if it is determined that the target thread bundle is a high-load thread bundle, at least part of the sub-tasks are stolen from the target thread bundle. the residual task load is positively related to an execution plan load factor, a residual number of unprocessed vertices and a recursion level factor respectively, the execution plan load factor representing an overhead of an execution plan of a task currently executed by the target thread bundle, the residual number of unprocessed vertices representing a number of effective unprocessed vertices in the current candidate vertex set determined based on a symmetric order, and the recursion level factor representing an influence degree of an iteration level represented by the iteration index on the load.

16. The method of claim 14, wherein, the method further comprises: the thread bundle allocates at least part of the split sub-tasks to idle thread bundles in other thread blocks.

17. The method of claim 1, wherein, the method further comprises: evaluating a current task load of the thread bundle in the GPU, the current task load being positively related to a size of a current candidate vertex set of currently to-be-matched pattern graph vertices in a matching order of a corresponding task; selecting candidate vertices one by one from the current candidate vertex set of the thread bundle until a total number of neighbor vertices of the selected candidate vertices is less than a second threshold or a number of the selected candidate vertices is greater than or equal to a third threshold, and stopping the selection; allocating each neighbor vertex of the selected candidate vertices to one thread in the thread bundle, so as to be executed by the thread a computation task corresponding to the neighbor vertex.

18. A dynamic graph pattern matching apparatus, comprising: an obtaining unit configured to obtain a set of execution plans for matching a pattern graph, the set of execution plans being obtained by merging equivalent matching orders in a matching order group of each isomorphic edge class; wherein the isomorphic edge class comprises at least two isomorphic edges in the pattern graph; and the matching order group comprises a set of matching orders with one isomorphic edge in the isomorphic edge class as a starting edge; The generating unit is configured to generate a plurality of tasks based on the updated edge set of the dynamic graph and the execution plan set, each of the tasks including one updated edge and one execution plan in the execution plan set; The assigning unit is configured to evaluate task loads of the tasks, and assign the plurality of tasks to a plurality of GPUs based on the task loads, so that the GPUs execute the tasks by using a depth-first search algorithm.

19. A computer program product comprising computer programs / instructions which, when executed by a processor, implement the steps of the method of any one of claims 1-17.

20. A computing device comprising a memory and a processor, wherein: The memory stores executable code, and the processor executes the executable code to implement the method of any one of claims 1-17. The memory stores executable code, and the processor executes the executable code to implement the method of any one of claims 1-17.

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