Testing methods, systems, devices, equipment, media, and products for chip verification boards.

By configuring a virtual test port and executing test operations, the problem of the lack of a main control chip on the chip verification board was solved, and the accuracy of hardware testing and verification results was achieved.

CN121656808BActive Publication Date: 2026-05-26JINAN MAIWEI INTELLIGENT TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
JINAN MAIWEI INTELLIGENT TECHNOLOGY CO LTD
Filing Date
2026-02-06
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

Existing chip verification boards lack a main control chip and firmware, making it difficult to effectively perform hardware self-testing. The newly fabricated chip and the EVB verification board are coupled and difficult to separate, affecting the accuracy of the verification results.

Method used

By receiving configuration instructions from the host computer, the electrical characteristics of the port under test are determined, a virtual test port is configured, and test operations are performed using the virtual test port to obtain test data of the port under test. The data is then fed back to the host computer for analysis, thereby realizing the hardware testing of the chip verification board.

Benefits of technology

Hardware testing of the chip verification board was implemented, ensuring its qualification and the accuracy of subsequent verification results.

✦ Generated by Eureka AI based on patent content.

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    Figure CN121656808B_ABST
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Abstract

This invention discloses a testing method, system, device, equipment, medium, and product for a chip verification board, relating to the field of hardware testing technology. It addresses the problem that traditional chip verification boards lack a main control chip and firmware, making hardware testing difficult. The method is applied to a main testing device, which is connected to a host computer and a port connection device. The port connection device connects to the port under test (DUT) of the target chip verification board. The method includes: receiving configuration instructions from the host computer to determine the electrical characteristics of the DUT; configuring a virtual test port corresponding to the DUT based on the electrical characteristics to ensure compatibility between the virtual test port and the DUT; receiving test instructions from the host computer; using the virtual test port and the port connection device to execute the corresponding test operation on the DUT to obtain test data; and feeding the test data back to the host computer for analysis and processing to obtain the test results for the DUT.
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