Backlight driving method and device, chip and display equipment

Abstract

The invention provides a backlight driving method and device, a chip and display equipment, and the backlight driving method comprises the steps: receiving current amplitude data and pulse width data; setting the reference width of the PWM display period according to the maximum frame frequency and the maximum display clock frequency of the display device; the number n of PWM display periods in the current display frame is obtained according to the current display frame frequency and the reference width, and n is an integer and is larger than or equal to 1; in the first PWM display period, current amplitude data and pulse width data are directly adopted to control backlight display, in at least one PWM display period from the second PWM display period to the nth PWM display period, a scattering algorithm is adopted to process the pulse width data, the current amplitude data are combined to jointly control backlight display, the width of the nth PWM display period is smaller than or equal to the reference width, and the width of the nth PWM display period is smaller than or equal to the reference width. The width of the first n-1 PWM display periods is equal to the reference width. According to the invention, on the premise that the average brightness is not changed, perceptible flicker can be reduced or the dynamic definition can be further improved.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, specifically to a backlight driving method and apparatus, chip, and display device. Background Technology

[0002] LCD panels themselves do not emit light and require a backlight to display. The backlight driver chip is responsible for converting electrical energy into a suitable driving signal for the backlight, controlling parameters such as brightness and color of the backlight, thereby affecting the display effect and performance of the LCD device.

[0003] In the field of liquid crystal display technology, black frame insertion technology is widely used to improve the dynamic clarity of images, especially to reduce ghosting and blurring in high-speed motion scenes. Black frame insertion technology periodically inserts a completely black frame between two displayed frames, forcibly turning off the backlight or display content. This utilizes the persistence of vision in the human eye to offset the duration of visual persistence, masking the blurring effect that appears at the edges when images switch, thereby reducing visual motion blur and eliminating ghosting in liquid crystal displays.

[0004] In existing technologies, time-division multiplexing or multi-pulse dimming techniques are used to divide the backlight on-time within a single frame cycle into multiple short pulses to reduce visual motion blur and eliminate LCD ghosting. However, these methods are prone to flickering at low frame rates. Furthermore, how to adaptively adjust the backlight driving timing when the system frame rate changes dynamically to ensure smooth, flicker-free black-insertion effects at different frame rates remains a technical problem that existing technologies have not adequately solved.

[0005] Therefore, there is an urgent need for a backlight driving method that can dynamically adjust according to the actual display frame rate to achieve uniform backlight control. Summary of the Invention

[0006] To address the aforementioned technical problems, this disclosure provides a backlight driving method, apparatus, chip, and display device that can avoid screen flicker and improve display performance.

[0007] According to a first aspect of this disclosure, a backlight driving method is provided, comprising: receiving current amplitude data and pulse width data; setting a reference width of a PWM display cycle according to the maximum frame frequency and the maximum display clock frequency of the display device; obtaining the number n of PWM display cycles in the current display frame according to the current display frame frequency and the reference width, wherein n is an integer and n≥1; controlling the backlight display using the current amplitude data and the pulse width data in the first PWM display cycle; and processing the pulse width data using a scattering algorithm and combining it with the current amplitude data to control the backlight display in at least one of the second to nth PWM display cycles, wherein the width of the nth PWM display cycle is less than or equal to the reference width, and the width of the first n-1 PWM display cycles is equal to the reference width.

[0008] Optionally, processing the same PWM data as the first PWM display cycle using a scattering algorithm in at least one of the 2nd to nth PWM display cycles for backlight display includes: processing the pulse width data using a scattering algorithm in any of the 2nd to n-1th PWM display cycles, and combining it with the current amplitude data to jointly control the backlight display; or controlling the backlight display using current amplitude data and pulse width data in any of the 2nd to n-1th PWM display cycles, wherein the pulse width data in the 2nd to n-1th PWM display cycles is the same as the pulse width data in the first PWM display cycle; and processing the pulse width data using a scattering algorithm in the nth PWM display cycle, and combining it with the current amplitude data to jointly control the backlight display.

[0009] Optionally, directly using current amplitude data and pulse width data to control the backlight display includes: generating PWM data that grows in reverse within the PWM display cycle based on the current amplitude data and pulse width data, and driving the backlight display based on the PWM data.

[0010] Optionally, processing the pulse width data using a scattering algorithm and combining it with current amplitude data to jointly control the backlight display includes: dividing the pulse width data of the first PWM display cycle into multiple display groups based on the reference width; remapping the order of the multiple display groups; and reading the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0011] Optionally, processing the pulse width data using a scattering algorithm and combining it with current amplitude data to jointly control the backlight display includes: dividing the pulse width data of the first PWM display cycle into multiple display groups based on the reference width; dividing the multiple display groups into two large groups according to their group order, keeping the group order of each display group in the first large group unchanged, and subtracting b from the group order of each display group in the second large group to obtain a new group order, where b is the number of display groups in the first large group and b is a positive integer; remapping the order of the display groups within each large group, and adding b to the remapped group order of each display group in the second large group to obtain a new group order; and reading the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0012] Optionally, the order of multiple display groups may be remapped and / or the order of display groups within each large group may be remapped using a bit order reversal method.

[0013] Optionally, the growth pulse width of the PWM data is controlled according to the pulse width data, and the data is grown in reverse during the PWM display cycle to insert a black screen; and the black screen insertion time is adjusted based on different pulse width data.

[0014] According to a second aspect of this disclosure, a backlight driving device is provided, comprising: a data receiving module for receiving current amplitude data and pulse width data; a configuration module for setting a reference width of a PWM display cycle according to the maximum frame frequency and the maximum display clock frequency of the display device, and obtaining the number n of PWM display cycles in the current display frame according to the current display frame frequency and the reference width, wherein n is an integer and n≥1; and a display control module for directly controlling the backlight display using the current amplitude data and pulse width data in the first PWM display cycle; and processing the pulse width data using a scattering algorithm and combining it with the current amplitude data to control the backlight display in at least one of the second to nth PWM display cycles, wherein the width of the nth PWM display cycle is less than or equal to the reference width, and the width of the first n-1 PWM display cycles is equal to the reference width.

[0015] Optionally, the display control module further employs a scattering algorithm to process the pulse width data in the nth PWM display cycle and combines it with the current amplitude data to control the backlight display; and in any of the 2nd to n-1th PWM display cycles, it employs a scattering algorithm to process the pulse width data and combines it with the current amplitude data to control the backlight display; or in any of the 2nd to n-1th PWM display cycles, it directly uses the current amplitude data and pulse width data to control the backlight display, wherein the pulse width data in the 2nd to n-1th PWM display cycles is the same as the pulse width data in the 1st PWM display cycle.

[0016] Optionally, the display control module further controls the PWM data to grow in reverse within the PWM display cycle based on the current amplitude data and pulse width data.

[0017] Optionally, the display control module further divides the pulse width data of the first PWM display cycle into multiple display groups based on the reference width, remaps the order of the multiple display groups, and reads the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0018] Optionally, the display control module further divides the pulse width data of the first PWM display cycle into multiple display groups based on the reference width; divides the multiple display groups into two large groups according to the group order, keeps the group order of each display group in the first large group unchanged, and subtracts b from the group order of each display group in the second large group to obtain a new group order, where b is the number of display groups in the first large group and b is a positive integer; remaps the order of the display groups in each large group, and adds b to the remapped group order of each display group in the second large group to obtain a new group order; and reads the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0019] Optionally, it also includes: a counter module, wherein when multiple data channels of the backlight driving device are used to drive the same row of backlight partitions, all channels share a single counter; and when multiple data channels of the backlight driving device are used to drive different rows of backlight partitions, each channel is configured with an independent counter.

[0020] According to a third aspect of this disclosure, a chip is provided for performing the backlight driving method as described above.

[0021] According to a fourth aspect of this disclosure, a display device is provided for performing the backlight driving method as described above.

[0022] The beneficial effects of this disclosure are:

[0023] The backlight driving method and related apparatus provided in this application embodiment, based on the dynamic division mechanism of the PWM display cycle of the reference width and combined with the scattering algorithm, can optimize the visual experience by changing the time distribution of the pulse without changing the average brightness, thereby reducing perceptible flicker or further improving dynamic clarity.

[0024] Furthermore, by dynamically determining the number of PWM display cycles and the actual width of the last cycle based on the actual duration of the display frame, the brightness fluctuation problem in variable refresh rate scenarios can be effectively avoided, ensuring the stability and consistency of backlight brightness at different refresh rates.

[0025] Furthermore, this application adopts a reverse growth pulse generation method, placing the backlight activation pulse at the end of each PWM display cycle, and flexibly adjusting the growth pulse width by combining pulse width data. This ensures that the backlight is lit only after the liquid crystal pixels have completed grayscale flipping and stabilized, thereby achieving effective black insertion during the liquid crystal response stage. This helps to significantly reduce motion blur and fuzziness in dynamic image display and improve the clarity of dynamic images. Attached Figure Description

[0026] The above and other objects, features and advantages of this disclosure will become clearer from the following description of embodiments of this disclosure with reference to the accompanying drawings.

[0027] Figure 1 This diagram illustrates the structure of a display device according to an embodiment of this application.

[0028] Figure 2 A schematic flowchart of a backlight driving method according to an embodiment of this application is shown;

[0029] Figure 3 A schematic flowchart of another backlight driving method provided according to an embodiment of this application is shown;

[0030] Figure 4 This diagram illustrates the reverse growth of PWM data within the PWM display cycle in the backlight driving method provided according to an embodiment of this application.

[0031] Figure 5 This diagram illustrates the use of a scattering algorithm to process PWM data in a backlight driving method according to an embodiment of this application.

[0032] Figure 6 This diagram illustrates the structure of a backlight driving device according to an embodiment of this application. Detailed Implementation

[0033] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application may be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0034] To help those skilled in the art better understand this application, the application scenarios and design concepts involved in this application will be briefly introduced below.

[0035] Figure 1 This diagram illustrates the structure of a display device according to an embodiment of the present application.

[0036] like Figure 1As shown, the display device 100 is described using a liquid crystal display (LCD) as an example. The display device 100 includes a display panel 110, a control system 120, a backlight driver 130, and a display driver (not shown). The display panel 110 is a liquid crystal display panel, including a liquid crystal module 112 and a backlight module 111. The liquid crystal module 112 is composed of multiple pixel units, and grayscale display of the image is achieved by controlling the transmittance of each pixel. The backlight module 111 can be disposed, for example, on the back of the liquid crystal module 112, providing a surface light source to support image display. It can be divided into multiple independently controllable backlight zones to achieve local dimming, thereby improving display contrast. The control system 120 receives external video signals, parses the image content and display parameters, and generates corresponding timing control signals, which are sent to the backlight driver 130 and the display driver, respectively, to coordinate image refresh and backlight illumination synchronization.

[0037] The backlight driving device 130 is connected to the backlight module 111 and generates a PWM (Pulse Width Modulation) driving signal based on the current amplitude data and pulse width data provided by the control system 120 to control the illumination of each backlight zone. For example, the backlight driving device 130 is configured to perform an adaptive backlight driving method.

[0038] Figure 2 This diagram illustrates a backlight driving method according to an embodiment of the present application. Figure 3 This diagram illustrates a flow chart of another backlight driving method provided according to an embodiment of this application. Figure 4 This diagram illustrates the reverse growth of PWM data within the PWM display cycle in the backlight driving method provided according to an embodiment of this application. Figure 5 This diagram illustrates the use of a scattering algorithm to process PWM data in a backlight driving method according to an embodiment of this application.

[0039] like Figure 2 As shown, the backlight driving method provided in this application includes the following steps:

[0040] Step S210: Receive current amplitude data and pulse width data. For example, the control system 120 transmits current amplitude data containing target brightness information and pulse width data defining the backlight on-time to the backlight driver 130 via an IIC or SPI communication interface. The current amplitude data is used to set the current flowing through the LEDs in the backlight source, thereby controlling the backlight brightness. The pulse width data is used to determine the duration of the backlight on-time pulse within one PWM (Pulse Width Modulation) cycle.

[0041] Step S220: Set the reference width of the PWM display cycle according to the maximum frame rate and maximum display clock frequency of the display device.

[0042] Further, the backlight driver 130 reads the maximum frame rate M (e.g., M = 960Hz) pre-stored or set by the control system 120, and the maximum display clock frequency K (e.g., K = 108MHz) supported by the driver chip. The clock period corresponding to the maximum display clock frequency K is calculated as 1 / K (e.g., 1 / 108MHz ≈ 9.26ns). The reference width P of the PWM display period is defined as the period of one display frame at the maximum frame rate M, i.e., P = 1 / M (e.g., 1 / 960Hz ≈ 1041.67μs). This reference width P consists of N clock cycles, where N = K / M, and N is the ratio of the maximum display clock frequency to the maximum frame rate. Therefore, the reference width P = N × (1 / K).

[0043] Step S230: Obtain the number n of PWM display cycles in the current display frame based on the current display frame frequency and the reference width.

[0044] The backlight driving device 130 receives the current display frame rate from the control system 120 and calculates the frame period of the current display frame. Then, it calculates the ratio of the current frame period to the theoretical number of periods for the reference width P. This theoretical value is rounded up to obtain the actual number n (where n is an integer ≥ 1) of PWM display periods that need to be included in the current display frame.

[0045] The configuration principle for the PWM display cycle within the current display frame is as follows: the width of the first n-1 PWM display cycles is equal to the base width P. The width of the nth (last) PWM display cycle is dynamically adjusted according to the current display frame cycle to ensure that the total duration of the n PWM display cycles is equal to the current display frame cycle.

[0046] For example, when the current display frame rate is 480Hz, the frame period is approximately 2083.33µs, and the reference width P is 1041.67µs. Therefore, the theoretical number of periods is 2, so n=2. That is, the current display frame includes 2 PWM display periods, and the width of each PWM display period is the reference width.

[0047] For example, when the current display frame rate is 360Hz, the frame period is approximately 2777.78µs, so the theoretical number of periods is 2.67, hence n=3. Therefore, n=2.67. That is, the current display frame includes 3 PWM display cycles. The width of the first two PWM display cycles is the reference width, and the width of the third PWM display cycle is less than the reference width.

[0048] Step S240: In the first PWM display cycle, the backlight display is directly controlled using the current amplitude data and pulse width data.

[0049] Within the first PWM display cycle with a width equal to the reference width, the backlight driver 130 generates a PWM drive signal based on the raw current amplitude data and pulse width data received from the control system 120. Further, the backlight driver generates PWM data that grows in reverse within the PWM display cycle according to the backlight on-time (i.e., pulse width) defined by the pulse width data, and drives the backlight module 111 to emit light based on the PWM data.

[0050] Furthermore, the growth pulse width of the PWM data is adjusted according to the pulse width data, and reverse growth is performed within the PWM display cycle to insert black frames and achieve a black frame insertion effect. The black frame insertion time can also be flexibly adjusted based on different pulse width data. The black frame insertion time within a PWM display cycle is defined as the period during which the backlight is off. Specifically, in a PWM display cycle using the reverse growth mode, the black frame insertion time is the interval from the start of the cycle to the start of the backlight-on pulse.

[0051] For example, such as Figure 4 As shown, a PWM display cycle P1 (total width P) is divided into multiple timing units (e.g., corresponding to the counting clock K of the driver chip). Reverse growth refers to the backlight activation pulse extending from the end of the PWM display cycle (end time) towards the beginning of the cycle. For example, the end time of the PWM display cycle is fixed as the end point of the backlight activation pulse. Based on the activation time (pulse width value) specified by the pulse width data, the start time of the backlight activation pulse is determined by calculating backwards (in reverse timing) from the end time of the PWM display cycle to generate PWM data. Based on the PWM data, the backlight is controlled to be off from the start time of the PWM display cycle to the calculated start point, and the backlight is controlled to be on from the start point to the end time of the cycle for backlight display.

[0052] The reverse growth PWM control method provided in this embodiment can ensure that the backlight is lit only after the liquid crystal pixel has completed grayscale flipping and stabilized, thereby achieving effective black insertion during the liquid crystal response stage. This helps to significantly reduce ghosting and blurring in dynamic image display and improve the clarity of dynamic images.

[0053] Step S250: In at least one of the PWM display cycles from the 2nd to the nth, the pulse width data is processed using a scattering algorithm and combined with the current amplitude data to control the backlight display.

[0054] Furthermore, when the current display frame contains multiple PWM display cycles, for at least one of the 2nd to nth PWM display cycles, the backlight driving device 130 does not simply repeat the PWM data of the first cycle. Instead, it uses a scattering algorithm to process the pulse width data and combines it with the current amplitude data to generate a new PWM data with different time distribution characteristics to drive the backlight. This embodiment can optimize the visual experience, reduce perceptible flicker, or further improve dynamic clarity by changing the time distribution of the pulses without changing the average brightness.

[0055] For example, such as Figure 3 As shown, step S250 includes:

[0056] Step S251: In any of the PWM display cycles from the 2nd to the (n-1th), the pulse width data is processed using a scattering algorithm and combined with the current amplitude data to control the backlight display, or the current amplitude data and pulse width data are directly used to control the backlight display. Further, the specific mode used can be dynamically determined by the backlight driver 130 according to a preset strategy (such as a fixed mode selection) or instructions from the control system 120. When the backlight display is directly controlled using current amplitude data and pulse width data in any of the 2nd to the (n-1th)th PWM display cycles, the pulse width data in the 2nd to the (n-1th)th PWM display cycles is the same as the pulse width data in the 1st PWM display cycle.

[0057] Step S252: During the nth PWM display cycle, a scattering algorithm is used to process the pulse width data and combine it with the current amplitude data to control the backlight display. The duration of the nth PWM display cycle is not fixed. Using the scattering algorithm ensures that the backlight pulse is output with an optimized time distribution within this variable-length cycle, maintaining the stability of the visual effect and ensuring the precise end of the frame cycle.

[0058] Furthermore, within one PWM display cycle, a scattering algorithm is used to process the pulse width data that is the same as that of the first PWM display cycle for backlight display. This includes dividing the pulse width data of the first PWM display cycle into multiple display groups based on a reference width, remapping the order of the multiple display groups, and reading the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0059] For example, the complete pulse width data within the first PWM display cycle (corresponding to the reference width P) is divided into multiple display groups based on the reference width P in the time dimension. For example... Figure 5As shown, for example, N clock cycles are evenly divided into 8 display groups (including display group 0, display group 1, ..., display group 7) in the time dimension. Each display group contains N / 8 clock cycles, representing a segment of the reverse-grown PWM data.

[0060] Next, the order of the eight display groups is remapped. For example, a bit-order reversal method can be used to map the original order of the display groups (0, 1, 2, 3, 4, 5, 6, 7) to a new order. For instance, 3-bit binary addresses can be used to represent 0-7, and then the bit order of these addresses can be reversed:

[0061] Display group 0 (binary 000) -> After mapping, it will still be display group 0 (binary 000);

[0062] Display group 1 (binary 001) -> after mapping, it becomes display group 4 (binary 100);

[0063] Display group 2 (binary 010) -> after mapping, it becomes display group 2 (binary 010);

[0064] Display group 3 (binary 011) -> after mapping, it becomes display group 6 (binary 110);

[0065] Display group 4 (binary 100) -> after mapping, it becomes display group 1 (binary 001);

[0066] Display group 5 (binary 101) -> after mapping, it becomes display group 5 (binary 101);

[0067] Display group 6 (binary 110) -> after mapping, it becomes display group 3 (binary 011);

[0068] Display group 7 (binary 111) -> after mapping, it becomes display group 7 (binary 111).

[0069] The remapped display group order becomes: (0, 4, 2, 6, 1, 5, 3, 7). This new sequence defines the order of the shuffled PWM data waveforms.

[0070] Finally, based on the actual width of the current PWM display cycle, the corresponding number of display group data are read sequentially from the new sequence to generate the final PWM drive signal.

[0071] In an alternative embodiment, a scattering algorithm is used to process the pulse width data of the same first PWM display cycle for backlight display within one PWM display cycle. This includes dividing the pulse width data of the first PWM display cycle into multiple display groups based on a reference width; dividing the multiple display groups into two large groups according to their group order, keeping the group order of each display group in the first large group unchanged, and subtracting b from the group order of each display group in the second large group to obtain a new group order, where b is the number of display groups in the first large group and b is a positive integer; remapping the order of the display groups within each large group, and adding b to the remapped group order of each display group in the second large group to obtain a new group order; and reading the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0072] For example, the complete pulse width data within the first PWM display cycle (corresponding to the reference width P) is divided into multiple display groups based on the reference width P in the time dimension. For instance, N clock cycles are evenly divided into 8 display groups (including display group 0, display group 1, ..., display group 7) in the time dimension. Each display group contains N / 8 clock cycles, representing a segment of the reverse-grown PWM data.

[0073] Next, the eight display groups are divided into two large groups according to their group order. The first large group includes display groups 0, 1, 2, and 3, and the second large group includes display groups 4, 5, 6, and 7. The group order of each display group in the first large group remains unchanged. The group order of each display group in the second large group is subtracted by 'b' to obtain the new group order. Here, 'b' is the number of display groups in the first large group, and 'b' is a positive integer. That is, the group order of the first large group obtained in this step is (0, 1, 2, 3), and the group order of the second large group is (0, 1, 2, 3).

[0074] Next, the order of the displayed groups within each large group is remapped. For example, a bit order reversal method is used to map the group order (0, 1, 2, 3) in the first and second large groups to a new order. For example, 2-bit binary addresses are used to represent 0-3, and then the bit order of these addresses is reversed:

[0075] Display group 0 (binary 00) -> After mapping, it will still display group 0 (binary 00);

[0076] Display group 1 (binary 01) -> after mapping, it becomes display group 2 (binary 10);

[0077] Display group 2 (binary 10) -> after mapping, it becomes display group 1 (binary 01);

[0078] Display group 3 (binary 11) -> after mapping, it becomes display group 3 (binary 11).

[0079] Then, the remapped group order of each display group in the second large group is increased by 'b' to obtain a new group order (4, 6, 5, 8). That is, the remapped display group order becomes: (0, 2, 1, 3, 4, 6, 5, 8). This new sequence defines the order of the shuffled PWM data waveforms.

[0080] Finally, based on the actual width of the current PWM display cycle, the corresponding number of display group data are read sequentially from the new sequence to generate the final PWM drive signal.

[0081] Figure 6 This diagram illustrates the structure of a backlight driving device according to an embodiment of this application.

[0082] like Figure 6 As shown, the backlight driving device 130 includes a data receiving module 131, a configuration module 132, and a display control module 133. The data receiving module 131 receives current amplitude data and pulse width data. The configuration module 132 sets the reference width of the PWM display cycle according to the maximum frame rate and maximum display clock frequency of the display device, and obtains the number n of PWM display cycles in the current display frame according to the current display frame rate and the reference width, where n is an integer and n≥1. The display control module 133 directly controls the backlight display using the current amplitude data and pulse width data in the first PWM display cycle; in at least one of the second to nth PWM display cycles, it processes the pulse width data using a scattering algorithm and combines it with the current amplitude data to control the backlight display, wherein the width of the nth PWM display cycle is less than or equal to the reference width, and the width of the first n-1 PWM display cycles is equal to the reference width.

[0083] Furthermore, the display control module also processes the pulse width data using a scattering algorithm in the nth PWM display cycle and combines it with the current amplitude data to control the backlight display; and processes the pulse width data using a scattering algorithm in any of the 2nd to n-1th PWM display cycles and combines it with the current amplitude data to control the backlight display; or directly uses the current amplitude data and pulse width data to control the backlight display in any of the 2nd to n-1th PWM display cycles, wherein the pulse width data in the 2nd to n-1th PWM display cycles is the same as the pulse width data in the 1st PWM display cycle.

[0084] Furthermore, the display control module also controls the PWM data to grow in reverse within the PWM display cycle based on the current amplitude data and pulse width data.

[0085] Furthermore, the display control module divides the pulse width data of the first PWM display cycle into multiple display groups based on the reference width, remaps the order of the multiple display groups, and reads the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

[0086] Furthermore, the display control module divides the pulse width data of the first PWM display cycle into multiple display groups based on the reference width; the multiple display groups are divided into two large groups according to the group order, and the group order of each display group in the first large group remains unchanged. The group order of each display group in the second large group is subtracted by b to obtain a new group order, where b is the number of display groups in the first large group and b is a positive integer; the order of the display groups in each large group is remapped, and the remapped group order of each display group in the second large group is added to b to obtain a new group order; the corresponding number of display groups are read based on the width of the PWM display cycle for backlight display.

[0087] Furthermore, the backlight driving device 130 also includes a counter module (not shown in the figure). When multiple data channels of the backlight driving device are used to drive the same row of backlight partitions, all channels share a single counter. When multiple data channels of the backlight driving device are used to drive different rows of backlight partitions, an independent counter is configured for each channel.

[0088] For example, when multiple data channels of the backlight driver 130 are configured to drive the same row of backlight zones, all these channels share a single counter. This ensures that all PWM drive signals driving the same row of zones have a perfectly synchronized timing reference. They start counting at the same time, compare and generate pulse widths at the same time, thus guaranteeing the synchronized on / off switching of all backlight zones in that row. This avoids uneven brightness or visual interference caused by timing differences.

[0089] For example, when multiple data channels of the backlight driver 130 are configured to drive different rows of backlight zones, an independent counter is configured for each channel. This allows the PWM signals of different rows of backlight zones to have independent timing control capabilities, thereby significantly reducing the instantaneous total current demand of the backlight power supply, reducing electromagnetic interference and reducing the stress on the power supply system, and improving system stability and energy efficiency.

[0090] Furthermore, this application also provides a chip for performing the above-described backlight driving method.

[0091] Furthermore, this application also provides a display device for performing the above-described backlight driving method.

[0092] The backlight driving method and related apparatus provided in this application embodiment, based on the dynamic division mechanism of the PWM display cycle of the reference width and combined with the scattering algorithm, can optimize the visual experience by changing the time distribution of the pulse without changing the average brightness, thereby reducing perceptible flicker or further improving dynamic clarity.

[0093] Furthermore, by dynamically determining the number of PWM display cycles and the actual width of the last cycle based on the actual duration of the display frame, the brightness fluctuation problem in variable refresh rate scenarios can be effectively avoided, ensuring the stability and consistency of backlight brightness at different refresh rates.

[0094] Furthermore, this application adopts a reverse growth pulse generation method, placing the backlight activation pulse at the end of each PWM display cycle, and flexibly adjusting the growth pulse width by combining pulse width data. This ensures that the backlight is lit only after the liquid crystal pixels have completed grayscale flipping and stabilized, thereby achieving effective black insertion during the liquid crystal response stage. This helps to significantly reduce motion blur and fuzziness in dynamic image display and improve the clarity of dynamic images.

[0095] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0096] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating this disclosure and are not intended to limit the implementation. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of this disclosure.

Claims

1. A backlight driving method, characterized in that, include: Receive current amplitude data and pulse width data; The reference width of the PWM display cycle is set according to the maximum frame rate and maximum display clock frequency of the display device; The number of PWM display cycles n in the current display frame is obtained based on the current display frame frequency and the reference width, where n is an integer and n≥1; During the first PWM display cycle, the backlight display is controlled using current amplitude data and pulse width data; In at least one of the PWM display cycles from the 2nd to the nth, the pulse width data is processed using a scattering algorithm and combined with the current amplitude data to control the backlight display. The width of the nth PWM display cycle is less than or equal to the reference width, and the width of the first n-1 PWM display cycles is equal to the reference width.

2. The backlight driving method according to claim 1, characterized in that, Processing PWM data identical to that in the first PWM display cycle using a scattering algorithm within at least one of the 2nd to nth PWM display cycles for backlight display includes: In any of the PWM display cycles from the 2nd to the (n-1th), a scattering algorithm is used to process the pulse width data, and this data is combined with the current amplitude data to control the backlight display; or, in any of the PWM display cycles from the 2nd to the (n-1th), both the current amplitude data and the pulse width data are used to control the backlight display, wherein the pulse width data in the 2nd to the (n-1th)th PWM display cycles is the same as the pulse width data in the 1st PWM display cycle; and During the nth PWM display cycle, a scattering algorithm is used to process the pulse width data, and the backlight display is controlled in conjunction with the current amplitude data.

3. The backlight driving method according to claim 1 or 2, characterized in that, Backlight display control using current amplitude data and pulse width data includes: Based on the current amplitude data and pulse width data, PWM data that grows in reverse during the PWM display cycle is generated, and the backlight display is driven based on the PWM data.

4. The backlight driving method according to claim 1, characterized in that, The backlight display is controlled by processing pulse width data using a scattering algorithm and combining it with current amplitude data. The pulse width data of the first PWM display cycle is divided into multiple display groups based on the reference width; The order of the plurality of display groups is remapped; Based on the width of the PWM display cycle, the corresponding number of display groups are read for backlight display.

5. The backlight driving method according to claim 1, characterized in that, The backlight display is controlled by processing pulse width data using a scattering algorithm and combining it with current amplitude data. The pulse width data of the first PWM display cycle is divided into multiple display groups based on the reference width; The plurality of display groups are divided into two large groups according to the group order. The group order of each display group in the first large group remains unchanged. The group order of each display group in the second large group is subtracted by b to obtain a new group order, where b is the number of display groups in the first large group and b is a positive integer. Remap the order of the display groups within each large group, and add b to the remapped group order of each display group in the second large group to obtain a new group order. Based on the width of the PWM display cycle, the corresponding number of display groups are read for backlight display.

6. The backlight driving method according to claim 4 or 5, characterized in that, The order of multiple display groups is remapped and / or the order of display groups within each large group is remapped using a bit order reversal method.

7. The backlight driving method according to claim 1, characterized in that, The pulse width data is controlled to grow the pulse width of the PWM data, and the pulse width is grown in reverse during the PWM display cycle to insert a black screen; and the black screen insertion time is adjusted based on different pulse width data.

8. A backlight driving device, characterized in that, include: The data receiving module is used to receive current amplitude data and pulse width data; The configuration module is used to set the reference width of the PWM display cycle according to the maximum frame frequency and the maximum display clock frequency of the display device, and to obtain the number n of PWM display cycles in the current display frame according to the current display frame frequency and the reference width, where n is an integer and n≥1; The display control module is used to control the backlight display using current amplitude data and pulse width data during the first PWM display cycle; and to process the pulse width data using a scattering algorithm during at least one of the second to nth PWM display cycles, and to control the backlight display together with the current amplitude data. The width of the nth PWM display cycle is less than or equal to the reference width, and the width of the first n-1 PWM display cycles is equal to the reference width.

9. The backlight driving device according to claim 8, characterized in that, The display control module also processes the pulse width data using a scattering algorithm in the nth PWM display cycle and combines it with the current amplitude data to control the backlight display; and processes the pulse width data using a scattering algorithm in any of the 2nd to n-1th PWM display cycles and combines it with the current amplitude data to control the backlight display; or controls the backlight display using both current amplitude data and pulse width data in any of the 2nd to n-1th PWM display cycles, wherein the pulse width data in the 2nd to n-1th PWM display cycles is the same as the pulse width data in the 1st PWM display cycle.

10. The backlight driving device according to claim 8 or 9, characterized in that, The display control module also controls the PWM data to grow in reverse within the PWM display cycle based on the current amplitude data and pulse width data.

11. The backlight driving device according to claim 8 or 9, characterized in that, The display control module also divides the pulse width data of the first PWM display cycle into multiple display groups based on the reference width, remaps the order of the multiple display groups, and reads the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

12. The backlight driving device according to claim 8 or 9, characterized in that, The display control module further divides the pulse width data of the first PWM display cycle into multiple display groups based on the reference width; divides the multiple display groups into two large groups according to the group order, keeps the group order of each display group in the first large group unchanged, and subtracts b from the group order of each display group in the second large group to obtain a new group order, where b is the number of display groups in the first large group and b is a positive integer; remaps the order of the display groups in each large group, and adds b to the remapped group order of each display group in the second large group to obtain a new group order; and reads the corresponding number of display groups based on the width of the PWM display cycle for backlight display.

13. The backlight driving device according to claim 8, characterized in that, Also includes: The counter module is used when multiple data channels of the backlight driving device are used to drive the same row of backlight zones, and all channels share a single counter. When multiple data channels of the backlight driving device are used to drive different rows of backlight partitions, an independent counter is configured for each channel.

14. A chip, characterized in that, Used to perform the backlight driving method as described in any one of claims 1 to 7.

15. A display device, characterized in that, Used to perform the backlight driving method as described in any one of claims 1 to 7.

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