Low-delay multi-channel video multiplexing decoder fault detection and recovery system

Abstract

The invention belongs to the technical field of network communication, and particularly relates to a fault detection and recovery system for a low-delay multi-channel video multiplexing decoder. The system comprises a flow control distribution module, an inspection reset control module, data caching modules (1... n), decoding modules (1... n), a channel demultiplexing module and channel framing modules (1... m). The system provided by the invention not only can detect the fault of the decoders and complete automatic reset, but also does not need to independently use the decoders according to video channels, so that the multiplexing efficiency of the multi-channel video decoders is improved.

Description

Technical Field

[0001] This invention belongs to the field of network communication technology, specifically, it relates to a low-latency multi-channel video multiplexing decoder fault detection and recovery system. Background Technology

[0002] In network-based audio and video systems, decoders often need to be able to decode multiple video streams simultaneously to meet the needs of users watching different video sources at the same time. Typical application scenarios include monitoring centers and command centers. Moreover, in these application scenarios, stable video transmission and decoding with the lowest possible latency are often required, which places higher demands on the performance of the decoder.

[0003] During the network transmission of video, the video needs to be digitally encoded and compressed to form a low-bitrate video encoded data stream, which is then sent to the video decoder for decoding output. During this process, due to network uncertainties, data packet loss or transmission errors may occur, which may lead to the destruction of the video encoded data stream, causing errors in the decoder during decoding, or even causing the entire decoder to freeze.

[0004] Therefore, existing decoder implementations typically include a reset mechanism, usually a hardware reset or a software reset. A hardware reset allows the user to trigger the decoder reset by pressing a hardware reset button. A software reset is triggered periodically via software commands or automatic activation, with a common method being periodic resets during the idle intervals between video frames. However, this reset method requires the decoder to use each video channel independently when decoding multiple video streams. This is because the frame periods and phases of video streams are not necessarily the same. This requirement significantly limits the decoder's multiplexing efficiency, as some video streams have low resolution and bitrate, requiring lower decoding capabilities, while others have high resolution and bitrate, requiring higher decoding capabilities, thus wasting decoding resources. Summary of the Invention

[0005] To address the shortcomings of current multi-channel video multiplexing decoders, the present invention aims to propose a low-latency multi-channel video multiplexing decoder system that supports fault detection and recovery. This system can not only detect decoder faults and complete automatic reset, but also eliminates the requirement for decoders to be used independently on a video channel basis, thereby improving the multiplexing efficiency of multi-channel video decoders.

[0006] To achieve the above objectives, the present invention adopts the following technical solution.

[0007] A low-latency multi-channel video multiplexing decoder fault detection and recovery system includes a flow control distribution module, a patrol reset control module, a data buffer module (1…n), and a decoding module (1…n); wherein: The flow control and distribution module is responsible for receiving multiple video compressed and encoded data streams, and at the same time receiving instructions from the inspection and reset control module. It schedules the multiple video compressed and encoded data streams to the data buffer modules corresponding to multiple decoding modules. The unit for scheduling the compressed and encoded data is a slice, so as to reduce processing latency. The inspection and reset control module generates an inspection cycle. In each cycle, it detects the status of one decoding module and its data cache module, and resets the decoding module and data cache module according to the reset rules and procedures. The data caching module receives the video compressed encoded data stream output by the flow control and distribution module, which is then read and decoded by the corresponding decoding module. It also provides the current amount of data in the cache and the cache empty / full flags to the inspection and reset control module and the flow control and distribution module. The decoding module reads the video compression encoding data from the corresponding data cache module and decodes the video to restore it into normal image segments.

[0008] In this invention, the instructions of the inspection reset control module include scheduling algorithm parameters.

[0009] In this invention, the specific detection and control process of the inspection and reset control module is as follows: 1) Set the decoding module's round-robin detection period Tc, that is, every Tc, different decoding modules are detected; 2) Notify the flow control distribution module to stop transmitting video compressed encoded data to the data buffer corresponding to the decoding module i (i=1…n) to be detected; 3) Calculate the residual data decoding time corresponding to the current decoding module: t(i) = K(i) * A(i) / Vdec(i) +Td0; where A(i) is the amount of residual data, Vdec(i) is the decoding rate of the current decoding module, K(i) is the reset safety protection factor, and Td0 is the fixed decoding delay of the decoding module; 4) Start the residual data decoding timer of the current decoding module, and at the same time monitor the changes in the amount of residual data in the current cache module; 5) If the residual data amount of the current cache module is zero, and timer T(i) < t(i), it indicates that the decoding module can decode the data normally. No reset is required. The process can be skipped directly and the next decoding module inspection can begin. 6) If when timer T(i) > t(i), it is found that there is still data residue in the current cache module i, it indicates that there is an error in decoding, and the decoding module i is reset; 7) After waiting for Td0, reset the corresponding data cache module, clear the cache, and then exit the process to enter the inspection of the next decoding module.

[0010] The present invention also includes a channel demultiplexing module, which receives the decoded image segments from the decoding module (1…n), demultiplexes them by channel, and outputs them to the subsequent channel framing module.

[0011] The present invention also includes a channel framing module (1…m), which receives the image segments of the channel output by the channel demultiplexing module, splices them together into a complete image frame, and sends it to the subsequent display module for display.

[0012] In this invention, the number of decoding modules n and the number of channel framing modules m are mutually independent positive integers and can be adjusted as needed.

[0013] Compared with existing technologies, the low-latency multi-channel video multiplexing decoder fault detection and recovery system disclosed in this invention has the following advantages: It supports finer-grained decoder multiplexing at the slice level, enabling flexible switching between multiple video streams, higher multiplexing efficiency, and shorter latency; the latency of this invention is less than 1 millisecond (ms), while decoding based on a complete video frame generally requires more than 30 milliseconds. Supports independent fault detection for the decoder, enabling automatic reset; It eliminates the need for decoders to be used independently per video channel, thus improving the multiplexing efficiency of multiple video decoders. Attached Figure Description

[0014] Figure 1 This is a structural block diagram of a low-latency multi-channel video multiplexing decoder fault detection and recovery system according to the present invention. Detailed Implementation

[0015] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0016] Example 1

[0017] like Figure 1 As shown, a low-latency multi-channel video multiplexing decoder fault detection and recovery system includes a flow control distribution module, a patrol reset control module, a data buffer module (1…n), a decoding module (1…n), a channel demultiplexing module, and a channel framing module (1…m); for ease of description, n = 3, m = 1; where: 1) Flow control and distribution module The flow control and distribution module is responsible for receiving multiple video compressed and encoded data streams, as well as instructions from the inspection and reset control module. It schedules the multiple video compressed and encoded data streams to the data buffer modules corresponding to multiple decoding modules. The unit for scheduling compressed and encoded data is a slice, to reduce processing latency. Its workflow is as follows: 1. Receive multiple video compression-encoded data streams from the network for subsequent scheduling; 2. Receive instructions from the inspection and reset control module, including scheduling algorithm parameters, etc.; among which, the algorithm parameters include the granularity of scheduling, such as how many slices to use at a time; 3. The received multi-channel video compression and encoding data streams are scheduled to three data buffer modules, corresponding to three decoding modules.

[0018] (ii) Inspection and Reset Control Module The inspection and reset control module generates an inspection cycle. In each cycle, it detects the status of one decoding module and its data buffer module, and resets the decoding module and data buffer module according to the reset rules and procedures.

[0019] The specific detection and control process is as follows: 1. Set the decoding module's polling detection period Tc, that is, every Tc, different decoding modules are detected; in this embodiment, Tc = 1 second; 2. Notify the data distribution control module to stop transmitting video compressed encoded data to the data buffer corresponding to the decoding module to be tested (here assumed to be decoding module 1); 3. Calculate the residual data decoding time corresponding to the current decoding module (decoding module 1): t(1) = K(1) * A(1) / Vdec(1) + Td0; where A(1) is the residual data amount of decoding module 1, Vdec(1) is the decoding rate of the current decoding module, K(1) is the reset safety protection factor, and Td0 is the fixed decoding delay of the decoding module; 4. Start the residual data decoding timer T of the current decoding module, and at the same time monitor the change of residual data in the current cache module; 5. If the residual data amount of the current cache module is zero, then timer T < t(1), which indicates that the decoding module can decode the data normally. No reset is required. The process can be skipped directly and the next decoding module (decoding module 2) can be inspected. 6. If when timer T > t(1), it is found that there is still data residue in the current cache module 1, it indicates that there is an abnormality in decoding, and the decoding module 1 is reset; 7. After waiting for Td0, reset the corresponding cache module 1, clear the cache, and then exit the process to enter the inspection of the next decoding module.

[0020] (iii) Data caching module The data caching module is responsible for receiving the video compressed encoded data stream output by the flow control and distribution module, which is then read and decoded by the corresponding decoding module. In addition, it provides the current amount of data in the cache and the cache empty / full flags to the inspection and reset control module and the flow control and distribution module.

[0021] (iv) Decoding module The decoding module reads the video compression encoded data from the corresponding data buffer module, decodes the video into normal image segments in units of slices, and sends them to the channel demultiplexing module.

[0022] (v) Channel demultiplexing module The channel demultiplexing module receives image segments decoded by the three decoding modules, demultiplexes them by channel, and outputs them to the subsequent channel framing module.

[0023] vi) Channel framing module The channel framing module receives the image segments of this channel output by the channel demultiplexing module, splices and combines them into a complete image frame, and sends it to the subsequent display module for display.

[0024] The low-latency multi-channel video multiplexing decoder system provided in the above embodiments, which supports fault detection and recovery, can not only detect decoder faults and complete automatic reset, but also does not require decoders to be used independently according to video channels, thereby improving the multiplexing efficiency of multi-channel video decoders.

[0025] Obviously, those skilled in the art will intentionally make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A low-latency multi-channel video multiplexing decoder fault detection and recovery system, characterized in that, It includes a flow control distribution module, a patrol reset control module, multiple data caching modules, and multiple decoding modules; the number of data caching modules is equal to the number of decoding modules; among which: The flow control and distribution module is responsible for receiving multiple video compression and encoding data streams, and at the same time receiving instructions from the inspection and reset control module. It schedules multiple video compression and encoding data streams to the data buffer modules corresponding to multiple decoding modules on a slice-by-slice basis to reduce processing latency. The inspection and reset control module generates an inspection cycle. In each cycle, it detects the status of one decoding module and its data buffer module, and resets the decoding module and data buffer module according to the reset rules and procedures. The data caching module receives the video compressed encoded data stream output by the flow control and distribution module, which is then read and decoded by the corresponding decoding module. It also provides the current amount of data in the cache and the cache empty / full flags to the inspection and reset control module and the flow control and distribution module. The decoding module reads the video compression encoded data from the corresponding data cache module and decodes the video into normal image segments on a piece-by-piece basis.

2. The low-latency multi-channel video multiplexing decoder fault detection and recovery system according to claim 1, characterized in that, The specific detection and control process of the inspection and reset control module is as follows: 1) Set the decoding module's round-robin detection period Tc, that is, every Tc, different decoding modules are detected; 2) Notify the flow control distribution module to stop transmitting video compressed encoded data to the data buffer corresponding to the decoding module i, i=1…n to be detected; 3) Calculate the residual data decoding time corresponding to the current decoding module: t(i) = K(i) * A(i) / Vdec(i) + Td0; where A(i) is the amount of residual data, Vdec(i) is the decoding rate of the current decoding module, K(i) is the reset safety protection factor, and Td0 is the fixed decoding delay of the decoding module; 4) Start the residual data decoding timer of the current decoding module, and at the same time monitor the changes in the amount of residual data in the current cache module; 5) If the residual data amount of the current cache module is zero, and timer T(i) < t(i), it indicates that the decoding module can decode the data normally. No reset is required. The process can be skipped directly and the next decoding module inspection can begin. 6) If when timer T(i) > t(i), it is found that there is still data residue in the current cache module i, it indicates that there is an error in decoding, and the decoding module i is reset; 7) After waiting for Td0, reset the corresponding data cache module, clear the cache, and then exit the process to enter the inspection of the next decoding module.

3. The low-latency multi-channel video multiplexing decoder fault detection and recovery system according to claim 1, characterized in that, It also includes a channel demultiplexing module, which receives the decoded image segments from the decoding module, demultiplexes them by channel, and outputs them to the subsequent channel framing module.

4. The low-latency multi-channel video multiplexing decoder fault detection and recovery system according to claim 3, characterized in that, There are several channel framing modules. The channel framing module receives the image segments of the current channel output by the channel demultiplexing module, splices them together into a complete image frame, and sends it to the subsequent display module for display.

5. The low-latency multi-channel video multiplexing decoder fault detection and recovery system according to claim 3, characterized in that, The number of decoding modules and the number of channel framing modules are mutually independent positive integers.

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