GNSS receiver clock modeling method based on power-law noise
By adopting a GNSS receiver clock modeling method based on power-law noise, the problem of insufficient modeling of frequency noise in ordinary oscillators and small atomic clocks is solved, and frequency estimation noise is suppressed and positioning stability is improved, especially the short-term stability in the elevation direction is significantly improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-25
- Publication Date
- 2026-03-17
AI Technical Summary
In the existing technology, the frequency noise of ordinary oscillators and small atomic clocks has not been fully modeled, resulting in high frequency estimation noise and poor stability in elevation positioning in GNSS positioning. In particular, existing modeling methods cannot accurately describe the behavior of low-cost and unstable clocks.
A GNSS receiver clock modeling method based on power-law noise is adopted. By acquiring the phase difference data between the local clock and the reference clock, the diffusion coefficient is extracted, a clock state-space equation including clock offset and frequency offset parameters is established, the process noise covariance matrix is calculated, and the clock offset, frequency offset and three-dimensional coordinate parameters are calculated through a filtering estimation algorithm.
Without adding hardware, it significantly suppresses frequency estimation noise in GNSS timing calculation, improves the stability of dynamic positioning, especially the short-term stability of elevation positioning, and improves the performance of low-cost clocks in GNSS applications.
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Figure CN121679634A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of satellite navigation and positioning technology, and in particular to a GNSS receiver clock modeling method based on power-law noise. Background Technology
[0002] Global Navigation Satellite System (GNSS), with its all-weather, high-precision, and low-cost characteristics, has become an indispensable high-precision time synchronization technology in fields such as communications, power, and transportation. The core purpose of GNSS one-way time synchronization is to synchronize the local oscillator with the GNSS time reference. To achieve this, the clock difference estimated by the receiver is typically used as a steering reference value to control the local oscillator (outputting a signal such as 10MHz or pulses per second, PPS).
[0003] Real-Time Precise Point Positioning (RT-PPP) is a common method for achieving high-precision GNSS time synchronization. This method achieves sub-nanosecond PPS signal output accuracy by receiving real-time satellite orbit and clock error correction data. However, the high precision performance of RT-PPP largely depends on the stability of the receiver's local clock. While ordinary oscillators (such as OCXOs) are less expensive, their long-term frequency stability is poor. Although small atomic clocks (such as rubidium clocks) are more stable than OCXOs, their performance still lags behind large, highly stable atomic clocks, and their noise characteristics are not fully modeled and utilized.
[0004] In existing GNSS data processing, receiver clock bias is typically estimated as a white noise parameter, assuming that clock bias variations between epochs are uncorrelated. This strategy is feasible for most high-stability atomic clocks because their frequency offset is minimal, and inter-epoch variations are primarily driven by observation noise. However, for low-cost, less stable clocks, their frequency offset is significant, and their frequency noise exhibits significant time correlation (manifesting as power-law noise characteristics). Continuing to use a white noise model will fail to fully utilize the clock's inherent physical characteristics, leading to excessively high noise in the frequency offset estimation. Furthermore, the strong correlation between receiver clock bias and elevation coordinate parameters further deteriorates GNSS positioning, particularly short-term stability in the elevation direction.
[0005] Currently, some related technologies employ receiver clock modeling, but most of these technologies are based on ultra-high stability atomic clocks (such as hydrogen clocks), and the corresponding modeling methods are typically simplified to a one-dimensional random walk process. It should be noted that for low-cost clocks with significant frequency offsets, a one-dimensional model cannot accurately describe their behavior. Furthermore, these technologies fail to systematically explain how to extract modeling parameters from clock stability analysis, and lack quantitative verification of the estimation effectiveness of the key timing parameter, frequency offset, after modeling.
[0006] Therefore, there is a need for a clock noise calculation method for ordinary oscillators and small atomic clocks to suppress frequency estimation noise in GNSS timing calculations and improve the stability of dynamic positioning. Summary of the Invention
[0007] This application provides a GNSS receiver clock modeling method based on power-law noise, which solves the problems of high frequency estimation noise and poor elevation positioning stability caused by simply treating clock bias as white noise in related technologies. The technical solution is as follows: In a first aspect, embodiments of this application provide a GNSS receiver clock modeling method based on power-law noise, including: Acquire the phase difference data between the local clock and the reference clock, and extract the clock noise diffusion coefficient based on the phase difference data; Establish a clock state-space equation that includes clock offset parameters and frequency offset parameters, and calculate the process noise covariance matrix of the clock state-space equation based on the diffusion coefficient; The two-dimensional clock random state model and the process noise covariance matrix are used as process noise embedding in the filtering estimation algorithm. The clock offset parameter, frequency offset parameter and three-dimensional coordinate parameter of the receiver at the corresponding epoch are calculated by the filtering estimation algorithm.
[0008] In one alternative embodiment of the first aspect, acquiring the phase difference data between the local clock and the reference clock includes: Connect the output of the local clock to be tested and the same-frequency output of the reference clock to the time interval counter. The phase difference between the local clock and the reference clock is measured by the time interval counter based on a preset sampling interval; Arrange the corresponding phase differences according to the order of sampling times, generate a phase difference time series, and output the phase difference time series as the phase difference data.
[0009] In one alternative embodiment of the first aspect, the extraction of the clock noise diffusion coefficient based on the phase difference data includes: The overlapping Allen bias is calculated based on the phase difference time series, using the following formula: ; The overlap Allen bias is fitted to extract the diffusion coefficient of the clock noise; in, The overlapping Allen deviation, Let i be the i-th phase difference in the phase difference time series. The total amount of data in the phase difference time series. As the average factor, To smooth out time, This is the smoothing time parameter.
[0010] In one alternative to the first aspect, fitting the overlapping Allen bias to extract the diffusion coefficient of the clock noise includes: The overlapping Allen bias is fitted using the least squares method based on the power law noise model, applying the following formula: ; Extracting the white frequency noise diffusion coefficient Random walk frequency noise diffusion coefficient and random operating frequency noise diffusion coefficient ; in, These are the fitting parameters.
[0011] In one alternative embodiment of the first aspect, establishing the clock state-space equation including clock offset parameters and frequency offset parameters includes: ; The process noise covariance matrix for calculating the clock state-space equation based on the diffusion coefficient includes: The process noise covariance matrix of the clock state-space equation is calculated using the white frequency noise diffusion coefficient and the random walk frequency noise diffusion coefficient, applying the formula: ; in, This represents the clock offset parameter at time t. The frequency offset parameter at time t, Indicates the filter update interval. , This indicates process noise.
[0012] Secondly, embodiments of this application also provide a GNSS receiver clock modeling device based on power-law noise, comprising: The data acquisition unit is used to acquire the phase difference data between the local clock and the reference clock, and to extract the diffusion coefficient of the clock noise based on the phase difference data. The data processing unit is used to establish the clock state space equation containing two state variables, clock offset and frequency offset, and to calculate the process noise covariance matrix of the clock state space equation based on the diffusion coefficient. The calculation unit is used to embed the two-dimensional clock random state model and the process noise covariance matrix as process noise into the filtering estimation algorithm, and calculate the clock offset parameter, frequency offset parameter and three-dimensional coordinate parameter of the receiver at the corresponding epoch through the filtering estimation algorithm.
[0013] In one alternative embodiment of the second aspect, the data acquisition unit is further configured to connect the output terminal of the local clock to be tested and the same-frequency output terminal of the reference clock to the time interval counter. The data acquisition unit is also used to measure the phase difference between the local clock and the reference clock based on a preset sampling interval using the time interval counter; The data acquisition unit is also used to arrange the corresponding phase differences in the order of sampling times, generate a phase difference time series, and output the phase difference time series as the phase difference data.
[0014] In an alternative embodiment of the second aspect, the data acquisition unit is further configured to calculate the overlapping Allen bias based on the phase difference time series, applying the formula: ; The overlap Allen bias is fitted to extract the diffusion coefficient of the clock noise; in, The overlapping Allen deviation, Let i be the i-th phase difference in the phase difference time series. The total amount of data in the phase difference time series. As the average factor, To smooth out time, This is the smoothing time parameter.
[0015] Thirdly, embodiments of this application also provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method provided by the first aspect or any implementation thereof of the embodiments of this application.
[0016] Fourthly, this application also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method provided by the first aspect of the embodiments of this application or any implementation thereof.
[0017] The beneficial effects of the technical solutions provided in some embodiments of this application include at least the following: This application provides a GNSS receiver clock modeling method based on power-law noise. It requires no additional hardware, is low-cost, and does not require any modification to the GNSS receiver hardware or the addition of external devices. It only needs to utilize conventional observation data and local clock output, which greatly reduces the implementation cost and complexity. It can calculate clock noise for ordinary oscillators and small atomic clocks without using high-stability atomic clocks, thereby suppressing frequency estimation noise in GNSS timing calculation and improving the stability of dynamic positioning.
[0018] Furthermore, by introducing an accurate two-dimensional clock random model, the present invention can significantly suppress frequency offset estimation noise and greatly improve the short-term stability of elevation positioning, effectively solving the performance bottleneck problem of low-cost clocks in GNSS applications.
[0019] This application embodiment starts from the physical characteristics of the clock and accurately extracts and quantifies its power law noise characteristics through variance analysis, thereby achieving isolation and accurate modeling of the clock error source of the receiver itself, fundamentally improving the estimation effect. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This is a flowchart illustrating a GNSS receiver clock modeling method based on power-law noise provided in an embodiment of this application. Figure 2 This is a schematic diagram of a GNSS receiver clock modeling device based on power-law noise provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0023] The terms "comprising" and "having," and any variations thereof, in the specification, claims, and accompanying drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or modules is not limited to the steps or modules listed, but may optionally include steps or modules not listed, or may optionally include other steps or modules inherent to such process, method, product, or apparatus.
[0024] It should be noted that the terms "first" and "second" used in this application are merely to distinguish similar objects and do not represent a specific ordering of the objects. It is understood that "first" and "second" can be interchanged in a specific order or sequence where permitted. It should be understood that the objects distinguished by "first" and "second" can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in an order other than those described or illustrated herein.
[0025] The present application will now be described in detail with reference to specific embodiments.
[0026] Next, combine Figure 1 This paper introduces a GNSS receiver clock modeling method based on power-law noise, provided by an embodiment of this application. For details, please refer to... Figure 1 , Figure 1 This illustration shows a flowchart of a GNSS receiver clock modeling method based on power-law noise, provided in an embodiment of this application. Figure 1 As shown, the method includes the following steps: S101, acquire the phase difference data between the local clock and the reference clock, and extract the clock noise diffusion coefficient based on the phase difference data; S102, Establish the clock state space equation including clock offset parameters and frequency offset parameters, and calculate the process noise covariance matrix of the clock state space equation based on the diffusion coefficient. S103 incorporates the two-dimensional clock random state model and the process noise covariance matrix into the process noise embedding filtering estimation algorithm. The clock offset parameter, frequency offset parameter, and three-dimensional coordinate parameter of the receiver at the corresponding epoch are calculated through the filtering estimation algorithm.
[0027] In some embodiments, the process of S101 acquiring phase difference data between the local clock and the reference clock includes: S1011 connects the output of the local clock to be tested and the same-frequency output of the reference clock to the time interval counter.
[0028] Specifically, the phase difference data between the receiver's local clock and the reference clock can be collected by setting up a measurement platform. First, a clock stability measurement platform is set up, and the 10 MHz output of the local clock to be tested (including but not limited to OCXO FE-5650A or rubidium atomic clock MT-ZD10M) and the same-frequency output of a high-stability reference clock (such as hydrogen clock CH1-75A) are both connected to a high-precision time interval counter (such as SRS SR620).
[0029] S1012, the phase difference between the local clock and the reference clock is measured by a time interval counter based on a preset sampling interval.
[0030] For example, the sampling interval can be set to 1 second, and the continuous acquisition time can be set to 24 hours, thereby ensuring that frequency stability can be analyzed down to the tens of thousands of seconds level. All acquired data is transmitted to the data processing terminal for storage in real time.
[0031] S1013, Arrange the corresponding phase differences according to the sampling time order to generate a phase difference time series. Output the phase difference time series This is the phase difference data.
[0032] In some embodiments, S101 extracts the diffusion coefficient of clock noise based on the phase difference data, specifically including: S1034, Calculate the Overlapping Allen Bias (OADEV) based on the phase difference time series, using the following formula: ; in, The overlapping Allen deviation, Let i be the i-th phase difference in the phase difference time series. The total amount of data in the phase difference time series. As the average factor, To smooth out time, This is the smoothing time parameter.
[0033] S1035, Fit the overlapping Allen bias to extract the clock noise diffusion coefficient, including: The overlapping Allen bias is fitted using the least squares method based on the power law noise model, applying the following formula: ; Extracting the white frequency noise diffusion coefficient Random walk frequency noise diffusion coefficient and random operating frequency noise diffusion coefficient ; in, These are the fitting parameters.
[0034] In some embodiments, in S102, a clock state-space equation including clock offset parameters and frequency offset parameters is established, including: ; Furthermore, the process noise covariance matrix of the clock state-space equation is calculated based on the diffusion coefficient, including: By white frequency noise diffusion coefficient Random walk frequency noise diffusion coefficient Calculate the process noise covariance matrix of the clock state-space equation using the following formula: ; in, This represents the clock offset parameter at time t. The frequency offset parameter at time t, Indicates the filter update interval. , This indicates process noise.
[0035] In some embodiments, in S103, the two-dimensional clock random state model and its process noise covariance matrix constructed in step S102 can be... It is fully embedded in the filtering estimation algorithm of GNSS data processing as a process noise constraint.
[0036] Specifically, in the filtering estimation algorithm, the clock offset parameter and the frequency offset parameter are jointly estimated as two related state parameters.
[0037] The embodiments of this application effectively reduce the noise level of state parameter estimation by introducing stochastic model constraints that reflect the physical characteristics of the clock.
[0038] To achieve accurate correlation between measurement updates and state parameters, this application employs a GPS L1 / L2 dual-frequency ionospheric (IF) combined observation model. By eliminating ionospheric delay errors, the reliability of the observations is improved. The specific observation equations are as follows: ; in For the first Ionospheric pseudorange observations of the satellites. For the first Ionospheric-free combined carrier phase observations of the satellites For the receiver to the The geometric distance between the satellites For the first The clock offset of each satellite For receiver clock offset, The carrier wavelength for the GPS L1 band. For ionosphere-free combined ambiguity, , These are the observation noises for pseudorange and carrier phase, respectively.
[0039] In this way, the embodiments of this application effectively introduce the physical characteristics constraint of the clock, replacing the simple treatment of clock difference as white noise in the traditional method.
[0040] Specifically, during the measurement update process of the filtering estimation algorithm, all state parameters are optimally estimated by combining GNSS observations, and finally, the receiver clock offset parameters, frequency offset parameters, and three-dimensional coordinate parameters of each epoch are output in real time.
[0041] In some embodiments, after S103, the effectiveness of the embodiments of this application can be quantitatively verified. The standard deviation of the frequency offset parameter sequence can be calculated to evaluate the improvement in timing accuracy. Secondly, the overlap Allen deviation of the coordinate parameter sequence in the elevation direction under different smoothing times can be calculated to evaluate the ability of the method provided by the embodiments of this application to improve positioning stability.
[0042] The following are apparatus embodiments of this application, which can be used to execute the method embodiments of this application. For details not disclosed in the apparatus embodiments of this application, please refer to the method embodiments of this application.
[0043] Please see below. Figure 2 The diagram below illustrates the structure of a GNSS receiver clock modeling device based on power-law noise, as provided in an exemplary embodiment of this application. The device includes: The data acquisition unit is used to acquire the phase difference data between the local clock and the reference clock, and to extract the diffusion coefficient of the clock noise based on the phase difference data. The data processing unit is used to establish the clock state space equation containing two state variables, clock offset and frequency offset, and to calculate the process noise covariance matrix of the clock state space equation based on the diffusion coefficient. The calculation unit is used to embed the two-dimensional clock random state model and the process noise covariance matrix as process noise into the filtering estimation algorithm, and calculate the clock offset parameter, frequency offset parameter and three-dimensional coordinate parameter of the receiver at the corresponding epoch through the filtering estimation algorithm.
[0044] The data acquisition unit is also used to connect the output terminal of the local clock to be tested and the same-frequency output terminal of the reference clock to the time interval counter. The data acquisition unit is also used to measure the phase difference between the local clock and the reference clock based on a preset sampling interval using the time interval counter; The data acquisition unit is also used to arrange the corresponding phase differences in the order of sampling times, generate a phase difference time series, and output the phase difference time series as the phase difference data.
[0045] The data acquisition unit is also used to calculate the overlapping Allen bias based on the phase difference time series, using the formula: ; The overlap Allen bias is fitted to extract the diffusion coefficient of the clock noise; in, The overlapping Allen deviation, Let i be the i-th phase difference in the phase difference time series. The total amount of data in the phase difference time series. As the average factor, To smooth out time, This is the smoothing time parameter.
[0046] It should be noted that the apparatus provided in the above embodiments, when executing the GNSS receiver clock calculation method based on power-law noise, is only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. Furthermore, the apparatus provided in the above embodiments and the GNSS receiver clock calculation method embodiments based on power-law noise belong to the same concept, and their implementation process is detailed in the method embodiments, which will not be repeated here.
[0047] This application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of any of the methods described above.
[0048] Please see Figure 3 This is a structural block diagram of an electronic device provided in an embodiment of this application.
[0049] like Figure 3 As shown, the electronic device 300 includes a processor 301 and a memory 302.
[0050] In this embodiment, the processor 301 is the control center of the computer system, and can be a processor of a physical machine or a processor of a virtual machine. The processor 301 may include one or more processing cores, such as a 4-core processor or an 8-core processor. The processor 301 can be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array).
[0051] Processor 301 may also include a main processor and a coprocessor. The main processor is a processor used to process data in the wake-up state, also known as a CPU (Central Processing Unit). The coprocessor is a low-power processor used to process data in the standby state.
[0052] Memory 302 may include one or more computer-readable storage media, which may be non-transitory. Memory 302 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments of this application, the non-transitory computer-readable storage media in memory 302 is used to store at least one instruction, which is executed by processor 301 to implement the method in the embodiments of this application.
[0053] In some embodiments, the electronic device 300 further includes a peripheral device interface 303 and at least one peripheral device 304. The processor 301, memory 302, and peripheral device interface 303 can be connected via a bus or signal line. Each peripheral device 304 can be connected to the peripheral device interface 303 via a bus, signal line, or circuit board. Specifically, the peripheral device 304 includes: a display screen, a camera, and audio circuitry. The peripheral device interface 303 can be used to connect at least one I / O (Input / Output) related peripheral device to the processor 301 and memory 302.
[0054] In some embodiments of this application, the processor 301, memory 302, and peripheral device interface 303 are integrated on the same chip or circuit board; in other embodiments of this application, any one or two of the processor 301, memory 302, and peripheral device interface 303 can be implemented on separate chips or circuit boards. This application does not specifically limit the implementation in this regard.
[0055] The electronic device structural block diagram shown in the embodiments of this application does not constitute a limitation on the electronic device 300. The electronic device 300 may include more or fewer components than shown, or combine certain components, or use different component arrangements.
[0056] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the methods in any of the foregoing embodiments. The computer-readable storage medium may include, but is not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives, as well as magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic cards or optical cards, nanosystems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.
[0057] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of software products. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.
[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.
Claims
1. A method of GNSS receiver clock modeling based on power law noise, characterized in that, The method comprises the following steps: acquiring phase difference data between a local clock and a reference clock, and extracting a diffusion coefficient of clock noise based on the phase difference data; establishing a clock state space equation containing a clock offset parameter and a frequency offset parameter, and calculating a process noise covariance matrix of the clock state space equation based on the diffusion coefficient; embedding a two-dimensional clock random state model and the process noise covariance matrix into a filtering estimation algorithm as process noise, and calculating clock offset parameters, frequency offset parameters and three-dimensional coordinate parameters of the receiver at corresponding epochs by the filtering estimation algorithm.
2. The method of claim 1, wherein, The acquiring of the phase difference data between the local clock and the reference clock comprises: connecting an output end of the local clock to be measured and a same-frequency output end of the reference clock to a time interval counter; measuring the phase difference between the local clock and the reference clock based on a preset sampling interval by the time interval counter; arranging corresponding phase differences in the order of sampling time, generating a phase difference time sequence, and outputting the phase difference time sequence as the phase difference data.
3. The method of claim 2, wherein, The extracting of the diffusion coefficient of the clock noise based on the phase difference data comprises: calculating an overlapping Allan deviation in the phase difference time sequence, and applying a formula: ； fitting the overlapping Allan deviation to extract the diffusion coefficient of the clock noise; wherein, is the overlapping Allan deviation, is the i-th phase difference in the phase difference time series, is the total amount of data in the phase difference time series, is the averaging factor, is the smoothing time, is the smoothing time parameter.
4. The method of claim 3, wherein, The fitting of the overlapping Allan deviation to extract the diffusion coefficient of the clock noise comprises: performing least square fitting on the overlapping Allan deviation according to a power law noise model, and applying a formula: ； extracting a white frequency noise diffusion coefficient , a random walk frequency noise diffusion coefficient and a random run frequency noise diffusion coefficient ; wherein is a fitting parameter.
5. A method of GNSS receiver clock modelling based on a power law noise according to claim 4, characterized in that, The establishing of the clock state space equation containing the clock offset parameter and the frequency offset parameter comprises: ； The calculating of the process noise covariance matrix of the clock state space equation based on the diffusion coefficient comprises: calculating the process noise covariance matrix of the clock state space equation by a white frequency noise diffusion coefficient and a random walk frequency noise diffusion coefficient, and applying a formula: ； wherein, denotes a clock bias parameter at time t, denotes a frequency bias parameter at time t, denotes a filter update interval, , denotes process noise.
6. A power law noise based GNSS receiver clock computation apparatus, characterized in that, The method comprises the following steps: a data acquisition unit is configured to acquire phase difference data between a local clock and a reference clock, and extract a diffusion coefficient of clock noise based on the phase difference data; a data processing unit is configured to establish a clock state space equation containing two state quantities of clock offset and frequency offset, and calculate a process noise covariance matrix of the clock state space equation based on the diffusion coefficient; a calculation unit is configured to embed a two-dimensional clock random state model and the process noise covariance matrix into a filtering estimation algorithm as process noise, and calculate clock offset parameters, frequency offset parameters and three-dimensional coordinate parameters of the receiver at corresponding epochs by the filtering estimation algorithm.
7. A power law noise based GNSS receiver clock modelling apparatus as claimed in claim 6, wherein, The data acquisition unit is further configured to connect an output end of the local clock to be measured and a same-frequency output end of the reference clock to a time interval counter; The data acquisition unit is further configured to measure the phase difference between the local clock and the reference clock based on a preset sampling interval by the time interval counter; The data acquisition unit is further configured to arrange corresponding phase differences in the order of sampling time, generate a phase difference time sequence, and output the phase difference time sequence as the phase difference data.
8. A power law noise based GNSS receiver clock modelling apparatus as claimed in claim 7, wherein, The data acquisition unit is further configured to calculate an overlapping Allan deviation in the phase difference time sequence, and apply a formula: ； Fitting the overlapping Allan deviations extracts a diffusion coefficient of the clock noise; wherein, is the overlapping Allan deviation, is the i-th phase difference in the phase difference time series, is the total amount of data in the phase difference time series, is the averaging factor, is the smoothing time, is the smoothing time parameter.
9. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor implements the steps of the method of any one of claims 1 to 5 when executing the program.
10. A non-transitory computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program, when executed by the processor, implements the steps of the method of any one of claims 1 to 5.