High frame rate reconfigurable single photon sensor integrated circuit

By using a high frame rate reconfigurable single-photon sensor integrated circuit, and utilizing a reconfigurable photodetector macro-pixel array and a high bandwidth reconfigurable front-end circuit, flexible configuration under different scenarios is achieved. This solves the constraints of high frame rate, high precision, and low signal-to-noise ratio detection in existing technologies, and meets the diverse needs of lidar systems.

CN121721603BActive Publication Date: 2026-06-23XIDIAN UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
XIDIAN UNIV
Filing Date
2026-01-13
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

In the existing technology, the silicon-based single-photon sensor chip is unable to achieve a high frame rate reconfigurable silicon-based single-photon sensor chip. The existing single-photon sensor chip has a single architecture and structure, which cannot meet the specific problem of the mutual constraints between high frame rate, high accuracy and low signal-to-noise ratio detection.

Method used

A high frame rate reconfigurable single-photon sensor integrated circuit is provided, comprising: a reconfigurable photodetector macropixel array and a high bandwidth reconfigurable front-end circuit, which generates voltage signals to realize ranging information by flexibly configuring the macropixel scale and circuit mode.

Benefits of technology

It enables flexible configuration of signal-to-noise ratio, ranging accuracy, and detection frame rate in different scenarios, meeting the needs of long-distance low signal-to-noise ratio ranging, high-precision ranging with high signal-to-noise ratio, and high-frame-rate ranging with high signal-to-noise ratio, and solving the constraints of high frame rate, high accuracy, and low signal-to-noise ratio detection.

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Abstract

The application discloses a high-frame-rate reconfigurable single-photon sensor integrated circuit, comprising: a reconfigurable photodetector macro-pixel array and a high-bandwidth reconfigurable front-end circuit; the macro-pixel array is used for being configured as a macro-pixel array with different macro-pixel scales, and processing the current output by the macro-pixel array to obtain an output current; the front-end circuit is used for being configured as a current subtraction and comparison circuit or a buffer and transimpedance amplification circuit, and outputting the voltage signal output by any one of the two circuits; the high-frame-rate reconfigurable single-photon sensor integrated circuit is used for working in any one of a long-distance low signal-to-noise ratio ranging mode, a higher signal-to-noise ratio high-precision ranging mode and a high signal-to-noise ratio high-frame-rate ranging mode. The application solves the problem that the reconfigurable silicon-based single-photon sensor chip structure is single, high-frame-rate, high-precision and low signal-to-noise ratio detection are mutually restricted.
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Description

Technical Field

[0001] This invention belongs to the field of lidar technology, specifically relating to a high frame rate reconfigurable single-photon sensor integrated circuit. Background Technology

[0002] In recent years, driven by the continuous development of lidar and integrated circuit technologies, the application scope of lidar is rapidly penetrating into various civilian scenarios closely related to people's lives. High-precision 3D imaging lidar systems based on silicon-based single-photon sensor chips can achieve efficient and low-cost 3D detection, and have important strategic value in intelligent unmanned systems such as autonomous driving, intelligent robots, low-altitude unmanned aerial vehicles, and military applications such as precision guidance.

[0003] Thanks to its compatibility with silicon-based processes, single-photon detectors can be integrated with front-end readout circuitry on a single chip in an array format. This lays a solid foundation for building highly integrated, compact lidar systems. Current reconfigurable silicon-based single-photon sensor chips are primarily based on a time-correlated single-photon counting (TCSPC) architecture, offering configurable specifications only within a limited parameter range. This fails to meet the application requirements of high frame rates and long-range, low signal-to-noise ratio ranging. Therefore, it is necessary to research reconfigurable technologies at the architectural level to address the challenges of the current reconfigurable silicon-based single-photon sensor chip's simple structure and the mutual constraints between high frame rate, high accuracy, and low signal-to-noise ratio detection. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a high frame rate reconfigurable single-photon sensor integrated circuit.

[0005] The technical problem to be solved by this invention is achieved through the following technical solution:

[0006] This invention provides a high frame rate reconfigurable single-photon sensor integrated circuit, comprising:

[0007] A reconfigurable photodetector macropixel array is configured to be a macropixel array of different macropixel sizes, and the current output by the macropixel array is processed to obtain an output current, wherein the macropixel array is used to generate a current signal when receiving a laser signal reflected from a target.

[0008] A high-bandwidth reconfigurable front-end circuit, connected to the reconfigurable photodetector macropixel array, is configured as a current subtraction and comparison circuit or a buffer and transimpedance amplifier circuit, and inputs the voltage signal output by the current subtraction and comparison circuit or the buffer and transimpedance amplifier circuit to a time-to-digital converter to generate ranging information; the current subtraction and comparison circuit or the buffer and transimpedance amplifier circuit is used to generate a voltage signal based on the output current;

[0009] The high frame rate reconfigurable single-photon sensor integrated circuit is used to operate in any one of the following modes: long-distance low signal-to-noise ratio ranging mode, high signal-to-noise ratio high-precision ranging mode, and high signal-to-noise ratio high frame rate ranging mode.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0011] Because this invention includes a reconfigurable photodetector macropixel array and a high-bandwidth reconfigurable front-end circuit, the reconfigurable photodetector macropixel array can be configured into macropixel arrays of different macropixel sizes according to the needs of the actual scenario, and the current output by the macropixel array is processed to obtain the output current. The high-bandwidth reconfigurable front-end circuit can also be configured as a current subtraction and comparison circuit or a buffer and transimpedance amplifier circuit according to the needs of the actual scenario, and perform corresponding processing on the output current to generate a voltage signal and input it to a time-to-digital converter to generate ranging information. Therefore, the high frame rate reconfigurable single-photon sensor integrated circuit provided by this invention can flexibly configure the signal-to-noise ratio, ranging accuracy, and detection frame rate by configuring the reconfigurable photodetector macropixel array and the high-bandwidth reconfigurable front-end circuit. Thus, it can operate in a long-distance, low signal-to-noise ratio ranging mode to meet the requirements of background light suppression capability in practical applications, it can operate in a high signal-to-noise ratio, high-precision ranging mode to meet the requirements of background light suppression capability and detection accuracy in practical applications, and it can operate in a high signal-to-noise ratio, high frame rate ranging mode to meet the requirements of detection frame rate in practical applications. This solves the current problem of single-structure reconfigurable silicon-based single-photon sensor chips, as well as the mutual constraints between high frame rate, high precision, and low signal-to-noise ratio detection.

[0012] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0013] Figure 1 This is an exemplary architecture diagram of a lidar ranging system including a high frame rate reconfigurable single-photon sensor integrated circuit provided in an embodiment of the present invention.

[0014] Figure 2 This is an exemplary architecture diagram of a high frame rate reconfigurable single-photon sensor integrated circuit provided in an embodiment of the present invention;

[0015] Figure 3 This is an exemplary architectural diagram of a reconfigurable photodetector macropixel array provided in an embodiment of the present invention;

[0016] Figure 4 This is an exemplary circuit structure diagram of a high-bandwidth reconfigurable front-end circuit provided in an embodiment of the present invention. Detailed Implementation

[0017] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0018] This invention provides a high frame rate reconfigurable single-photon sensor integrated circuit. This circuit generates target ranging information based on an input voltage signal representing the start timestamp of laser signal emission and the laser signal reflected from the target. The high frame rate reconfigurable single-photon sensor integrated circuit features a reconfigurable photodetector macropixel array and a high-bandwidth reconfigurable front-end circuit. The smallest unit macropixel in the reconfigurable photodetector macropixel array can be composed of SPAD units of different sizes (e.g., 2×2 SPAD units or 4×4 SPAD units), and when combined with a high signal-to-noise ratio signal readout circuit, it can meet the requirements of different scenarios for background light suppression and detection accuracy. The high-bandwidth reconfigurable front-end circuit incorporates a reconfigurable current receiving circuit, enabling flexible configuration of the front-end amplification circuit. It can switch between a current comparator circuit and a high-bandwidth transimpedance amplifier circuit, thereby meeting the requirements of different scenarios for background light suppression and detection frame rate. In other words, the high frame rate reconfigurable single-photon sensor chip proposed in this invention utilizes a reconfigurable macro-pixel array and a high-bandwidth reconfigurable front-end circuit, enabling the lidar to perform ranging at high frame rates in both low signal-to-noise scenarios and high signal-to-noise ratio scenarios in long-distance ranging.

[0019] For example, Figure 1 This is an exemplary architectural diagram of a lidar ranging system including a high frame rate reconfigurable single-photon sensor integrated circuit provided by the present invention. Figure 1 As shown, in addition to a high frame rate reconfigurable single-photon sensor integrated circuit, the system also includes a signal processing module, a laser driving module, a transmitting TX Lens, and a receiving RXIlens. The signal processing module sends control signals to the laser driving module to control its laser signal emission, and simultaneously sends a voltage signal representing the start timestamp of the laser signal emission to the high frame rate reconfigurable single-photon sensor integrated circuit. T _ start The laser signal emitted from the laser driver module passes through the TX Lens at the transmitter and is directed towards the target. The laser signal reflected by the target... T_stop The laser signal enters the RX Lens at the receiving end, and then enters the high frame rate reconfigurable single-photon sensor integrated circuit. Afterwards, the high frame rate reconfigurable single-photon sensor integrated circuit determines the signal based on the voltage signal. T _ start and the laser signal reflected by the target T_stop Generate and output the target's ranging information.

[0020] The high frame rate reconfigurable single-photon sensor integrated circuit provided by this invention includes: a reconfigurable photodetector macropixel array, and a high bandwidth reconfigurable front-end circuit connected to the reconfigurable photodetector macropixel array. The reconfigurable photodetector macropixel array is configured to be a macropixel array of different macropixel sizes, and processes the current output by the macropixel array to obtain a high signal-to-noise ratio output current (hereinafter referred to as output current). The macropixel array generates a current signal when it receives a laser signal reflected from a target. The high bandwidth reconfigurable front-end circuit is configured as a current subtraction and comparison circuit or a buffer and transimpedance amplifier circuit, and inputs the voltage signal output by the current subtraction and comparison circuit or the buffer and transimpedance amplifier circuit to a time-to-digital converter to generate ranging information. The current subtraction and comparison circuit or the buffer and transimpedance amplifier circuit generates a voltage signal based on the output current. The high frame rate reconfigurable single-photon sensor integrated circuit can operate in any of the following modes: long-distance low signal-to-noise ratio ranging mode, high signal-to-noise ratio high-precision ranging mode, and high signal-to-noise ratio high frame rate ranging mode, thereby achieving flexible configuration of background light suppression capability and detection frame rate. For example, Figure 2 This is a schematic diagram of the architecture of the high frame rate reconfigurable single-photon sensor integrated circuit proposed in this invention. Figure 2 As shown, the high frame rate reconfigurable single-photon sensor integrated circuit, in addition to including a reconfigurable photodetector macropixel array 100 and a high bandwidth reconfigurable front-end circuit 200, also includes a time-to-digital converter. The high bandwidth reconfigurable front-end circuit is connected to the time-to-digital converter, which is used to process the input voltage signal representing the start timestamp of the laser signal emission. T _ start The voltage signal Stop, output by the high-bandwidth reconfigurable front-end circuit, is used to generate the target ranging information.

[0021] In some embodiments, macropixel arrays with different macropixel sizes include: a first-type macropixel array and a second-type macropixel array. A first-type macropixel array refers to an array composed of multiple first-type macropixels, where each first-type macropixel is a macropixel composed of N×N SPAD units. A second-type macropixel array refers to an array composed of multiple second-type macropixels, where each second-type macropixel is a macropixel composed of M×M SPADs, where N and M are both positive integers, and N is greater than M. Preferably, N is 4 and M is 2. It should be noted that the reconfigurable photodetector macropixel array is an analog SiPM. When the reconfigurable photodetector macropixel array is configured as a macropixel array with different macropixel sizes, the reconfigurable photodetector macropixel array is an analog SiPM with different macropixel sizes.

[0022] In some embodiments, when the reconfigurable photodetector macropixel array is configured as a first-type macropixel array and the high-bandwidth reconfigurable front-end circuit is configured as a current subtraction and comparison circuit, the high-frame-rate reconfigurable single-photon sensor integrated circuit operates in a long-distance, low-signal-to-noise ratio ranging mode, thereby meeting the requirements for background light suppression in practical applications. In some embodiments, when the reconfigurable photodetector macropixel array is configured as a second-type macropixel array and the high-bandwidth reconfigurable front-end circuit is configured as a current subtraction and comparison circuit, the high-frame-rate reconfigurable single-photon sensor integrated circuit operates in a high-signal-to-noise ratio, high-precision ranging mode, thereby meeting the requirements for background light suppression and detection accuracy in practical applications. In some embodiments, when the reconfigurable photodetector macropixel array is configured as a second-type macropixel array and the high-bandwidth reconfigurable front-end circuit is configured as a buffer and transimpedance amplifier circuit, the high-frame-rate reconfigurable single-photon sensor integrated circuit operates in a high-signal-to-noise ratio, high-frame-rate ranging mode.

[0023] In this invention, the reconfigurable photodetector macropixel array 100 includes a reconfigurable macropixel array and a high signal-to-noise ratio (SNR) signal readout circuit 102. The reconfigurable macropixel array contains multiple SPAD units, each SPAD unit connected to a gating control signal Control0. The SPAD units in the reconfigurable macropixels of the reconfigurable photodetector macropixel array 100 are configured by Control0 to form macropixel arrays of different macropixel sizes. The macropixel array is an array composed of multiple macropixels, each macropixel consisting of at least four SPAD units. Each SPAD unit is connected to a corresponding high SNR signal readout circuit, which processes and outputs the current from the connected SPAD unit. In some embodiments, all SPAD units in the reconfigurable macropixel array of the reconfigurable photodetector macropixel array 100 can be configured, under the control of Control0, to form a macropixel with N×N SPAD units as a group, thereby obtaining an array composed of multiple such macropixels (referred to as a first-type macropixel size macropixel array). In some embodiments, all SPAD units in the reconfigurable macropixel array of the reconfigurable photodetector macropixel array 100 can be configured, under the control of the control signal Control0, to form a macropixel with M×M SPAD units as a group, thereby obtaining an array composed of multiple such macropixels (referred to as a second-type macropixel scale macropixel array). Reference Figure 3 , Figure 3 This is an exemplary architectural diagram of a reconfigurable photodetector macropixel array 100. (As shown...) Figure 3 As shown, the reconfigurable photodetector macropixel array 100 includes a reconfigurable macropixel array composed of multiple SPAD units and multiple high signal-to-noise ratio signal readout circuits 102. For example, each yellow rectangle represents a SPAD unit. Exemplarily, Figure 3 The principle of constructing a reconfigurable macropixel (i.e., a macropixel) is illustrated, such as... Figure 3As shown, for example, 2×2 SPAD units form a group to constitute a macropixel (referred to as a reconfigurable macropixel 101), and multiple such macropixels constitute a macropixel array. Alternatively, 4×4 SPAD units form a group to constitute a macropixel (referred to as a reconfigurable macropixel 101), and multiple such macropixels constitute a macropixel array. This allows for reconstruction at different macropixel scales. Preferably, macropixels with a scale of 2×2 SPAD units are suitable for high-resolution target ranging in high signal-to-noise ratio scenarios. Macropixels with a scale of 4×4 SPAD units are suitable for long-range, low-spatial-resolution target ranging in low signal-to-noise ratio scenarios. In some embodiments, each SPAD unit corresponds to a high signal-to-noise ratio signal readout circuit 102, which processes and outputs the current output by the SPAD unit. The high signal-to-noise ratio (SNR) signal readout circuit 102 includes a SPAD quenching circuit, a correlation detection circuit, a background noise suppression circuit, and a pulse current generation circuit. Since the high SNR signal readout circuit is an existing circuit, the specific circuit principle of the high SNR signal readout circuit 102 will not be described in detail in this invention. Figure 3 As shown, all high signal-to-noise ratio signal readout circuits 102 in the reconfigurable photodetector macropixel array 100 generate an output current signal I. out .

[0024] In this invention, the high-bandwidth reconfigurable front-end circuit 200 includes: a reconfigurable current receiving circuit, a current comparator, a high-bandwidth transimpedance amplifier, and a 2-to-1 multiplexer (MUX). The reconfigurable current receiving circuit is connected to both the current comparator and the high-bandwidth transimpedance amplifier, and the current comparator and the high-bandwidth transimpedance amplifier are each connected to the 2-to-1 multiplexer (MUX). (Reference) Figure 4 , Figure 4 This is an exemplary circuit structure diagram of a high-bandwidth reconfigurable front-end circuit 200. (Example...) Figure 4 As shown, one end of the reconfigurable current receiving circuit 201 is connected to one end of the current comparator 202 and the high-bandwidth transimpedance amplifier 203 via switches. The other ends of the current comparator 202 and the high-bandwidth transimpedance amplifier 203 are connected to the two input terminals of the MUX, respectively. Furthermore, the reconfigurable current receiving circuit 201 and the MUX are connected to a control signal SEL. Under the control of the control signal SEL, the reconfigurable current receiving circuit 201 can be configured as a current subtractor or a current buffer, and the MUX can select one input for output under the control of the control signal SEL. Specifically, when the reconfigurable current receiving circuit 201 is configured as a current subtractor and the switch in the blue path is closed, the current subtractor, the current comparator 202, and the MUX constitute a current subtraction and comparison circuit (e.g., ...). Figure 4(As shown by the blue path in the image) to adapt to ranging scenarios with high signal-to-noise ratio and high accuracy. Therefore, when the output current signal I... out The input current signal I of the current subtractor IN At that time, the current subtractor first converts the reference current signal I... ref1 With current signal I IN The difference is calculated to obtain the current signal I. OP Then, the current signal I OP The input value is fed into the current comparator 202, and the current comparator 202 converts the current signal I... OP With reference current signal I ref2 The current comparator 202 is compared, and a voltage signal (voltage pulse signal) is generated based on the comparison result and input to the MUX. Under the control of the control signal SEL, the MUX outputs the voltage signal input to the current comparator 202. When the reconfigurable current receiving circuit 201 is configured as a current buffer and the switch in the red path is closed, the current buffer, the high-bandwidth transimpedance amplifier 203, and the MUX constitute a buffer and transimpedance amplifier circuit (e.g., Figure 4 (As shown by the red path in the image), to adapt to high signal-to-noise ratio and high frame rate ranging scenarios. Therefore, when the output current signal I... out The input current signal I acts as a current buffer. IN At that time, the current buffer will convert the current signal I... IN Direct output, thus obtaining the current signal I. OP Then, the current signal I OP The input value is sent to the high-bandwidth transimpedance amplifier 203, which converts the current signal I... OP The signal is processed to generate a voltage signal (voltage pulse signal) and input to the MUX. Under the control of the control signal SEL, the MUX outputs the voltage signal input to the high-bandwidth transimpedance amplifier 203. It should be noted that the reconfigurable current receiving circuit 201 can consist of a switch, a current subtractor, and a current buffer. One end of the switch is connected to one end of both the current subtractor and the current buffer. The other end of the current subtractor is connected to the current comparator 202, and the other end of the current buffer is connected to the high-bandwidth transimpedance amplifier 203. Thus, the reconfigurable current receiving circuit 201 can be configured as either a current subtractor or a current buffer by controlling the switch.

[0025] Based on the above description of the reconfigurable photodetector macropixel array, when the high frame rate reconfigurable single-photon sensor integrated circuit needs to operate in a high signal-to-noise ratio and high-precision ranging mode, for example, the SPAD units in the reconfigurable macropixel array can be configured as a group of 2×2 SPAD units to form a macropixel; at the same time, the reconfigurable current receiving circuit 201 is configured as a current subtractor, so that the output current output by the high signal-to-noise ratio signal readout circuit 102 is subtracted from the reference current and output to the subsequent current comparator, which works together with the background noise suppression circuit in the high signal-to-noise ratio signal readout circuit 102 to achieve background noise filtering. When a high frame rate reconfigurable single-photon sensor integrated circuit needs to operate in a high signal-to-noise ratio, high frame rate ranging mode, for example, the SPAD units in the reconfigurable macropixel array can be configured as a group of 2×2 SPAD units to form a macropixel; at the same time, the reconfigurable current receiving circuit 201 can be configured as a current buffer to isolate the large output capacitor of the SiPM and cascaded with the subsequent high-bandwidth transimpedance amplifier to realize single-laser emission ranging based on a linear mode architecture, thereby achieving high frame rate detection.

[0026] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0027] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0028] In this specification, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. While different embodiments may describe certain measures, this does not mean that these measures cannot be combined to produce a good effect.

[0029] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A high frame rate reconfigurable single-photon sensor integrated circuit, characterized in that, include: A reconfigurable photodetector macropixel array is configured to be a macropixel array of different macropixel sizes, and the current output by the macropixel array is processed to obtain an output current, wherein the macropixel array is used to generate a current signal when receiving a laser signal reflected from a target. A high-bandwidth reconfigurable front-end circuit, connected to the reconfigurable photodetector macropixel array, is configured as a current subtraction and comparison circuit or a buffer and transimpedance amplifier circuit, and inputs the voltage signal output by the current subtraction and comparison circuit or the buffer and transimpedance amplifier circuit to a time-to-digital converter to generate ranging information; the current subtraction and comparison circuit or the buffer and transimpedance amplifier circuit is used to generate a voltage signal based on the output current; The high frame rate reconfigurable single-photon sensor integrated circuit is used to operate in any one of the following modes: long-distance low signal-to-noise ratio ranging mode, high signal-to-noise ratio high-precision ranging mode, and high signal-to-noise ratio high frame rate ranging mode. The macro pixel arrays of different macro pixel sizes include: a first type of macro pixel array and a second type of macro pixel array, wherein the number of SPAD units constituting the first type of macro pixel is greater than the number of SPAD units constituting the second type of macro pixel. When the reconfigurable photodetector macropixel array is configured as a macropixel array of the first type of macropixel scale, and the high-bandwidth reconfigurable front-end circuit is configured as the current subtraction and comparison circuit, the high frame rate reconfigurable single-photon sensor integrated circuit operates in the long-distance low signal-to-noise ratio ranging mode. When the reconfigurable photodetector macropixel array is configured as a macropixel array of the second type of macropixel scale, and the high-bandwidth reconfigurable front-end circuit is configured as the current subtraction and comparison circuit, the high frame rate reconfigurable single-photon sensor integrated circuit operates in the high signal-to-noise ratio high-precision ranging mode. When the reconfigurable photodetector macropixel array is configured as a macropixel array of the second type macropixel scale, and the high-bandwidth reconfigurable front-end circuit is configured as the buffer and transimpedance amplifier circuit, the high-frame-rate reconfigurable single-photon sensor integrated circuit operates in the high signal-to-noise ratio high-frame-rate ranging mode.

2. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 1, characterized in that, The first type of macropixel scale macropixel array refers to an array composed of multiple first type macropixels; each first type macropixel refers to a macropixel composed of N×N SPAD units, where N is a positive integer.

3. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 1, characterized in that, The second type of macropixel scale macropixel array refers to an array composed of multiple second type macropixels; each second type macropixel refers to a macropixel composed of M×M SPADs, where M is a positive integer and N is greater than M.

4. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 2 or 3, characterized in that, N is 4 and M is 2.

5. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 1, characterized in that, The reconfigurable photodetector macropixel array includes: a reconfigurable macropixel array and a high signal-to-noise ratio signal readout circuit; The reconfigurable macropixel array includes multiple SPAD units, each SPAD unit is connected to a gating control signal Control0. The SPAD units in the reconfigurable macropixel array are configured by the control signal Control0 to form macropixel arrays of different macropixel sizes. The macropixel array is an array composed of multiple macropixels, each macropixel is composed of at least four SPAD units, and each SPAD unit is connected to a corresponding high signal-to-noise ratio (SNR) signal readout circuit. Each high SNR signal readout circuit processes the current output by the connected SPAD unit and then outputs it.

6. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 5, characterized in that, The macro-pixel arrays of different macro-pixel sizes include: a macro-pixel array of the first type of macro-pixel size, which refers to an array composed of multiple first-type macro-pixels; the SPAD units in the reconfigurable macro-pixel array are configured by the control signal Control0 to form a first-type macro-pixel with N×N SPAD units as a group.

7. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 5, characterized in that, The macro-pixel arrays of different macro-pixel sizes include: a macro-pixel array of the second type of macro-pixel size, which refers to an array composed of multiple second-type macro-pixels; the SPAD units in the reconfigurable macro-pixel array are configured by the control signal Control0 to form a second-type macro-pixel with M×M SPAD units as a group.

8. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 1, characterized in that, The high-bandwidth reconfigurable front-end circuit includes: a reconfigurable current receiving circuit, a current comparator, a high-bandwidth transimpedance amplifier, and a 2-to-1 multiplexer MUX. The reconfigurable current receiving circuit is connected to the current comparator and the high-bandwidth transimpedance amplifier, respectively, and the current comparator and the high-bandwidth transimpedance amplifier are connected to the 2-to-1 multiplexer MUX, respectively. The reconfigurable current receiving circuit is configured as a current subtractor or a current buffer via the control signal SEL. When the reconfigurable current receiving circuit is configured as a current subtractor, the current subtractor, the current comparator, and the 2-to-1 multiplexer MUX constitute the current subtraction and comparison circuit. When the reconfigurable current receiving circuit is configured as a current buffer, the current buffer, the high-bandwidth transimpedance amplifier, and the 2-to-1 multiplexer MUX constitute the buffer and transimpedance amplifier circuit.

9. The high frame rate reconfigurable single-photon sensor integrated circuit according to claim 1, characterized in that, The integrated circuit further includes a time-to-digital converter, wherein the high-bandwidth reconfigurable front-end circuit is connected to the time-to-digital converter, and the time-to-digital converter is used to generate ranging information of the target based on the input voltage signal representing the start timestamp of the laser signal emission and the voltage signal output by the high-bandwidth reconfigurable front-end circuit.