Data packet processing using dynamic real parameter allocation

Abstract

The invention relates to data packet processing using dynamic actual parameter allocation. A method, an apparatus, and a computer program product for processing data packets are provided. The method includes receiving a data packet. The method also includes matching the data packet with a boot table entry (STE), wherein the STE includes a real parameter associated with processing the data packet and a pointer to the executable sequence. The method further includes dynamically configuring the executable sequence using at least the actual parameter to process the data packet. The method further includes executing the executable sequence to process the data packets.

Description

TECHNICAL FIELD

[0001] Example embodiments of the present disclosure generally relate to packet steering in network systems. BACKGROUND

[0002] Modern network solutions must handle massive amounts of data packet transmissions. As the demand for high speed data packet transmissions continues to grow, the need for high speed decision processing of each received data packet also continues to grow. Applicant has discovered a number of deficiencies and problems associated with traditional data packet processing methods. Through effort, ingenuity, and innovation, many of these discovered problems have been solved through the development of the solutions contained in the embodiments of the present disclosure, many examples of which are described in detail herein. SUMMARY

[0003] Embodiments of the present disclosure are directed to data packet processing. Because of the massive amount of packets transmitted in modern network environments, there is a need to quickly process data packets. Accordingly, embodiments of the present invention described herein can include dynamically configuring executable sequences to compress actions performed on data packets. In this way, embodiments of the present invention can concentrate on processing commands (e.g., actions) related to steering data packets due to the repetitiveness of the operations.

[0004] In some embodiments, a method of processing a data packet is provided. The method can first receive the data packet and match the data packet to a steering table entry (STE), where the STE includes arguments related to processing the data packet and a pointer to an executable sequence. Further, the method can also include dynamically configuring the executable sequence using at least the arguments to process the data packet. Further, the method can also include executing the executable sequence to process the data packet.

[0005] In some embodiments, the data packet can include a header. Further, the STE can include a tag containing a set of conditions, and a matching parameter. In this way, matching the data packet to the STE includes using the matching parameter to identify one or more segments of the header and comparing the segments to the set of conditions.

[0006] In some embodiments, the STE can contain a match size, which indicates a size of the tag. In some embodiments, the match size can equal 4 DWORDS.

[0007] In some embodiments, the STE can also include a miss pointer configured to identify a backup STE that can include backup arguments related to processing the data packet. As such, the method can also include matching the data packet to the backup STE, dynamically configuring the executable sequence to process the data packet using the backup arguments, and executing the executable sequence to process the data packet.

[0008] In some embodiments, the STE can also include a sequence that includes an executable action sequence and a sequence pointer to identify the sequence. In some embodiments, the method can also include receiving one or more inputs from at least one of the arguments or the sequence identified by the sequence pointer, and dynamically configuring the executable sequence using the executable action sequence and the one or more inputs.

[0009] In some embodiments, the method can also include parsing the data packet into discrete portions and storing the discrete portions of the data packet in a register.

[0010] In some embodiments, the STE can include a sequence pointer. As such, the method can also include retrieving a sequence identified by the sequence pointer, where the sequence includes an executable action sequence. Further, the method can also include receiving one or more inputs from at least one of the register, the arguments, or the sequence. Further, the method can also include dynamically configuring the executable sequence using the executable action sequence and the one or more inputs.

[0011] In some embodiments, a network adapter for processing data packets is provided. The network adapter can include a network interface operably coupled to a communication network and a packet processing circuit operably coupled to the network interface. Upon receiving a data packet through the network interface, the packet processing circuit can be configured to match the data packet to a STE that includes arguments related to processing the data packet and a pointer to an executable sequence. Further, the packet processing circuit can dynamically configure the executable sequence to process the data packet using at least the arguments and execute the executable sequence to process the data packet.

[0012] In some embodiments, the data packet can include a header. Further, the STE can include a tag that includes a set of criteria and a matching parameter. The packet processing circuit can be configured to match the data packet to the STE using the matching parameter to identify one or more segments of the header and compare the one or more segments to the set of criteria.

[0013] In some embodiments, the STE can include a match size that indicates a size of the tag.

[0014] In some embodiments, the STE can further include a miss pointer configured to identify a backup STE containing backup arguments related to processing the data packet. Further, the packet processing circuitry can be configured to match the data packet to the backup STE, dynamically configure the executable sequence to process the data packet using at least the backup arguments, and execute the executable sequence to process the data packet.

[0015] In some embodiments, the STE can further include a sequence including an executable action sequence and a sequence pointer to identify the sequence. The packet processing circuitry can be configured to receive one or more inputs from at least one of the arguments or the sequence identified by the sequence pointer, and dynamically configure the executable sequence using the executable action sequence and the one or more inputs.

[0016] In some embodiments, the packet processing circuitry can be configured to parse the data packet into discrete portions, and store the discrete portions into registers.

[0017] In some embodiments, the STE can further include a sequence pointer. The packet processing circuitry can be further configured to retrieve a sequence identified by the sequence pointer, receive one or more inputs from at least the registers, the arguments, or the sequence, and dynamically configure the executable sequence using the executable action sequence and the inputs.

[0018] In some embodiments, a computer program product for processing a data packet is provided. The computer program product can include at least one non-transitory computer-readable storage medium storing program instructions executable by a machine. When executed, the instructions can cause the machine to receive a data packet, match the data packet to a STE containing arguments related to processing the data packet and a pointer to an executable sequence, dynamically configure the executable sequence to process the data packet using at least the arguments, and execute the executable sequence to process the data packet.

[0019] In some embodiments, the data packet can include a header. Further, the STE can include a tag containing a set of criteria and a matching parameter. The program instructions, when executed, can cause the machine to identify one or more segments of the header using the matching parameter and compare the one or more segments to the set of criteria to match the data packet to the STE.

[0020] In some embodiments, the STE further includes a matching size indicating a size of the tag.

[0021] In some embodiments, the STE can further include a miss pointer configured to identify a backup STE, wherein the backup STE includes a backup argument related to processing the data packet. Further, the program instructions, when executed, can cause the apparatus to match the data packet to the backup STE, dynamically configure the executable sequence to process the data packet using at least the backup argument, and execute the executable sequence to process the data packet.

[0022] In some embodiments, the STE can further include a sequence, wherein the sequence includes an executable action sequence and a sequence pointer to identify the sequence. Further, the program instructions, when executed, can cause the apparatus to receive one or more inputs from at least one of the argument or the sequence identified by the sequence pointer, and dynamically configure the executable sequence using the executable action sequence and the one or more inputs.

[0023] In some embodiments, the program instructions, when executed, can cause the apparatus to parse the data packet into discrete portions, and store the discrete portions of the data packet in a register.

[0024] In some embodiments, the STE further includes a sequence pointer, wherein the program instructions, when executed, can cause the apparatus to retrieve a sequence identified by the sequence pointer, receive one or more inputs from at least one of the register, the argument, or the sequence, and dynamically configure the executable sequence using the executable action sequence and the one or more inputs.

[0025] The above summary is merely summary of some example embodiments and thus is not to be taken as a summary of all aspects of the present disclosure. The above summary is therefore not to be taken as a summary of all aspects of the present disclosure. It will be understood that the above description is merely one example and is not intended to limit the scope of the present disclosure in any way. It will be understood that the scope of the present disclosure encompasses many potential embodiments, some of which will be further described hereafter. BRIEF DESCRIPTION OF DRAWINGS

[0026] Certain example embodiments of the present disclosure have been described generally above, and will now be described in greater detail with reference to the drawings. Components shown in the drawings can or can not be present in some embodiments described herein. Some embodiments can include fewer (or additional) components than those shown in the drawings.

[0027] Figure 1 is a schematic diagram of a location of a data packet processor in accordance with some embodiments described herein;

[0028] Figure 2 is a schematic diagram of an example network device in accordance with some embodiments described herein;

[0029] Figure 3A flow diagram illustrating a method of data packet processing using dynamic argument assignment, in accordance with some embodiments described herein;

[0030] Figure 4 A diagram of input sources in relation to executable sequences, in accordance with some embodiments described herein. DETAILED DESCRIPTION

[0031] Embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all, embodiments are shown. Indeed, the present disclosure can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. Like numbers refer to like elements throughout. The terminology used herein is for the purpose of describing some embodiments only and is not intended to be limiting; thus, the use of any specific term is not intended as a limitation on the present disclosure, and all

[0032] Unless expressly stated to the contrary, any use of a term herein in the singular will also include the plural. For example, a reference to “a” or “one” item will mean “one or more” items. The term “based on” is used to describe one or more factor to which an action, transformation, or allocation is based on. Unless expressly stated to the contrary, any use of an ordinal (e.g., “first”, “second”, “third”, “fourth”, etc.) to describe a quantity will mean that there is no limit to the number of items that can serve that purpose. For example, a “first” item can be any one item, not necessarily the first item in a series. Unless expressly stated to the contrary, any use of an ordinal (e.g., “first”, “second”, “third”, “fourth”, etc.) to describe a quantity will mean that there is no limit to the number of items that can serve that purpose. For example, a “first” item can be any one item, not necessarily the first item in a series.

[0033] Data packets are blocks of data transmitted over a network, where the blocks of data can be a small piece of a larger message. Data transmitted over a network is sent through data packets. In this way, each data packet makes up a portion of a complete message and carries relevant information that helps identify the sending device and the target device (e.g., receiving device), as well as other information for handling the data packet. When a data packet is received at the target device, the target device can reassemble the data packets to form a usable message. Many data processing related challenges involve the steering of data packets. Data packet steering refers to the decision-making process related to where to transmit a data packet and what actions to perform on the data in the packet after it is received to enable reassembly or to gain other benefits from modifying the packet.

[0034] Data packets can take different forms (original Ethernet protocol, Ethernet control message protocol, User Datagram Protocol, Transmission Control Protocol, etc.). However, the basic structure of a data packet generally includes three parts: a header, a payload, and a trailer. The header contains instructions about the data carried by the packet, which can include fields such as version, Internet Header Length, Identification, Total Length, Time to Live (TTL), Source Address, and / or Destination Address. Different forms of data packets can include different fields in the header that provide metadata related to the packet. The payload (e.g., body) of the data packet can contain the actual data that the packet is to be transmitted to a destination. At the target device, the payload of the received data packets can be assembled to create a message (e.g., a video, a picture, an application, and / or the like). The trailer indicates the end of the data packet.

[0035] A steering table is part of a network device configuration or network infrastructure. The steering table is used to manage and steer the flow of data packets in a network. The steering table can also be referred to as a forwarding table or a routing table and can be stored in devices such as network devices, routers, switches, central processing units (CPUs), data processing units (DPUs), graphics processing units (GPUs), etc. The steering table can use various criteria (e.g., destination address, source address, protocol type, etc.) to determine how a data packet should be handled. The steering table can contain individual rows and columns that populate a table. Each entry in the table can contain specific conditions and corresponding actions to perform when those conditions are met. For example, the steering table can contain multiple fields that declare rules and / or criteria based on the header information or payload of a packet to indicate how to handle the packet.

[0036] Entries in the steering table are referred to as steering table entries (STEs). Each STE can be associated with a particular function, such as action execution, matching function, update or optimization operation, etc. The STEs can be used for traffic steering to determine how a packet should be handled after it is received by a network device in order to prepare for the next stage of handling. The handling instructions for a packet can include information about how to transmit the packet to a particular destination, how the packet should be assembled in order, modifications to be made to the packet, security checks to be performed, etc. Packets and their associated actions are typically handled individually and independently of other packets and their actions. In this way, even if certain data packets need to perform similar (or even identical) actions, the data packets are processed on an individual basis.

[0037] In the field of high-performance computing environments, high-speed data transmission across networks presents significant challenges. Some of these challenges relate to the steering of data packets. As mentioned above, data packet steering involves decision-making processes related to where an incoming packet should be transmitted to and which actions to perform on the headers or data in the packets that are being sent or received. Traditionally, steering is implemented by first reading the header information of a data packet and then deciding which actions to take based on given rules. This approach can be resource-intensive and inefficient when a network needs to perform the same or similar actions on a large number of data packets.

[0038] Network devices, such as network interface cards (NICs), play a vital role in improving network efficiency by offloading tasks that are traditionally handled by software in a host processor, thereby saving central processing unit (CPU) cycles. A NIC is a hardware component that connects a computer to a network environment. The NIC helps with network traffic (e.g., data packets) engineering, transmission, and handling. The NIC also supports input / output interrupts, direct memory access interfaces, etc. The NIC can provide a dedicated, full-time network connection for a computer by providing the physical layer needed for communication. For example, the NIC can take the form of a data processing unit (DPU) to facilitate traffic management on the network, improve security, and enhance storage processing capabilities. One specific example of a DPU that can be used is the Nvidia BlueField® processor, which can contain cloud infrastructure processing that frees up host CPU cores to manage application operations rather than infrastructure tasks. Communication can be routed through wired connections (Ethernet), wireless connections (e.g., Wi-Fi), or some combination thereof.

[0039] In systems with multiple users, such as servers hosting virtual machines, the NIC must handle packets destined for or originating from various receivers. To this end, the NIC in the network environment performs packet bootstrapping to ensure that data packets are processed correctly. However, in high-performance computing environments, the processing rate of data packets can become extremely high, which may conflict with network latency requirements and other demands. In such high-performance computing environments, increased bandwidth leads to increased packet sending or receiving rates, necessitating faster bootstrapping decisions. Furthermore, hosts with multiple users (e.g., virtual machines) can receive a wide variety of packets, each potentially requiring unique processing. To efficiently boot and process data packets, networks rely on databases. These databases can be used to identify packet types, identify packet owners, instruct specific actions to be performed on packets, etc. Given the massive number of packets and the extremely high speed required for packet processing, accessing the large database for each packet can become a significant bottleneck. To address these issues, embodiments of the present invention provide apparatus and methods for compressing or densely constructing databases to quickly look up and make decisions regarding packet bootstrapping and processing.

[0040] This disclosure allows for the compression of actions taken when processing multiple data packets related to the same or similar processing actions, as described herein, through dynamic parameter allocation. While conventional solutions process data packet actions on an individual basis, this disclosure allows for reduced resource overhead by dynamically configuring executable sequences that can be used to process multiple data packets related to the same or similar processing actions. In this regard, dynamically configuring executable sequences may include using pre-existing inputs to create executable sequences in real time based on the characteristics of incoming data packets, as described in more detail herein. For example, if a data packet with a processing action similar to and / or identical to another data packet is received, embodiments of the invention specify that an executable sequence can be constructed using stored inputs, and this executable sequence can be used to process subsequent data packets with the same / similar characteristics. Thus, the resources required to process data packets can be reduced compared to conventional operations that process data packets without considering the similarity of actions between data packets.

[0041] Furthermore, as described herein, dynamically configuring executable sequences allows for adjustments to the sequences based on received data packets, enabling them to process subsequent packets. This ability to configure executable sequences based on the incoming data packet stream promotes efficient utilization of data packet processing resources by reducing repetitive data packet processing actions.

[0042] Referring to the accompanying drawings, the following will explain and describe the data grouping process using dynamically allocated arguments. Figure 1As shown, in some embodiments, a user can interact with a user device (e.g., user device 102) to transmit data packets to a data packet processor 104. User device 102 can be a computer, server, web server, database server, file server, laptop, desktop, workstation, auxiliary network device, IoT device, electronic kiosk, mainframe, etc. Data packets can be processed by data packet processor 104 and then transmitted to a target device 106. Target device 106 can be the final destination or intermediate destination of the data packets. In this way, data packet processing within the data packet processor enables the distribution of data packets received from user device 102 to the appropriate target device 106. Target device 106 can be a server, web server, database server, file server, laptop, desktop, workstation, auxiliary network device, IoT device, electronic kiosk, mainframe, etc. In some cases, data packet processor 104 can be part of user device 102, while in other cases, data packet processor can be part of target device 106. In other cases, the data packet processor 104 may be part of other devices or circuitry communicating with the user equipment 102 and / or the target device 106, such as network device 120. In some embodiments, network device 120 may include a network adapter, NIC, switch, etc. In some embodiments, the data packet processor 104, network device 120, or processor 105 may include, but is not limited to, a data processing unit (DPU), such as Nvidia. DPU. Furthermore, in some embodiments, network device 120 and / or data packet processor 104 may include processor 105. For example, processor 105 may be the processor of network device 120 and / or data packet processor 104. Additionally, in some embodiments, the network device may include components such as a NIC, network switch, network gateway, etc. In other words, in some embodiments, the methods, actions, and processes described herein may be implemented using components such as network switches.

[0043] Figure 2 A schematic diagram of an example circuit for processing data packets is shown. For ease of explanation, Figure 2 The circuit is shown as being implemented by network device 120; however, some or all of the circuitry may be included in user equipment 102 and / or target device 106, and / or may be embodied by separate devices communicating with user equipment 102 and / or target device 106, for example, in the absence of a network device. Figure 2 As shown, the circuit may include a processor 105, a memory 114, an input / output circuit 116, and a communication circuit 118. Furthermore, in some embodiments, such as... Figure 2 As shown, the circuit may include a boot table 110.

[0044] Although the term "circuit" used herein with respect to components 105, 114-120 is described in some instances using functional language, it should be understood that a particular implementation necessarily includes the use of specific hardware configured to perform functions associated with the corresponding circuits described herein. It should also be understood that some components of these components 105, 114-120 may contain similar or common hardware. For example, both sets of circuits may utilize the same processor, network interface, storage medium, etc., to perform their related functions, thus eliminating the need for duplicate hardware in each set. In this regard, it should be understood that... Figure 2 Some components of the circuit shown may be packaged together, while others may be packaged separately. Although the term "circuit" should be broadly interpreted to include hardware, in some embodiments, "circuit" may also include software for configuring the hardware. For example, in some embodiments, "circuit" may include processing circuitry, storage media, network interfaces, input / output devices, etc. In some embodiments, other elements of the circuit may provide or complement the functionality of a particular circuit. For example, data packet processor 104 may provide processing functionality, memory 114 may provide storage functionality, communication circuitry 118 may provide network interface functionality, and so on.

[0045] In some embodiments, processor 105 (and / or coprocessor or any other auxiliary processor or processing circuitry otherwise associated with the processor) may communicate with memory 114 via a bus to transfer information between components of the circuitry. Memory 114 may be non-transitory, for example, comprising one or more volatile and / or non-volatile memories, or some combination thereof. In other words, memory 114 may be, for example, an electronic storage device (e.g., a non-transitory computer-readable storage medium). Memory 114 may be configured to store information, data, content, applications, instructions, etc., to enable devices (e.g., user equipment 102 or target device 106) to perform various functions according to exemplary embodiments of this disclosure. Memory 114 may also be configured to provide functionality for disposing of incoming data packets, such as buffering, caching, firmware configuration, etc. Therefore, memory 114 can improve the ability of a network adapter to manage the flow of incoming data packets.

[0046] Furthermore, or alternatively, in some embodiments, processor 105 may use memory 114 to store or access previously collected information. For example, in some embodiments, processor 105 may include hardware, software, firmware, and / or combinations thereof that interact with memory 114 to send, retrieve, update, and / or store data. For example, STE may be stored in memory 114 and accessed by processor 105 as appropriate. Additionally, the boot table may reside on any memory accessible to processor 105, NIC, etc. (e.g., memory 114). In this regard, the boot table may reside on the NIC die, in host memory, or in any other accessible memory 114. In another example, registers and their associated entries may also be stored in memory 114, as will be described in more detail below.

[0047] Despite Figure 2 While shown as a single memory, memory 114 may include multiple memory components. These multiple memory components may be embodied on a single computing device or distributed across multiple computing devices. In various embodiments, memory 114 may include, for example, a hard disk, random access memory, cache, flash memory, optical disc read-only memory (CD-ROM), digital versatile optical disc read-only memory (DVD-ROM), optical disc, circuitry configured to store information, or some combination thereof. Memory 114 may be configured to store information, data, applications, instructions, etc., to enable a device (e.g., user device 102 or target device 106, etc.) to perform various functions according to the example embodiments discussed herein. For example, in at least some embodiments, memory 114 may be configured to buffer data for processing by processor 105. Furthermore, or alternatively, in at least some embodiments, memory 114 may be configured to store program instructions for execution by processor 105. Memory 114 may store information in the form of static and / or dynamic information. This stored information may be stored and / or used by processor 105 or other components in the course of performing their functions.

[0048] Processor 105 can be embodied in a variety of different ways, for example, it can include one or more processing devices configured to execute independently. Alternatively, processor 105 can include one or more processors configured in series via a bus to enable independent instruction execution, pipelining, and / or multithreaded processing. Processor 105 can be embodied in various ways, including one or more microprocessors with accompanying digital signal processors, one or more processors without accompanying digital signal processors, one or more coprocessors, one or more multi-core processors, one or more controllers, processing circuitry, one or more computers, and various other processing elements (including integrated circuits, such as, for example, ASICs (Application-Specific Integrated Circuits) or FPGAs (Field-Programmable Gate Arrays) or some combination thereof). For example, processor 105 can include a DPU, CPU, GPU, network adapter, switch, etc. Furthermore, as... Figure 1 As shown, the data packet processor 104 may include a processor 105. Thus, the data packet processor 104 may include variations of the processor 105 described herein. The term "processing circuitry" is understood to include single-core processors, multi-core processors, multiple processors within a device, and / or remote or "cloud" processors. Therefore, although... Figure 2 The processor 105 shown is a single processor, but in some embodiments, processor 105 may include multiple processors. Multiple processors may be embodied in a single computing device (e.g., Figure 2 The network device 120, user equipment 102, or target device 106 shown herein may be distributed across multiple such devices. Multiple processors may operate and communicate with each other and may be configured collectively to execute the circuitry described herein (e.g., as...). Figure 2 One or more functions of the network device 120, user device 102 or target device 106 shown.

[0049] In one example embodiment, processor 105 may be configured to execute instructions stored in memory 114 or otherwise accessible to processor 105. Alternatively, or additionally, processor 105 may be configured to perform hard-coded functions. Thus, whether configured by hardware, software methods, or a combination of both, processor 105 may represent an entity (e.g., physically embodied in circuitry) capable of performing operations according to embodiments of this disclosure after appropriate configuration. Alternatively, as another example, when processor 105 is embodied as an executor of software instructions, these instructions may be specifically configured to cause processor 105 to perform one or more algorithms and / or operations described herein when executing these instructions. For example, when executed by processor 105, these instructions may enable associated devices (e.g., such as...) Figure 1 The data packet processor 104 shown is as follows:Figure 2 The network device 120, user equipment 102, or target device 106 shown herein performs one or more of the functions described herein. Furthermore, it should be understood that, as Figure 1 The data packet processor 104 shown may include references such as Figure 2 At least some of the components and functions described in the illustrated network device 120 and / or processor 105. Thus, for example, when describing the functions of processor 105, it should be understood that data packet processor 104 can also perform the described functions. As will be described in more detail below, the functions of processor 105 may include executing executable sequences.

[0050] In some embodiments, the circuitry further includes input / output circuitry 116, which can communicate with processor 105 to provide auditory, visual, mechanical, or other outputs, and / or, in some embodiments, to receive indications of input from a user or other source. In this sense, input / output circuitry 116 may include devices for performing analog-to-digital data conversion and / or digital-to-analog data conversion. Input / output circuitry 116 may include, for example, support for displays, touchscreens, keyboards, mice, image capture devices (e.g., cameras), microphones, and / or other input / output mechanisms. Input / output circuitry 116 may include a user interface and may include web user interfaces, mobile applications, kiosks, etc.

[0051] Processor 105 and / or user interface circuitry including processor 105 may be configured to control a display or one or more functions of one or more user interface elements via computer program instructions (e.g., software and / or firmware) stored in memory accessible to processor 105 (e.g., memory 114, etc.). In some embodiments, aspects of input / output circuitry 116 may be reduced compared to embodiments that implement the circuitry as an end-user machine or other types of devices designed for complex user interactions. In some embodiments (similar to other components discussed herein), input / output circuitry may be available from associated device circuitry (e.g., such as...). Figure 2 The input / output circuitry 116 is removed from the network device 120, user equipment 102, or target device 106 shown. The input / output circuitry 116 may communicate with the memory 114, communication circuitry 118, and / or any other components, for example, via a bus. Although more than one input / output circuit and / or other component may be included, to avoid making this disclosure overly complex (e.g., as with other components discussed herein), Figure 2 Only one is shown in the image.

[0052] In some embodiments, the communication circuit 118 includes any device, such as a device or circuit embodied in hardware, software, firmware, or a combination of hardware, software, and / or firmware, configured to receive and / or transmit data from / to a network and / or any other device, circuit, or module associated therewith. In this regard, the communication circuit 118 may include, for example, a network interface for enabling communication with a wired or wireless communication network. For example, in some embodiments, the communication circuit 118 may be configured to receive and / or transmit any data that can be stored in the memory 114 using any protocol available for communication between computing devices. For example, the communication circuit 118 may include one or more network interface cards, antennas, transmitters, receivers, buses, switches, routers, modems, and supporting hardware and / or software, firmware / software, or any other device suitable for enabling communication over a network. Furthermore, or alternatively, in some embodiments, the communication circuit 118 may include circuitry for interacting with an antenna to transmit signals via the antenna or to handle the reception of signals received via the antenna. These signals may be transmitted by the network device 120 using any of a variety of wireless personal area network (PAN) technologies, such as... Versions 1.0 to 5.0, Bluetooth Low Energy (BLE), infrared wireless (e.g., IrDA), ultra-wideband (UWB), inductive wireless transmission, etc. Furthermore, it should be understood that these signals can be transmitted using Wi-Fi, Near Field Communication (NFC), Global Microwave Access Interoperability (WiMAX), or other proximity-based communication protocols. Communication circuitry 118 may additionally or alternatively be connected to memory 114, input / output circuitry 116, and / or... Figure 2 The communication circuit 118 can communicate with any other components shown, for example, via a bus. The communication circuit 118 can also be configured to receive and transmit information using the various components associated with it. Furthermore, the communication circuit 118 can communicate with other devices having a memory that stores information required for processing data packets.

[0053] In addition, such as Figure 2 The boot table 110 shown can be used to determine how to process packets. Boot table 110 may contain data used to match data packets with boot table entries (STEs). For example, packet data may include any fields in the packet, including Media Access Control (MAC) address, Internet Protocol (IP) address, Transmission Control Point (TCP) data, version data, Internet header length, identifier, total length, Time to Live (TTL), source address, etc. These actions may include, but are not limited to, transferring packets to registers, transferring packets to STEs, updating data packet header information, updating data packet payload information, creating executable sequences, creating sequences, etc.

[0054] Therefore, a non-transitory computer-readable storage medium may be configured to store firmware, one or more application programs and / or other software, including instruction and / or other computer-readable program code portions that can be executed to direct associated device circuitry (e.g., such as...). Figure 2 The operation of the network device 120, user equipment 102, or target device 106 shown herein is used to implement various operations, including the examples described herein. Therefore, a series of computer-readable program code portions may be embodied in one or more computer program products and may be used with devices (e.g., such as...) Figure 2 The network device 120, user equipment 102, or target device 106 shown, database, and / or other programmable means are used together to produce the machine-implemented process described herein. It should also be noted that all or part of the information discussed herein may be based on one or more components of the relevant device circuitry (e.g., such as...). Figure 2 The network device 120, user equipment 102, or target device 106 shown receives, generates, and / or maintains data. In some embodiments, one or more external systems, such as remote cloud computing and / or data storage systems, may also be used to provide at least some of the functionality discussed herein.

[0055] Embodiments of this disclosure provide methods, apparatus, and computer program products for data packet processing using dynamic parameter allocation. In apparatus embodiments of this disclosure, a network adapter may be used. The network adapter may include a network interface operatively coupled to a communication network. Furthermore, the network adapter may include packet processing circuitry operatively coupled to the network interface, wherein, upon receiving a data packet via the network interface, the packet processing circuitry may be configured to process the data packet, as described herein. Additionally, a computer program product may be used to process the data packet. The computer program product may include at least one non-transitory computer-readable storage medium storing instructions that, when executed, cause the apparatus to process the data packet, as described herein.

[0056] refer to Figure 3 A data packet processing method may include the following steps. First, in some embodiments, the method may include receiving data packets, as shown in block 302. In an example embodiment, network device 120 can... Figure 2 The communication circuit 118 shown is connected from the user equipment (e.g., Figure 1 User equipment 102 in the middle receives data packets.

[0057] In some embodiments, the method may include storing the group in a register, for example in Figure 2In the example shown, a register is defined in the memory 114 of network device 120. This register may contain all or part of the information associated with the packet. In some embodiments, the method may further include parsing the data packet into discrete parts and storing the discrete parts of the data packet in a register. In this way, the packet can be parsed into multiple sections and stored in the register. Parsing the packet may include separating the header and payload data, distinguishing certain header data from other header data, associating certain data with other data, and so on. For example, the header information and payload information of the data packet may be stored in the register. In this way, the parsed data can be constructed for efficient referencing during packet processing. For example, the parsed data stored in the register may be referenced by the data packet processor 104 during data packet processing.

[0058] like Figure 3 As shown in block 304, data packets can be matched with bootstrap table entries (STEs), where the STE contains actual parameters related to processing the data packets. In some embodiments, the STE (e.g., as...) Figure 1 and Figure 2 The STE 111 shown may be located in a boot table (e.g., boot table 110). For example, in some embodiments, the data packet may include a header, and the STE 111 (which may be stored in...) Figure 2 The memory 114 of the network device 120 shown may also include a set of standard tags. STE 111 may include matching parameters. Matching data packets with STE 111 may include: using the matching parameters to identify one or more segments of the header and comparing one or more segments of the header with the set of standards.

[0059] STE 111 may include a data structure that determines the action to be performed on each data packet. In this way, STE 111 can provide processor 105 with instructions on how to handle, route, and process incoming data packets. For example, as Figure 2 As depicted, network devices can use STE 111 to determine where to route data packets. STE 111 can be based on a specific protocol, such as IP, TCP, or UDP, or specific fields in the header, such as UDP_sport or TCP_dport. The size and complexity of STE 111 can vary depending on network infrastructure, network requirements, network-related equipment, security features, etc. For example, in some embodiments, STE 111 can have a fixed size, such as 64 bytes, and can contain information for determining how to process packets. STE 111 may include: "tags" for matching STE 111 with data packet headers, and action fragments listing specific actions to be performed on the packets.

[0060] The tag in STE 111 may contain a specific pattern or set of criteria used to identify packets that should be handled in a particular way. This tag can be compared to a corresponding portion of the header of each incoming packet. The portion of the packet header used for comparison can be defined by a "matching parameter" located within STE 111. The matching parameter identifies which segment of the packet header should be compared to the tag. For example, the matching parameter can identify the Media Access Control (MAC) address segment of the data packet header as the segment to be used for comparison. In this example, the tag in STE 111 can be compared to the MAC address of the data packet to determine how the data packet should be handled.

[0061] In some embodiments, STE 111 may include a match size, which indicates the size of the tag. Thus, the match size can identify that the tag should be a specific size, such as four double words. The match size can also identify the size of the corresponding header portion of the packet. Since the tag and header fragments must match to be considered a "hit," their sizes should be equal. Therefore, the match size can indicate the size of the tag and the size of the header fragment of the packet. For example, STE 111 stored in memory 114 may contain a specific match size. In this example, the corresponding header portion of an incoming data packet can be compared with the match size of STE 111.

[0062] In some embodiments, STE 111 may also include a miss pointer, which identifies a standby procedure if a data packet does not match STE 111. A mismatch may represent a discrepancy between an element of STE 111 and a corresponding element of the data packet (e.g., a "miss"). For example, a miss pointer may be used if the MAC address of the data packet does not match a corresponding MAC address in STE 111.

[0063] Furthermore, in some embodiments, STE 111 may also include a miss pointer configured to identify a spare STE, wherein the spare STE contains spare actual parameters related to processing data packets. The spare STE may, for example, be stored in the same memory 114 where STE 111 is stored, or may reside in... Figure 1The data packet processor 104 shown is accessible in different memories. In some embodiments, a miss pointer may point to an alternative STE with a similar label to the original STE 111. Thus, the miss pointer may contain reasoning to understand the label of the original STE 111 and a specific fragment of the data packet, and point to an alternative STE with similar matching conditions. In other words, the miss pointer may select an alternative STE based on the label of the original STE 111, rather than randomly selecting an alternative STE. However, in some embodiments, the miss pointer may randomly select an alternative STE. In some embodiments, the alternative STE identified by the miss pointer may then be referenced to its own label, matching parameters, and match size to determine a match between the alternative STE and the packet. Furthermore, in some embodiments, the method may include matching the data packet with an alternative STE. For example, network device 120 may match data packets with alternative STEs.

[0064] STE 111 can also include arguments to be assigned to a sequence (a list of instructions on how to process the data packet). When a data packet matches an STE 111 tag (e.g., "hit"), a sequence pointer can be used to retrieve a sequence of actions to be performed. The retrieved sequence can contain a set of executable actions that can be used to process the data packet, as described in more detail below.

[0065] In some embodiments, STE 111 may include a sequence pointer, wherein the method may further include acquiring a sequence identified by the sequence pointer, wherein the sequence includes a sequence of executable actions. Furthermore, in some embodiments, the method may also include receiving one or more inputs from at least one of a register, actual parameters, or inline with the sequence identified by the sequence pointer.

[0066] For example, a sequence pointer could be located within STE 111. When a match is identified (e.g., a match between an STE label and a specific segment of the header), the sequence pointer can be used to retrieve the sequence. The sequence pointer can point to a sequence containing instructions on how to process the packet. Thus, the sequence can be a generic sequence of actions that should be used to process the packet. For example, if one data packet ultimately needs to have the value 16 added to its Time-to-Live (TTL) field, and another data packet needs to have the value 17 added to its TTL field, the sequence might contain the "add" functionality for the TTL fields of both packets. Therefore, the sequence typically indicates the addition functionality for the TTL, but may not contain the specific value to be added.

[0067] like Figure 3 As shown in block 306, the method may include dynamically configuring executable sequences. For example, network device 120 (such as...) Figure 2The processor 105 (shown) can dynamically configure the executable sequence associated with the data packet by creating, modifying, reconfiguring, or otherwise constructing an executable sequence for processing a specific data packet. For example, once the sequence is obtained, such as... Figure 1 As shown, the data packet processor 104 can then construct (e.g., dynamically configure) an executable sequence that can be used (e.g., sent to a processor in a target device) to process data packets. The input to the executable sequence can come from three sources: the acquired sequence itself (e.g., input inlined with the sequence), STE 111, and / or registers.

[0068] If the input to the executable sequence comes from an acquired sequence, the executable sequence can be dynamically configured based on that sequence. In other words, data from the sequence can be used to configure the executable sequence. In other cases where the executable sequence is dynamically configured based on a STE, data from the STE can be used to configure the executable sequence. Furthermore, the executable sequence can be dynamically configured based on input from registers. Thus, data from data packets stored in registers can be used to dynamically configure the executable sequence.

[0069] Furthermore, in some embodiments, the method may also include dynamically configuring executable sequences to process data packets using the sequence identified by a sequence pointer. For example, network device 120 may retrieve a sequence stored in memory 114. Processor 105 may determine which sequence should be retrieved. In this example, processor 105 may dynamically configure executable sequences to process data packets using the sequence identified by a sequence pointer. Figure 4 As shown, the data packet processor 104 (e.g.) Figure 1 As shown, sequence 402 can be used to dynamically configure executable sequence 406.

[0070] For example, refer to Figure 4 Input 407 may have input sources 404, including register 401, acquired sequence 402, and / or STE 403. Input 407 may be organized into one or more segments (e.g., islands), each segment possibly derived from up to two of the aforementioned input sources 404. For example, executable sequence 406 may include input 407 received from register 401 and acquired sequence 402.

[0071] Inputs 407 used for dynamically configuring executable sequence 406 can be organized into various sections of the executable sequence, including a method section 408, a register selector 410, num_bits 412, and offsets 414. In some embodiments, the method section 408 of the executable sequence can indicate input sources 404 from which input 407 should be selected (e.g., up to two of register 401, the acquired sequence 402, and / or STE 403). Selected inputs 407 can be categorized into major bits 416 and minor bits 418. For example, if the inputs 407 of the executable sequence have two sources, one being the acquired sequence 402 and the other being register 401, then inputs from the acquired sequence 402 can be grouped together with inputs from register 401. In this example, as... Figure 4 As shown, the method section 408 of the executable sequence can indicate that the input selected from the acquired sequence 402 should be classified as major bit 416, while the input selected from the register 401 should be classified as minor bit 418.

[0072] Furthermore, if applicable, register selector 410 can select an appropriate location within register 401 as input 407. In other words, in instances where one of the input sources is register 401, register selector 410 can indicate from which location in register 401 the corresponding input 407 should be selected (e.g., from which row of the register the corresponding input should be selected).

[0073] These segments can be further restricted in size (e.g., num_bits) and starting position (e.g., offset). num_bits 412 can indicate how many principal bits 416 should be selected from a given source. For example, if the acquired sequence 402 is indicated as an input source 404 for principal bits 416, then num_bits 412 can specify the number of principal bits 416 that should be extracted from the acquired sequence 402. Figure 4 In the example shown, num_bits 412 can indicate that 9 major bits 416 should be selected.

[0074] Offset 414 can indicate the location where the major bit 416 should be stored relative to the beginning of a line in executable sequence 406. For example, as Figure 4 As shown, offset 414 in executable sequence 406 can indicate that the major bit 416 should begin at the sixth position of the corresponding line of executable sequence 406. After the major bit 416 has been stored, minor bits 418 can be stored at unclosed positions in a given line of executable sequence 406, either before or after the position of the major bit 416, thus creating a sequence as shown in the diagram. Figure 4 The "island" shown is the main position.

[0075] In some embodiments, and in instances using an alternative STE, the method may include: dynamically configuring an executable sequence to process data packets using at least alternative arguments. For example, network device 120 may dynamically configure an executable sequence to process data packets using at least alternative arguments.

[0076] like Figure 3 As shown in block 308, the method may include executing an executable sequence. For example, as described above, the executable sequence may contain specific instructions (e.g., actual parameters) for processing data packets. Thus, the executable sequence can be sent to a processor, for example... Figure 1 The example illustrates a processor for target device 106, which can execute executable sequences and perform necessary actions on data packets. Therefore, execution can include performing relevant actions and corresponding arguments on the data packets. These actions might include routing packets to a specific destination, modifying packets, performing security checks, and so on.

[0077] In one example, a network device might receive two data packets. The first data packet might have a first source, while the second data packet might have a different second source. These data packets can be parsed and stored in registers (e.g., ...). Figure 4 The data packets can be matched with corresponding STEs, which may have arguments for adding values ​​to the packet header. For example, an STE for the first packet might add 16 to the Time-to-Live (TTL) field of the first packet, while an STE for the second packet might add 17 to the TTL field of the second packet. The acquired sequence can be the same sequence containing the "add" action (e.g., ...). Figure 4 Sequence 402 in the sequence). Next, the executable sequences configured for the group can be obtained from three sources (e.g., Figure 4 The input source (404) can receive up to two inputs: a register, a STE, and / or a sequence. Inputs can be grouped and stored in executable sequences, thus configuring each executable sequence to process a corresponding data packet. However, inputs can alternatively be stored in registers, thus using the same executable sequence, with each packet having a corresponding value in the register. The data packets and their executable sequences can then be sent to the target device (e.g., ...). Figure 1 The target device 106 shown can have its processor process corresponding data packets using an executable sequence. For example, as a result of executing the executable sequence, actions can be performed on the corresponding data packets, including routing the packets to a specific destination, modifying the packets, performing security checks on the packets, and so on.

[0078] In some embodiments, the steps described herein can be performed by a computer program product. This computer program product can be used to process data packets, wherein the computer program product includes a non-transitory computer-readable storage medium storing at least one program instruction. For example, refer to... Figure 2 As shown, network device 120 may include a computer program product stored in memory 114, wherein the computer program product can be used to process data packets received by the network device. When these program instructions are executed, the computer program product can cause the device (e.g., network device 120) to perform the steps described above. Thus, the program instructions of the computer program product, when executed, can perform the same or similar steps as the methods described herein.

[0079] Those skilled in the art, having benefited from the teachings presented in the foregoing description and the accompanying drawings, will conceive of numerous modifications and other embodiments of the disclosure described herein. Although the drawings illustrate only some components of the methods and systems described herein, it should be understood that various other components may also be part of any optical component or optoelectronic element. Furthermore, in some cases, the above methods may include fewer steps, while in others they may include additional steps. In some cases, the steps of the above methods can be modified in any order and in any combination.

[0080] Therefore, it should be understood that this disclosure is not limited to the specific embodiments disclosed herein, and that modifications and other embodiments are intended to be included within the scope of the appended claims. Although specific terms are used herein, they are used only in a general and descriptive sense and not for limiting purposes.

Claims

1. A method for processing data grouping, comprising: Receive data packets; The data group is matched with a bootstrap table entry, wherein the bootstrap table entry includes actual parameters associated with processing the data group and a pointer to an executable sequence; The executable sequence is dynamically configured to process the data packets using at least the stated parameters; and The executable sequence is executed to process the data packets.

2. The method according to claim 1, wherein, The data group includes a header, wherein the bootstrap table entry further includes: Includes a standard set of tags; and Matching parameters, The process of matching the data group with the bootstrap table entries includes: using the matching parameters to identify one or more segments of the header, and comparing the one or more segments of the header with the set of criteria.

3. The method according to claim 2, wherein, The guide table entry also includes a match size, wherein the match size indicates the size of the label.

4. The method according to claim 3, wherein, The matching size is 4 double words.

5. The method according to claim 2, wherein, The boot table entry also includes: A missed pointer, configured to identify an alternate boot table entry, wherein the alternate boot table entry includes alternate actual parameters related to processing the data packet; The method further includes: Match the data groups with the alternate boot table entries; Dynamically configure the executable sequence to process the data packets using at least the aforementioned alternative parameters; and The executable sequence is executed to process the data packets.

6. The method according to claim 1, wherein, The boot table entry also includes: A sequence, wherein the sequence includes a sequence of executable actions; and A sequence pointer used to identify the sequence; The method further includes: Receive one or more inputs from at least one of the actual parameters or the sequence identified by the sequence pointer; and The executable sequence is dynamically configured using the executable action sequence and the one or more inputs.

7. The method according to claim 1, wherein, The method further includes: The data groups are parsed into discrete parts; and The discrete portions of the data group are stored in a register.

8. The method according to claim 7, wherein, The bootstrap table entry also includes a sequence pointer, wherein the method further includes: Obtain the sequence identified by the sequence pointer, wherein the sequence includes a sequence of executable actions; Receive one or more inputs from at least one of the register, the actual parameters, or the sequence identified by the sequence pointer; and The executable sequence is dynamically configured using the executable action sequence and the one or more inputs.

9. A network device, comprising: A network interface that is operatively coupled to a communication network; as well as A packet processing circuit, operatively coupled to the network interface, wherein, upon receiving a data packet via the network interface, the packet processing circuit is configured to: The data group is matched with a boot table entry, wherein the boot table entry includes actual parameters associated with processing the data group and a pointer to an executable sequence; The executable sequence is dynamically configured to process the data packets using at least the stated parameters; as well as The executable sequence is executed to process the data packets.

10. The network device according to claim 9, wherein, The data group includes a header, wherein the boot table entry further includes: Includes a standard set of tags; and Matching parameters, The grouping processing circuitry is configured to identify one or more segments of the header by using the matching parameters and to compare the one or more segments of the header with the set of criteria, thereby matching the data groups with the bootstrap table entries.

11. The network device according to claim 10, wherein, The guide table entry also includes a match size, wherein the match size indicates the size of the label.

12. The network device according to claim 10, wherein, The boot table entry also includes: A pointer was missed; it is configured to identify an alternate bootstrap table entry, wherein the alternate bootstrap table entry includes alternate actual parameters associated with processing the data packet. The packet processing circuit is further configured to: The data groups are matched with the backup boot table entries; Dynamically configure the executable sequence to process the data packets using at least the aforementioned alternative parameters; and The executable sequence is executed to process the data packets.

13. The network device according to claim 9, wherein, The boot table entry also includes: A sequence, wherein the sequence includes a sequence of executable actions; and A sequence pointer, used to identify the sequence; The packet processing circuit is further configured as follows: Receive one or more inputs from at least one of the actual parameters or the sequence identified by the sequence pointer; and The executable sequence is dynamically configured using the executable action sequence and the one or more inputs.

14. The network device according to claim 9, wherein, The packet processing circuit is further configured to: The data is parsed into discrete parts; and The discrete portions of the data group are stored in a register.

15. The network device according to claim 14, wherein, The bootstrap table entry also includes a sequence pointer, wherein the packet processing circuitry is further configured to: Obtain the sequence identified by the sequence pointer, wherein the sequence includes a sequence of executable actions; Receive one or more inputs from at least one of the register, the actual parameters, or the sequence identified by the sequence pointer; and The executable sequence is dynamically configured using the executable action sequence and the one or more inputs.

16. The network device according to claim 9, wherein, The network device also includes: Network adapter, Data processing unit (DPU), or Network switch.

17. A computer program product for processing data packets, the computer program product comprising at least one non-transitory computer-readable storage medium storing program instructions, which, when executed, cause the means to: Receive data packets; The data group is matched with a boot table entry, wherein the boot table entry includes actual parameters associated with processing the data group and a pointer to an executable sequence; The executable sequence is dynamically configured to process the data packets using at least the stated parameters; and The executable sequence is executed to process the data packets.

18. The computer program product according to claim 17, wherein, The data group includes a header, wherein the boot table entry further includes: Includes a standard set of tags; and Matching parameters, When the program instructions are executed, the device identifies one or more segments of the header by using the matching parameters and compares the one or more segments of the header with the set of criteria, and matches the data group with the bootstrap table entries.

19. The computer program product according to claim 18, wherein, The guide table entry also includes a match size, wherein the match size indicates the size of the label.

20. The computer program product according to claim 18, wherein, The boot table entry also includes: A pointer was missed; it is configured to identify an alternate bootstrap table entry, wherein the alternate bootstrap table entry includes alternate actual parameters associated with processing the data packet. When the program instructions are executed, the device: The data groups are matched with the backup boot table entries; Dynamically configure the executable sequence to process the data packets using at least the aforementioned alternative parameters; and The executable sequence is executed to process the data packets.

21. The computer program product according to claim 17, wherein, The boot table entry also includes: A sequence, wherein the sequence includes a sequence of executable actions; and A sequence pointer, used to identify the sequence; When the program instructions are executed, the device: Receive one or more inputs from at least one of the actual parameters or the sequence identified by the sequence pointer; and The executable sequence is dynamically configured using the executable action sequence and the one or more inputs.

22. The computer program product according to claim 17, wherein, When the program instructions are executed, the device: The data is parsed into discrete parts; and The discrete portions of the data group are stored in a register.

23. The computer program product according to claim 22, wherein, The boot table entry also includes a sequence pointer, wherein the program instructions, when executed, cause the device to: Obtain the sequence identified by the sequence pointer, wherein the sequence includes a sequence of executable actions; Receive one or more inputs from at least one of the register, the actual parameters, or the sequence identified by the sequence pointer; and The executable sequence is dynamically configured using the executable action sequence and the one or more inputs.

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