Preparation method of high-brightness LED chip

By patterning the P-GaN ohmic contact layer and transparent conductive layer, the problems of light absorption and total internal reflection in GaN-based LED chips are solved, improving chip brightness and light extraction efficiency.

CN121751828APending Publication Date: 2026-03-27JUCAN PHOTOELECTRIC TECH (SUQIAN) CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-28
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

In GaN-based LED chips, the high concentration of metal doping in the P-GaN layer causes some light to be absorbed when light passes through, resulting in brightness loss. At the same time, the problem of total internal reflection has not been effectively solved, which limits the light extraction efficiency of the chip.

Method used

By patterning the P-GaN ohmic contact layer and transparent conductive layer, a concave or inverted conical morphology is formed, reducing the light absorption area and increasing the light emission path.

Benefits of technology

It improves the brightness of LED chips and enhances light extraction efficiency, specifically by increasing luminous efficacy by 0.5% to 0.2%.

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Abstract

The invention discloses a high-brightness LED chip preparation method, and relates to an LED chip preparation method, and the method comprises the preparation of an epitaxial layer, a P / N step, a current blocking layer, a transparent conductive layer and a metal electrode layer. Through the change of a transparent conductive layer patterning processing technology, not only is the transparent conductive layer patterned, but also a P-GaN ohmic contact layer is patterned; a large number of areas which are not shielded by the ohmic contact layer are created while current expandability is guaranteed, light absorption of the contact layer is reduced, and light can be effectively emitted out or reflected out. And the light extraction efficiency of the LED chip is improved by processing the light absorption problem on the surface of the P-GaN.
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Description

Technical Field

[0001] This invention relates to LED chip fabrication methods, specifically to a method for fabricating high-brightness LED chips. Background Technology

[0002] In GaN-based LED chips, the P-GaN layer is the critical path for photon emission (electron-hole pairs recombine in the active region to generate photons, which must pass through the P-GaN layer and ITO to be emitted). Because the refractive index of GaN is much higher than that of air and ITO (indium tin oxide, commonly known as a transparent conductive layer), a large portion of the light undergoes total internal reflection at the P-GaN and ITO interface, confining the light inside the chip and ultimately being absorbed and converted into energy. Simultaneously, to ensure good ohmic contact, the P-GaN surface is typically doped with a high concentration of metal, generating a large number of free holes. This causes some of the photons to be absorbed as they pass through, resulting in significant brightness loss.

[0003] Currently, there are designs for ITO apertures to alleviate the total internal reflection problem, but the high concentration of metal doping on the P-GaN surface has not been treated, which causes some light to be absorbed when light passes through, resulting in a loss of brightness. Summary of the Invention

[0004] To address the shortcomings of the prior art, this invention provides a method for fabricating a high-brightness LED chip, which improves the light extraction efficiency of the LED chip by addressing the light absorption problem on the P-GaN surface.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A method for fabricating a high-brightness LED chip specifically includes the following steps: (1) Provide an LED light-emitting diode wafer and fabricate an epitaxial layer on a substrate; (2) Etching is performed on the epitaxial layer to obtain P and N steps, so that N-GaN is exposed on the surface; (3) Deposit another layer of SiO2 or SiNx to prepare a current blocking layer; (4) A transparent conductive layer is prepared on the current blocking layer, and a photoresist is coated on the surface of the transparent conductive layer. The P-GaN ohmic contact area coated with photoresist is exposed using a photomask. After exposure, the photoresist in the exposed area is removed using a developer to form a pattern corresponding to the photomask pattern. Then, the transparent conductive layer and P-GaN ohmic contact layer in the photoresist opening are etched to form sidewalls. Then, the metal contact area of ​​the transparent conductive layer is exposed a second time. Finally, the excess residue of the sidewalls and the metal contact area of ​​the transparent conductive layer is removed by wet etching. (5) Fabricate a metal electrode layer on the transparent conductive layer; (6) Prepare an insulating protective layer for the outermost layer.

[0006] Preferably, in step (4), the opening diameter is between 4µm and 20µm, and the distance between the holes is... Between 5 and 50 μm.

[0007] Preferably, the sidewall of step (4) has a concave or inverted conical shape.

[0008] Preferably, the etching depth of the P-GaN ohmic contact layer in step (4) is controlled between 50 and 200 Å.

[0009] Compared with the prior art, the beneficial effects of the present invention are: This invention not only patterns the transparent conductive layer, but also patterns the P-GaN ohmic contact layer. While ensuring the current can be expanded, it creates a large number of areas that are not blocked by the ohmic contact layer, reducing the absorption of light by the contact layer and allowing light to be effectively emitted or reflected. Detailed Implementation

[0010] To further illustrate the technical means and effects of the present invention in achieving the intended purpose, the following detailed description of the specific implementation methods, structures, features and effects of the present invention, in conjunction with preferred embodiments, is provided below.

[0011] The present invention provides a method for fabricating a high-brightness LED chip, which specifically includes the following steps: (1) Provide an LED light-emitting diode wafer, on which an epitaxial layer is fabricated, comprising N-GaN, quantum well, and P-GaN, wherein the surface of the P-GaN has an ohmic contact layer doped with metal; (2) Etching is performed on the epitaxial layer to obtain P and N steps, so that N-GaN is exposed on the surface; (3) Deposit another 500~5000A SiO2 or SiNx layer to prepare a current blocking layer; (4) A transparent conductive layer is prepared on the current blocking layer, and the transparent conductive layer is patterned. The existing process involves fabricating a transparent conductive layer on a current blocking layer. The transparent conductive layer is typically made of materials such as ITO or ZnO, with a thickness of 5nm-200nm. Then, a layer of photoresist is coated on the surface of the transparent conductive layer. A photomask is used, and after exposure, the photoresist in the exposed area is removed using a developer to form a pattern corresponding to the pattern of the photomask. Finally, a patterned transparent conductive layer is formed by wet etching.

[0012] The process of this invention is as follows: A transparent conductive layer is fabricated on a current blocking layer. The transparent conductive layer is typically made of materials such as ITO or ZnO, with a thickness of 5nm-200nm. Then, a photoresist layer is coated onto the surface of the transparent conductive layer. Using a photomask, the non-metallic ohmic contact area of ​​the wafer coated with photoresist is exposed. After exposure, the photoresist in the exposed area is removed using a developer, forming a pattern corresponding to the photomask pattern. A dry etching process is then used to remove the transparent conductive layer and P-GaN ohmic contact area from the top layer of the wafer through the photoresist openings. The contact layer is etched away to form a concave or inverted conical morphology. Then, the transparent conductive layer in the metal contact area is exposed a second time. Then, wet etching is used to remove the concave or inverted conical sidewalls and the metal ohmic contact area, as well as the transparent conductive layer, formed by the reaction treatment, to form a patterned transparent conductive layer (wherein the above-mentioned: the aperture diameter is between 4um and 20um, the spacing between apertures is between 5 and 50um; the dry etching depth of P-GaN is controlled between 50 and 200 Å; the cross-sectional shape after etching can be inverted conical, trapezoidal, etc.). (5) Fabricate a metal electrode layer on the transparent conductive layer; (6) Prepare an insulating protective layer for the outermost layer.

[0013] Example 1: A transparent conductive layer is prepared on a current blocking layer. Then, a photoresist layer is coated on the surface of the transparent conductive layer. A photomask is used to expose the non-metallic ohmic contact area of ​​the wafer coated with photoresist. After exposure, the photoresist in the exposed area is removed using a developer to form a pattern corresponding to the pattern of the photomask. The aperture diameter is 6 μm and the spacing between apertures is 15 μm. A dry etching process is used to etch away the transparent conductive layer and P-GaN ohmic contact layer that were removed through the photoresist apertures on the top layer of the wafer, forming a concave or inverted conical morphology. The P-GaN is etched to a depth of 150 Å. The transparent conductive layer of the metal contact area is then exposed a second time. Finally, a wet etching process is used to react and remove the concave or inverted conical sidewalls of the dry etched area, the metal ohmic contact area, and the transparent conductive layer.

[0014] Example 2: A transparent conductive layer is prepared on a current blocking layer. Then, a photoresist is coated on the surface of the transparent conductive layer. Using a photomask, the non-metallic ohmic contact area of ​​the wafer coated with photoresist is exposed. After exposure, the photoresist in the exposed area is removed using a developer to form a pattern corresponding to the photomask pattern. The aperture diameter is 6 μm and the spacing between apertures is 50 μm. A dry etching process is used to etch away the transparent conductive layer and P-GaN ohmic contact layer that were removed through the photoresist apertures on the top layer of the wafer, forming a concave or inverted conical morphology. The dry etching depth of P-GaN is 80 Å. The transparent conductive layer of the metal contact area is then exposed a second time. Finally, wet etching is used to remove the concave or inverted conical sidewalls of the dry-etched area, the metal ohmic contact area, and the transparent conductive layer.

[0015] Serial Number Product Dimensions Test current Test brightness Test voltage Light effect enhancement Old plan 26mil * 39mil 60mA 153.5mW 2.718V Current level Example 1 26mil * 39mil 60mA 154.6mW 2.724V 0.50% Example 2 26mil * 39mil 60mA 154.0mW 2.721V 0.20% As shown in the table above, compared with the original transparent conductive layer fabrication process, when the hole diameter is 6µm, the spacing is 15µm, and the P-GaN etching depth is 150Å, the luminous efficacy of the present invention can be improved by 0.5% at 60mA for a 26mil*39mil chip; when the hole diameter is 6µm, the spacing is 50µm, and the P-GaN etching depth is 80Å, the luminous efficacy of the 26mil*39mil chip can be improved by 0.2% at 60mA. The above description of the embodiments is provided to enable those skilled in the art to understand and apply them. This invention is applicable. Those skilled in the art will readily make various modifications to these embodiments and apply the general principles described herein to other embodiments without inventive effort. Therefore, this invention is not limited to the above embodiments, and any improvements and modifications made by those skilled in the art based on the disclosure of this invention without departing from its scope should be within the protection scope of this invention.

Claims

1. A method for fabricating a high-brightness LED chip, characterized in that: Specifically, the following steps are included: (1) Provide an LED light-emitting diode wafer and fabricate an epitaxial layer on a substrate; (2) Etching is performed on the epitaxial layer to obtain P and N steps, so that N-GaN is exposed on the surface; (3) Deposit another layer of SiO2 or SiNx to prepare a current blocking layer; (4) A transparent conductive layer is prepared on the current blocking layer, and a photoresist is coated on the surface of the transparent conductive layer. The P-GaN ohmic contact area coated with photoresist is exposed using a photomask. After exposure, the photoresist in the exposed area is removed using a developer to form a pattern corresponding to the photomask pattern. Then, the transparent conductive layer and P-GaN ohmic contact layer in the photoresist opening are etched to form sidewalls. Then, the metal contact area of ​​the transparent conductive layer is exposed a second time. Finally, wet etching was used to remove excess residue from the metal contact area of ​​the sidewalls and transparent conductive layer. (5) Fabricate a metal electrode layer on the transparent conductive layer; (6) Prepare an insulating protective layer for the outermost layer.

2. The method for fabricating a high-brightness LED chip as described in claim 1, characterized in that: In step (4), the opening diameter is between 4um and 20um, and the distance between holes is between 5um and 50um.

3. The method for fabricating a high-brightness LED chip as described in claim 1, characterized in that: The sidewall of step (4) is concave or inverted conical in shape.

4. The method for fabricating a high-brightness LED chip as described in claim 1, characterized in that: In step (4), the etching depth of the P-GaN ohmic contact layer is controlled between 50 and 200 Å.