Electric field sensor field enhancement cover plate and preparation method thereof

CN121757799APending Publication Date: 2026-03-31AEROSPACE INFORMATION RES INST CAS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-30
Publication Date
2026-03-31

AI Technical Summary

Technical Problem

Existing packaging processes for electric field sensors are difficult to achieve wafer-level mass production. Traditional cover plate fabrication is complex and has a low yield, which cannot effectively improve sensor sensitivity.

Method used

A bonding process is used to replace glass reflow and grinding and polishing. An insulating support structure layer is prepared by photolithography and etching processes, which simplifies the process flow and improves the flatness of the bonding surface. Laser cutting and metal bonding layers are combined to stabilize and enhance the structure.

Benefits of technology

This approach achieves higher yield and improved stability for wafer-level electric field sensors, simplifies process steps, reduces fabrication costs, and enhances sensor sensitivity and structural stability.

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Abstract

The invention discloses an electric field sensor field enhancement cover plate and a preparation method thereof, and belongs to the technical field of micro electro mechanical system manufacturing. The method comprises the following steps: etching a groove on the silicon surface of a silicon wafer or an insulator to form a reinforcing structure; preparing a flat to-be-bonded surface through a bonding and thinning process; performing laser cutting on the glass sheet to form a reserved hole; and bonding the glass sheet and the bonding surface to form the cover plate. Optional steps include sputtering a getter and a metal bonding layer. The bonding process is used for replacing traditional glass backflow, two photoetching steps are omitted, the problems that glass filling is uneven and the surface is uneven are solved, the technological process is remarkably simplified, and the yield is improved. The method is suitable for wafer-level electric field sensor packaging, and the sensitivity and reliability are improved.
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Description

Technical Field

[0001] This invention relates to the field of microelectromechanical systems (MEMS) manufacturing technology, specifically to an electric field sensor field enhancement cover plate and its preparation method, which is particularly suitable for the integrated manufacturing of wafer-level vacuum packaging and electric field enhancement structures. Background Technology

[0002] Electric field detection has wide applications in aerospace, meteorology, power, hazardous chemicals, and industrial production. Various electric field sensors developed using microelectromechanical systems (MEMS) are characterized by their small size, light weight, and low cost, making them an important development direction in the field of electric field detection and attracting increasing application and attention in recent years. With the continuous expansion of electric field sensor applications, the requirements for sensor sensitivity are also gradually increasing. Therefore, improving the sensitivity of electric field sensors is currently a key focus of their development. Common methods for improving sensitivity include modifying the sensor's sensing mechanism or optimizing its structure to achieve a greater response to the measured electric field. However, as the discovery of new sensing mechanisms becomes increasingly difficult and the optimization of sensing structures becomes more sophisticated, the improvement of electric field sensor sensitivity is gradually reaching a bottleneck.

[0003] The existing technology has the following limitations:

[0004] 1. Device-level packaging cover: Traditional packaging processes are difficult to achieve wafer-level mass production, which restricts production efficiency and cost control.

[0005] 2. Wafer-level packaging technology: such as the vacuum packaging cover proposed in patent CN202010943851.5, although it simplifies the process, it lacks a sensitivity-enhancing structure and cannot directly improve sensitivity.

[0006] 3. Sensitized Structure Integration Process: For example, patent 202410325708.8 uses a glass reflow process to fill the etched grooves with glass to form an insulating support layer. This approach has significant drawbacks: Uneven glass filling: Reflowed glass is prone to pores or collapse, resulting in poor surface flatness. High process complexity: It requires two photolithography etching processes (for windowing and metallization), and after grinding and polishing, the difference in surface height leads to uneven photoresist coating, resulting in insufficient yield. Thermal stress issues: The mismatch in the thermal expansion coefficients of glass and silicon causes structural warping.

[0007] Therefore, there is an urgent need to develop a wafer-level cover plate fabrication method that is simple to process, has a high yield, and can stably integrate electric field sensitization structures. Summary of the Invention

[0008] Existing packaging covers for electric field sensors are mainly device-level packaging covers. Wafer-level cover technology for electric field sensors is still in its early stages. A wafer-level cover was proposed in a micro electric field sensor wafer-level packaging enhancement and noise reduction structure (application number: CN202010943851.5), which has a simple process, but the cover is only used for vacuum packaging of the device to reduce noise and enhance sensitivity; it does not contain the enhancement structure itself. In contrast, the invention of a wafer-level enhanced electric field sensor and its fabrication method (application number: 202410325708.8) can significantly improve sensor sensitivity by introducing a cover enhancement structure while achieving wafer-level vacuum packaging. However, the current invention's reinforcing cover plate fabrication scheme involves photolithography etching, glass reflow, and grinding / polishing to prepare the insulating support structure layer. The glass reflow effect within the etching pits is difficult to guarantee, and after grinding / polishing, two more photolithography etching processes are required to obtain the final field-reinforcing cover plate. This process is complex, and the adhesive application effect is poor during the second photolithography due to the surface height difference. This invention optimizes the existing process, replacing the glass reflow and grinding / polishing processes with only one or two bonding operations to prepare the insulating support structure layer, eliminating the need for two subsequent photolithography steps. Its process flow is significantly simplified compared to previous schemes, resulting in lower fabrication errors and a higher yield.

[0009] The technical solution of the present invention is as follows:

[0010] A method for fabricating a field-enhancing cover plate for an electric field sensor, comprising:

[0011] S1. Preparation of the main body of the field-reinforced cover plate:

[0012] S111. A groove is etched on the surface of the first silicon wafer using photolithography to serve as the reserved position for the insulating support structure layer, thereby obtaining an enhanced structure.

[0013] S121. The upper surface of the first silicon wafer is reversed and bonded to the upper surface of the second silicon wafer by a bonding process to obtain a bonded wafer;

[0014] S131. Thinning is performed from the lower surface of the first silicon wafer through a thinning process until the upper surface of the second silicon wafer is exposed, ensuring the flatness and cleanliness of the bonding surface;

[0015] S2. Preparation of the field-reinforced cover plate insulation support structure layer:

[0016] S21. Holes are cut into the glass sheet using laser cutting technology as reserved spaces for reinforcement structure, ensuring the flatness and cleanliness of the glass sheet to be bonded.

[0017] S3. The lower surface of the glass sheet is bonded to the bonding surface of the bonding sheet through a bonding process to obtain a field-enhancing cover plate.

[0018] In the above technical solution, step S1 is replaced by:

[0019] S112. Grooves are etched on the upper surface of the silicon-on-insulator device layer using photolithography to reserve the position of the insulating support structure layer, thereby obtaining the enhanced structure.

[0020] S122. The buried oxide layer exposed on silicon on the insulator is removed by etching process, so that the upper surface of the substrate layer can be used as the bonding surface.

[0021] In the above technical solution, the corrosion process includes hydrofluoric acid vapor phase corrosion or hydrofluoric acid wet corrosion.

[0022] In the above technical solution, the thinning process in step S131 includes mechanical grinding, chemical mechanical polishing, wet chemical etching, or dry etching.

[0023] In the above technical solution, the above method also includes:

[0024] S4. Use a hard mask to sputter or evaporate the getter on the surface of the reinforced structure.

[0025] In the above technical solution, the above method also includes:

[0026] S5. Sputter or evaporate a metal bonding layer on the surface of a glass slide using a hard mask.

[0027] In the above technical solution, the metal bonding layer material includes gold, tin or copper.

[0028] In the above technical solution, the getter material is a titanium, zirconium, or vanadium-based non-evaporative getter.

[0029] In the above technical solution, the area of ​​the sputtered getter covers the reinforced structure surface and sidewalls.

[0030] The present invention also discloses an electric field sensor field enhancement cover plate prepared according to the above-described preparation method.

[0031] Beneficial effects:

[0032] Existing technologies (e.g., wafer-level enhanced electric field sensor and its fabrication method 202410325708.8) can significantly improve sensor sensitivity by introducing a cover plate enhancement structure while achieving wafer-level vacuum packaging. However, in the enhancement cover plate fabrication scheme, the insulating support structure layer is fabricated through photolithography etching, glass reflow, and grinding and polishing processes. The glass reflow effect within the etching pit is difficult to guarantee, and after grinding and polishing, two more photolithography etching processes are required to obtain the final field enhancement cover plate. The process is complex, and the coating effect is poor during the second photolithography due to the surface height difference. This invention optimizes existing processes, achieving the following: 1. Replacing glass reflow with bonding, eliminating uneven glass filling and surface collapse (flatness deviation and thermal stress warping issues) within the etched grooves. It eliminates the need for two photolithography steps after grinding and polishing, avoiding uneven photoresist coating and pattern distortion caused by surface height differences; 2. Reducing process steps and shortening the production cycle; 3. Improving yield, with controllable bonding surface flatness, significantly increasing the cover plate yield compared to traditional processes; 4. Enhancing structural stability, with no residual thermal stress at the silicon-glass bonding interface, reducing cover plate warping. Attached Figure Description

[0033] Figure 1 A flowchart illustrating a method for fabricating an electric field sensor field enhancement cover plate according to an embodiment of the present invention is shown.

[0034] Figure 2 The schematic diagram illustrates the fabrication process of a method for fabricating a field-enhancing cover plate for an electric field sensor according to an embodiment of the present invention.

[0035] Figure 3 The schematic diagram illustrates another fabrication process of the main body of the field enhancement cover plate of the electric field sensor according to an embodiment of the present invention;

[0036] Figure 4 The schematic diagram illustrates an optional process for an electric field sensor field enhancement cover plate according to an embodiment of the present invention.

[0037] Figure label:

[0038] 1-First silicon wafer, 11-Reinforcement structure, 12-Reserved position for insulating support structure layer, 2-Second silicon wafer, 3-Glass sheet, 41-Device layer, 42-Buried oxide layer, 43-Substrate layer, 44-Getting agent, 45-Metal bonding layer. Detailed Implementation

[0039] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. However, the following embodiments are only for explaining the present invention, and the scope of protection of the present invention should include all the contents of the claims. Moreover, through the description of the following embodiments, those skilled in the art can fully implement all the contents of the claims of the present invention.

[0040] Example 1: Method for fabricating a field-enhancing cover plate for an electric field sensor

[0041] Core process: The bonding process replaces glass reflow to achieve the integration of the insulating support layer and the reinforcing structure.

[0042] I. Preparation of the cover plate body (two optional options)

[0043] Option A (Dual Silicon Wafer Bonding):

[0044] 1. Etching-enhanced structure:

[0045] Photolithography and etching (such as deep reactive ion etching, DRIE) are performed on the upper surface of the first silicon wafer 1 with a thickness of 525μm to form a groove with a depth of 50-200μm, which serves as the reserved position 12 for the insulating support structure layer, and the reinforcement structure 11 is obtained.

[0046] 2. Silicon wafer bonding:

[0047] The etched surface of the first silicon wafer 1 is reversed and bonded to the upper surface of the second silicon wafer 2 by anodic bonding (400℃, 10 kN pressure) to form a bonded wafer.

[0048] 3. Thinning treatment:

[0049] Thinning is performed from the lower surface of the first silicon wafer 1 (mechanical polishing + CMP) until the upper surface of the second silicon wafer 2 is exposed to obtain a flat bonding surface.

[0050] Option B (SOI chip replacement):

[0051] 1. Etching-enhanced structure:

[0052] Grooves are etched on the upper surface of the device layer 41 of silicon-on-insulator (SOI).

[0053] 2. Corrosion of the buried oxide layer:

[0054] The exposed buried oxide layer 42 is removed by hydrofluoric acid vapor phase etching or wet etching, so that the upper surface of the substrate layer 43 serves as the bonding surface.

[0055] II. Preparation of Insulating Support Layer

[0056] Glass cutting: Holes are cut on glass plate 3 using an ultraviolet laser (wavelength 355nm). The hole diameter is matched to enhance the structural dimensions and ensure the flatness of the bonding surface.

[0057] III. Final Integration

[0058] Bonding and forming: The lower surface of glass plate 3 is directly bonded to the bonding surface of the bonding sheet in a vacuum environment to form a field-enhancing cover plate.

[0059] IV. Optional Process Expansion

[0060] 1. Getter Integration:

[0061] Titanium / zirconium / vanadium-based non-evaporative gas-absorbing material 44 with a thickness of 500 nm was sputtered or evaporated on the surface and sidewalls of the reinforced structure using a metal hard mask.

[0062] 2. Metal bonding layer:

[0063] A metal bonding layer 45 (gold / tin / copper) with a thickness of 1-2 μm is sputtered or evaporated on the surface of glass slide 3.

[0064] Technical Features Description

[0065] 1. Thinning processes: including mechanical grinding, chemical mechanical polishing (CMP), wet chemical etching (such as KOH) or dry etching (such as XeF2).

[0066] 2. Corrosion process: hydrofluoric acid vapor phase corrosion or wet corrosion.

[0067] 3. Structural advantages: The flatness of the bonding surface avoids the uneven filling problem of traditional glass reflow, eliminates two photolithography steps, and greatly improves the yield.

[0068] Example 2:

[0069] Figure 2 The schematic diagram illustrates a novel fabrication process for the field-enhancing cover plate of the electric field sensor designed in this invention. The fabrication method of the cover plate includes the following steps:

[0070] Through photolithography etching, a groove is etched on the surface of the first silicon wafer 1 to reserve the position 12 of the insulating support structure layer, and an enhanced structure 11 is obtained, as shown.

[0071] By using a bonding process, the upper surface of the first silicon wafer 1 is flipped and bonded to the upper surface of the second silicon wafer 2 to obtain a bonded wafer;

[0072] The lower surface of the first silicon wafer 1 is thinned through a thinning process until the upper surface of the second silicon wafer 2 is exposed. The above process ensures the flatness and cleanliness of the bonding surface (the upper surface of the second silicon wafer 2).

[0073] By using laser cutting technology, holes are cut into the glass sheet to reserve space for the reinforcing structure, ensuring the flatness and cleanliness of the bonding surfaces (upper and lower surfaces) of the glass sheet.

[0074] By bonding, the lower surface of glass sheet 3 is bonded to the bonding surface of the bonding sheet to obtain a field-enhancing cover plate.

[0075] Example 3:

[0076] Figure 3 This schematically illustrates another process route for fabricating the main body of the field-enhancing cover plate in the novel fabrication process of the electric field sensor field-enhancing cover plate designed in this invention, including the following steps:

[0077] A groove is etched on the upper surface of silicon on insulator (device layer 41) using photolithography to reserve the position 12 of the insulating support structure layer, and thus the reinforcement structure 12 is obtained.

[0078] The buried oxide layer 42 exposed on silicon on the insulator is removed by an etching process.

[0079] In this process route, the upper surface of the substrate layer 43 exposed on the silicon-on-insulator is the bonding surface. This process route also ensures the flatness and cleanliness of the bonding surface, and the process is simpler, but some buried oxide layer remains under the reinforcement structure.

[0080] Example 4:

[0081] Figure 4 The schematic illustration shows the subsequent processes that can be included in the novel fabrication method of the electric field sensor field enhancement cover plate designed in this invention, including the following steps:

[0082] Using a hard mask, getter 44 is sputtered or evaporated on the surface of the reinforced structure;

[0083] Metal is sputtered or evaporated on the upper surface of a glass wafer using a hard mask as a metal bonding layer 45 for subsequent metal bonding with a sensor chip.

[0084] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A method for preparing a field-enhancing cover plate for an electric field sensor, characterized in that, include: S1. Preparation of the main body of the field-reinforced cover plate: S111. A groove is etched on the surface of the first silicon wafer using photolithography to serve as the reserved position for the insulating support structure layer, thereby obtaining an enhanced structure. S121. The upper surface of the first silicon wafer is flipped and bonded to the upper surface of the second silicon wafer by a bonding process to obtain a bonded wafer; S131. Thinning is performed from the lower surface of the first silicon wafer through a thinning process until the upper surface of the second silicon wafer is exposed, ensuring the flatness and cleanliness of the bonding surface; S2, Preparation of the field-reinforced cover plate insulation support structure layer: S21. Holes are cut into the glass sheet using laser cutting technology as reserved spaces for reinforcement structure, ensuring the flatness and cleanliness of the glass sheet to be bonded. S3. The lower surface of the glass sheet is bonded to the bonding surface of the bonding sheet through a bonding process to obtain a field-enhanced cover plate.

2. The preparation method according to claim 1, characterized in that, Step S1 is replaced with: S112. Grooves are etched on the upper surface of the silicon-on-insulator device layer using photolithography to reserve the position of the insulating support structure layer, thereby obtaining the enhanced structure. S122. Remove the buried oxide layer exposed on silicon on the insulator through an etching process, so that the upper surface of the substrate layer can be used as the bonding surface.

3. The preparation method according to claim 2, characterized in that, The corrosion process includes hydrofluoric acid vapor phase corrosion or hydrofluoric acid wet corrosion.

4. The preparation method according to claim 1, characterized in that, The thinning process in step S131 includes mechanical grinding, chemical mechanical polishing, wet chemical etching, or dry etching.

5. The preparation method according to any one of claims 1-4, characterized in that, Also includes: S4. Use a hard mask to sputter or evaporate the getter on the surface of the reinforced structure.

6. The preparation method according to claim 5, characterized in that, Also includes: S5. Use a hard mask to sputter or evaporate a metal bonding layer on the surface of a glass slide.

7. The preparation method according to claim 6, characterized in that, The metal bonding layer material includes gold, tin, or copper.

8. The preparation method according to claim 5, characterized in that, The getter material is a titanium, zirconium, or vanadium-based non-evaporative getter.

9. The preparation method according to claim 5, characterized in that, The area covered by the sputtered getter is the reinforced structural surface and sidewalls.

10. An electric field sensor field enhancement cover plate prepared by the preparation method according to any one of claims 1-9.

Citation Information

Patent Citations

  • Wafer-level packaging sensibilization and noise reduction structure of miniature electric field sensor

    CN114229788A

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