Request processing method and apparatus, electronic device, and request processing system

Abstract

The present disclosure relates to the technical field of computer, and particularly relates to a request processing method and device, electronic equipment and request processing system. The method comprises the following steps: in the case of receiving an access request of a target device, obtaining address correlation information corresponding to an access address in the access request; in the case that the address correlation information indicates that there is no address correlation, obtaining a first directory hit result according to cache directory information, wherein the first directory hit result is used to indicate a field to which the target device belongs; in the case that the first directory hit result indicates a hit, generating a monitoring request, and executing a response process corresponding to the monitoring request according to the field to which the target device belongs, and obtaining a response result. The present disclosure can improve the request processing efficiency without affecting the operating frequency of the chip.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a request processing method, apparatus, electronic device and request processing system. Background Technology

[0002] With the development of science and technology, related technologies in the field of high-speed computing have developed rapidly. Among them, heterogeneous computing systems are gradually becoming the mainstream architecture. Heterogeneous computing systems typically include a Central Processing Unit (CPU) and various accelerator devices (such as Field Programmable Gate Arrays (FPGAs), Graphics Processing Units (GPUs), Artificial Intelligence (AI) accelerators, memory expansion, etc.). However, because the mainstream CPU interfaces and mainstream accelerator interfaces use different interconnect protocols for connection, the protocol conversion between the Coherent Hub Interface (CHI) protocol and the Compute Express Link (CXL) protocol consumes a lot of hardware resources, has low resource utilization, and the conversion process also increases the overall transmission latency of the system, resulting in low request processing efficiency. Summary of the Invention

[0003] This disclosure provides a request processing method, apparatus, electronic device, and request processing system, which can improve request processing efficiency without affecting the chip's operating frequency. The technical solution of this disclosure is as follows:

[0004] According to a first aspect of the present disclosure, a request processing method is provided, comprising:

[0005] Upon receiving an access request from the target device, obtain the address-related information corresponding to the access address in the access request;

[0006] If the address correlation information indicates that there is no address correlation, a first directory hit result is obtained based on the cache directory information, wherein the first directory hit result is used to indicate the domain to which the target device belongs;

[0007] If the first directory hit result indicates a hit, a listening request is generated, and a response process corresponding to the listening request is executed according to the domain to which the target device belongs, and a response result is obtained.

[0008] According to some embodiments, the method further includes:

[0009] If the address correlation information indicates that there is address correlation or that the resource to be processed is occupied, the access address is cached.

[0010] According to some embodiments, the method further includes:

[0011] When the access request is a CXL request, prefetch address sequence information is obtained based on the address information and prefetch access mode of the CXL request, and the prefetch request is activated based on the prefetch address sequence information, wherein the prefetch access mode includes at least one of sequential access mode and step access mode;

[0012] In response to the prefetch request, the second directory hit result is obtained based on the prefetch address sequence information and the cache directory information, and the process corresponding to the second directory hit result is executed.

[0013] According to some embodiments, the process of executing the second directory hit result includes at least one of the following:

[0014] If the second directory hit result indicates a hit, the prefetch request is cancelled;

[0015] If the second directory hit result indicates a no-hit, obtain the access space corresponding to the prefetch address, and execute the process corresponding to the second directory hit result based on the access space.

[0016] According to some embodiments, the process of executing the second directory hit result based on the access space includes at least one of the following:

[0017] In the case where the access space is a memory extension of the CXL domain, a first local read request is sent to the memory extension of the CXL domain, and the data returned by the memory extension of the CXL domain is stored in the local cache;

[0018] When the access space is the memory of the CHI domain, obtain the idle status information of the local cache. If the idle status information indicates that the local cache is in an idle state, send a second local read request to the memory of the CHI domain, and store the data returned by the memory of the CHI domain into the local cache.

[0019] When the access space is memory in the CHI domain, the idle status information of the local cache is obtained. If the idle status information indicates that the local cache is in a non-idle state, the prefetch command in the CHI protocol is used to control the slave node to perform preprocessing.

[0020] According to some embodiments, generating a listening request when the first directory hit result indicates a hit includes at least one of the following:

[0021] If the directory hit result indicates a hit on a CHI domain device, the generated listening request will be converted into a consistent listening request for the CHI domain.

[0022] If the directory hit result indicates a CXL domain device hit, the generated listening request will be converted into a CXL domain consistent listening request.

[0023] According to some embodiments, the method further includes:

[0024] If the directory hit result indicates a no-hit and the external storage access information indicates access to external storage, an external storage access request corresponding to the domain of the accessed external storage space is generated, and the process corresponding to the external storage access request is executed.

[0025] If the external storage access information indicates that external storage is not accessed or the external storage access request has been completed, the local cache is updated. After the update is completed, the corresponding protocol response result information is generated according to the protocol tag and the response is processed.

[0026] According to a second aspect of the present disclosure, a request processing apparatus is provided, comprising:

[0027] The information acquisition unit is used to acquire address-related information corresponding to the access address in the access request when an access request for the target device is received.

[0028] The result acquisition unit is configured to acquire a first directory hit result based on cache directory information when the address correlation information indicates that there is no address correlation, wherein the first directory hit result is used to indicate the domain to which the target device belongs;

[0029] The request processing unit is configured to generate a listening request when the first directory hit result indicates a hit, and execute a response process corresponding to the listening request according to the domain to which the target device belongs, and obtain a response result.

[0030] According to a third aspect of the present disclosure, an electronic device is provided, comprising:

[0031] processor;

[0032] Memory used to store the processor's executable instructions;

[0033] The processor is configured to execute the instructions to implement the request processing method described in any one of the preceding aspects.

[0034] According to a fourth aspect of the present disclosure, a request processing system is provided, the system including a CHI domain, a CXL domain, and a CHI-CXL bridge, wherein the CHI domain includes at least one CPU cluster, each CPU cluster in the at least one CPU cluster is connected to the CHI-CXL bridge via a CHI bus protocol interface, the CXL domain includes at least one device with a CXL interface, each device with a CXL interface in the at least one CXL interface is connected to the CHI-CXL bridge via a CXL bus interface protocol.

[0035] According to a fifth aspect of the present disclosure, a storage medium is provided such that, when instructions in the storage medium are executed by a processor of an electronic device, the electronic device is able to perform the request processing method described in any of the preceding aspects.

[0036] According to a sixth aspect of the present disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the method described in any one of the preceding aspects.

[0037] The technical solutions provided by the embodiments of this disclosure have at least the following beneficial effects:

[0038] In some or related embodiments, upon receiving an access request from a target device, address relevance information corresponding to the access address in the access request is obtained; if the address relevance information indicates no address relevance, a first directory hit result is obtained based on cache directory information, wherein the first directory hit result indicates the domain to which the target device belongs; if the first directory hit result indicates a hit, a listening request is generated, and a response process corresponding to the listening request is executed based on the domain to which the target device belongs, and a response result is obtained. Therefore, access requests from target devices can be detected, reducing significant latency during data interaction with target devices, reducing the increased chip area and power consumption when increasing host cache capacity to offset latency, and improving cache consistency through cache directory information to reduce cache resource waste. This allows for improved request processing efficiency without affecting the chip's operating frequency.

[0039] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0040] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure, and are not intended to unduly limit this disclosure.

[0041] Figure 1 This is a flowchart of the first request processing method provided in the embodiments of this disclosure;

[0042] Figure 2 This is a flowchart of the second request processing method provided in this embodiment of the disclosure;

[0043] Figure 3 This is an example schematic diagram of a request processing system provided in an embodiment of this disclosure;

[0044] Figure 4 This is a flowchart of the third request processing method provided in this embodiment of the disclosure;

[0045] Figure 5 This is an example schematic diagram of a request processing device provided in an embodiment of this disclosure;

[0046] Figure 6 This is a functional flowchart of a request processing module provided in an embodiment of this disclosure;

[0047] Figure 7 This is a functional flowchart of an intelligent prefetcher provided in an embodiment of this disclosure;

[0048] Figure 8 This is a block diagram illustrating a request processing apparatus according to an exemplary embodiment;

[0049] Figure 9 This is an example schematic diagram of an electronic device according to an exemplary embodiment. Detailed Implementation

[0050] To enable those skilled in the art to better understand the technical solutions of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings.

[0051] This disclosure provides a request processing method, apparatus, electronic device, and storage medium. In some embodiments, the terms "request processing method" and "information processing method," "communication method," etc., can be used interchangeably; the terms "request processing apparatus" and "information processing apparatus," "communication apparatus," etc., can be used interchangeably; and the terms "information processing system," "communication system," etc., can be used interchangeably.

[0052] This disclosure is not exhaustive, but merely illustrative of some embodiments, and is not intended to limit the scope of protection of this disclosure. Unless otherwise specified, each step in a particular embodiment can be implemented as an independent embodiment, and the steps can be arbitrarily combined. For example, a solution after removing some steps in a particular embodiment can also be implemented as an independent embodiment, and the order of the steps in a particular embodiment can be arbitrarily interchanged. Furthermore, the optional implementation methods in a particular embodiment can be arbitrarily combined; moreover, the embodiments can be arbitrarily combined, for example, some or all steps of different embodiments can be arbitrarily combined, and a particular embodiment can be arbitrarily combined with the optional implementation methods of other embodiments.

[0053] In each of the disclosed embodiments, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of the embodiments are consistent and can be referenced by each other. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0054] The terminology used in the embodiments of this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the scope of this disclosure.

[0055] In this disclosure, unless otherwise stated, elements expressed in the singular form, such as "a," "an," "the," "the," "the," "the," "the," "the," "this," etc., can mean "one and only one," or "one or more," "at least one," etc. For example, when using articles such as "a," "an," "the," etc. in translation, the noun following the article can be understood as either a singular or a plural expression.

[0056] In the embodiments disclosed herein, "multiple" refers to two or more.

[0057] In some embodiments, the terms “at least one of,” “one or more,” “a plurality of,” and “multiple” may be used interchangeably.

[0058] The prefixes "first," "second," etc., used in the embodiments of this disclosure are merely for distinguishing different descriptive objects and do not impose restrictions on the position, order, priority, quantity, or content of the descriptive objects. The description of the descriptive objects is found in the claims or the context of the embodiments, and the use of prefixes should not constitute unnecessary restrictions. For example, if the descriptive object is a "field," the ordinal numbers preceding "field" in "first field" and "second field" do not restrict the position or order of the "fields." "First" and "second" do not restrict whether the "fields" they modify are in the same message, nor do they restrict the order of "first field" and "second field." Similarly, if the descriptive object is a "level," the ordinal numbers preceding "level" in "first level" and "second level" do not restrict the priority between "levels." Furthermore, the number of descriptive objects is not limited by ordinal numbers and can be one or more. For example, in "first device," the number of "devices" can be one or more. Furthermore, the objects modified by different prefixes can be the same or different. For example, if the object being described is "device", then "first device" and "second device" can be the same device or different devices, and their types can be the same or different. Similarly, if the object being described is "information", then "first information" and "second information" can be the same information or different information, and their content can be the same or different.

[0059] In some embodiments, "terminal" or "terminal device" may be referred to as "user equipment (UE)," "user terminal," "mobile station (MS)," "mobile terminal (MT)," "subscriber station," "mobile unit," "subscriber unit," "wireless unit," "remote unit," "mobile device," "wireless device," "wireless communication device," "remote device," "mobile subscriber station," "access terminal," "mobile terminal," "wireless terminal," "remote terminal," "handset," "user agent," "mobile client," "client," etc.

[0060] In some embodiments, data, information, etc., may be obtained with the user's consent.

[0061] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0062] According to some embodiments, the CHI (Coherent Hub Interface) bus protocol is often used to maintain cache coherency in multi-core CPU systems, while the CXL (Compute Express Link) bus protocol is often used to maintain device cache coherency in accelerator devices. CHI is a System-on-Chip (SoC) internal coherency interconnect protocol in the Advanced Microcontroller Bus Architecture (AMBA) protocol family, primarily used for high-speed coherency communication between components such as processor clusters, cache controllers, and memory controllers. CXL is an industry-standard chip-to-chip interconnect protocol that supports cache coherency, memory expansion, and input / output (I / O) acceleration. However, CHI and CXL differ significantly in design philosophy, transaction types, and consistency states. While some bridging methods in certain embodiments can achieve protocol conversion between the two, they cannot fully utilize the cache resources of either protocol to achieve optimal performance.

[0063] For example, when a CXL device needs to access the CPU, the CXL is translated into a protocol corresponding to the interconnect bus interface used by the CPU, such as the AMBA CHI protocol or the AMBA AXI Coherency Extensions (AXI-ACE) protocol, before being connected to the system. In some embodiments, the CXL device is considered a Request Node-Interface (RN-I) (a cacheless request node in the CHI protocol) in the CPU cluster's consistency domain, preventing the CXL device from performing cache consistency maintenance with the CPU cluster. However, if the CXL device is a slave device, it is considered a Subordinate Node (SN) (a slave node in the CHI protocol). In some embodiments, the bridging device is unaware of the CXL device's access mode, resulting in significant latency during data interaction with the CXL device. Increasing the host's cache capacity to offset this latency inevitably increases the chip area and power consumption.

[0064] According to some embodiments, protocol conversion between the CHI and CXL protocols consumes significant hardware resources, has low resource utilization, and increases overall system transmission latency during the conversion process. The lack of unified maintenance of cache consistency between CXL devices and the CPU cluster inevitably leads to wasted cache resources. Furthermore, any data modification by a CXL device requires timely synchronization with the CPU cluster, increasing the interaction cost between devices. While increasing the host's cache capacity can visibly improve system performance, it poses significant challenges to chip timing, area, and power consumption, potentially forcing a reduction in the chip's operating frequency.

[0065] Figure 1 This is a flowchart of the first request processing method provided in the embodiments of this disclosure, such as... Figure 1 As shown, this request processing method can be used in scenarios where received CHI or CXL access requests are processed, and includes the following steps:

[0066] In step S11, upon receiving an access request from the target device, address-related information corresponding to the access address in the access request is obtained;

[0067] In some embodiments, the implementing entity of this disclosure may be, for example, an electronic device. This electronic device does not specifically refer to a particular fixed electronic device. For example, when the device identifier changes, the electronic device may also change accordingly. For example, when the structure of the electronic device changes, the electronic device may also change accordingly. The name of the electronic device is not limited. The electronic device may, for example, be a processing device, a terminal, etc.

[0068] According to some embodiments, the target device may be, for example, the device that initiates the access request, and the name of the target device is not limited. The target device may also be referred to as a request processing device, a request initiating device, etc. The target device does not specifically refer to a particular fixed device. For example, when the device identifier of the target device changes, the target device may also change accordingly. For example, when the device structure of the target device changes, the target device may also change accordingly.

[0069] In some embodiments, the access request may be, for example, a request initiated by the target device to access the CPU. This access request is not specifically a fixed request. For example, the access request may change accordingly when the target device changes. For example, the access request may change accordingly when the access address included in the access request changes. For example, the access request may change accordingly when the time point corresponding to the request changes.

[0070] According to some embodiments, an access address can be used, for example, to indicate the address of data to be accessed. This access address can be, for example, the identifier of the memory location or I / O device to be accessed. The access address does not specifically refer to a fixed address. For example, when the specific address of the access address changes, the access address can also change accordingly.

[0071] In some embodiments, address correlation information may be used to indicate the correlation between the access address in the access request and the address where the request is being executed. This address correlation information is not specifically defined by a fixed correlation. For example, the address correlation information may change when the access address or the address where the request is being executed changes. Similarly, the address correlation information may change when the method of obtaining it changes.

[0072] In some embodiments, upon receiving an access request from a target device, address-related information corresponding to the access address in the access request can be obtained.

[0073] In step S12, if the address correlation information indicates that there is no address correlation, the first directory hit result is obtained according to the cache directory information, wherein the first directory hit result is used to indicate the domain to which the target device belongs;

[0074] In some embodiments, the absence of address dependency can be used to indicate, for example, the lack of dependency between the access address in the access request and the address where the request is being executed. For instance, the access address in the access request may be different from the address where the request is being executed.

[0075] According to some embodiments, the cache directory information may be, for example, pre-cached directory information. This cache directory information may include, for example, address information of data already cached in the CPU cluster. The cache directory information does not specifically refer to a fixed address. For example, when the address information included in the cache directory information changes, the cache directory information may also change accordingly. The name of the cache directory information is not limited. The cache directory information may also be referred to as a local cache directory or a consistency directory.

[0076] According to some embodiments, a directory hit result can be, for example, an indication of whether a data cache with the same address exists on a certain CPU, based on a cache directory entry. This directory hit result is not specifically a fixed result. For example, it could indicate that a data cache with the same address exists on multiple CPU devices. Furthermore, the directory hit result can change accordingly when the cache directory information changes.

[0077] In some embodiments, the first directory hit result may be a hit result determined based on the access address of the current access request and cached directory information. This first directory hit result does not refer to a specific fixed result. For example, when the hit information included in the first directory hit result changes, the first directory hit result may also change accordingly.

[0078] According to some embodiments, the field to which the target device belongs may also be referred to as the target device domain. The field to which the target device belongs does not specifically refer to a particular fixed field. For example, the field to which the target device belongs may include the CXL domain or the CHI domain.

[0079] In some embodiments, when the address correlation information indicates that there is no address correlation, a first directory hit result can be obtained based on the cache directory information, wherein the first directory hit result is used to indicate the domain to which the target device belongs.

[0080] In step S13, if the first directory hit result indicates a hit, a listening request is generated, and the response process corresponding to the listening request is executed according to the domain to which the target device belongs, and the response result is obtained.

[0081] According to some embodiments, the first directory hit result indicates a hit on a device in a specific domain, for example, based on the access address. The listening request may be a request used to monitor whether access to a particular device is possible. This listening request is not specifically a fixed request. For example, the listening request may change if the time of its generation changes. Similarly, the listening request may change if the object of the listening request changes. Furthermore, the listening request may change if the domain to which the target device belongs changes.

[0082] In some embodiments, the response flow may be, for example, a flow corresponding to the listening request. This response flow is not specifically defined by a fixed flow. For example, the response flow may change accordingly when the listening request changes.

[0083] According to some embodiments, the response result may be, for example, a result corresponding to a response process. Different response processes can correspond to different response results. Even with the same response process, the response result can change depending on the device being monitored.

[0084] In some embodiments, if the first directory hit result indicates a hit, a listening request can be generated, and a response process corresponding to the listening request can be executed according to the domain to which the target device belongs, and a response result can be obtained.

[0085] In some or related embodiments, upon receiving an access request from a target device, address relevance information corresponding to the access address in the access request is obtained. If the address relevance information indicates no address relevance, a first directory hit result is obtained based on cache directory information, where the first directory hit result indicates the domain to which the target device belongs. If the first directory hit result indicates a hit, a listening request is generated, and a response process corresponding to the listening request is executed based on the domain to which the target device belongs, and a response result is obtained. Therefore, access requests from target devices can be detected, reducing significant latency during data interaction with target devices. This reduces the increase in chip area and power consumption when increasing the host's cache capacity to offset the impact of latency. Cache consistency can be achieved through cache directory information, reducing the waste of cache resources. Request processing efficiency can be improved without affecting the chip's operating frequency.

[0086] Figure 2 This is a flowchart of the second request processing method provided in the embodiments of this disclosure, such as... Figure 2 As shown, it includes the following steps:

[0087] In step S21, upon receiving an access request from the target device, the address-related information corresponding to the access address in the access request is obtained;

[0088] In some embodiments, the implementing entity of this disclosure may be, for example, an electronic device. This electronic device does not specifically refer to a particular fixed electronic device. For example, when the device identifier changes, the electronic device may also change accordingly. For example, when the structure of the electronic device changes, the electronic device may also change accordingly. The name of the electronic device is not limited. The electronic device may, for example, be a processing device, a terminal, etc.

[0089] The relevant processes can be as described above, and will not be repeated here.

[0090] According to some embodiments, Figure 3 This is an example schematic diagram of a request processing system provided in an embodiment of this disclosure, such as... Figure 3 As shown, the system includes a CHI domain, a CXL domain, and a CHI-CXL bridge. The CHI domain includes at least one CPU cluster, and each CPU cluster within the at least one CPU cluster is connected to the CHI-CXL bridge via a CHI bus protocol interface. The CXL domain includes at least one device with a CXL interface, and each device with a CXL interface within the at least one CXL interface is connected to the CHI-CXL bridge via a CXL bus interface protocol. Specifically, as... Figure 3As shown, the system is divided into two domains by a dashed line: the CHI domain and the CXL domain. The CHI domain can include, for example, four CPUs forming a CPU cluster. These CPUs connect to the CHI-CXL bridge via the CHI bus protocol interface. The CHI-CXL bridge acts as the master node (HomeNode, HN) in the CHI domain, maintaining cache consistency between CPUs and handling data exchange with slave nodes (SN, memory). In the CXL domain, multiple devices with CXL interfaces connect to the CHI-CXL bridge via the CXL bus interface protocol. The CHI-CXL bridge acts as the host in the CXL domain, maintaining cache consistency and handling data exchange with memory expansion devices. Both CPUs and CXL devices can utilize memory and memory expansion. The CHI-CXL bridge connects the CHI and CXL domains, employing a unified directory consistency maintenance method to ensure cache consistency between the two domains.

[0091] According to some embodiments, Figure 4 This is a flowchart of the third request processing method provided in the embodiments of this disclosure, such as... Figure 4 As shown, the process includes: converting received CHI or CXL access requests into a preset format using a request mapping table (this preset format could be an internal function processing format), marking the access requests with a protocol, and sending them to the caching module; the caching module determines the address relevance of the new request to the currently executing request; if no address relevance exists, it reads the consistency directory (i.e., the cache directory) to obtain the specific status of the current cache line; simultaneously, access request information marked as CXL can be transmitted to the smart prefetcher; consistency maintenance is performed based on the specific status of the cache line; when accessing devices or memory in the CHI domain, the request type specified by the CHI protocol is used and a response is completed, or when accessing devices or memory extensions in the CXL domain, the request type specified by the CXL protocol is used and a response is completed. Meanwhile, the smart prefetcher, upon receiving a CXL access request, continuously records and determines the current access pattern of the CXL device, generating a prefetch request. This prefetch request includes local cache prefetching and lower-level device prefetching, improving the efficiency of subsequent CXL request processing.

[0092] According to some embodiments, the access request to the target device may, for example, include an access request to a CHI device or a CXL device. The electronic device in this disclosure embodiment may, for example, be a request processing device. Figure 5 This is an example schematic diagram of a request processing device provided in an embodiment of this disclosure, such as... Figure 5 As shown, it may include a request mapping and transformation module, a request caching module, a request processing module, and a smart prefetching module, wherein:

[0093] Request Mapping and Conversion Module: Performs equivalent mapping between CHI protocol transaction types and CXL protocol transaction types, converts them into a preset processing format that the request processing module can recognize, and marks internal requests with protocol tags;

[0094] Request caching module: If an access request has an address dependency with a currently executing request, or if the resources of the request processing module have been completely occupied by a previous request, then the request is cached in this module. If there is no address dependency and executable resources exist, then the access request is sent to the request processing module for further processing; at the same time, if the protocol of this request is marked as a CXL request, the address information of the request can also be sent to the smart prefetch module.

[0095] Request processing module: Upon receiving an access request, reads the directory information and determines whether to generate a listening request based on the result, and completes the processing and response of the listening request; determines whether external storage needs to be accessed, and completes the processing and response of the external storage request; performs local cache updates, generates the corresponding protocol response result according to the protocol tag, and completes request processing and response;

[0096] The smart prefetch module consists of two functional modules: an access pattern detector and a smart prefetcher.

[0097] Access Pattern Detector: Upon receiving CXL request address information, it determines the prefetch mode using the configured logger and generates a corresponding prefetch address sequence, which is then provided to the prefetcher. Access modes include fixed-step mode and strafing mode, as detailed below (not elaborated here).

[0098] Prefetcher: Upon receiving the prefetch address information, it reads the local cache directory and determines if a cache hit occurs. If a hit occurs, the prefetch request is canceled. If a miss occurs, it first checks the prefetch address access space. If the prefetch address access space is a memory extension of the CXL domain, a local read request is generated, and the data is saved to the local cache. If the prefetch address access space is memory of the CHI domain, it then checks the local cache's idle status: If the local cache is idle, a local read request is generated, and the data is saved to the local cache. If the local cache is not idle, the CHI protocol prefetch command `PrefetchTgt` is used to preprocess the data in advance by the SN.

[0099] According to some embodiments, a specific hit could be, for example, reading an address from the cache directory information. The address reading result could indicate whether the current address exists in a data cache at the same address on CPU0, CPU1, or the GPU. The existence information is not unique; the data cache at the same address could exist on multiple devices. After a hit, if the request type is simply to retrieve data, a listening request can be sent to a specific device to read the data. If the request type is simply to retrieve data but is invalid, when multiple hits occur, a listening request is used to retrieve data from one device, and invalid operations are performed on the other devices.

[0100] According to some embodiments, both the CHI and CXL protocols are consistency protocols, but their cache line state rules differ. The CHI protocol supports MESOI, while CXL only supports MESI, and their transaction types also differ. Based on state consistency, the transaction types of the two protocols can be compared and managed uniformly in the consistency directory. The CHI domain can maintain an O-state, while CXL does not need to have an O-state. The transaction type mapping can be obtained from the relevant mapping table according to the specific consistency protocol rules of both protocols, which should be known to those in the consistency field and will not be repeated in this embodiment. It should be noted that if a CXL transaction requires access to cache line data of a CPU in the CHI domain, then according to the CHI protocol rules, a listener transaction type that cannot obtain an O-state should be used, such as listener cleanup SnpClean or single listener SnpOnce.

[0101] According to some embodiments, for example, partial transaction mapping types can be extracted for illustration. In the CHI-CXL consistency bridge, the ReadUnique in CHI transactions is internally functionally equivalently mapped to the Read Exclusive (RdOwn) in CXL transactions; the WriteUnique in CHI transactions is internally functionally equivalently mapped to the Write Invalidation (WrInv) in CXL transactions; the Read Shared in CXL transactions is internally functionally equivalently mapped to the Read Clean data in CHI transactions; the MemWr in CXL transactions is internally functionally equivalently mapped to the Write Clean data in CHI transactions; the Snoop Data in CXL transactions is internally functionally equivalently mapped to the SnpClean in CHI transactions; and the Snoop Invalidate in CXL transactions is internally functionally equivalently mapped to the SnpMakeInvalid in CHI transactions. After the internal functional equivalence mapping is completed, the generated internal request packet contains: main function information and protocol-independent function information. Specifically, the common functional fields in the two protocol transactions are equivalently mapped and converted into main functional information, and other independent functional fields in the protocol are packaged into protocol-independent functional information. Then, the internal request package is sent to the request cache module.

[0102] According to some embodiments, a resource monitor for the request processing module is set in the request caching module. If the resource monitor shows that the resources are full, new requests continue to be cached in the caching module. If the resource monitor shows that the resources are not full, it is determined whether there is an address correlation with the currently executing request. If the address is correlated, caching continues; if the address is not correlated, the request is sent to the request processing module. At the same time, the request address information marked with the protocol CXL is sent to the smart prefetching module.

[0103] In step S22, if the address correlation information indicates that there is no address correlation, the first directory hit result is obtained according to the cache directory information, wherein the first directory hit result is used to indicate the domain to which the target device belongs;

[0104] The relevant processes can be as described above, and will not be repeated here.

[0105] According to some embodiments, the method further includes:

[0106] When address correlation information indicates address dependency or that the requested resource is occupied, the access address is cached. Therefore, caching access addresses based on correlation information allows for data access based on the cached addresses, improving request processing efficiency.

[0107] In step S23, if the first directory hit result indicates a hit, a listening request is generated, and the response process corresponding to the listening request is executed according to the domain to which the target device belongs, and the response result is obtained;

[0108] The relevant processes can be as described above, and will not be repeated here.

[0109] According to some embodiments, when the first directory hit result indicates a hit, a listening request is generated, including at least one of the following:

[0110] If the directory hit result indicates a hit on a CHI domain device, the generated listening request will be converted into a consistent listening request for the CHI domain.

[0111] If the directory hit result indicates a CXL domain device, the generated listening request is converted into a CXL domain consistent listening request. Therefore, listening requests can be converted using different devices, improving the accuracy of consistent listening request acquisition.

[0112] According to some embodiments, the method further includes:

[0113] If the directory hit result indicates a no-hit and the external storage access information indicates access to external storage, generate an external storage access request corresponding to the domain of the external storage space to be accessed, and execute the process corresponding to the external storage access request.

[0114] If the external storage access information indicates that external storage should not be accessed or that the external storage access request has been completed, the local cache is updated. After the update is completed, the corresponding protocol response result information is generated according to the protocol flag and the response is processed. Therefore, external storage access information can be used to determine whether to access external storage, improving the speed and accuracy of the response.

[0115] According to some embodiments, Figure 6 This is a functional flowchart of a request processing module provided in an embodiment of this disclosure, such as... Figure 6 As shown, the request processing module receives an internal request, reads the local cache directory information, and determines the directory result: if a match is found, a listening request can be generated; the listening request is divided into two categories. One category is a match with a CHI domain device, in which case the listening request is converted into a CHI domain consistency listening request and sent, and the CHI protocol response process for the request is completed, and the response result is notified to the internal request; the other category is a match with a CXL domain device, in which case the listening request is converted into a CXL domain consistency listening request and sent, and the CXL protocol response process for the request is completed, and the response result is notified to the internal request.

[0116] If a hit is missed or the listening request is completed, proceed to the next stage to determine whether external storage space needs to be accessed.

[0117] If external storage space needs to be accessed, an external storage access request is generated and processed. If the accessed external storage space belongs to the CHI domain, the external storage access request is converted into a request type supported by the CHI domain, and the CHI protocol response process for the request is completed, notifying the internal requester of the response result; if the accessed external storage space belongs to the CXL domain, the external storage access request is converted into a request type supported by the CHI domain, and the CHI protocol response process for the request is completed.

[0118] If access to external storage is not required or the external storage access request has been completed, the local cache is updated. After the update is complete, the corresponding protocol response information is generated according to the protocol flags and the response is processed. After the response processing is completed, the request processing module resources are released.

[0119] In step S24, when the access request is a CXL request, the prefetch address sequence information is obtained according to the address information of the CXL request and the prefetch access mode, and the prefetch request is activated according to the prefetch address sequence information. The prefetch access mode includes at least one of sequential access mode and step access mode.

[0120] The relevant processes can be as described above, and will not be repeated here.

[0121] In this embodiment, steps S24 and S23 may be executed simultaneously, or step S24 may be executed first and then step S23 may be executed, or step S23 may be executed first and then step S24 may be executed. This embodiment does not limit the specific steps.

[0122] According to some embodiments, a CXL request may be, for example, a request for accessing a CXL domain device. Steps S24 and S25 may, for example, be... Figure 5 The intelligent prefetching module shown is executed.

[0123] According to some embodiments, the prefetch access mode can be a mode determined by an internal functional module. For example, if the CXL access address is a sequence of 00, 40, 80, C0, when a threshold is calculated, it is determined to be a sequential mode. The prefetcher will then generate a sequence of 100, 140, 180, 1C0 in advance, retrieve the data from the lower layer in advance, and cache it in the cache memory. This way, when the next CXL request accesses the data, it can be hit in the processing module, thus improving access speed.

[0124] In step S25, in response to the prefetch request, the second directory hit result is obtained based on the prefetch address sequence information and cache directory information, and the process corresponding to the second directory hit result is executed.

[0125] The relevant processes can be as described above, and will not be repeated here.

[0126] According to some embodiments, the second directory hit result may be a hit result obtained by judging the prefetch address sequence information and cached directory information. The "second" in the second directory hit result is used to distinguish it from other directory hit results and does not specifically refer to a fixed directory hit result. For example, when the prefetch address sequence information or cached directory information changes, the second directory hit result may also change accordingly.

[0127] According to some embodiments, executing the process corresponding to the second directory hit result includes at least one of the following:

[0128] If the second directory hit result indicates a hit, cancel the prefetch request;

[0129] If the second directory hit result indicates a no-hit, the access space corresponding to the prefetch address is obtained, and the process corresponding to the second directory hit result is executed based on the access space. Therefore, the corresponding process can be executed based on the second directory hit result, improving the accuracy of process execution.

[0130] According to some embodiments, the process corresponding to the second directory hit result is executed based on the access space, including at least one of the following:

[0131] When accessing a memory extension of the CXL domain, send the first local read request to the memory extension of the CXL domain and store the data returned by the memory extension of the CXL domain in the local cache;

[0132] When accessing memory in the CHI domain, obtain the free status information of the local cache. If the free status information indicates that the local cache is in a free state, send a second local read request to the memory in the CHI domain and store the data returned by the memory in the CHI domain into the local cache.

[0133] When accessing memory in the CHI domain, obtain the free status information of the local cache. If the free status information indicates that the local cache is not free, use the prefetch command in the CHI protocol to control the slave node to perform preprocessing.

[0134] According to some embodiments, Figure 7 This is a functional flowchart of an intelligent prefetcher provided in an embodiment of this disclosure, such as... Figure 7As shown, when the smart prefetcher receives the CXL request address information, it can perform address detection to confirm the prefetch access mode, specifically:

[0135] Sequential access mode detection: Set a sequential counter and calculate the difference between the current address and the previous address to determine if it is a 64-byte access request. If not, the sequential access mode recorder count is cleared and restarted. If it is, the sequential counter is incremented by 1. At the same time, a sequential threshold is set. When the sequential counter reaches the threshold of the sequential threshold, a sequential prefetch address sequence is generated. In this embodiment, the sequential threshold can be set to 8 for example.

[0136] Step-through access pattern detection: A step-through difference logger and a corresponding step-through counter are set up to record the difference and count between the current address and the previous address. If the difference is not equal to the previous difference, the step-through counter is reset to zero; if they are equal, it is incremented by 1. Simultaneously, a step-through threshold is set. When the step-through counter reaches the threshold of the step-through threshold, a step-through prefetch request sequence is generated. In this embodiment, the step-through threshold can be set to, for example, 4.

[0137] According to some embodiments, when the prefetcher receives the prefetch address sequence, it activates the prefetch request:

[0138] The prefetcher receives a prefetch request sequence, marks it as a prefetch request, reads the local directory, and obtains the local directory results. The local directory results include:

[0139] If the local directory is already present in the device's cache, the prefetch request will be cancelled.

[0140] If the local directory is not hit, determine whether the address space of the prefetch address is in the CHI domain's memory or the CXL domain's memory extension. If it is in memory extension, generate a local read data request and send it to the CXL domain's memory extension, and store the returned data in the local cache. If it is in memory, determine the space status of the local cache. Specifically: if the local cache is free, generate a local read data request and send it to the CHI domain's SN (memory), and store the returned data in the local cache; if the local cache is not free, generate a prefetch command (Prefetch target Tgt) request in the CHI protocol and send it to the CHI domain's SN (memory).

[0141] According to some embodiments, the identification of the local cache idle state can be determined based on the local directory read results. Specifically, the local cache directory structure in this embodiment can be, for example, an eight-way grouped connection. An `allstate_result` register is added to the directory, mainly used to: when a prefetch request is made to read the local directory, obtain all path target tag information and status information for the current set address, and use this information to identify the number of currently existing I-state and E-state states. Specifically:

[0142] The prefetch request reads the local directory, but fails to find it. The 8-way information for the missed request is as follows:

[0143] If reading the directory reveals that the status information of the eight paths is a combination of memory status and MSO status, then the full state detection result allstate_result=0, indicating that the current set address is busy using local cache resources and is in a non-idle state.

[0144] If reading the directory reveals an eight-way status information that is a combination of modified / exclusive / shared / owned / invalid MESOI, then allstate_result will be a non-zero value, recording the number of I-states and E-states in the eight-way information. For example, if allstate_result is currently 3, it indicates that the current set address has a usable item in the local resource. The local cache idle threshold register allstate_threshold is set, and the corresponding physical address is allocated. This can be configured in software, with a default value of 2. When allstate_result is greater than allstate_threshold, the local cache is considered to be in an idle state; when allstate_result is less than or equal to allstate_threshold, the local cache is considered to be in a non-idle state.

[0145] By identifying the idle state of the local cache, the prefetching of the local cache or the prefetching of the underlying device can be controlled to improve processing efficiency.

[0146] A block diagram of a request processing apparatus according to an exemplary embodiment is shown. (Refer to...) Figure 8 The device 800 includes:

[0147] The information acquisition unit 801 is used to acquire address-related information corresponding to the access address in the access request when an access request for the target device is received.

[0148] The result acquisition unit 802 is used to acquire a first directory hit result based on cache directory information when the address correlation information indicates that there is no address correlation. The first directory hit result is used to indicate the domain to which the target device belongs.

[0149] The request processing unit 803 is used to generate a listening request when the first directory hit result indicates a hit, and to execute the response process corresponding to the listening request according to the domain to which the target device belongs, and obtain the response result.

[0150] According to some embodiments, the result acquisition unit 802 is further configured to:

[0151] If address correlation information indicates that there is address correlation or the resource to be processed is occupied, the access address is cached.

[0152] According to some embodiments, the request processing unit 803 is further configured to:

[0153] When the access request is a CXL request, the prefetch address sequence information is obtained according to the address information of the CXL request and the prefetch access mode, and the prefetch request is activated according to the prefetch address sequence information. The prefetch access mode includes at least one of sequential access mode and step access mode.

[0154] In response to the prefetch request, the second directory hit result is obtained based on the prefetch address sequence information and cache directory information, and the process corresponding to the second directory hit result is executed.

[0155] According to some embodiments, when the request processing unit 803 is used to execute the process corresponding to the second directory hit result, it is specifically used for at least one of the following:

[0156] If the second directory hit result indicates a hit, cancel the prefetch request;

[0157] If the second directory hit result indicates a no-hit, obtain the access space corresponding to the prefetch address, and execute the process corresponding to the second directory hit result based on the access space.

[0158] According to some embodiments, when the request processing unit 803 executes the process corresponding to the second directory hit result based on the access space, it is specifically used for at least one of the following:

[0159] When accessing a memory extension of the CXL domain, send the first local read request to the memory extension of the CXL domain and store the data returned by the memory extension of the CXL domain in the local cache;

[0160] When accessing memory in the CHI domain, obtain the free status information of the local cache. If the free status information indicates that the local cache is in a free state, send a second local read request to the memory in the CHI domain and store the data returned by the memory in the CHI domain into the local cache.

[0161] When accessing memory in the CHI domain, obtain the free status information of the local cache. If the free status information indicates that the local cache is not free, use the prefetch command in the CHI protocol to control the slave node to perform preprocessing.

[0162] According to some embodiments, when generating a listening request in the event that the first directory hit result indicates a hit, the request processing unit 803 is specifically used for at least one of the following:

[0163] If the directory hit result indicates a hit on a CHI domain device, the generated listening request will be converted into a consistent listening request for the CHI domain.

[0164] If the directory hit result indicates a CXL domain device hit, the generated listening request will be converted into a CXL domain consistent listening request.

[0165] According to some embodiments, the request processing unit 803 is further specifically used for:

[0166] If the directory hit result indicates a no-hit and the external storage access information indicates access to external storage, generate an external storage access request corresponding to the domain of the external storage space to be accessed, and execute the process corresponding to the external storage access request.

[0167] If the external storage access information indicates that external storage is not accessed or the external storage access request has been completed, the local cache is updated. After the update is completed, the corresponding protocol response result information is generated according to the protocol tag and the response is processed.

[0168] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0169] Figure 9 A schematic block diagram of an example electronic device 900 that can be used to implement embodiments of the present disclosure is shown. The electronic device 900 is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0170] like Figure 9 As shown, the electronic device 900 includes a computing unit 901, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 902 or a computer program loaded into a random access memory (RAM) 903 from a storage unit 908. The RAM 903 may also store various programs and data required for the operation of the electronic device 900. The computing unit 901, ROM 902, and RAM 903 are interconnected via a bus 904. An input / output (I / O) interface 905 is also connected to the bus 904.

[0171] Multiple components in electronic device 900 are connected to I / O interface 905, including: input unit 906, such as keyboard, mouse, etc.; output unit 907, such as various types of displays, speakers, etc.; storage unit 908, such as disk, optical disk, etc.; and communication unit 909, such as network card, modem, wireless transceiver, etc. Communication unit 909 allows electronic device 900 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0172] The computing unit 901 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 901 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 901 performs the various methods and processes described above. For example, in some embodiments, the above methods can be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 908. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 900 via ROM 902 and / or communication unit 909. When the computer program is loaded into RAM 903 and executed by the computing unit 901, one or more steps of the methods described above can be performed. Alternatively, in other embodiments, the computing unit 901 can be configured to perform the above methods by any other suitable means (e.g., by means of firmware).

[0173] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0174] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0175] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0176] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0177] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), the Internet, and blockchain networks.

[0178] Computer systems can include clients and servers. Clients and servers are generally geographically separated and typically interact via communication networks. The client-server relationship is established by computer programs running on the respective computers and having a client-server relationship with each other. A server can be a cloud server, also known as a cloud computing server or cloud host, a hosting product within the cloud computing service system that addresses the shortcomings of traditional physical hosts and VPS (Virtual Private Server, or simply "VPS") services, such as high management difficulty and weak business scalability. Servers can also be servers for distributed systems or servers incorporating blockchain technology.

[0179] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.

[0180] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A request processing method, characterized in that, include: Upon receiving an access request from the target device, obtain the address-related information corresponding to the access address in the access request; If the address correlation information indicates that there is no address correlation, a first directory hit result is obtained based on the cache directory information, wherein the first directory hit result is used to indicate the domain to which the target device belongs; If the first directory hit result indicates a hit, a listening request is generated, and a response process corresponding to the listening request is executed according to the domain to which the target device belongs, and a response result is obtained; If the directory hit result indicates a no-hit and the external storage access information indicates access to external storage, an external storage access request corresponding to the domain of the accessed external storage space is generated, and the process corresponding to the external storage access request is executed. If the external storage access information indicates that external storage is not accessed or the external storage access request has been completed, the local cache is updated. After the update is completed, the corresponding protocol response result information is generated according to the protocol tag and the response is processed.

2. The method according to claim 1, characterized in that, The method further includes: If the address correlation information indicates that there is address correlation or that the resource to be processed is occupied, the access address is cached.

3. The method according to claim 1, characterized in that, The method further includes: When the access request is a CXL request, prefetch address sequence information is obtained based on the address information and prefetch access mode of the CXL request, and the prefetch request is activated based on the prefetch address sequence information, wherein the prefetch access mode includes at least one of sequential access mode and step access mode; In response to the prefetch request, the second directory hit result is obtained based on the prefetch address sequence information and the cache directory information, and the process corresponding to the second directory hit result is executed.

4. The method according to claim 3, characterized in that, The process for executing the second directory hit result includes at least one of the following: If the second directory hit result indicates a hit, the prefetch request is cancelled; If the second directory hit result indicates a no-hit, obtain the access space corresponding to the prefetch address, and execute the process corresponding to the second directory hit result based on the access space.

5. The method according to claim 4, characterized in that, The process of executing the second directory hit result based on the access space includes at least one of the following: In the case where the access space is a memory extension of the CXL domain, a first local read request is sent to the memory extension of the CXL domain, and the data returned by the memory extension of the CXL domain is stored in the local cache; When the access space is the memory of the CHI domain, obtain the idle status information of the local cache. If the idle status information indicates that the local cache is in an idle state, send a second local read request to the memory of the CHI domain, and store the data returned by the memory of the CHI domain into the local cache. When the access space is memory in the CHI domain, the idle status information of the local cache is obtained. If the idle status information indicates that the local cache is in a non-idle state, the prefetch command in the CHI protocol is used to control the slave node to perform preprocessing.

6. The method according to claim 1, characterized in that, When the first directory hit result indicates a hit, generating a listening request includes at least one of the following: If the directory hit result indicates a hit on a CHI domain device, the generated listening request will be converted into a consistent listening request for the CHI domain. If the directory hit result indicates a CXL domain device hit, the generated listening request will be converted into a CXL domain consistent listening request.

7. A request processing apparatus, characterized in that, include: The information acquisition unit is used to acquire address-related information corresponding to the access address in the access request when an access request for the target device is received. The result acquisition unit is configured to acquire a first directory hit result based on cache directory information when the address correlation information indicates that there is no address correlation, wherein the first directory hit result is used to indicate the domain to which the target device belongs; The request processing unit is configured to generate a listening request when the first directory hit result indicates a hit, and execute a response process corresponding to the listening request according to the domain to which the target device belongs, and obtain a response result; The request processing unit is further configured to generate an external storage access request corresponding to the domain to which the accessed external storage space belongs, and execute the process corresponding to the external storage access request, when the directory hit result indicates a miss and the external storage access information indicates access to external storage. If the external storage access information indicates that external storage is not accessed or the external storage access request has been completed, the local cache is updated. After the update is completed, the corresponding protocol response result information is generated according to the protocol tag and the response is processed.

8. An electronic device, characterized in that, include: processor; Memory used to store the processor's executable instructions; The processor is configured to execute the instructions to implement the request processing method as described in any one of claims 1 to 6.

9. A request processing system, characterized in that, The system includes a CHI domain, a CXL domain, and a CHI-CXL bridge. The CHI domain includes at least one CPU cluster, and each CPU cluster in the at least one CPU cluster is connected to the CHI-CXL bridge via a CHI bus protocol interface. The CXL domain includes at least one device with a CXL interface, and each device with a CXL interface in the at least one CXL interface is connected to the CHI-CXL bridge via a CXL bus interface protocol. The CHI-CXL bridge is configured to execute the request processing method according to any one of claims 1 to 6.

Images