Optimization method of parameterized quantum circuit and related device

Abstract

The embodiment of the invention discloses an optimization method of a parameterized quantum circuit and a related device, and relates to the technical field of quantum computing. After a to-be-optimized parameter set of the parameterized quantum circuit is determined, a first number of to-be-optimized parameters can be selected from the to-be-optimized parameter set for partial derivative calculation; the selected first number of to-be-optimized parameters can be optimized based on the calculated partial derivative; in the optimization process of the parameterized quantum circuit, only few partial derivatives need to be calculated in each iterative optimization process; in this way, computing resources needed by each round of iterative optimization process for the parameterized quantum circuit are small, and the optimization method for the quantum circuit can be suitable for more quantum computers.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to an optimization method and related apparatus for parameterized quantum circuits. Background Technology

[0002] Parameterized quantum circuits (PQCs) can be understood as quantum circuits composed of a series of parameterized quantum gates. Their core idea lies in utilizing the superposition and entanglement properties of quantum systems to process information and adjusting quantum states by changing parameters in order to find the optimal quantum circuit for solving specific problems. PQCs are commonly used in quantum machine learning algorithms, such as quantum classification and quantum regression tasks.

[0003] The parameters of quantum gates in parameterized quantum circuits remain unchanged during actual circuit execution; however, the parameters of quantum gates can be adjusted during learning or optimization. Similar to traditional machine learning models, the performance of the model is improved by optimizing the parameters to minimize the loss function.

[0004] In practical applications, PQCs have been used for a variety of tasks, including but not limited to:

[0005] Generative tasks: such as Quantum Generative Adversarial Networks (QGANs); Classification tasks: distinguishing different data categories by training PQCs.

[0006] Optimization of parameterized quantum circuits is an important research direction in the field of quantum computing. It involves adjusting parameters on a given quantum circuit to minimize or maximize a certain objective function, thereby ensuring that the parameterized quantum circuit can be optimally applied in various scenarios. However, optimization methods for parameterized quantum circuits typically require a large amount of computational resources, which undoubtedly increases hardware costs. Summary of the Invention

[0007] This application provides an optimization method and related apparatus for parameterized quantum circuits. In the process of optimizing parameterized quantum circuits, the computational resources required for each iteration can be reduced, thereby helping to improve the hardware adaptability of the optimization process for parameterized quantum circuits.

[0008] The first aspect of this application provides a method for optimizing a parameterized quantum circuit, comprising: determining a set of parameters to be optimized in the parameterized quantum circuit; selecting a first number of parameters to be optimized from the set of parameters to be optimized and performing partial derivative calculations to obtain a first number of partial derivatives; wherein the first number is less than the total number of elements in the set of parameters to be optimized; optimizing the selected first number of parameters to be optimized based on the calculated partial derivatives; and, in response to detecting that optimization of the selected parameters to be optimized has been completed, continuing to select the first number of parameters to be optimized from the set of parameters to be optimized for optimization until the set of parameters to be optimized is an empty set.

[0009] Optionally, the above-mentioned selection of a first number of parameters to be optimized from the set of parameters to be optimized for partial derivative calculation includes: selecting a first number of parameters to be optimized from the set of parameters to be optimized for partial derivative calculation based on the interaction relationship between the parameterized quantum gates corresponding to each parameter to be optimized and the qubit; wherein the above-mentioned interaction relationship includes at least one of the following:

[0010] Timing of parametric quantum gates, qubits of parametric quantum gates.

[0011] Optionally, in response to detecting that the optimization of the selected parameters to be optimized has been completed, the above-mentioned response to selecting the first number of parameters to be optimized from the set of parameters to be optimized for further optimization includes: sorting the parameters to be optimized in the set of parameters to be optimized according to the interaction relationship between the parameterized quantum gates corresponding to each parameter to be optimized and the qubit; and selecting the first number of parameters to be optimized from the set of parameters to be optimized for further optimization based on the sorting result.

[0012] Optionally, the above-mentioned optimization of the selected first number of parameters to be optimized based on the calculated partial derivatives includes: determining the parameter change value of the first number of parameters to be optimized in each iteration optimization process based on the calculated partial derivatives; calculating the loss value of the parameterized quantum circuit after parameter change according to a predefined loss function; and determining that the optimization of the first number of parameters to be optimized is complete in response to detecting that the loss value is less than a predefined loss threshold that matches the first number of parameters to be optimized.

[0013] Optionally, the aforementioned parameter to be optimized is a rotation angle, and the determination of the parameter change values ​​of the aforementioned first number of parameters to be optimized in each iteration of optimization based on the calculated partial derivatives includes:

[0014] Based at least on the current rotation angle and the aforementioned partial derivatives, determine the rotation angle corresponding to the next iteration.

[0015] Optionally, the value of the first number mentioned above is greater than or equal to 1.

[0016] Optionally, the above-mentioned optimization of the selected first number of parameters to be optimized based on the calculated partial derivatives includes: determining the parameter change value of the first number of parameters to be optimized in each iteration optimization process based on the calculated partial derivatives; determining the target partial derivative based on the calculated partial derivatives; determining the parameter change value of the remaining parameters to be optimized in the set of parameters to be optimized, excluding the first number of parameters to be optimized, in each iteration optimization process based on the target partial derivative; calculating the loss value of the parameterized quantum circuit after parameter change according to a predefined loss function; and determining that the optimization of the first number of parameters to be optimized is complete in response to detecting that the loss value is less than a predefined loss threshold matching the first number of parameters to be optimized.

[0017] A second aspect of this application provides an optimization apparatus for parameterized quantum circuits, comprising:

[0018] The determining unit is used to determine the set of parameters to be optimized in the parameterized quantum circuit;

[0019] The calculation unit is used to select a first number of parameters to be optimized from the set of parameters to be optimized and perform partial derivative calculations to obtain a first number of partial derivatives; wherein the first number is less than the total number of elements in the set of parameters to be optimized.

[0020] An optimization unit is used to optimize a first number of selected parameters based on the calculated partial derivatives.

[0021] An iterative unit is used to continue selecting the first number of parameters to be optimized from the set of parameters to be optimized for optimization in response to the detection that optimization for the selected parameters to be optimized has been completed, until the set of parameters to be optimized is an empty set.

[0022] A third aspect of this application provides an electronic device, including: a processor and a memory;

[0023] The processor is connected to a memory, wherein the memory is used to store computer programs and the processor is used to invoke the computer programs to execute the methods as described in the first aspect of the embodiments of this application.

[0024] A fourth aspect of this application provides a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, perform the method as described in the first aspect of this application.

[0025] The optimization method and related apparatus for parameterized quantum circuits provided in this application, after determining the set of parameters to be optimized for the parameterized quantum circuit, can select a first number of parameters to be optimized from the set for partial derivative calculation, and optimize the selected first number of parameters based on the calculated partial derivatives. This allows for a smaller number of partial derivatives to be calculated in each iteration of the optimization process for the parameterized quantum circuit. In this way, the computational resources required for each round of iterative optimization of the parameterized quantum circuit are smaller, which is beneficial for the optimization method for quantum circuits to be applicable to more quantum computers.

[0026] This can also be understood as the method disclosed herein, which allows for the optimization of parameterized quantum circuits using a low-cost quantum computer. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 An example system block diagram of an optimization method for implementing parameterized quantum circuits according to an embodiment of this application is shown;

[0029] Figure 2 A flowchart illustrating an embodiment of the optimization method for parameterized quantum circuits provided in this application is shown.

[0030] Figure 3 A schematic diagram of the structure of an optimization device for parameterized quantum circuits provided in one embodiment of this application is shown;

[0031] Figure 4 A schematic diagram of the structure of a computer device provided in one embodiment of this application is shown. Detailed Implementation

[0032] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0033] Classical computers use transistors to encode information in binary data, such as bits, where each bit can represent a value of 1 or 0. These 1s and 0s act as switches to drive the functions of a classical computer. If there are n bits of data, there are 2^n possible classical states, and one state is represented at a time.

[0034] Quantum computers use quantum processors that operate on data represented by qubits, also known as quantum bits. A single qubit can represent the classical binary states "0" or "1", or a superposition of "0" and "1". Because it can represent a superposition of "0" and "1", a qubit can represent both "0" and "1" states simultaneously. For example, if there are n bits of data, then 2^n qubits can represent n bits of data. n A quantum state can be represented simultaneously. Furthermore, qubits in a superposition can be correlated with each other, a phenomenon known as entanglement, where the state of one qubit (whether 1, 0, or both) depends on the state of another qubit, and more information can be encoded within two entangled qubits. Based on the principles of superposition and entanglement, qubits enable quantum computers to perform functions that might be relatively complex and time-consuming for classical computers.

[0035] Please refer to Figure 1 This illustrates an example system block diagram for implementing a parameterized quantum circuit optimization method according to an embodiment of this application. System 100 may be a hybrid computing system comprising a combination of one or more quantum computers, quantum systems, and / or classical computers. Figure 1 In the example shown, system 100 may include a quantum system 110 and a classical computer 120. In one implementation, the quantum system 110 and the classical computer 120 may be configured to communicate via one or more wired and / or wireless connections (e.g., wireless networks). The quantum system 110 may include a quantum chipset consisting of one or more quantum chips, comprising various hardware components for processing data encoded in qubits. The quantum chipset may be a quantum computing core surrounded by infrastructure to protect the quantum chips from electromagnetic noise sources, mechanical vibration sources, heat sources, and other noise sources that can degrade the performance of the quantum chips. The classical computer 120 may be electronically integrated with the quantum system 110 via any suitable wired and / or wireless electronic connection.

[0036] exist Figure 1 In the example shown, quantum system 110 can be any suitable set of components capable of performing quantum operations on a physical system. Quantum operations, such as quantum gate operations, manipulate the quantum states of qubits to evolve and / or become entangled. Figure 1In the illustrated example embodiment, the quantum system 110 may include a measurement and control unit 111, an interface 112, and a quantum chip 113. In some embodiments, all or part of each of the measurement and control unit 111, interface 112, and quantum chip 113 may be located in a cryogenic environment to facilitate the performance of quantum operations. The quantum chip 113 may be any hardware capable of processing information using quantum states. This hardware may include multiple qubits and means for coupling or entanglement of the qubits to process information using quantum states. Qubits may include, but are not limited to, charge qubits, flux qubits, phase qubits, spin qubits, and ion qubits. The quantum chip may include a set of quantum logic gates configured to perform quantum logic operations on the qubits stored in a quantum register. The quantum gates may include one or more single-qubit gates, two-qubit gates, and / or other multi-qubit gates.

[0037] The measurement and control unit 111 can be any combination of digital computing devices capable of performing quantum computing (e.g., executing quantum circuits) in conjunction with interface 112. This digital computing device may include a digital processor and memory for storing and executing quantum instructions using interface 112. The digital computing device may also include a communication protocol device for receiving instructions and sending the results of the performed quantum computing to a classical computer. Additionally, the digital computing device may include a communication interface having interface 112. In one embodiment, the measurement and control unit 111 may be configured to receive classical instructions (e.g., from classical computer 120) and convert these classical instructions into measurement and control instructions for interface 112. The measurement and control instructions provided by the measurement and control unit 111 to interface 112 may be, for example, digital signals indicating which quantum gates in a quantum gate array need to be applied to the qubits to perform a specific function. Interface 112 may be configured to convert these digital signals into analog signals (e.g., analog pulses of microwave pulses), which can be used to apply quantum gates to the qubits to manipulate the interactions between the qubits.

[0038] Interface 112 may be a classical-quantum interface, comprising a combination of devices capable of receiving instructions from the integrated measurement and control unit 111 and converting those instructions into a means for implementing quantum operations. In one embodiment, interface 112 may convert instructions from the integrated measurement and control unit 111 into drive signals capable of driving or manipulating qubits, and / or applying quantum gates to qubits. Additionally, interface 112 may be configured to convert signals received from the quantum chip 113 into digital signals capable of being processed and transmitted by the integrated measurement and control unit 111. Devices included in interface 112 may include, but are not limited to, digital-to-analog converters, analog-to-digital converters, waveform generators, attenuators, amplifiers, optical fibers, lasers, and filters. Interface 112 may further include circuitry configured to measure multiple qubits after the application of quantum gates, wherein the measurements may produce results represented in classical bits. Each measurement performed by interface 112 may be read out to a device connected to the quantum system 110, such as a classical computer 120. The multiple measurement results provided by interface 112 may represent probabilistic results.

[0039] The classical computer 120 can include hardware components such as a processor and storage devices (e.g., including memory devices and classical registers) for processing data encoded in classical bits. In one embodiment, the classical computer 120 can be configured to provide the quantum system 110 with various control signals, instructions, and data encoded in classical bits. Further, quantum states measured by the quantum system 110 can be read out by the classical computer 120, and the classical computer 120 can store the measured quantum states as classical bits in classical registers. In one embodiment, the classical computer 120 can be any suitable combination of computer-executable hardware and / or computer-executable software capable of executing the preparation module 121 to perform quantum computation using data stored in the data storage module 122 as part of the construction and computation. The data storage module 122 can be a repository for data to be analyzed using quantum computing algorithms and the results of that analysis. The preparation module 121 can be a program or module capable of preparing classical data from the data storage module 122 as part of a quantum circuit implementation. Preparation module 121 can be instantiated as part of a larger algorithm, such as an application programming interface (API) function call, or by resolving hybrid classical-quantum computing into aspects of quantum and classical computing. For example, preparation module 121 can generate instructions for creating quantum circuits using quantum gates. In an embodiment, such instructions can be stored by the measurement and control unit 111 and can be instantiated by components of interface 112 to execute, enabling quantum operations of quantum gates to be performed on quantum chip 113.

[0040] The classic computer 120 may be a laptop computer, desktop computer, vehicle-integrated computer, smart mobile device, tablet device, and / or any other suitable classic computing device. Additionally or alternatively, the classic computer 120 may also operate as part of a cloud computing service model, such as Software as a Service (SaaS), Platform as a Service (PaaS), or Infrastructure as a Service (IaaS). The classic computer 120 may also reside in a cloud computing deployment model, such as a private cloud, community cloud, public cloud, or hybrid cloud.

[0041] As can be seen from the above background information, before a parametric quantum circuit can be used in practice, it may be necessary to optimize and train the parametric quantum circuit so that it can perform specific tasks more accurately.

[0042] In optimizing parametric quantum circuits, it is typically necessary to optimize the quantum gate parameters. Since a parametric circuit usually includes multiple quantum gates, the parameters of each quantum gate need to be determined during optimization. In related techniques, the full-parameter gradient descent method is commonly used. However, when using this method to determine the quantum gate parameters, the partial derivatives of each quantum gate parameter need to be calculated in each optimization iteration, resulting in a large amount of data to be computed in each iteration and thus a slow iteration process.

[0043] In other words, in the relevant technologies, a large amount of computing resources are required in each iteration, which in turn increases the hardware requirements of the optimization terminal in the optimization process of parametric quantum circuits.

[0044] In this disclosure, only partial derivatives in certain directions need to be calculated in each iteration, thereby reducing the computational cost and improving the efficiency of each iteration. This approach is also more conducive to optimizing parametric quantum circuits on quantum computers.

[0045] Please refer to Figure 2 This document illustrates a flowchart of an embodiment of an optimization method for parameterized quantum circuits provided in this application. This method can be applied to computer devices, which refer to electronic devices capable of data computation and processing. For example, the executing entity for each step could be... Figure 1 The method may include the following steps: (A quantum computer or a classical computer, selected as needed).

[0046] Step 201: Determine the set of parameters to be optimized for the parameterized quantum circuit;

[0047] Step 202: Select a first number of parameters to be optimized from the set of parameters to be optimized and perform partial derivative calculations to obtain the first number of partial derivatives;

[0048] Step 203: Based on the calculated partial derivatives, optimize the first number of selected parameters to be optimized;

[0049] Step 204: In response to the detection that the optimization of the selected parameters to be optimized has been completed, continue to select a first number of parameters to be optimized from the set of parameters to be optimized for optimization, until the set of parameters to be optimized is empty.

[0050] Among them, the first number is less than the total number of elements in the set of parameters to be optimized.

[0051] As an example, a parameterized quantum circuit may include multiple parametric quantum gates, and the parameter values ​​of these gates can be determined through optimization training. The set of parameters of the parametric quantum gates in a parameterized quantum circuit can be understood as the set of parameters to be optimized.

[0052] It should be understood that, in this disclosure, optimizing a parameterized quantum circuit can be understood as determining the parameter value corresponding to each parameterized quantum gate in the parameterized quantum circuit, so that the performance of the parameterized quantum circuit meets the requirements.

[0053] As an example, the set of parameters to be optimized may contain a large number of parameters, while the first number can be much smaller than the total number of elements in the set. In this way, in each optimization iteration, only the partial derivative of the first number needs to be calculated. For example, the first number can be 1 or 2, etc.

[0054] In some implementations, the first number can be 1. In this way, only one partial derivative value can be calculated in each iteration of optimization, which greatly improves the efficiency of each iteration of optimization.

[0055] It should be understood that the idea behind this disclosure is to improve gradient optimization methods and apply them to the optimization of parametric quantum circuits. Therefore, partial derivatives can indicate how to perform gradient descent and can avoid local minima, thus helping to make the final optimization results more accurate.

[0056] In other words, partial derivative calculation can be understood as an important part of gradient optimization methods. In this disclosure, only the partial derivatives of the first number of parameters to be optimized need to be calculated in each iteration. The calculation of the partial derivatives of the parameters to be optimized usually consumes a lot of computing resources. Therefore, compared with the related technology that requires the calculation of the partial derivatives of all parameters to be optimized in each iteration, the method of this disclosure only needs to calculate the partial derivatives of a portion of the parameters to be optimized, which can greatly improve the efficiency of each iteration and help to optimize more efficiently.

[0057] As an example, the partial derivative calculation here can be understood as the calculation of the first-order partial derivative.

[0058] In this disclosure, the first number of parameters to be optimized can be optimized based on the calculated partial derivatives. That is, by increasing the number of iterations, this disclosure reduces the computational load of each iteration, and consequently reduces the computational resources required for each iteration.

[0059] As can be seen, in this disclosure, after determining the set of parameters to be optimized for the parameterized quantum circuit, a first number of parameters to be optimized can be selected from the set for partial derivative calculation. Based on the calculated partial derivatives, the selected first number of parameters to be optimized can be optimized. This allows for a smaller number of partial derivatives to be calculated in each iteration of the optimization process for the parameterized quantum circuit. In this way, the computational resources required for each round of iterative optimization for the parameterized quantum circuit are smaller, which is beneficial for the optimization method for quantum circuits to be applicable to more quantum computers.

[0060] This can also be understood as the method disclosed herein, which allows for the optimization of parameterized quantum circuits using a low-cost quantum computer.

[0061] In some implementations, the first number of parameters to be optimized from the set of parameters to be optimized can be selected randomly. This way, the process of selecting the first number will not consume too much time, and thus will hardly affect the overall iteration efficiency.

[0062] In some embodiments, step 202 (selecting a first number of parameters to be optimized from the set of parameters to be optimized, calculating the partial derivatives, and obtaining a first number of partial derivatives) may specifically include:

[0063] Based on the interaction relationship between the parameterized quantum gates corresponding to each parameter to be optimized and the qubit, the first number of parameters to be optimized are selected from the set of parameters to be optimized for partial derivative calculation.

[0064] The interaction relationship must include at least one of the following:

[0065] Timing of parametric quantum gates, qubits of parametric quantum gates.

[0066] It should be understood that the interaction relationship can indicate to some extent the influence of a parametric quantum gate on a parameterized quantum circuit. For example, if a parametric quantum gate acts on multiple qubits, and only a few other quantum gates also act on those multiple qubits, then it can be determined that the parametric quantum gate has a relatively large influence on the parameterized quantum circuit.

[0067] In other words, when a qubit is acted upon by multiple parametric quantum gates, it can be characterized that any one of the parametric quantum gates has a relatively small influence on the parameterized quantum circuit. At the same time, the parametric quantum gate whose action time is in the middle has a smaller influence on the parameterized quantum circuit than the parametric quantum gate whose action time is at the beginning or end.

[0068] In this disclosure, based on the interaction between the parameterized quantum gates corresponding to each parameter to be optimized and the qubit, it is possible to determine a first number of parameterized quantum gates that have a significant impact on the parameterized quantum circuit. In this way, prioritizing the optimization of the first number of parameterized quantum gates that have a significant impact on the parameterized quantum circuit not only helps to improve the convergence speed of the training process.

[0069] In some embodiments, the response to detecting that optimization of the selected parameters to be optimized has been completed, and then selecting a first number of parameters to be optimized from the set of parameters to be optimized for further optimization, may specifically include:

[0070] Based on the interaction between the parameterized quantum gates corresponding to each parameter to be optimized and the qubit, the optimization order of the parameters to be optimized in the set of parameters to be optimized is sorted.

[0071] Based on the sorting results, the first number of parameters to be optimized are selected from the above set of parameters to be optimized for optimization.

[0072] As an example, since the effect of parametric quantum gates on qubits can be determined, the degree of influence of each parametric quantum gate on the parameterized quantum circuit can be determined. Then, the optimization order of the parameters to be optimized in the set of parameters to be optimized can be sorted according to the order of the degree of influence.

[0073] As an example, by sorting the parameters to be optimized in the set of parameters to be optimized, we can first optimize the parameters of the parameterized quantum gates that have a greater impact on the parameterized quantum circuit, and then optimize the parameters of the parameterized quantum gates that have a smaller impact on the parameterized quantum circuit. This helps to accelerate the convergence speed of the training process for the parameterized quantum circuit and helps to efficiently obtain the optimized parameterized quantum circuit.

[0074] In some embodiments, step 203 (optimizing the selected first number of parameters to be optimized based on the calculated partial derivatives) may specifically include: determining the parameter change value of the first number of parameters to be optimized in each iteration optimization process based on the calculated partial derivatives; calculating the loss value of the parameterized quantum circuit after parameter change according to a predefined loss function; and determining that the optimization of the first number of parameters to be optimized is complete in response to detecting that the loss value is less than a predefined loss threshold that matches the first number of parameters to be optimized.

[0075] It should be understood that since this disclosure still uses the gradient descent method in the optimization iteration process for parameterized quantum circuits, the partial derivatives can indicate the gradient. Thus, by calculating the partial derivatives, the parameter changes of the first number of parameters to be optimized in each iteration can be determined.

[0076] As an example, by setting a loss function, it is possible to determine the impact of parameter changes on the parameterized quantum circuit. In other words, setting a loss function makes the changes to the parameterized quantum circuit during the iteration process more concrete. This allows for a better determination of when the optimization of the first number of parameters to be optimized is complete.

[0077] In some embodiments, the parameter to be optimized is a rotation angle, and the above-mentioned determination of the parameter change value of a first number of parameters to be optimized in each iteration optimization process based on the calculated partial derivatives may specifically include: determining the rotation angle corresponding to the next iteration process based at least on the current rotation angle and the partial derivatives.

[0078] As an example, since partial derivatives can be calculated in each iteration, and partial derivatives indicate the angle value to be changed at the current rotation angle, the rotation angle corresponding to the next iteration can be determined based on the current rotation angle and the partial derivatives.

[0079] The concept of this disclosure is that, in each iteration, only the partial derivatives of the first number of parameters to be optimized are calculated. Compared with related technologies that require the calculation of the partial derivatives of all parameters to be optimized, this method of the present disclosure obviously greatly reduces the amount of computation in each iteration process, which helps to speed up the iteration efficiency of each round.

[0080] In some embodiments, step 203 (optimizing the selected first number of parameters to be optimized based on the calculated partial derivatives) may specifically include: determining the parameter change value of the first number of parameters to be optimized in each iteration optimization process based on the calculated partial derivatives; determining the target partial derivative based on the calculated partial derivatives; determining the parameter change value of the remaining parameters to be optimized in each iteration optimization process based on the target partial derivative; calculating the loss value of the parameterized quantum circuit after parameter change according to a predefined loss function; and determining that the optimization of the first number of parameters to be optimized is complete in response to detecting that the loss value is less than a predefined loss threshold matching the first number of parameters to be optimized.

[0081] As an example, during an iteration, the values ​​of other parameters in the set of parameters to be optimized, excluding the first number, can be determined based on the calculated partial derivatives, and thus changed during the iteration process. This helps to further accelerate the convergence efficiency in the iterative optimization process.

[0082] It should be understood that the specific choice of loss function can be limited according to the actual situation. For example, any of the commonly used loss functions such as mean squared error loss function and mean absolute error loss function can be used.

[0083] To facilitate understanding of the ideas in this disclosure, the following section will compare and explain the differences between the gradient descent methods in this disclosure and those in related technologies.

[0084] In the parameter optimization process of variable quantum circuits, when using the Fast Parallel Gradient Descent (FPGD) algorithm, the quantum circuits used to estimate partial derivatives in different directions are usually different. This is mainly because there is no mechanism similar to backpropagation in classical computation to estimate the entire gradient at once; this is determined by the inherent characteristics of quantum states. The primary method for calculating partial derivatives in parameterized quantum circuits (PQC) is called the parameter shift rule, which can only evaluate one component of the partial derivative at a time. Therefore, estimating the gradient... The typical cost is estimating a single partial derivative. The cost is d times, where d can be indicated as a parameter.

[0085] Generally, the parameter update formula for gradient descent can be:

[0086]

[0087] Among them, l r Represents the learning rate. The gradient is calculated using parameter displacement in variable quantum circuits. This method is the same as the general gradient descent method used in related technologies for iterative optimization.

[0088] In this disclosure, the iterative process can be represented as follows:

[0089]

[0090] The representative is selected as i n The direction of the random index ∈{1, 2, ..., d} (i n Position 1 is set to 1, and all other positions are set to 0. These are the corresponding partial derivatives, in the presence of noise:

[0091] represent The unbiased estimate, in each iteration of the formula In this case, only information about a partial derivative is needed. Of course, it's also possible to... Using the partial derivative in the unit direction as the partial derivative in all d directions, we still only need one partial derivative information, but we can update all parameters simultaneously:

[0092]

[0093] The calculation method is as follows:

[0094]

[0095] ∈ can usually be chosen as Multiples of.

[0096] The process of developing the ideas in this disclosure can be summarized as follows:

[0097] Initialization parameters: Set initial parameters And other necessary parameters.

[0098] Parameter selection and gradient estimation: In each iteration, an index i is randomly selected. n (Selected uniformly from 1, 2, 3, ..., d); calculate partial derivatives using the parameter-shift rule or other methods. Where f(θ) n ) is the cost function that the model needs to minimize.

[0099] Update parameters: based on the selected parameter i n and its corresponding partial derivatives Update the parameter vector θ, and update the formula as follows:

[0100] Iteration Termination Condition: Repeat the steps of parameter selection, gradient estimation, and parameter update until a certain termination condition is met, such as reaching a preset maximum number of iterations, the cost function value falling below a certain threshold, or the parameter update amount being very small. This completes the iterative optimization of the parameterized quantum circuit.

[0101] Based on the ideas presented herein, the iterative optimization process for quantum circuits can have the following advantages:

[0102] This reduces the cost of each iteration, thus improving computational efficiency. It should be understood that in each iteration, this disclosure only requires calculating the partial derivative in one direction, unlike FPGD which requires calculating the partial derivatives of all parameters. In variational quantum circuits, due to the characteristics of quantum circuits, calculating each partial derivative is typically quite costly; therefore, the method of this disclosure significantly reduces the computational cost per iteration.

[0103] Lower overall cost: Although the method disclosed herein may require more iterations to converge, the overall cost of this disclosure (measured by the number of partial derivatives) is likely to be lower due to the low cost per iteration, especially when the parameter dimension is high and the Lipschitz constant (the rate of change of the function) is highly anisotropic, the method disclosed herein can obviously have a lower cost.

[0104] It exhibits greater robustness and adaptability to measurement noise. Due to the inherent noise in quantum measurement processes, any data acquired from a quantum computer is susceptible to this noise. The method disclosed herein maintains high convergence stability even in noisy environments by updating using only partial information (i.e., a single partial derivative).

[0105] Adaptability: The approach disclosed herein typically allows for larger learning rates than FPGD, which helps to accelerate convergence. Furthermore, the learning rate adjustment in the approach disclosed herein is relatively simple because it does not require consideration of the joint effects of all parameters.

[0106] Wide range of applications: The method disclosed herein is not only applicable to convex optimization problems, but can also be effectively applied to non-convex optimization problems, which is especially important in quantum computing, since many quantum optimization problems (such as VQE, QAOA, etc.) are non-convex.

[0107] Figure 3 A schematic diagram of an optimization device for parameterized quantum circuits according to an embodiment of this application is shown. The device includes:

[0108] The determining unit 301 is used to determine the set of parameters to be optimized for the parameterized quantum circuit;

[0109] The calculation unit 302 is used to select a first number of parameters to be optimized from the set of parameters to be optimized and perform partial derivative calculations to obtain a first number of partial derivatives; wherein the first number is less than the total number of elements in the set of parameters to be optimized.

[0110] The optimization unit 303 is used to optimize the first number of selected parameters based on the calculated partial derivatives.

[0111] The iteration unit 304 is used to continue selecting the first number of parameters to be optimized from the set of parameters to be optimized for optimization in response to the detection that the optimization of the selected parameters to be optimized has been completed, until the set of parameters to be optimized is an empty set.

[0112] In some embodiments, the above-mentioned calculation unit 302 is further configured to: select a first number of parameters to be optimized from the set of parameters to be optimized and perform partial derivative calculations based on the interaction relationship between the parameterized quantum gates corresponding to each parameter to be optimized and the qubits.

[0113] The aforementioned relationships include at least one of the following:

[0114] Timing of parametric quantum gates, qubits of parametric quantum gates.

[0115] In some embodiments, the computing unit 302 is further configured to: sort the optimization order of the parameters to be optimized in the set of parameters to be optimized according to the interaction relationship between the parameter-containing quantum gates corresponding to each parameter to be optimized and the qubit; and select the first number of parameters to be optimized from the set of parameters to be optimized for optimization according to the sorting result.

[0116] In some embodiments, the optimization unit 303 is further configured to: determine the parameter change values ​​of the first number of parameters to be optimized in each iteration optimization process based on the calculated partial derivatives; calculate the loss value of the parameterized quantum circuit after parameter change according to a predefined loss function; and determine that the optimization of the first number of parameters to be optimized is complete in response to detecting that the loss value is less than a predefined loss threshold that matches the first number of parameters to be optimized.

[0117] In some embodiments, the parameter to be optimized is a rotation angle, and the optimization unit 303 is further configured to: determine the rotation angle corresponding to the next iteration process based at least on the current rotation angle and the partial derivative.

[0118] In some embodiments, the value of the first number is greater than or equal to 1.

[0119] In some embodiments, the optimization unit 303 is further configured to: determine the parameter change values ​​of the first number of parameters to be optimized in each iteration of optimization based on the calculated partial derivatives; determine the target partial derivative based on the calculated partial derivatives; determine the parameter change values ​​of the remaining parameters to be optimized in each iteration of optimization based on the target partial derivative; calculate the loss value of the parameterized quantum circuit after parameter change according to a predefined loss function; and determine that optimization for the first number of parameters to be optimized is complete in response to detecting that the loss value is less than a predefined loss threshold matching the first number of parameters to be optimized.

[0120] Figure 4 A schematic diagram of the structure of a computer device provided in one embodiment of this application is shown, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the computer system function of the parameterized quantum circuit optimization method in any of the above embodiments.

[0121] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the functions of the computer system of the parameterized quantum circuit optimization method in any of the above embodiments.

[0122] This application also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the functions of the computer system of the parameterized quantum circuit optimization method in any of the above embodiments.

[0123] It is understood that the specific examples in this application are only intended to help those skilled in the art better understand the implementation methods of this application, and are not intended to limit the scope of the invention.

[0124] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0125] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and the implementation methods in this application are not limited in this respect.

[0126] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0127] It is understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0128] It is understood that the memory in the embodiments of this application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Specifically, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0129] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0130] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0131] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0132] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0133] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0134] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0135] The above are merely specific embodiments of this application, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. An optimization method for parameterized quantum circuits, characterized in that, The method comprises: determining a set of to-be-optimized parameters of a parameterized quantum circuit; selecting a first number of to-be-optimized parameters from the set of to-be-optimized parameters for partial derivative calculation, and obtaining a first number of partial derivatives; wherein the first number is less than the total number of elements in the set of to-be-optimized parameters; optimizing the selected first number of to-be-optimized parameters based on the calculated partial derivatives; in response to detecting that the optimization of the selected to-be-optimized parameters is complete, continuing to select the first number of to-be-optimized parameters from the set of to-be-optimized parameters for optimization until the set of to-be-optimized parameters is empty.

2. The method of claim 1, wherein, The method of selecting a first number of to-be-optimized parameters from the set of to-be-optimized parameters for partial derivative calculation comprises: selecting a first number of to-be-optimized parameters from the set of to-be-optimized parameters for partial derivative calculation according to the action relationship of the to-be-optimized parameters corresponding to the parameterized quantum gate on the quantum bits; wherein the action relationship at least includes one of the following: the time sequence of the action of the parameterized quantum gate, and the quantum bit on which the parameterized quantum gate acts.

3. The method of claim 2, wherein, The method of continuing to select the first number of to-be-optimized parameters from the set of to-be-optimized parameters for optimization in response to detecting that the optimization of the selected to-be-optimized parameters is complete comprises: sequentially ordering the to-be-optimized parameters in the set of to-be-optimized parameters according to the action relationship of the to-be-optimized parameters corresponding to the parameterized quantum gate on the quantum bits; selecting the first number of to-be-optimized parameters from the set of to-be-optimized parameters for optimization according to the ordering result.

4. The method of claim 1, wherein, The method of optimizing the selected first number of to-be-optimized parameters based on the calculated partial derivatives comprises: determining the parameter change value of the first number of to-be-optimized parameters in each iteration optimization process based on the calculated partial derivatives; calculating the loss value of the parameterized quantum circuit after the parameter change according to a predefined loss function; in response to detecting that the loss value is less than a predefined loss threshold value matched with the first number of to-be-optimized parameters, determining that the optimization of the first number of to-be-optimized parameters is complete.

5. The method of claim 4, wherein, The to-be-optimized parameters are rotation angles, and The method of determining the parameter change value of the first number of to-be-optimized parameters in each iteration optimization process based on the calculated partial derivatives comprises: determining the rotation angle corresponding to the next iteration process based at least on the current rotation angle and the partial derivative.

6. The method of claim 1, wherein, The first number is greater than or equal to 1.

7. The method of claim 1, wherein, The method of optimizing the selected first number of to-be-optimized parameters based on the calculated partial derivatives comprises: determining the parameter change value of the first number of to-be-optimized parameters in each iteration optimization process based on the calculated partial derivatives; determining a target partial derivative based on the calculated partial derivative; determining the parameter change value of the to-be-optimized parameters other than the selected first number of to-be-optimized parameters in the set of to-be-optimized parameters in each iteration optimization process based on the target partial derivative; calculating the loss value of the parameterized quantum circuit after the parameter change according to a predefined loss function; In response to detecting that the loss value is less than a predefined loss threshold matched with the first number of to-be-optimized parameters, it is determined that optimization for the first number of to-be-optimized parameters is completed.

8. An optimization apparatus of a parameterized quantum circuit, characterized by, The method comprises the steps of: determining a set of to-be-optimized parameters of a parameterized quantum circuit; calculating a first number of partial derivatives by selecting the first number of to-be-optimized parameters from the set of to-be-optimized parameters for partial derivative calculation, wherein the first number is less than a total number of elements in the set of to-be-optimized parameters; optimizing the selected first number of to-be-optimized parameters based on the calculated partial derivatives; continuing to select the first number of to-be-optimized parameters from the set of to-be-optimized parameters for optimization until the set of to-be-optimized parameters is empty in response to detecting that optimization for the selected to-be-optimized parameters is completed.

9. An electronic device, comprising: The method comprises the steps of: a processor and a memory; the processor and the memory are connected, wherein the memory is used to store a computer program, and the processor is used to call the computer program to execute the method according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program comprises program instructions, which, when executed by a processor, execute the method according to any one of claims 1-7.

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