Data processing method and device, electronic equipment, storage medium and program product
By using a normalized arithmetic unit to process floating-point and normalized data, the problems of wasted computing resources and circuit area occupation are solved, and efficient data processing is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-17
- Publication Date
- 2026-04-03
AI Technical Summary
In existing technologies, the large number of data types leads to a waste of computing resources and a significant increase in the circuit area of computing devices.
By using normalized arithmetic units to process floating-point data and normalized data, first and second arithmetic data are generated, and then combined and format-converted to obtain the target arithmetic result. This reduces the number of arithmetic units and avoids wasting computing resources.
It enables efficient processing of various types of data, reduces the occupancy rate of circuit area, and avoids the waste of computing resources.
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Figure CN121785564A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of computer technology, and in particular to a data processing method and apparatus, electronic equipment, storage medium, and program product. Background Technology
[0002] With the continuous development of computer technology, data processing can be performed through the computing units configured in computing devices in various practical business scenarios, thereby solving the problems corresponding to the business scenarios.
[0003] In the process of data processing using computing units, due to the large number of data types, dedicated computing units are configured for each type of data. However, computing units corresponding to multiple types of data will lead to a waste of computing resources and will occupy a large amount of circuit area in computing devices. Therefore, how to avoid the waste of computing resources and reduce the occupancy rate of circuit area has become an urgent technical problem to be solved. Summary of the Invention
[0004] This disclosure provides a data processing method and apparatus, electronic device, storage medium, and program product.
[0005] In a first aspect, this disclosure provides a data processing method, which includes: upon receiving a target operation instruction, acquiring texture data corresponding to the target operation instruction; if the texture data is floating-point data, generating first operation data based on the mantissa data of the texture data, and generating second operation data based on the exponent and sign data of the texture data, wherein the first operation data has the same data bit width as the normalized data, and the floating-point data includes exponent data, mantissa data, and sign data; using the normalization operation unit corresponding to the normalized data, performing operation processing on the first operation data and weight parameters to obtain a first operation result; combining the second operation data and the first operation result to obtain running data to be adjusted, and performing data format conversion on the running data to be adjusted to obtain a second operation result; and determining the target operation result of the target operation instruction based on the second operation result.
[0006] Secondly, this disclosure provides a data processing apparatus, which includes: a data acquisition unit and a normalization calculation unit.
[0007] The data acquisition unit is configured to acquire texture data corresponding to the target operation instruction when a target operation instruction is received; if the texture data is floating-point data, generate first operation data based on the mantissa data of the texture data, and generate second operation data based on the exponent data and sign data of the texture data. The first operation data has the same data bit width as the normalized data, and the floating-point data includes exponent data, mantissa data, and sign data.
[0008] The normalization operation unit is configured to perform operation processing on the first operation data and weight parameters to obtain a first operation result, combine the second operation data and the first operation result to obtain the operation data to be adjusted, perform data format conversion on the operation data to be adjusted to obtain a second operation result, and determine the target operation result of the target operation instruction based on the second operation result.
[0009] Thirdly, this disclosure provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores one or more computer programs executable by the at least one processor, the one or more computer programs being executed by the at least one processor to enable the at least one processor to perform the data processing method described above.
[0010] Fourthly, this disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the above-described data processing method.
[0011] Fifthly, this disclosure provides a computer program product that includes computer-readable code or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the above-described data processing method.
[0012] In a sixth aspect, this disclosure provides a chip, including: an interface circuit and a control circuit; the interface circuit is used to receive a target arithmetic instruction, and the control circuit is used to collaboratively execute the above-described data processing method according to the target arithmetic instruction and the interface circuit.
[0013] The data processing method provided in this embodiment can obtain texture data corresponding to a target operation instruction. This texture data can be floating-point data or normalized data. A corresponding normalization operation unit is configured for the normalized data to process it. When the texture data is floating-point data, it can also be processed using the normalization operation unit. Specifically, a first operation data is generated based on the mantissa of the texture data, and a second operation data is generated based on the exponent and sign bits of the texture data. Then, the normalization operation unit corresponding to the normalized data performs operation processing on the first operation data and weight parameters to obtain a first operation result. The second operation data and the first operation result are combined to obtain the running data to be adjusted. After completing the operation processing, the second operation data and the first operation result are restored to floating-point data format, ensuring the accuracy of the floating-point data. The running data to be adjusted is then converted to a new data format to obtain a second operation result. Finally, the target operation result of the target operation instruction is determined based on the second operation result. Based on this, it can be seen that the data processing method provided in this embodiment can process both floating-point data and normalized data through a normalization operation unit. This reduces the number of operation units while processing multiple types of data, thereby avoiding the problem of wasting computing resources and reducing the occupancy rate of circuit area.
[0014] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description
[0015] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the embodiments of the present disclosure to explain the disclosure and do not constitute a limitation thereof. The above and other features and advantages will become more apparent to those skilled in the art from the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:
[0016] Figure 1 This is a schematic diagram illustrating the calculation of bilinear interpolation according to an embodiment of the present disclosure.
[0017] Figure 2 This is a schematic diagram of the structure of a processor provided in an embodiment of the present disclosure.
[0018] Figure 3 This is a flowchart of a data processing method provided in an embodiment of the present disclosure.
[0019] Figure 4 This is a schematic diagram illustrating the processing of mantissa data in a data processing method provided in an embodiment of this disclosure.
[0020] Figure 5 This is a flowchart of the computation process in a data processing method provided in an embodiment of the present disclosure.
[0021] Figure 6 This is a schematic diagram of the circuit structure of the normalization operation unit in a data processing method provided in an embodiment of the present disclosure.
[0022] Figure 7 This is a block diagram of a data processing apparatus provided in an embodiment of the present disclosure.
[0023] Figure 8 This is a block diagram of an electronic device provided in an embodiment of the present disclosure. Detailed Implementation
[0024] To enable those skilled in the art to better understand the technical solutions of this disclosure, exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments of this disclosure to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0025] Where there is no conflict, the various embodiments of this disclosure and the features thereof in the embodiments may be combined with each other.
[0026] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.
[0027] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Words such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.
[0028] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined herein.
[0029] The data processing method according to embodiments of this disclosure can be executed by an electronic device such as a terminal device or a server. The terminal device can be an in-vehicle device, user equipment (UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal digital assistant (PDA), handheld device, computing device, in-vehicle device, wearable device, etc. The method can be implemented by a processor calling computer-readable program instructions stored in memory. Alternatively, the method can be executed by a server.
[0030] The technical terms used in the embodiments of this disclosure are explained below.
[0031] Texture unit (also known as texture sampler): is a hardware submodule in the GPU that is specifically responsible for handling operations related to texture mapping.
[0032] FP16 (Floating-Point 16-bit): is the standard data format for half-precision floating-point numbers; FP16 uses 16 bits to represent a real number with a decimal, including the sign, exponent, and mantissa.
[0033] Multiplier: A basic arithmetic logic unit (ALU) in computing hardware, specifically designed to perform multiplication operations (such as integer multiplication and floating-point multiplication).
[0034] Finding the leading one: This determines the position of the most significant bit "1" in a binary digit, used for calculating the exponent and aligning the mantissa.
[0035] MUX (Multiplexer) is a key digital circuit element whose function is to select one of multiple input signals as the output, based on the value (type) of the control signal (selection line).
[0036] Adder: In GPU architecture, the adder is the basic computational unit that performs addition operations.
[0037] With the continuous development of computer technology, data processing can be performed through the computing units configured in computing devices in various practical business scenarios to solve the problems corresponding to the business scenarios. However, in the process of using computing units for data processing, due to the large number of data types, dedicated computing units are configured for each type of data. However, computing units corresponding to multiple types of data will lead to a waste of computing resources and will occupy a large amount of circuit area in computing devices.
[0038] XPU: is a general term for processors, referring to processors used to accelerate specific computing tasks. XPUs include, but are not limited to, GPUs, DPUs, TPUs, NPUs, etc.
[0039] GPU (Graphics Processing Unit): refers to a graphics processing unit.
[0040] TPU (Tensor Processing Unit): refers to a tensor processor.
[0041] DPU (Data Processing Unit): refers to a data processor.
[0042] NPU (Neural network Processing Unit): refers to a neural network processor.
[0043] ASIC (Application-Specific Integrated Circuit): refers to a dedicated integrated circuit, which is an integrated circuit designed specifically for a particular purpose.
[0044] FPGA (Field-Programmable Gate Array): refers to a field-programmable gate array, which is a type of programmable integrated circuit.
[0045] For example, in GPU texture units, there is often a filtering method called bilinear interpolation. Its physical meaning is to perform linear interpolation on a 2x2 pixel grid both horizontally and vertically, and use the interpolated result as the final output. Figure 1 For example, Figure 1 This is a schematic diagram illustrating the calculation of bilinear interpolation according to an embodiment of the present disclosure. Figure 1The bilinear interpolation scheme interpolates four points (pixels or coordinates) A, B, C, and D along the u and v directions. One expression for this bilinear interpolation is: result_ab = a×(1-u)+b×u; result_cd = c×(1-u)+d×u; result_abcd = result_ab×(1-v)+ result_cd ×v. Expanding this expression, we get: result_abcd = a(1-u)(1-v)+ bu(1-v) + c(1-u)v + duv.
[0046] Where a, b, c, and d are the four inputs to bilinear interpolation; u and v are the corresponding interpolation weights, with values ranging from [0, 1); and result_abcd is the final interpolation output.
[0047] It should be noted that a, b, c, and d are the color vectors corresponding to the four pixels (coordinates) adjacent to the "sampling point" in the 2D texture. This 2D texture is defined only at integer coordinates (i.e., pixels), such as (2,4) and (3,4). The sampling point is a sampling point on the surface of the 3D model (called "texel coordinates" or "UV coordinates"). For example, the coordinates of the sampling point (i.e., pixel) could be (2.3,4.7). Based on this, since the pixels in the 3D model and the 2D texture do not correspond or match, it is necessary to use the bilinear interpolation filtering method described above to calculate the color vector corresponding to each pixel in the 3D model, thus facilitating subsequent rendering of the 3D model. In other words, the input to bilinear interpolation is the color vector corresponding to the multiple pixels (coordinates) adjacent to the "sampling point" in the 2D texture; the output of bilinear interpolation is the color vector of the "sampling point" in the 3D model.
[0048] In GPUs, the data that needs linear interpolation includes normalized data and floating-point data. Among normalized data (such as U16) and floating-point data (such as FP16), U16 and FP16 are two common data types. The normalized data can be of type Norm. Taking unsigned Norm8 as an example, its actual value is 8 bits / 255, that is, all 0s represent the number 0, all 1s represent the number 1, and the value is ∈ [0,1].
[0049] For interpolation of these two types of data, due to the different data formats, it is often necessary to configure two different filtering units (i.e., operation units) to perform filtering processing separately during the implementation process.
[0050] Because two filtering units are needed to filter the two data types respectively, and because a multiplier is required in the filtering process, two sets of multipliers are needed here, resulting in a large waste of computing resources and a large overhead in computing resources (i.e., circuit area).
[0051] Based on this, the present disclosure provides a data processing method and apparatus, an electronic device, a computer-readable storage medium, and a computer program product, as detailed in the following embodiments.
[0052] Specifically, the data processing method provided in this disclosure can be applied to a processor. Figure 2 This is a schematic diagram of a processor provided in an embodiment of the present disclosure. The processor includes a data storage unit 201 and a normalization operation unit 202. Upon receiving a target operation instruction, the processor can obtain texture data corresponding to the target operation instruction from the data storage unit 201. The data storage unit 201 can be a unit for storing the texture data corresponding to the target operation instruction; for example, the data storage unit 201 can be a register, cache, or other storage unit. Alternatively, the processor can obtain the corresponding texture data from the data storage unit 201 based on a data identifier carried in the target operation instruction. This data identifier can be information used to identify the texture data, such as a data name, data ID, or storage address.
[0053] Figure 3 A flowchart illustrating a data processing method provided in an embodiment of this disclosure. (Refer to...) Figure 3 The method can be executed by the processor described above, and the method includes steps S31-S34.
[0054] Step S31: Upon receiving the target operation instruction, obtain the texture data corresponding to the target operation instruction.
[0055] The data processing method provided in this disclosure can be applied to a computing device or a processor of a computing device. The computing device can be a server, a client cloud server, etc.; the processor can be a CPU, a GPU, an intelligent processor, etc. This disclosure does not impose specific limitations on this.
[0056] The target operation instruction can be understood as an instruction used to perform operations on texture data; the texture data can be understood as data in a two-dimensional texture, such as color vectors, RGB values, etc.
[0057] Step S32: When the texture data is floating-point data, generate first operation data based on the mantissa data of the texture data, and generate second operation data based on the exponent data and sign data of the texture data. The first operation data has the same data bit width as the normalized data, and the floating-point data includes exponent data, mantissa data and sign data.
[0058] The type of floating-point data can be set according to the actual application scenario. For example, the type of floating-point data includes, but is not limited to: FP16 (half-precision floating-point number), FP32 (single-precision floating-point number), double-precision floating-point number, etc.
[0059] It should be noted that floating-point data consists of three parts: a sign bit, an exponent bit, and a mantissa bit, used to represent real numbers (including decimals and extremely large / small values) in a computer. The exponent bit data can be the value corresponding to the exponent, the mantissa bit data can be the value corresponding to the mantissa bit, and the sign bit data can be the value corresponding to the sign bit. The sign bit indicates whether the value is positive or negative; 0 represents a positive number, and 1 represents a negative number. The exponent bit controls the range of the value, and can be represented by storing the actual exponent value using an offset (e.g., 127 for single-precision, 1023 for double-precision). The mantissa bit represents the precision of the value, i.e., the significant digits; it can be represented by implicitly including leading 1s (e.g., 1.01101) or storing only the decimal part (e.g., 01101) to save space. For example, when the mantissa data is 001101, the actual mantissa is 1.001101 (implicitly including leading 1s).
[0060] In some embodiments, generating first operational data based on the mantissa data of the texture data and generating second operational data based on the exponent and sign data of the texture data includes: adjusting the bit width of the mantissa data of the texture data using the data bit width of the normalized data to obtain the first operational data; and determining the exponent and sign data of the texture data as the second operational data.
[0061] The data bit width can be set according to the actual application scenario. For example, the data bit width can be 16 bits, 32 bits, etc., and no specific restrictions are made here.
[0062] Taking the application of the data processing method provided in this disclosure in a bilinear interpolation scenario as an example, the data processing method will be described. The bilinear interpolation of the data processing method provided in this disclosure can be based on the formula: result_abcd=a(1-u)(1-v)+bu(1-v)+c(1-u)v+duv value, where a, b, c, and d are texture data, and u and v are both 8-bit decimals. In this case, the calculation method of the above formula can be reduced to: a×16bit+b×16bit+c×16bit+d×16bit. When the texture data is normalized data, a 16-bit width is required for normalized data; when the texture data is floating-point data, for FP16 data (floating-point data), the mantissa is 1.10, and an 11-bit width is used.
[0063] In this case, the data processing method provided in this disclosure can adjust the data width of the mantissa of the floating-point data according to the data width of the normalized data (16 bits) to obtain mantissa data with the same data width as the normalized data, and use it as the first operation data (with a width of 16 bits); at the same time, the exponent data and sign data of the floating-point data are determined as the second operation data.
[0064] As can be seen from the above embodiments, this disclosure structurally splits and aligns the mantissa of floating-point data according to the bit width of normalized data (e.g., 16 bits), making the mantissa compatible with the normalization calculation unit. This facilitates the normalization calculation unit's processing of floating-point data, thereby enabling the processing of both normalized and floating-point data using a single normalization calculation unit. Furthermore, the exponent and sign bits are separately reserved as secondary operational data, which can be used for data recovery, overflow detection, and other processing when needed, ensuring the accuracy of floating-point data.
[0065] In some embodiments, adjusting the bit width of the mantissa data of the texture data using the data bit width of the normalized data to obtain the first computational data includes: determining the padding data bit width based on the data bit width of the normalized data and the data bit width of the mantissa data; determining the padding data based on the padding data bit width; and combining the padding data with the mantissa data to obtain the first computational data.
[0066] The padding data can be set according to the actual application scenario. For example, the padding data can be 0 or 1, or the padding data can be a preset character, symbol, etc. This disclosure does not make any specific limitations.
[0067] Following the previous example, Figure 4This is a schematic diagram illustrating the processing of mantissa data in a data processing method provided in an embodiment of this disclosure, based on... Figure 4 As can be seen, the data processing method provided in this disclosure can obtain the padding data width (e.g., 5 bits) by subtracting the data width of the normalized data (e.g., 16 bits) from the data width of the mantissa data (e.g., 11 bits). Based on this padding data width, five zeros are determined to be needed for padding. Based on this, this disclosure places 1.10 (mantissa data), which is 11 bits, in the lower bit and pads the upper 5 bits with zeros to obtain the padded mantissa data. The data width of the padded mantissa data is consistent with the data width of the normalized data.
[0068] As can be seen from the above embodiments, the data processing method provided in this disclosure can adjust the data width of the mantissa of floating-point data according to the data width of normalized data (16 bits) to obtain mantissa data with the same data width as normalized data, thereby ensuring that the subsequent normalization operation unit can perform operation processing on the first operation data with the matching data width, and improving the applicability of the normalization operation unit.
[0069] Step S33: Using the normalization operation unit corresponding to the normalized data, perform operation processing on the first operation data and weight parameters to obtain a first operation result, combine the second operation data and the first operation result to obtain the running data to be adjusted, and perform data format conversion on the running data to be adjusted to obtain a second operation result.
[0070] The first operation result can be understood as the result obtained after performing an operation on the first operation data and the weight parameters. For example, if the operation is an addition operation, the first operation result can be the sum of the first operation data and the weight parameters; if the operation is a division operation, the first operation result can be the quotient of the first operation data and the weight parameters.
[0071] The normalization operation unit can be understood as a unit that performs operations on normalized data. For example, the normalization operation unit can be a texture unit in a processor; the processor includes, but is not limited to, CPU, GPU, and intelligent processor. In the embodiments provided in this disclosure, the normalization operation unit can also be used to process floating-point data. Specifically, the normalization operation unit in the embodiments provided in this disclosure can perform operations on first operation data, which has the same data bit width as the normalized data; that is, the normalization operation unit can also process target data whose data bit width is the same as the data bit width of the normalized data, for example, the target data can be fixed-point data.
[0072] The weighting parameter can be understood as a parameter used to perform weighted processing on the first operational data or normalized data. For example, the weighting parameter includes, but is not limited to, four weighting parameters: uv, (1-u)(1-v), u(1-v), and (1-u)v. Here, u and v can be the coordinate values of a 3D model pixel, representing the coordinate position of a 3D model pixel on a 2D texture. u: represents the relative position of the 3D model pixel in the horizontal direction (width direction) of the 2D texture; v: represents the relative position of the 3D model pixel in the vertical direction (height direction) of the 2D texture. The coordinate values of the 3D model pixel are non-integer coordinate values; for example, the coordinate values of the 3D model pixel can be normalized data (i.e., normalized coordinate values).
[0073] The data to be adjusted can be understood as data that needs to undergo data format conversion. This data includes the second operation data and the first operation result. The data format conversion includes, but is not limited to, converting the data to two's complement format and converting the data to one's complement format.
[0074] In some embodiments, Figure 5 This is a flowchart of the computational processing in a data processing method provided in an embodiment of the present disclosure, based on... Figure 5 It is known that there are multiple texture data and multiple weight parameters, and the weight parameters correspond one-to-one with the texture data; the step of using the normalization operation unit corresponding to the normalized data to perform operation processing on the first operation data and the weight parameters to obtain the first operation result, combining the second operation data and the first operation result to obtain the running data to be adjusted, and performing data format conversion on the running data to be adjusted to obtain the second operation result, includes steps one to three.
[0075] Step 1: Input the first calculation data of the multiple texture data into the normalization calculation unit, wherein the normalization calculation unit includes an arithmetic unit and a format adjustment module.
[0076] The arithmetic unit can be understood as an arithmetic unit used to perform arithmetic operations on the first arithmetic data; for example, the arithmetic operation includes at least one of addition, multiplication, subtraction, division, and square root operations, which is not specifically limited in this disclosure; based on this, the arithmetic unit can be at least one of addition unit, multiplication unit, subtraction unit, division unit, and square root unit.
[0077] The format adjustment module can be understood as a module used to adjust the data format of the first operation result. For example, the format adjustment module may include: a shift module and / or an encoding conversion module, wherein the shift module can be used to perform a shift operation on the first operation result or the second operation data; the encoding conversion module is used to perform format conversion on binary encoding (such as the first operation result), for example, converting the original code to the two's complement.
[0078] Step 2: Using the aforementioned arithmetic unit, perform arithmetic processing on each first arithmetic data and the corresponding weight parameter to obtain multiple first arithmetic results.
[0079] In some embodiments, the arithmetic unit is a multiplier, and there are multiple multipliers. Using the arithmetic unit, each first operational data and its corresponding weight parameter are processed to obtain multiple first operational results, including: inputting target first operational data and its corresponding weight parameter into a target multiplier, wherein the target first operational data is any one of the multiple first operational data, and the target multiplier is the multiplier corresponding to the target first operational data; and multiplying the target first operational data and its corresponding weight parameter using the target multiplier in parallel to obtain the multiple first operational results.
[0080] Here, a multiplier can be understood as a multiplication operator that performs multiplication operations.
[0081] Following the previous example, the data processing method provided in this disclosure provides multiple multipliers, the number of which corresponds to the number of first operational data. Furthermore, the data processing method also provides selectors (e.g., multiplexers, muxes). These selectors can select the data to be input into the multipliers based on the received data type. For example, if the data type is floating-point data (which can be represented by level signals or numerical values), multiple first operational data can be input into the corresponding multipliers in the normalization unit, where there are multiple selectors, with one selector corresponding to each multiplier. Alternatively, if the data type is normalized data (which can be represented by level signals or numerical values), multiple normalized data can be input into the corresponding multipliers in the normalization unit, where there are multiple selectors, with one selector corresponding to each multiplier.
[0082] While inputting the target first operation data into the corresponding target multiplier, it is also necessary to input the weight parameter corresponding to the target multiplier into the target multiplier. The target multiplier multiplies the target first operation data and the weight parameter to obtain the multiplication result (i.e., the first operation result) corresponding to the target multiplier. The multiplication result output by multiple multipliers is a multiple first operation result, where the weight parameter corresponding to each multiplier is different.
[0083] As can be seen from the above embodiments, this disclosure processes the target first operation data and its corresponding weight parameters by inputting them into the target multiplier. By using multiple multipliers to perform parallel multiplication operations on multiple first operation data and their corresponding weights, the overall computational efficiency and processing throughput are significantly improved, avoiding the problem of low computational efficiency caused by shared computing units in serial processing. Since multiple multiplication operations can be executed simultaneously, the overall computation task completion time is greatly shortened, significantly improving the computational speed.
[0084] Step 3: Using the format adjustment module, combine the second operation data and the first operation result corresponding to each first operation data to obtain multiple operation data to be adjusted, and perform data format conversion on the multiple operation data to be adjusted to obtain multiple second operation results.
[0085] In some embodiments, there are multiple format adjustment modules, and the multiple first operation results are multiple multiplication operation results. The step of using the format adjustment module to combine the second operation data and the first operation result corresponding to each first operation data to obtain multiple running data to be adjusted, and performing data format conversion on the multiple running data to be adjusted to obtain multiple second operation results, includes: determining the target second operation data corresponding to the target first operation data from the multiple second operation data, and determining the target multiplication operation result corresponding to the target first operation data from the multiple multiplication operation results; and using a target format adjustment module to combine the target second operation data and the target multiplication operation result in a parallel execution manner to obtain the multiple running data to be adjusted, and performing data format conversion on the multiple running data to be adjusted to obtain multiple second operation results, wherein the target format adjustment module is the module among the multiple format adjustment modules corresponding to the target multiplication operation result.
[0086] Following the previous example, the data processing method provided in this disclosure provides a format adjustment module (circuit) corresponding to the target multiplier. This format adjustment module can be a module that performs two's complement (COM) calculation (i.e., an encoding conversion module) and a module that performs shift operations (i.e., a shift module). This format adjustment module is used to adjust the format of the multiplication result output by the target multiplier based on the second operational data. Furthermore, the data processing method provided in this disclosure also provides a selector (e.g., a multiplexer, mux) for the format adjustment module; this selector can select the data to be input into the format adjustment module based on the received data type. For example, if the data type is floating-point data (which can be represented by a level signal or a numerical value), the second operational data can be input into the format adjustment module for format adjustment. Or, if the data type is normalized data (which can be represented by a level signal or a numerical value), the value 0 can be input into the format adjustment module. Since the format adjustment module receives the value 0, it will not perform format adjustment on the multiplication result output by the multiplier.
[0087] Specifically, in this embodiment of the present disclosure, after the target multiplier outputs the multiplication result, the multiplication result and the second operation data corresponding to the target first operation data can be input to the format adjustment module corresponding to the target multiplier. The format adjustment module combines the target second operation data and the target multiplication result to obtain multiple operation data to be adjusted, and converts the multiple operation data to be adjusted into two's complement format to obtain the target multiplication result (i.e., the second operation result) corresponding to the target first operation data.
[0088] Based on the above, this disclosure achieves format adjustment of the multiplication results output by the multiplier corresponding to floating-point data through a format adjustment module (including a shift module and an encoding conversion module) and a selector (such as a multiplexer MUX) that works with it. This design ensures that the normalization unit's operation processing does not destroy the data format of floating-point data, thus guaranteeing the versatility of the normalization unit. As a result, efficient processing of multiple data formats can be achieved without adding other computing hardware.
[0089] In some embodiments, combining the target second operation data and the target multiplication result to obtain the plurality of operation data to be adjusted, and converting the data format of the plurality of operation data to obtain the plurality of second operation results, includes: selecting the largest exponent data from the exponent data of the plurality of second operation data; subtracting the largest exponent data from the exponent data of the target second operation data to obtain the exponent shift parameter corresponding to the target second operation data; performing a shift operation on the exponent data of the target second operation data using the exponent shift parameter to obtain the shifted exponent data of the target second operation data; combining the target multiplication result, the shifted exponent data of the target second operation data, and the sign data to obtain the plurality of operation data to be adjusted; and converting each operation data to be adjusted into two's complement format to obtain the plurality of second operation results.
[0090] The exponential shift parameter can be understood as a parameter used to control the shifting operation of the exponential bit data. The exponential shift parameter can represent the distance or bit width that the exponential bit data needs to be moved; for example, the exponential shift parameter can be the shift difference.
[0091] Following the example above, the data processing method provided in this disclosure can select the maximum exponent data (max_exp) from the exponent data of multiple second operation data; subtract the maximum exponent data from each exponent data (such as a_exp, b_exp, c_exp, d_exp) of multiple floating-point data (e.g., 4 floating-point data, represented by a, b, c, d) to calculate the shift difference (i.e., exponent shift parameter) of each exponent data in the floating-point number; and perform shift processing according to the shift difference through the module that performs the shift operation to obtain the shifted exponent data.
[0092] Then, the shifted exponent data, the target multiplication result, and the sign data are combined to obtain the floating-point data to be adjusted (i.e., including exponent data, sign data, and mantissa data).
[0093] By executing the complement (com) module, the floating-point operation result in original code format (i.e., the operation data to be adjusted) is converted into complement form to obtain multiple operation results (i.e., the second operation result) that are easy to add later.
[0094] Based on the above embodiments, this disclosure provides a mechanism for exponent alignment and format unification of floating-point data. By extracting the maximum exponent bit (max_exp) from multiple second operation data, calculating the shift difference of each floating-point number relative to the maximum exponent, and performing a shift operation accordingly, the floating-point data format is reconstructed by combining the sign bit data and the target multiplication result, thereby ensuring that the operation processing of the normalization operation unit does not destroy the data format of the floating-point data. Furthermore, before the subsequent addition operation, the intermediate result of the floating-point operation in original code form is converted into two's complement form by the two's complement module, so that the floating-point addition that originally required complex sign judgment can be simplified into an efficient unsigned or two's complement addition operation, which greatly reduces the hardware complexity and time delay of the subsequent accumulation stage.
[0095] Step S34: Determine the target operation result of the target operation instruction based on the second operation result.
[0096] The target calculation result can be understood as the calculation result obtained after processing the texture data using the normalization operation unit.
[0097] In some embodiments, the second operation result is multiple; determining the target operation result of the target operation instruction based on the second operation result includes: adding multiple second operation results together using the adder in the normalization operation unit to obtain an addition operation result; and adjusting the format of the addition operation result using the result adjustment module in the normalization operation unit to obtain the target operation result of the target operation instruction.
[0098] The result adjustment module can be understood as a module used to adjust the data format of the addition operation result.
[0099] Following the previous example, this disclosure allows multiple calculation results processed by the arithmetic unit and format adjustment unit to be added together by an adder to obtain an addition result. Then, this addition result is input into the result adjustment module for format adjustment to obtain the target calculation result of the target calculation instruction. This disclosure improves calculation accuracy by adjusting the format of the output results corresponding to floating-point data, ensuring that the normalization unit's processing does not corrupt the data format of floating-point data.
[0100] In some embodiments, adjusting the format of the addition result to obtain the target operation result of the target operation instruction includes: converting the addition result into original code format to obtain an operation result to be adjusted, wherein the operation result to be adjusted includes exponent data, mantissa data, and sign data; identifying a preamble parameter from the mantissa data of the operation result to be adjusted; and adjusting the exponent data and mantissa data in the operation result to be adjusted based on the preamble parameter to obtain the target operation result of the target operation instruction.
[0101] Following the previous example, after performing the complement and shift operations, the four addends (i.e., multiple second operation results) can be added together using an adder to obtain the addition result (numerical value). If the texture data is normalized, this addition result is the final value of the corresponding normalized data. However, if the texture data is floating-point data (such as FP16), a sign-magnitude representation operation is needed to obtain the addition result in sign-magnitude format (i.e., the result to be adjusted). Then, a leading one operation is performed. Based on the leading one, the exp (exponent data) and mantissa data are shifted and adjusted to obtain the final output corresponding to the floating-point data. Finally, the two final outputs are selected through a mux to determine the final result (i.e., the target operation result of the target operation instruction).
[0102] As can be seen from the above embodiments, this disclosure adjusts the format of the output results corresponding to floating-point data, thereby ensuring that the operation processing of the normalization unit does not destroy the data format of the floating-point data, improving the accuracy of the operation. Furthermore, this disclosure achieves filtering of two data types with minimal computing resources (i.e., one normalization unit). Compared with other solutions, it saves more hardware resources, resulting in a reduction in the overall circuit area; thus achieving the effect of less additional hardware resources and simpler logic.
[0103] In some embodiments, the method further includes: when the texture data is normalized data, using the normalization operation unit to perform operation processing on the texture data and the weight parameters to obtain a third operation result, and determining the target operation result of the target operation instruction based on the third operation result, wherein the normalized data is the data after performing normalization processing.
[0104] The third operation result can be understood as the result obtained after performing an operation on the texture data and weight parameters. For example, if the operation is an addition operation, the third operation result can be the sum of the texture data and weight parameters; if the operation is a division operation, the third operation result can be the quotient of the texture data and weight parameters.
[0105] Continuing with the previous example, if the texture data is normalized, the method for performing bilinear interpolation on the normalized data is as follows: input the normalized data into the normalization operation unit, use the normalization operation unit to perform operation processing on the texture data and weight parameters through the arithmetic unit to obtain the third operation result; then, based on the third operation result, determine the target operation result of the target operation instruction (i.e., the final output color vector).
[0106] As can be seen from the above embodiments, this method significantly improves the image quality and visual smoothness of texture sampling by implementing bilinear interpolation in the texture unit of the GPU, under the premise of controllable computational overhead, and makes full use of hardware parallelism to optimize memory access and computation efficiency, providing real-time high-quality graphics rendering.
[0107] In some embodiments, the texture data is multiple, and the third operation result is a multiplication operation result; the step of using the normalization operation unit to perform operation processing on the texture data and the weight parameters to obtain the third operation result, and determining the target operation result of the target operation instruction based on the third operation result, includes: inputting multiple texture data into the normalization operation unit, wherein the normalization operation unit includes a multiplier and an adder; using the multiplier to multiply each texture data and the weight parameter corresponding to each texture data to obtain multiple multiplication operation results; using the adder to add the multiple multiplication operation results to obtain the target operation result of the target operation instruction.
[0108] Following the previous example, the multiple texture data are four color vectors: a, b, c, and d, and the normalization operation unit is a texture unit. Based on this, in this embodiment, the four color vectors can be input into the normalization operation unit, which includes four multipliers and one adder. By executing in parallel, each multiplier multiplies the corresponding color vector and the weight parameter to obtain four multiplication results. The four multiplication results are then input into the adder to perform the addition operation, obtaining the final output (i.e., the final output color vector).
[0109] As can be seen from the above embodiments, the bilinear interpolation provided by this method effectively eliminates the jagged edges and aliasing artifacts generated by traditional "nearest neighbor sampling" when the texture is scaled or rotated, by performing two one-dimensional linear interpolations (first horizontally, then vertically) on the color vectors (i.e., texture data) of the four nearest neighbor texture pixels (forming a 2×2 dot matrix). This significantly improves the smoothness and realism of the texture mapping, and allows the rendered image to maintain visual continuity under different viewing angles or scaling ratios.
[0110] In some embodiments, the texture data is multiple, including the texture color data of target pixels in a two-dimensional texture during graphics processing; the target pixel is a plurality of pixels in the two-dimensional texture that are adjacent to a pixel in the three-dimensional model, and the three-dimensional model pixel is a pixel in the three-dimensional model; the target operation result is the texture color data corresponding to the pixel in the three-dimensional model; the weight parameter is determined based on the coordinates of the pixel in the three-dimensional model.
[0111] As can be seen from the above embodiments, this disclosure takes into account the lack of correspondence or mismatch between pixels in the three-dimensional model and the two-dimensional texture. It utilizes the operation of the normalization operation unit to calculate the color vector corresponding to each pixel in the three-dimensional model, thereby facilitating the subsequent rendering of the three-dimensional model and improving the rendering effect.
[0112] The data processing method provided in this embodiment can obtain texture data corresponding to a target operation instruction. This texture data can be floating-point data or normalized data. A corresponding normalization operation unit is configured for the normalized data to process it. When the texture data is floating-point data, it can also be processed using the normalization operation unit. Specifically, a first operation data is generated based on the mantissa of the texture data, and a second operation data is generated based on the exponent and sign bits of the texture data. Then, the normalization operation unit corresponding to the normalized data performs operation processing on the first operation data and weight parameters to obtain a first operation result. The second operation data and the first operation result are combined to obtain the running data to be adjusted. After completing the operation processing, the second operation data and the first operation result are restored to floating-point data format, ensuring the accuracy of the floating-point data. The running data to be adjusted is then converted to a new data format to obtain a second operation result. Finally, the target operation result of the target operation instruction is determined based on the second operation result. Based on this, it can be seen that the data processing method provided in this embodiment can process both floating-point data and normalized data through a normalization operation unit. This reduces the number of operation units while processing multiple types of data, thereby avoiding the problem of wasting computing resources and reducing the occupancy rate of circuit area.
[0113] The data processing method provided in this disclosure is described using the application of the data processing method in a bilinear interpolation scenario as an example. Figure 6 This is a schematic diagram of the circuit structure of the normalization operation unit in a data processing method provided in this embodiment of the disclosure; based on Figure 6 It can be seen that the normalization operation unit includes multiple multipliers, adders, and selectors; among them, Figure 6The type in the suffix indicates the current data type, which is used to indicate whether the texture data is normalized data or FP16 data. The _sgn in the suffix indicates the symbol (0 or 1), com is the two's complement operation, and rev is the original code operation. Figure 6 The characters enclosed in {} represent the mantissa of floating-point data (with leading zeros padded); a, b, c, and d represent normalized data.
[0114] The bilinear interpolation method provided in this disclosure can be based on the formula: result_abcd=a(1-u)(1-v)+bu(1-v)+c(1-u)v+duv value, where a, b, c, and d are texture data, and u and v are 8-bit decimals. In this case, the calculation of the above formula can be reduced to: a×16bit+b×16bit+c×16bit+d×16bit.
[0115] Where a, b, c, and d are the four inputs to bilinear interpolation; u and v are the corresponding interpolation weights, with values ranging from [0, 1); and result_abcd is the final interpolation output.
[0116] It should be noted that a, b, c, and d are the color vectors corresponding to the four pixels (coordinates) adjacent to the "sampling point" in the 2D texture. This 2D texture is defined only at integer coordinates (i.e., pixels), such as (2,4) and (3,4). The sampling point is a sampling point on the surface of the 3D model (called "texel coordinates" or "UV coordinates"). For example, the coordinates of the sampling point (i.e., pixel) could be (2.3,4.7). Based on this, since the pixels in the 3D model and the 2D texture do not correspond or match, it is necessary to use the bilinear interpolation filtering method described above to calculate the color vector corresponding to each pixel in the 3D model, thus facilitating subsequent rendering of the 3D model. In other words, the input to bilinear interpolation is the color vector corresponding to the multiple pixels (coordinates) adjacent to the "sampling point" in the 2D texture; the output of bilinear interpolation is the color vector of the "sampling point" in the 3D model.
[0117] u and v can be the coordinate values of a pixel in a 3D model, representing the coordinate position of a pixel on a 2D texture. u: represents the relative position of the 3D model pixel in the horizontal direction (width direction) of the 2D texture; v: represents the relative position of the 3D model pixel in the vertical direction (height direction) of the 2D texture. The coordinate values of the 3D model pixel are non-integer values; for example, the coordinate values can be normalized data (i.e., normalized coordinate values).
[0118] based on Figure 6As can be seen, the data processing method of this disclosure provides an optimized implementation scheme for bilinear interpolation of normalized data and FP16 data in GPU texture units, specifically including the following steps 1-4.
[0119] Step 1: For normalized data, a 16-bit width is required; for FP16 data, adjust its format.
[0120] Specifically, the steps for formatting FP16 data are as follows.
[0121] For the above a×16bit+b×16bit+c×16bit+d×16bit, when the texture data is floating-point data, for FP16 data (floating-point data), the mantissa is 1.10, and an 11-bit width is used.
[0122] In this case, the data processing method provided in this disclosure can adjust the data width of the mantissa of the floating-point data according to the data width of the normalized data (16 bits). The adjustment method can be to place 1.10, or 11 bits, in the low bit and pad the high 5 bits with 0, so as to obtain mantissa data with the same data width as the normalized data.
[0123] Step 2: Using multiple multipliers (mul), multiply the mantissa of normalized or floating-point data according to the weight parameters to obtain the multiplication result.
[0124] The weighting parameters include, but are not limited to, the following four weighting parameters: uv, (1-u)(1-v), u(1-v), and (1-u)v.
[0125] It should be noted that the data processing method provided in this disclosure provides four multipliers, the number of which corresponds to the amount of texture data; and the data processing method provided in this disclosure also provides a multiplexer (mux); the multiplexer can select the data to be input into the multiplier according to the received data type.
[0126] For example, when the data type is floating-point data (which can be represented by a level signal), the mantissa data can be input into the corresponding multiplier in the normalization arithmetic unit for operation. There are multiple selectors, with one multiplier corresponding to one selector.
[0127] Alternatively, when the data type is normalized data (which can be represented by level signals or numerical values), multiple normalized data (i.e., a, b, c, d) can be input into the corresponding multiplier in the normalization operation unit for operation.
[0128] Step 3: Perform an exponent right shift operation on the result of the multiplication operation of the floating-point data, and then perform a two's complement operation to obtain the multiple addends that need to be added (i.e. the values that need to be added by the adder).
[0129] After performing the multiplication, the FP16 data needs to be subjected to two's complement and right shift operations. The reason for taking the two's complement is that there are four addends being added, and the sign of each addend is not reflected in the result of the multiplication. The right shift operation is because the exponents exp of the four FP16s are not necessarily equal, so their multiplied values need to be aligned to the largest exp. For timing reasons, the four exps can be compared during the multiplication process, and finally the largest exp and the difference between the other three that need to be shifted are selected.
[0130] This solution provides a module (com) for performing the two's complement operation and a module for the shift operation (>>). The specific methods for performing the right shift operation of the exponent and the two's complement operation are as follows.
[0131] First, select the maximum exponent data (max_exp) from multiple exponent data. Subtract this maximum exponent data from each of the multiple floating-point data (e.g., 4 floating-point data, represented by a, b, c, d) exponent data (e.g., a_exp, b_exp, c_exp, d_exp) to calculate the shift difference of each exponent data in the floating-point number. Then, through the module that performs the shift operation, perform shift processing according to the shift difference to obtain the shifted exponent data.
[0132] Secondly, the shifted exponent data, the target multiplication result, and the sign data are combined to obtain the floating-point data to be adjusted (i.e., including exponent data, sign data, and mantissa data).
[0133] Finally, by executing the complement calculation module (com), the floating-point operation result in the original code format (i.e., the operation data to be adjusted) is converted into complement form to obtain multiple operation results (i.e., the second operation result) that are easy to add later.
[0134] It should be noted that when performing complement and shift operations, since normalized data does not require complement and shift, a multiplexer (mux) is used here to select the sign bit and shift value as 0 or the sign of the FP16 data and the difference to be shifted, based on the data type.
[0135] Step 4: Use an adder to add the four addends to obtain the final result.
[0136] Specifically, for normalized data, after performing the complement and shift operations, these four addends can be added together to obtain the final value of the corresponding normalized data.
[0137] For floating-point data (FP16), it is necessary to perform the original code extraction and leading one search operations, adjust the exp and mantissa to obtain the final output. Finally, the two results are selected by a mux.
[0138] The methods for retrieving the original code, finding the leading one, adjusting the exp, and adjusting mantissa are as follows.
[0139] First, for the addition result output by the adder in two's complement format, perform the original code extraction operation to obtain the addition result in original code format.
[0140] Secondly, for the addition result in the original code format, perform the "find leading one" operation.
[0141] Finally, based on the leading 1, the exp (exp data) and mantissa data are shifted and adjusted to obtain the final output corresponding to the floating-point data.
[0142] Based on the above steps, it can be seen that the data processing method provided in this disclosure can be used for data filtering in high-performance processors, such as texture units in GPUs, or in arithmetic logic units that require filtering. This method offers advantages such as simple circuit implementation and low resource consumption without sacrificing accuracy. Furthermore, it achieves the same logic sharing as for normalization operations during the computation process, thereby improving the utilization of computing resources.
[0143] It is understood that the various method embodiments mentioned above in this disclosure can be combined with each other to form combined embodiments without violating the principle and logic. Due to space limitations, this disclosure will not elaborate further. Those skilled in the art will understand that in the above methods of specific implementation, the specific execution order of each step should be determined by its function and possible internal logic.
[0144] In addition, this disclosure also provides a data processing apparatus, an electronic device, and a computer-readable storage medium, all of which can be used to implement any of the data processing methods provided in this disclosure. The corresponding technical solutions and descriptions are described in the corresponding section of the method and will not be repeated here.
[0145] Figure 7 This is a block diagram of a data processing apparatus provided in an embodiment of the present disclosure.
[0146] Reference Figure 7 This disclosure provides a data processing device, which includes a data acquisition unit 702 and a normalization calculation unit 704.
[0147] The data acquisition unit 702 is configured to acquire texture data corresponding to the target operation instruction when a target operation instruction is received, and generate first operation data based on the mantissa data of the texture data when the texture data is floating-point data, and generate second operation data based on the exponent data and sign data of the texture data. The first operation data has the same data bit width as the normalized data, and the floating-point data includes exponent data, mantissa data and sign data.
[0148] The normalization operation unit 704 is configured to perform operation processing on the first operation data and weight parameters to obtain a first operation result, combine the second operation data and the first operation result to obtain the operation data to be adjusted, perform data format conversion on the operation data to be adjusted to obtain a second operation result, and determine the target operation result of the target operation instruction based on the second operation result.
[0149] In some embodiments, there are multiple texture data and multiple weight parameters, and each weight parameter corresponds one-to-one with a texture data. The normalization operation unit 704 includes an arithmetic unit and a format adjustment module. The arithmetic unit is configured to perform arithmetic processing on each first operation data and its corresponding weight parameter to obtain multiple first operation results. The format adjustment module is configured to combine the second operation data corresponding to each first operation data and the first operation result to obtain multiple running data to be adjusted, and to perform data format conversion on the multiple running data to be adjusted to obtain multiple second operation results.
[0150] In some embodiments, there are multiple format adjustment modules; each format adjustment module is configured to: determine target second operation data corresponding to the target first operation data from multiple second operation data, and determine target multiplication operation result corresponding to the target first operation data from multiple multiplication operation results; combine the target second operation data and the target multiplication operation result using the target format adjustment module in a parallel execution manner to obtain multiple operation data to be adjusted, and perform data format conversion on the multiple operation data to be adjusted to obtain multiple second operation results, wherein the target format adjustment module is the module corresponding to the target multiplication operation result among the multiple format adjustment modules.
[0151] In some embodiments, the normalization operation unit 704 includes an adder and a result adjustment module; the adder is configured to add multiple second operation results to obtain an addition operation result; the result adjustment module is configured to adjust the format of the addition operation result to obtain the target operation result of the target operation instruction.
[0152] In some embodiments, there are multiple texture data and multiple weight parameters, and each weight parameter corresponds one-to-one with a texture data. The first operation result is a multiplication operation result. The normalization operation unit 704 includes multiple multipliers, multiple format adjustment modules, adders, and a result adjustment module. The multiple multipliers are configured to multiply each first operation data and its corresponding weight parameter in parallel to obtain multiple multiplication operation results. The format adjustment module is configured to select the largest exponent data from the exponent data of multiple second operation data; subtract the largest exponent data from the exponent data of each second operation data to obtain the exponent shift parameter corresponding to each second operation data; and perform a shift operation on the exponent data of each second operation data using the exponent shift parameter. The system obtains the shift exponent data of each second operation data; combines the multiple multiplication results, the corresponding shift exponent data and sign data of the second operation data to obtain the multiple operation data to be adjusted; converts each operation data to be adjusted into two's complement format to obtain multiple second operation results; the adder is configured to add the multiple second operation results to obtain an addition result; the result adjustment module is configured to convert the addition result into original code format to obtain the operation result to be adjusted, wherein the operation result to be adjusted includes exponent data, mantissa data and sign data; identify a preamble parameter from the mantissa data of the operation result to be adjusted; and adjust the exponent data and mantissa data in the operation result to be adjusted based on the preamble parameter to obtain the target operation result of the target operation instruction.
[0153] In some embodiments, the data acquisition unit 702 is configured to: adjust the bit width of the mantissa bit data of the texture data using the data bit width of the normalized data to obtain the first operation data; and determine the exponent bit data and sign bit data of the texture data as the second operation data.
[0154] In some embodiments, the data acquisition unit 702 is further configured to: determine the padding data width based on the data bit width of the normalized data and the data bit width of the mantissa data; determine the padding data based on the padding data width; and combine the padding data with the mantissa data to obtain the first operational data.
[0155] In some embodiments, the normalization operation unit 704 is further configured to: when the texture data is normalized data, perform an operation on the texture data and the weight parameters to obtain a third operation result, and determine the target operation result of the target operation instruction based on the third operation result, wherein the normalized data is data after normalization processing. In some embodiments, there are multiple texture data, and the normalization operation unit 704 includes multiple multipliers and adders; the multiple multipliers are configured to: when the texture data is normalized data, multiply each texture data and the corresponding weight parameter of each texture data in parallel to obtain multiple multiplication operation results; the adders are configured to: add the multiple multiplication operation results to obtain the target operation result of the target operation instruction.
[0156] In some embodiments, the texture data is multiple, including the texture color data of target pixels in a two-dimensional texture during graphics processing; the target pixel is a plurality of pixels in the two-dimensional texture that are adjacent to a pixel in the three-dimensional model, and the three-dimensional model pixel is a pixel in the three-dimensional model; the target operation result is the texture color data corresponding to the pixel in the three-dimensional model; the weight parameter is determined based on the coordinates of the pixel in the three-dimensional model.
[0157] In some embodiments, the texture data includes floating-point data or normalized data, and the data processing device further includes a selector; the selector is configured to: when the texture data is floating-point data, input the first operation data and the second operation data into the normalization operation unit for operation, and output the corresponding target operation result; when the texture data is normalized data, input the texture data into the normalization operation unit for operation, and output the corresponding target operation result.
[0158] The data processing apparatus provided in this embodiment can obtain texture data corresponding to a target operation instruction. This texture data can be floating-point data or normalized data. A corresponding normalization operation unit is configured for the normalized data to process it. When the texture data is floating-point data, it can also be processed using the normalization operation unit. Specifically, first operation data is generated based on the mantissa of the texture data, and second operation data is generated based on the exponent and sign bits of the texture data. Then, the normalization operation unit corresponding to the normalized data performs operation processing on the first operation data and weight parameters to obtain a first operation result. The second operation data and the first operation result are combined to obtain the running data to be adjusted. After completing the operation processing, the second operation data and the first operation result are restored to floating-point data format, ensuring the accuracy of the floating-point data. The running data to be adjusted is then converted to a different data format to obtain a second operation result. Finally, the target operation result of the target operation instruction is determined based on the second operation result. Based on this, it can be seen that the data processing apparatus provided in this embodiment can process both floating-point data and normalized data through a normalization operation unit. This reduces the number of operation units while processing multiple types of data, thereby avoiding the problem of wasting computing resources and reducing the occupancy rate of circuit area.
[0159] Figure 8 This is a block diagram of an electronic device provided in an embodiment of the present disclosure.
[0160] Reference Figure 8 This disclosure provides an electronic device, which includes: at least one processor 801; at least one memory 802; and one or more I / O interfaces 803 connected between the processor 801 and the memory 802; wherein the memory 802 stores one or more computer programs that can be executed by the at least one processor 801, and the one or more computer programs are executed by the at least one processor 801 to enable the at least one processor 801 to perform the above-described data processing method.
[0161] This disclosure also provides a computer-readable storage medium storing a computer program thereon, wherein the computer program, when executed by a processor, implements the data processing method described above. The computer-readable storage medium may be volatile or non-volatile.
[0162] This disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the above-described data processing method.
[0163] This disclosure also provides a chip, comprising: an interface circuit and a control circuit; the interface circuit is used to receive a target arithmetic instruction, and the control circuit is used to collaboratively execute the aforementioned data processing method according to the target arithmetic instruction and the interface circuit. The chip can be an XPU (GPU, DPU, TPU, NPU), ASIC, FPGA, or other integrated circuit chip.
[0164] Those skilled in the art will understand that all or some of the steps, systems, and apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software can be distributed on a computer-readable storage medium, which may include computer storage media (or non-transitory media) and communication media (or transient media).
[0165] As is known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable program instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technologies, portable compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, it is known to those skilled in the art that communication media typically contain computer-readable program instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0166] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.
[0167] Computer program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk, C++, etc., and conventional procedural programming languages such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing the status information of the computer-readable program instructions to implement various aspects of this disclosure.
[0168] The computer program product described herein can be implemented specifically through hardware, software, or a combination thereof. In one alternative embodiment, the computer program product is specifically embodied in a computer storage medium; in another alternative embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.
[0169] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.
[0170] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.
[0171] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.
[0172] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0173] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in connection with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of this disclosure as set forth by the appended claims.
Claims
1. A data processing method, characterized in that, include: Upon receiving a target operation instruction, obtain the texture data corresponding to the target operation instruction; When the texture data is floating-point data, first operation data is generated based on the mantissa data of the texture data, and second operation data is generated based on the exponent data and sign data of the texture data. The first operation data has the same data bit width as the normalized data, and the floating-point data includes exponent data, mantissa data and sign data. Using the normalization operation unit corresponding to the normalized data, the first operation data and weight parameters are processed to obtain the first operation result. The second operation data and the first operation result are combined to obtain the running data to be adjusted. The running data to be adjusted is then converted to a new data format to obtain the second operation result. Based on the second calculation result, the target calculation result of the target calculation instruction is determined.
2. The method according to claim 1, characterized in that, There are multiple texture data and multiple weight parameters, and each weight parameter corresponds one-to-one with a texture data. The process of using the normalization operation unit corresponding to the normalized data to perform operation processing on the first operation data and weight parameters to obtain a first operation result, combining the second operation data and the first operation result to obtain the running data to be adjusted, and converting the data format of the running data to be adjusted to obtain a second operation result includes: The first computational data of the multiple texture data is input into the normalization computation unit, wherein the normalization computation unit includes an arithmetic unit and a format adjustment module; Using the aforementioned arithmetic unit, each first operation data and its corresponding weight parameter are processed to obtain multiple first operation results; Using the format adjustment module, the second operation data and the first operation result corresponding to each first operation data are combined to obtain multiple operation data to be adjusted, and the data format of the multiple operation data to be adjusted is converted to obtain multiple second operation results.
3. The method according to claim 2, characterized in that, The arithmetic unit is a multiplier, and there are multiple multipliers; The process involves using the arithmetic unit to perform calculations on each first calculation data and its corresponding weight parameters to obtain multiple first calculation results, including: The target first operation data and the weight parameters corresponding to the target first operation data are input into the target multiplier, wherein the target first operation data is any one of a plurality of first operation data, and the target multiplier is the multiplier corresponding to the target first operation data among a plurality of multipliers; By using parallel computation, the target multiplier multiplies the target first operation data and the weight parameters corresponding to the target first operation data to obtain the multiple first operation results.
4. The method according to claim 3, characterized in that, The format adjustment module is multiple, and the multiple first operation results are multiple multiplication operation results; The method utilizes the format adjustment module to combine the second operation data and the first operation result corresponding to each first operation data to obtain multiple operation data to be adjusted, and performs data format conversion on the multiple operation data to obtain multiple second operation results, including: From a plurality of second operation data, determine the target second operation data corresponding to the target first operation data, and from a plurality of multiplication operation results, determine the target multiplication operation result corresponding to the target first operation data; By using a parallel execution method and a target format adjustment module, the target second operation data and the target multiplication operation result are combined to obtain multiple operation data to be adjusted, and the data format of the multiple operation data to be adjusted is converted to obtain multiple second operation results. The target format adjustment module is the module corresponding to the target multiplication operation result among multiple format adjustment modules.
5. The method according to claim 4, characterized in that, The step of combining the target second operation data and the target multiplication operation result to obtain the plurality of operation data to be adjusted, and converting the data format of the plurality of operation data to be adjusted to obtain the plurality of second operation results, includes: Select the largest exponent from the exponent data of the plurality of second operation data; Subtract the maximum exponent data from the exponent data of the target second operation data to obtain the exponent shift parameter corresponding to the target second operation data; Using the exponential shift parameter, a shift operation is performed on the exponential bit data of the target second operational data to obtain the shifted exponential bit data of the target second operational data; The target multiplication result, the shift exponent data and sign data of the target second operation data are combined to obtain the plurality of operation data to be adjusted; Each piece of data to be adjusted is converted into two's complement format to obtain the multiple second operation results.
6. The method according to claim 1, characterized in that, The second operation has multiple results; The step of determining the target operation result of the target operation instruction based on the second operation result includes: The adder in the normalization operation unit is used to add multiple second operation results to obtain the addition operation result; The result adjustment module in the normalization operation unit is used to adjust the format of the addition operation result to obtain the target operation result of the target operation instruction.
7. The method according to claim 6, characterized in that, The step of adjusting the format of the addition operation result to obtain the target operation result of the target operation instruction includes: The addition result is converted into its original code format to obtain the result to be adjusted, wherein the result to be adjusted includes exponent data, mantissa data, and sign data; Identify the leading parameter from the mantissa data of the result to be adjusted; Based on the aforementioned preamble parameters, the exponent and mantissa data in the result to be adjusted are adjusted to obtain the target operation result of the target operation instruction.
8. The method according to claim 1, characterized in that, The step of generating first operational data based on the mantissa data of the texture data, and generating second operational data based on the exponent and sign data of the texture data, includes: Using the data bit width of the normalized data, the bit width of the mantissa data of the texture data is adjusted to obtain the first computational data; The exponent and sign bits of the texture data are determined as the second operation data.
9. The method according to claim 8, characterized in that, The step of adjusting the bit width of the mantissa of the texture data using the bit width of the normalized data to obtain the first computational data includes: The padding data width is determined based on the data bit width of the normalized data and the data bit width of the mantissa data; Based on the width of the padding data, the padding data is determined, and the padding data is combined with the mantissa data to obtain the first operational data.
10. The method according to claim 1, characterized in that, The method further includes: When the texture data is normalized data, the normalization operation unit performs an operation on the texture data and the weight parameters to obtain a third operation result, and determines the target operation result of the target operation instruction based on the third operation result, wherein the normalized data is the data after normalization processing.
11. The method according to claim 10, characterized in that, The texture data is multiple, and the third operation result is the result of a multiplication operation; The step of using the normalization operation unit to perform operations on the texture data and the weight parameters to obtain a third operation result, and determining the target operation result of the target operation instruction based on the third operation result, includes: Multiple texture data are input into the normalization operation unit, wherein the normalization operation unit includes a multiplier and an adder; By using the multiplier in parallel execution, each texture data and its corresponding weight parameter are multiplied together to obtain multiple multiplication results. The adder is used to add the results of the multiple multiplication operations to obtain the target operation result of the target operation instruction.
12. The method according to any one of claims 1 to 11, characterized in that, The texture data is multiple, and the texture data is the color vector of the target pixel in the two-dimensional texture during the graphics processing. The target pixel is a plurality of pixels in the two-dimensional texture that are adjacent to the three-dimensional model pixel, and the three-dimensional model pixel is a pixel in the three-dimensional model; The target calculation result is the color vector corresponding to the pixel of the three-dimensional model; The weighting parameters are determined based on the coordinates of the pixels in the 3D model.
13. A data processing apparatus, characterized in that, The device includes a data acquisition unit and a normalization calculation unit; The data acquisition unit is configured to, upon receiving a target operation instruction, acquire texture data corresponding to the target operation instruction; if the texture data is floating-point data, generate first operation data based on the mantissa data of the texture data, and generate second operation data based on the exponent and sign data of the texture data; wherein the first operation data has the same data bit width as the normalized data, and the floating-point data includes exponent data, mantissa data, and sign data. The normalization operation unit is configured to perform operation processing on the first operation data and weight parameters to obtain a first operation result, combine the second operation data and the first operation result to obtain the operation data to be adjusted, perform data format conversion on the operation data to be adjusted to obtain a second operation result, and determine the target operation result of the target operation instruction based on the second operation result.
14. The apparatus according to claim 13, wherein there are multiple texture data, multiple weight parameters, and each weight parameter corresponds one-to-one with the texture data, and the first operation result is a multiplication operation result; The normalization operation unit includes multiple multipliers, multiple format adjustment modules, adders, and result adjustment modules; The plurality of multipliers are configured as follows: By using parallel computation, each first operation data is multiplied by the weight parameter corresponding to each first operation data to obtain multiple multiplication operation results; The format adjustment module is configured as follows: Select the largest exponent from the exponent data of multiple second operation data; Subtract the maximum exponent data from the exponent data of each second operation data to obtain the exponent shift parameter corresponding to each second operation data; Using the exponential shift parameter, a shift operation is performed on the exponential bit data of each second operational data to obtain the shifted exponential bit data of each second operational data; The results of the multiple multiplication operations, along with the shift exponent data and sign data of the corresponding second operation data, are combined to obtain multiple operation data to be adjusted. Each data to be adjusted is converted to two's complement format to obtain multiple second operation results; The adder is configured as follows: Add the results of multiple second operations together to obtain the addition result; The result adjustment module is configured as follows: The addition result is converted to its original code format to obtain the result to be adjusted. The calculation result to be adjusted includes exponent data, mantissa data, and sign data; Identify the leading parameter from the mantissa data of the result to be adjusted; Based on the aforementioned preamble parameters, the exponent and mantissa data in the result to be adjusted are adjusted to obtain the target operation result of the target operation instruction.
15. The apparatus according to claim 13, wherein the texture data is multiple, and the normalization operation unit includes multiple multipliers and adders; The plurality of multipliers are configured as follows: When the texture data is normalized, multiple multiplication results are obtained by multiplying each texture data with its corresponding weight parameter in parallel. The adder is configured as follows: The results of the multiple multiplication operations are added together to obtain the target operation result of the target operation instruction.
16. The apparatus of claim 13, wherein the texture data comprises floating-point data or normalized data, and the data processing apparatus further comprises a selector; The selector is configured as follows: When the texture data is floating-point data, the first operation data and the second operation data are input into the normalization operation unit for operation, and the corresponding target operation result is output. When the texture data is normalized, the texture data is input into the normalization operation unit for operation, and the corresponding target operation result is output.
17. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores one or more computer programs that can be executed by the at least one processor, the one or more computer programs being executed by the at least one processor to enable the at least one processor to perform the method as described in any one of claims 1-12.
18. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program, when executed by a processor, implements the method as described in any one of claims 1-12.
19. A computer program product, characterized in that, Includes computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the method as described in any one of claims 1-12.
20. A chip, characterized in that, include: Interface circuits and control circuits; The interface circuit is used to receive target operation instructions, and the control circuit is used to collaboratively execute the method of any one of claims 1-12 according to the target operation instructions and the interface circuit.
Citation Information
Patent Citations
Pixel color mixing operation method, graph drawing method, device and equipment
CN115718586A
Method for determining color value, electronic equipment and computer-readable storage medium
TW202526826A
Filtering unit for floating-point texture data
US20060028482A1
Floating Point Texture Filtering Using Unsigned Linear Interpolators and Block Normalizations
US20090295819A1
Conversion of unorm integer values to floating-point values in low power
US20190042246A1