Memory calculation optimization acceleration method and system for multidimensional data flow real-time processing

By constructing a spatiotemporal correlation graph and performing graph decomposition, and identifying prediction class and instant release class subgraphs, intelligent memory resource scheduling in multidimensional data stream processing is realized, solving the problems of low cache hit rate and low memory resource utilization, and improving system performance and adaptability.

CN121833252APending Publication Date: 2026-04-10SHENZHEN GELONGHUI INFORMATION TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHENZHEN GELONGHUI INFORMATION TECH CO LTD
Filing Date
2025-12-25
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing multidimensional data stream processing technologies lack the ability to accurately model and predict the spatiotemporal characteristics of data streams, resulting in low cache hit rates, low memory resource utilization, and the inability to identify and release unused memory space in a timely manner, which affects system performance, especially in high-concurrency computing environments.

Method used

By acquiring multidimensional data streams, extracting data access trajectories of concurrent computing threads, constructing a spatiotemporal correlation graph and performing graph decomposition, identifying prediction class and instant release class subgraphs, preloading based on prediction class subgraphs, establishing reverse dependency indexes, and dynamically adjusting memory resource allocation, intelligent memory resource scheduling is achieved.

Benefits of technology

It improves data access speed, balances computing performance and memory utilization, and enhances the system's adaptability and scalability to multidimensional data stream processing, making it particularly suitable for high-performance computing scenarios such as large-scale data analysis and artificial intelligence training.

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Abstract

The invention provides a memory calculation optimization acceleration method and system for multidimensional data flow real-time processing, and relates to the technical field of data flow processing, and the method comprises the steps: obtaining a data flow, extracting access trajectory features, constructing a space-time association graph, decomposing the space-time association graph into feature sub-graphs, and carrying out the classification prediction or release according to the topological entropy of the graph. And establishing a state transition matrix to predict access and preload data, releasing the memory space to the multiplexing pool by using a reverse dependency index, and dynamically adjusting the proportion of the cache region to the memory multiplexing pool. According to the method, memory waiting time is shortened, real-time processing efficiency is improved, and memory resource occupation is reduced.
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Description

TECHNICAL FIELD

[0001] The present application relates to data stream processing technology, and in particular to a memory computing optimization acceleration method and system for real-time processing of multi-dimensional data streams. BACKGROUND

[0002] With the rapid development of big data and Internet of Things technology, real-time processing of multi-dimensional data streams has become an important demand in the current computing field. Multi-dimensional data streams refer to data sequences with multiple attribute dimensions continuously generated in the time dimension, widely used in financial transaction analysis, scientific computing, industrial sensor monitoring, intelligent transportation systems and other fields. These application scenarios pose severe challenges to the real-time and high efficiency of data processing, and how to optimize computing performance under limited memory resources has become a research hotspot.

[0003] Existing multi-dimensional data stream processing technology mainly relies on traditional cache management strategies and general memory allocation mechanisms, such as the least recently used algorithm, the first-in-first-out algorithm, etc. The existing technology lacks accurate modeling and prediction capabilities for the spatiotemporal characteristics of data streams, and cannot accurately capture the spatiotemporal correlation between data elements in multi-dimensional data streams, resulting in low cache hit rates, frequent memory exchange operations, and increased system latency. The existing memory management mechanism usually adopts a static allocation strategy, which cannot flexibly adjust memory resource allocation according to the dynamic needs of actual computing tasks, resulting in low memory resource utilization and unbalanced phenomena such as excessive use of some areas and idling of other areas. The existing technology lacks fine management of the dependency relationship between computing tasks and data, and cannot timely identify and release memory space that is no longer needed, resulting in long-term occupation of memory resources and affecting overall system performance, especially in high-concurrency computing environments, where this problem is more prominent. SUMMARY

[0004] The embodiments of the present application provide a memory computing optimization acceleration method and system for real-time processing of multi-dimensional data streams, which can solve the problems in the prior art.

[0005] In a first aspect, the embodiments of the present application provide a memory computing optimization acceleration method for real-time processing of multi-dimensional data streams, comprising: Obtaining a multi-dimensional data stream, extracting data access trajectories of concurrent computing threads, extracting time characteristics and space characteristics of the data access trajectories, generating a spatiotemporal coupling feature matrix through tensor product operation, and constructing a spatiotemporal correlation graph; Performing graph decomposition on the spatiotemporal correlation graph to extract feature subgraphs, calculating the graph topological entropy of each feature subgraph, and according to the comparison result of the graph topological entropy and the preset classification threshold, classifying the feature subgraphs into a predicted class subgraph set or an immediate release class subgraph set; constructing a state transition matrix based on the prediction class subgraph set, predicting the access position and the access time according to the state transition matrix, and preloading data corresponding to the access position to a prediction cache area before the access time; establishing a reverse dependency index for the instant release class subgraph set, recording a calculation task identifier corresponding to a data element, and releasing a memory space to a memory reuse pool when a calculation task indicated by the calculation task identifier is completed; matching the predicted access position and the actual access position, reading data from the prediction cache area when the matching is successful, triggering dynamic migration of data in the prediction cache area to the memory reuse pool when the matching is unsuccessful, calculating a prediction accuracy, and adjusting a capacity allocation ratio of the prediction cache area and the memory reuse pool according to the prediction accuracy.

[0006] obtaining a multi-dimensional data stream, extracting a data access trajectory of a concurrent calculation thread, extracting a time feature and a space feature of the data access trajectory, generating a space-time coupling feature matrix through tensor product operation, and constructing a space-time correlation graph including: obtaining a multi-dimensional data stream, monitoring access operations of a concurrent calculation thread on data elements in the multi-dimensional data stream, and recording a timestamp and a memory address of the access operations to form a data access trajectory; extracting a timestamp sequence of an access event in the data access trajectory, performing frequency domain decomposition on the timestamp sequence to obtain a time spectrum, and identifying a peak frequency component from the time spectrum as a time feature; extracting a memory address sequence of an access event in the data access trajectory, performing spatial clustering analysis on the memory address sequence to obtain a plurality of address clusters, and extracting a cluster center coordinate of each address cluster as a space feature; performing tensor product operation on the time feature and the space feature to generate a space-time coupling matrix, wherein a row index corresponds to a peak frequency component in the time feature, a column index corresponds to a cluster center coordinate in the space feature, and a matrix element value represents an access correlation strength between the corresponding peak frequency component and the cluster center coordinate; extracting a matrix position in the space-time coupling matrix whose element value exceeds a preset coupling threshold, combining a peak frequency component and a cluster center coordinate corresponding to the matrix position as a space-time state node, calculating a transition probability between the space-time state nodes as an edge weight between the nodes, and constructing a space-time correlation graph based on the space-time state nodes and the edge weights.

[0007] performing graph decomposition on the space-time correlation graph to extract a feature subgraph, calculating a graph topological entropy of each feature subgraph, and classifying the feature subgraph into a prediction class subgraph set or an instant release class subgraph set according to a comparison result of the graph topological entropy and a preset classification threshold including: constructing a Laplacian matrix for the space-time correlation graph and performing eigenvalue decomposition to obtain an eigenvalue sequence and an eigenvector matrix, mapping the eigenvalue sequence to a complex plane to construct an eigenvalue distribution cloud map; Identify the density gradient mutation area in the eigenvalue distribution cloud map as the segmentation boundary, extract the column vector corresponding to the segmentation boundary from the feature vector matrix as the segmentation feature vector, and divide the space-time correlation graph into multiple connected components as feature subgraphs according to the segmentation feature vector; Construct a double-layer topology structure including an access dependency layer and a data flow direction layer for each feature subgraph, calculate the inter-layer information transmission amount between the access dependency layer and the data flow direction layer, and calculate the graph topology entropy of the feature subgraph based on the inter-layer information transmission amount; Establish a mapping function of graph topology entropy and access pattern predictability, and input the graph topology entropy of each feature subgraph into the mapping function to convert it into a predictability score; Compare the predictability score with a preset classification threshold, and when the predictability score is higher than the preset classification threshold, classify the feature subgraph into a predicted class subgraph set, and when the predictability score is lower than or equal to the preset classification threshold, classify the feature subgraph into an immediate release class subgraph set.

[0008] Based on the predicted class subgraph set, a state transition matrix is constructed, and the access position and access time are predicted according to the state transition matrix, and the data corresponding to the access position is preloaded to the prediction cache area before the access time, including: Extract the nodes of each feature subgraph in the predicted class subgraph set as access states, count the transition frequencies between the access states in each feature subgraph, and calculate the time-weighted transition probability by coupling the transition frequencies and the access time intervals; Based on the time-weighted transition probability, a state transition matrix is constructed, wherein the row index represents the source access state, the column index represents the target access state, and the matrix element value represents the time-weighted transition probability from the source access state to the target access state; Multi-step transition deduction is performed on the state transition matrix, the future access state sequence is deduced from the current access state along the path with the maximum transition probability, the memory address associated with the access state is extracted from the future access state sequence as the access position, and the timestamp associated with the access state is extracted as the access time; Calculate the time interval between the current time and the access time, and when the time interval meets the preloading trigger condition, read the data from the memory address corresponding to the access position and pre-load the data to the prediction cache area.

[0009] A reverse dependency index is established for the immediate release class subgraph set, and the computing task identifier corresponding to the data element is recorded, and when the computing task indicated by the computing task identifier is completed, the memory space is released to the memory reuse pool, including: Traverse the nodes of each feature subgraph in the instant release class subgraph set, extract the data elements and computing tasks associated with each node, construct a reverse mapping relationship from data elements to computing task identifiers, and establish a reverse dependency index based on the reverse mapping relationship, wherein the memory address of the data element is used as the index key and the set of computing task identifiers is used as the index value; Monitor the execution status of the computing task, and when the execution status of the computing task indicated by the computing task identifier changes to the completed state, query the computing task identifier corresponding to the completed state from the reverse dependency index, extract the memory address of the associated data element from the index key according to the computing task identifier, and obtain the memory space size corresponding to the memory address; Based on the memory address and the memory space size, a memory release descriptor is constructed, and the memory release descriptor is submitted to the memory management unit for memory fragmentation arrangement. The memory management unit marks the continuous memory space after the arrangement as reusable and writes it into the memory reuse pool.

[0010] Match the predicted access location and the actual access location, read the data from the prediction cache area when they match, and trigger the dynamic migration of the prediction cache area data to the memory reuse pool when they do not match, including: Construct a mapping cache table to record the memory address information of the predicted access location and the actual access location, generate an address mapping index, extract the predicted access location and the actual access location information in the mapping cache table to construct an access sequence matrix; Calculate the space-time correlation vector of the predicted access location and the actual access location in the access sequence matrix, calculate the address offset of the predicted access location and the actual access location according to the space-time correlation vector, and determine the matching state of the predicted access location and the actual access location based on the address offset; When the address offset of the predicted access location and the actual access location is zero, it is determined to be in a matching state, the corresponding data of the predicted access location is read from the prediction cache area through the address mapping index, and the access count in the access sequence matrix is updated; When the address offset of the predicted access location and the actual access location is not zero, it is determined to be in a non-matching state, data migration description information containing the address of the prediction cache area and the address of the memory reuse pool is generated, and the data migration description information is submitted to the memory management unit; The memory management unit performs dynamic migration of the prediction cache area data to the memory reuse pool according to the data migration description information, writes the migration state to the access sequence matrix, updates the address mapping index according to the access sequence matrix, and completes the memory reuse pool space allocation.

[0011] Calculate the prediction accuracy, and adjust the capacity allocation ratio of the prediction cache area and the memory reuse pool according to the prediction accuracy, including: Calculate the ratio of the number of successful matches of the predicted access location to the total number of predicted access locations, and generate the prediction accuracy of multiple time windows; Grouping the prediction accuracy of multiple time windows according to a time sequence, combining the access frequency of the predicted access position to calculate a prediction accuracy weighted value, generating a prediction accuracy sequence, and constructing a prediction cache area capacity mapping relationship; According to the prediction cache area capacity mapping relationship, the prediction cache area expansion capacity and the memory multiplexing pool expansion capacity are calculated, a prediction cache area and memory multiplexing pool capacity allocation scheme is generated, and a data migration step table is established; Based on the data migration step table, the migration process of the prediction cache area data to the memory multiplexing pool is planned, a prediction cache area data block migration path is generated, and a data block migration index is constructed; Performing the data migration indicated by the data block migration index, completing the capacity allocation ratio adjustment of the prediction cache area and the memory multiplexing pool, updating the capacity allocation information in the prediction result statistics table, and reconstructing the prediction cache area capacity mapping relationship.

[0012] In a second aspect of the embodiment of the application, a memory computing optimization and acceleration system for real-time processing of multi-dimensional data streams is provided, comprising: A first unit is configured to obtain a multi-dimensional data stream, extract data access trajectories of concurrent computing threads, extract time features and space features of the data access trajectories, generate a space-time coupling feature matrix through tensor product operation, and construct a space-time correlation graph; A second unit is configured to perform graph decomposition on the space-time correlation graph to extract feature subgraphs, calculate graph topological entropy of each feature subgraph, and according to a comparison result of the graph topological entropy and a preset classification threshold, classify the feature subgraphs into a prediction class subgraph set or an instant release class subgraph set; A third unit is configured to construct a state transition matrix based on the prediction class subgraph set, predict an access position and an access time according to the state transition matrix, and preload data corresponding to the access position to a prediction cache area before the access time; A fourth unit is configured to establish a reverse dependency index for the instant release class subgraph set, record a computing task identifier corresponding to a data element, and release a memory space to a memory multiplexing pool when a computing task indicated by the computing task identifier is completed; A fifth unit is configured to match a predicted access position and an actual access position, read data from the prediction cache area when the positions match, trigger a dynamic migration of the prediction cache area data to the memory multiplexing pool when the positions do not match, calculate a prediction accuracy, and adjust a capacity allocation ratio of the prediction cache area and the memory multiplexing pool according to the prediction accuracy.

[0013] In a third aspect of the embodiment of the application, an electronic device is provided, comprising: A processor; A memory for storing processor-executable instructions; The processor is configured to invoke the instructions stored in the memory to execute the method described above.

[0014] In a fourth aspect, the present application provides a computer readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the method described above.

[0015] In the embodiment, by extracting the space-time coupling features of the multi-dimensional data stream, constructing a space-time association graph and performing feature decomposition, the data access pattern can be accurately captured, the accuracy of data prediction can be improved, and the data access delay can be reduced. By constructing two different memory management strategies of the prediction type subgraph and the instant release type subgraph, intelligent memory resource scheduling is realized. On the one hand, the data access speed is improved through preloading, and on the other hand, the memory space that is no longer needed is recycled through instant release, so that the computing performance and the memory utilization rate are effectively balanced. Based on the adaptive mechanism of real-time feedback, the capacity allocation ratio of the prediction cache area and the memory reuse pool is dynamically adjusted, so that the memory structure can be flexibly optimized according to the characteristics of different application scenarios and computing tasks, the adaptability and scalability of the system to multi-dimensional data stream processing are improved, and the method is especially suitable for high-performance computing scenarios such as large-scale data analysis and artificial intelligence training. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A flowchart of the memory computing optimization and acceleration method for real-time processing of multi-dimensional data streams according to the embodiment of the present application is shown in Figure 2 A flowchart of the memory prediction and reuse operation according to the embodiment of the present application is shown in DETAILED DESCRIPTION

[0017] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme of the embodiments of the present application will be described clearly and completely below in combination with the drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0018] The technical scheme of the present application will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in some embodiments.

[0019] Figure 1 A flowchart of the memory computing optimization and acceleration method for real-time processing of multi-dimensional data streams according to the embodiment of the present application is shown in Figure 1 The method comprises: The multi-dimensional data stream is acquired, the data access track of the concurrent computing thread is extracted, the time feature and the space feature of the data access track are extracted, the time-space coupling feature matrix is generated through tensor product operation, and the time-space correlation graph is constructed; The feature subgraph is extracted by graph decomposition of the time-space correlation graph, the graph topological entropy of each feature subgraph is calculated, and the feature subgraph is classified into the prediction class subgraph set or the instant release class subgraph set according to the comparison result of the graph topological entropy and the preset classification threshold; The state transition matrix is constructed based on the prediction class subgraph set, the access position and the access time are predicted according to the state transition matrix, and the data corresponding to the access position is preloaded to the prediction cache area before the access time; The reverse dependence index is established for the instant release class subgraph set, the computing task identifier corresponding to the data element is recorded, and the memory space is released to the memory reuse pool when the computing task indicated by the computing task identifier is completed; The predicted access position and the actual access position are matched, the data is read from the prediction cache area when the match is achieved, the dynamic migration of the data in the prediction cache area to the memory reuse pool is triggered when the match is not achieved, the prediction accuracy is calculated, and the capacity allocation ratio of the prediction cache area and the memory reuse pool is adjusted according to the prediction accuracy.

[0020] In an optional implementation, the multi-dimensional data stream is acquired, the data access track of the concurrent computing thread is extracted, the time feature and the space feature of the data access track are extracted, the time-space coupling feature matrix is generated through tensor product operation, and the time-space correlation graph is constructed, including: The multi-dimensional data stream is acquired, the access operation of the concurrent computing thread on the data element in the multi-dimensional data stream is monitored, and the time stamp and the memory address of the access operation are recorded to form a data access track; The access time stamp sequence of the access event in the data access track is extracted, the time spectrum is obtained by frequency domain decomposition of the access time stamp sequence, and the peak frequency component is identified from the time spectrum as the time feature; The memory address sequence of the access data element in the data access track is extracted, the address cluster is obtained by spatial clustering analysis of the memory address sequence, and the cluster center coordinates of each address cluster are extracted as the space feature; The time feature and the space feature are subjected to tensor product operation to generate a time-space coupling matrix, wherein the row index corresponds to the peak frequency component in the time feature, the column index corresponds to the cluster center coordinates in the space feature, and the matrix element value represents the access correlation strength between the corresponding peak frequency component and the cluster center coordinates; The matrix position in which the element value in the time-space coupling matrix exceeds a preset coupling threshold is extracted, the peak frequency component and the cluster center coordinates corresponding to the matrix position are combined as a time-space state node, the transition probability between the time-space state nodes is calculated as the edge weight between the nodes, and the time-space correlation graph is constructed based on the time-space state nodes and the edge weight.

[0021] Acquiring a multidimensional data flow refers to capturing access operations of memory data by each computing thread during the running of a computing system. The multidimensional data flow contains a plurality of concurrently executed computing threads, and the threads access different memory regions during execution. Monitoring access operations of data elements by concurrent computing threads in the multidimensional data flow can be implemented by inserting a monitoring probe in a memory management unit of the computing system. When a computing thread performs a read or write operation, the monitoring probe records a timestamp of the operation and an accessed memory address. The timestamp is accurate to the microsecond level, and the memory address is in byte units. The recorded timestamp and memory address sequence constitute a data access trajectory.

[0022] Extracting an access timestamp sequence from an access event in the data access trajectory is to analyze the time characteristics of the access pattern. The access timestamp sequence is represented as a series of time points, representing the specific time of each access event. Frequency domain decomposition of the access timestamp sequence can be performed using the fast Fourier transform method, which converts the time sequence from the time domain to the frequency domain to obtain a time spectrum. Each frequency component in the time spectrum represents the intensity of data access at that frequency. By setting a frequency amplitude threshold, peak frequency components are identified from the time spectrum, which are used as time characteristics. For example, when a computing thread accesses a specific memory region every 100 microseconds, a clear peak will appear at 10 Hz, which is the identified time characteristic.

[0023] Extracting a memory address sequence of an access data element from an access event in the data access trajectory is to analyze the spatial characteristics of the access pattern. The memory address sequence is represented as a series of memory locations, representing the specific memory addresses involved in each access event. Spatial clustering analysis of the memory address sequence can be performed using a density clustering algorithm, which classifies similar memory addresses into the same address cluster based on their distance relationships. The formation of address clusters is based on the continuity or logical association of memory addresses in physical space. The cluster center coordinates are calculated from each address cluster, which are the average or median of all memory addresses in the address cluster. These cluster center coordinates are used as spatial characteristics. For example, when a computing thread frequently accesses a region with memory addresses ranging from 0x10000000 to 0x10001000, an address cluster may be formed in this region, with a cluster center coordinate of 0x10000800.

[0024] Generating a spatiotemporal coupling matrix by tensor product operation of time characteristics and spatial characteristics is to combine the feature information of the time domain and the space domain through outer product operation. The specific implementation of the tensor product operation is to perform outer product calculation on the time characteristic vector and the space characteristic vector. In the spatiotemporal coupling matrix, the row index corresponds to the peak frequency component in the time characteristic, the column index corresponds to the cluster center coordinate in the spatial characteristic, and the matrix element value represents the access association strength between the corresponding peak frequency component and cluster center coordinate.

[0025] The access correlation strength is measured by calculating the ratio of the number of accesses to a specific memory region at a specific frequency to the total number of accesses. The space-time coupling matrix provides information on the access preferences of the computing thread to different memory regions at different time frequencies. For example, if the computing thread frequently accesses the memory region with cluster center coordinates 0x10000800 at a frequency of 10 Hz, the element value at the corresponding position in the matrix will be higher.

[0026] Extracting the matrix positions in the space-time coupling matrix whose element values exceed a preset coupling threshold, combining the peak frequency component corresponding to the matrix position and the cluster center coordinates as a space-time state node. The preset coupling threshold can be dynamically adjusted according to the application scenario, and is usually set to more than twice the average correlation strength. Each space-time state node represents an access pattern to a specific memory region at a specific frequency. The transition probability between space-time state nodes is calculated as the edge weight between nodes by analyzing the ratio of the number of transitions from one state to another in adjacent access events to the total number of transitions. Based on the space-time state nodes and edge weights, a space-time correlation graph is constructed, which reflects the data access pattern of the computing thread and its space-time correlation. For example, if the computing thread frequently accesses the 0x10000800 region at a frequency of 10 Hz and then accesses the 0x20000400 region at a frequency of 5 Hz, a high-weight edge will be formed between these two space-time state nodes.

[0027] In this embodiment, by extracting and analyzing the data access trajectories of concurrent computing threads in multi-dimensional data streams, access patterns with temporal periodicity and spatial locality are identified, and a space-time correlation graph reflecting the space-time correlation of data access is constructed. Based on the space-time correlation graph, future data access demand can be predicted, and data that is highly likely to be accessed can be pre-fetched to the fast access storage layer in advance, significantly reducing data access latency. By identifying data blocks with strong space-time correlation, the memory allocation strategy is optimized, and related data is placed in physically adjacent locations to reduce cache miss rate.

[0028] In an optional implementation, the space-time correlation graph is subjected to graph decomposition to extract feature subgraphs, the graph topological entropy of each feature subgraph is calculated, and the feature subgraphs are classified into a prediction class subgraph set or an immediate release class subgraph set according to the comparison result of the graph topological entropy and a preset classification threshold. A Laplacian matrix is constructed for the space-time correlation graph and subjected to eigenvalue decomposition to obtain an eigenvalue sequence and an eigenvector matrix, and the eigenvalue sequence is mapped to a complex plane to construct an eigenvalue distribution cloud map. In the eigenvalue distribution cloud map, a density gradient mutation region is identified as a segmentation boundary, a column vector corresponding to the segmentation boundary is extracted from the eigenvector matrix as a segmentation feature vector, and the space-time correlation graph is divided into multiple connected components as feature subgraphs according to the segmentation feature vector. The double-layer topology structure including the access dependency layer and the data flow direction layer is constructed for each feature subgraph, the inter-layer information transmission amount between the access dependency layer and the data flow direction layer is calculated, and the graph topology entropy of the feature subgraph is calculated based on the inter-layer information transmission amount; The mapping function between the graph topology entropy and the access pattern predictability is established, and the graph topology entropy of each feature subgraph is input into the mapping function to be converted into the predictability score; The predictability score is compared with the preset classification threshold value, when the predictability score is higher than the preset classification threshold value, the feature subgraph is classified into the prediction class subgraph set, and when the predictability score is lower than or equal to the preset classification threshold value, the feature subgraph is classified into the instant release class subgraph set.

[0029] The nodes in the space-time correlation graph represent space-time states, and the edges represent the transition relationship between states. The Laplacian matrix is obtained by transforming the adjacency matrix of the space-time correlation graph, and the specific method is to subtract the adjacency matrix from the degree matrix of the node. The degree matrix is a diagonal matrix, and the elements on the diagonal line represent the number of edges of the corresponding node. The elements in the adjacency matrix represent whether there is a connection between nodes, if there is a connection, the corresponding element value is the weight of the edge, otherwise it is zero. The constructed Laplacian matrix retains the connectivity and structure information of the graph. Eigenvalue decomposition is performed on the Laplacian matrix to obtain the eigenvalue sequence and the eigenvector matrix. The eigenvalue sequence reflects the overall topological structure characteristics of the graph, and each column of the eigenvector matrix represents the projection distribution of the nodes in the graph in a specific dimension. When mapping the eigenvalue sequence to the complex plane to construct the eigenvalue distribution cloud diagram, the horizontal axis represents the real part of the eigenvalue, the vertical axis represents the imaginary part of the eigenvalue, each eigenvalue forms a point on the complex plane, and the collection of all points constitutes the eigenvalue distribution cloud diagram.

[0030] The density gradient mutation region in the eigenvalue distribution cloud map is identified as the segmentation boundary. The density gradient mutation region refers to the region where the distribution density of eigenvalues on the complex plane changes significantly, which usually indicates that there is a natural grouping boundary in the graph structure. The identification process adopts a spatial density scanning method, sets a scanning window on the complex plane, calculates the density of eigenvalue points in the window, draws the density change curve, and the steep point on the density curve is the density gradient mutation region. The column vectors corresponding to the segmentation boundary in the eigenvector matrix are extracted as the segmentation feature vectors, which correspond to the eigenvalues in the density gradient mutation region. The method of dividing the space-time correlation graph into multiple connected components as feature subgraphs according to the segmentation feature vectors is: calculating the projection value of each node on the segmentation feature vector, clustering the nodes according to the similarity of the projection values, and forming different connected components, each connected component being a feature subgraph. In practical applications, when the eigenvalue distribution of the Laplacian matrix shows two obvious density concentration regions on the complex plane, the feature vectors corresponding to the eigenvalues connecting the two regions can be selected as the segmentation feature vectors, and the space-time correlation graph can be divided into two feature subgraphs of high-frequency access region and low-frequency access region using the vectors.

[0031] A double-layer topology structure including an access dependency layer and a data flow direction layer is constructed for each feature subgraph. The access dependency layer describes the access dependency relationship between different memory regions, with nodes representing memory regions and edges representing the sequential dependency relationship in the access sequence. The data flow direction layer describes the transmission path of data between different processing units, with nodes representing processing units and edges representing the direction and bandwidth of data transmission. The double-layer topology structure connects the two layers through inter-layer connection edges, which represent the access relationship between specific processing units and specific memory regions. When calculating the inter-layer information transfer amount between the access dependency layer and the data flow direction layer, the number, weight and connection mode of the nodes in the two layers of the inter-layer connection edges are considered. The larger the inter-layer information transfer amount, the more frequent the interaction between the processing units and the memory regions. The graph topology entropy of the feature subgraph is calculated based on the inter-layer information transfer amount, which represents the degree of uncertainty of inter-layer information transfer. The calculation method is to normalize the weight of the inter-layer connection edge to a probability distribution, and then calculate the information entropy of the distribution. The lower the graph topology entropy, the more regular the inter-layer information transfer mode, and the more predictable the access behavior.

[0032] A mapping function between graph topology entropy and predictability of access pattern is established. The graph topology entropy reflects the complexity of data access pattern, while the predictability represents the possibility of future access behavior being correctly predicted. The mapping function is established by analyzing historical data, and adopts an exponential decay form, i.e. the predictability score equals to a constant multiplied by the graph topology entropy raised to a negative exponential power. The parameters in the mapping function are determined by regression analysis, fitting the historical graph topology entropy data with the actual prediction accuracy data to obtain the optimal parameter value. The graph topology entropy of each feature subgraph is input into the mapping function to obtain the corresponding predictability score, which is between 0 and 1, and the value closer to 1 indicates higher predictability. In actual application, when the graph topology entropy of a feature subgraph is 0.4, the predictability score obtained by the mapping function is 0.8, indicating that the access pattern of the feature subgraph has high predictability.

[0033] The predictability score is compared with a preset classification threshold. When the predictability score is higher than the preset classification threshold, the feature subgraph is classified into the predicted class subgraph set; when the predictability score is lower than or equal to the preset classification threshold, the feature subgraph is classified into the immediate release class subgraph set. The preset classification threshold is usually set between 0.5 and 0.7, and the specific value can be dynamically adjusted according to the system resource status. The subgraphs in the predicted class subgraph set represent memory regions with regular access patterns, and the data of these regions are suitable for predictive caching. The subgraphs in the immediate release class subgraph set represent memory regions with strong randomness of access pattern, and the data of these regions are suitable for being released immediately after access to save memory resources.

[0034] By graph decomposition of the spatiotemporal association graph and introduction of graph topology entropy analysis, memory regions with regular access patterns and memory regions with random access patterns are effectively identified, and accurate allocation and optimized management of memory resources are realized. For the memory regions corresponding to the predicted class subgraph set, a predictive caching strategy is adopted to load data into the cache in advance, reducing access delay; for the memory regions corresponding to the immediate release class subgraph set, an on-demand loading strategy is adopted to avoid occupying valuable cache resources. This memory management method based on graph topology entropy can adapt to complex and variable data access patterns, ensuring high performance while maximizing memory resource utilization efficiency.

[0035] In an optional implementation, a state transition matrix is constructed based on the predicted class subgraph set, and the data corresponding to the access position is preloaded to the prediction cache area before the access time according to the state transition matrix, including: The nodes of each feature subgraph in the predicted class subgraph set are extracted as access states, the transition frequencies between the access states in each feature subgraph are counted, and the time-weighted transition probability is obtained by coupling calculation of the transition frequencies and the access time interval; constructing a state transition matrix based on the time-weighted transition probabilities, wherein a row index represents a source access state, a column index represents a target access state, and a matrix element value represents a time-weighted transition probability from the source access state to the target access state; performing multi-step transition deduction on the state transition matrix to deduce a future access state sequence from a current access state along a path of maximum transition probability, extracting a memory address associated with an access state in the future access state sequence as an access location and extracting a timestamp associated with the access state as an access time; calculating a time interval between a current time and the access time, and when the time interval satisfies a preloading trigger condition, reading data from the memory address corresponding to the access location and preloading the data to a prediction cache area.

[0036] In the multi-dimensional data stream processing process, the prediction class subgraph set contains feature subgraphs with high predictability. The nodes of each feature subgraph represent a space-time state, which contains access pattern information of a specific memory region at a specific time frequency. The access state is composed of a time feature and a space feature. The time feature represents the period or frequency of access, and the space feature represents the memory region position accessed. The transition frequency between access states in each feature subgraph is the number of times of switching from one access state to another access state recorded in the data access track. The transition frequency is counted on the historical access sequence by a sliding window method, and the window size is usually set to 5 to 10 access events. The number of state transitions in the window is counted. The access time interval refers to the time required to transition from one access state to another access state, usually in units of microseconds. The time-weighted transition probability is calculated by coupling the transition frequency and the access time interval. The calculation method is to divide the transition frequency by the total transition number to obtain the basic transition probability, and then adjust the weight according to the stability of the access time interval. The transition with high time interval stability obtains a higher weight, and vice versa. The weight adjustment adopts an inverse proportional function. The smaller the variance of the time interval, the higher the weight.

[0037] A state transition matrix is constructed based on the time-weighted transition probabilities. The state transition matrix is a two-dimensional table, with the row index representing the source access state and the column index representing the target access state. Each element value in the matrix represents the time-weighted transition probability from the source access state to the target access state. The dimension of the state transition matrix is determined by the number of access states, and if there are 100 different access states, the state transition matrix is a 100x100 square matrix. The sum of the elements in each row of the matrix is 1, representing the sum of the probabilities of transitioning from a certain state to all possible states. During the construction of the state transition matrix, the statistical transition frequency needs to be normalized to ensure the rationality of the transition probability distribution. For insufficient data transfer relationships, Laplace smoothing technology can be used to avoid zero probability problems. In practical applications, when there are 30 records of transitioning from access state A to access state B and 70 records of transitioning from A to C, and no other transitions, the corresponding element values in the state transition matrix after normalization are 0.3 and 0.7, respectively.

[0038] The state transition matrix is subjected to multi-step transition deduction. Multi-step transition deduction refers to predicting the future possible access state sequence from the current access state based on the state transition matrix. The deduction process uses the Markov chain prediction method, which selects the next state with the highest transition probability as the prediction result from the current state each time. Repeating this process can obtain the multi-step predicted access state sequence. The deduction depth is usually set to 5 to 10 steps, and the prediction accuracy will significantly decrease beyond this depth. The memory address associated with the access state is extracted as the access location from the future access state sequence, and the timestamp associated with the access state is extracted as the access time. The access location refers to the predicted starting address and length of the memory region to be accessed, and the access time refers to the predicted time point of the access. The memory address and timestamp information are both included in the definition of the access state and can be directly extracted from the predicted access state. In practical applications, when the future access state sequence is predicted to be [state1, state2, state3], the corresponding memory address sequence such as [0x10002000, 0x20001000, 0x30004000] and the access time sequence such as [current time + 100 microseconds, current time + 230 microseconds, current time + 350 microseconds] can be extracted.

[0039] The time interval between the current time and the access time is calculated. The calculation of the time interval adopts the method of subtracting the current time from the access time, and the result is in units of microseconds. The preloading trigger condition refers to a time threshold that determines when to start data preloading, which is usually set as two parameters: a minimum preloading time interval and a maximum preloading time interval. The minimum preloading time interval ensures that there is enough time to complete the preloading operation, and is usually set to 1.2 times the data transmission delay; the maximum preloading time interval avoids preloading too early, which causes the cache resource to occupy time for too long, and is usually set to 5 times the average access interval. When the calculated time interval is greater than or equal to the minimum preloading time interval and less than or equal to the maximum preloading time interval, the preloading trigger condition is met.

[0040] Reading data from the memory address corresponding to the access location refers to obtaining the data of the corresponding region from the main memory or storage device according to the predicted access location information. The reading operation is in an asynchronous manner and does not block the main processing flow. The prediction cache area is a cache area specially used to store preloaded data, which is usually implemented by SRAM or on-chip cache and has a low access delay. When preloading data into the prediction cache area, the source address and size of the data need to be recorded to establish a mapping relationship between the memory address and the cache location, which facilitates subsequent access query. In actual application, when it is predicted that the data at the memory address 0x10002000 will be accessed after 100 microseconds, and the current minimum preloading time interval is 50 microseconds and the maximum preloading time interval is 500 microseconds, preloading will be started immediately, and the data (usually a cache line or memory page) at the address 0x10002000 will be copied to the prediction cache area.

[0041] The present application realizes accurate prediction and intelligent preloading of multi-dimensional data stream access patterns by constructing a state transition matrix based on a prediction class subgraph set. This method can capture the spatio-temporal correlation of data access, identify high-probability accessed memory regions in advance and perform data prefetching, significantly reducing processing delay. Compared with traditional prefetching strategies, the prediction mechanism of the present application considers the time factor of access state transition, more accurately describes the state transition rule by time-weighted transition probability, and reduces the false prediction rate. The introduction of the prediction cache area avoids the pollution of preloaded data to the main cache, and improves the cache utilization efficiency. The multi-step transition deduction mechanism enables the system to predict future access requirements, providing a wider optimization window for large-scale parallel computing.

[0042] In an optional implementation, a reverse dependency index is established for the instant release class subgraph set, and the calculation task identifier corresponding to the data element is recorded. When the calculation task indicated by the calculation task identifier is completed, the memory space is released to the memory reuse pool, which includes: Traverse the nodes of each feature subgraph in the instant release type subgraph set, extract the data elements and computing tasks associated with each node, construct a reverse mapping relationship from data elements to computing task identifiers, and establish a reverse dependency index based on the reverse mapping relationship, wherein the memory address of the data element is used as the index key and the set of computing task identifiers is used as the index value; Monitor the execution status of the computing tasks, and when the execution status of the computing task indicated by the computing task identifier changes to the completed state, query the computing task identifier corresponding to the completed state from the reverse dependency index, extract the memory address of the associated data element from the index key according to the computing task identifier, and obtain the memory space size corresponding to the memory address; Based on the memory address and the memory space size, construct a memory release descriptor, submit the memory release descriptor to the memory management unit for memory fragmentation consolidation, and the memory management unit marks the consolidated continuous memory space as reusable and writes it into the memory reuse pool.

[0043] Traverse the nodes of each feature subgraph in the instant release type subgraph set. The instant release type subgraph set contains feature subgraphs with high randomness of access patterns and is not suitable for predictive caching. The node of each feature subgraph represents the access state of a specific memory region at a specific time point, containing the association information of data elements and computing tasks. The traversal process uses a depth-first traversal algorithm, starting from the starting node of the feature subgraph, recursively visiting all adjacent nodes until the entire subgraph is traversed. Extracting the data elements and computing tasks associated with each node means obtaining the memory address, data type, data size of the data element, and the computing task identifier related to it from the attribute information of the node. Data elements refer to the smallest unit of data stored in memory, which are usually elements or data blocks of multi-dimensional arrays in multi-dimensional data stream processing.

[0044] The computing task identifier refers to an identifier uniquely identifying a computing task, usually including task type, task number, and task priority. Building a reverse mapping relationship from data elements to computing task identifiers refers to establishing a mapping relationship from data elements to computing task identifiers, which can quickly query which computing tasks depend on the data element according to the data element. When establishing a reverse dependency index based on the reverse mapping relationship, the memory address of the data element is selected as the index key, and the set of computing task identifiers is selected as the index value. The index structure is implemented by a hash table to ensure query efficiency. The index key is the starting address of the memory page alignment, which facilitates quick positioning. The index value is a set of computing task identifiers, and all computing task identifiers that depend on the data element are stored in the form of a linked list. In practical applications, when a data element is located at memory address 0x10002000 and is dependent on tasks with computing task identifiers "Task123" and "Task456", the reverse dependency index will create a record, with the index key being 0x10002000 and the index value being a set containing "Task123" and "Task456".

[0045] The execution state of the computing task is monitored. The computing task execution state includes five states: waiting state, execution state, pause state, completion state, and error state. The monitoring method uses a task state callback mechanism, which triggers a callback function to perform corresponding processing when the task state changes. The callback function is registered in the task scheduler, and the scheduler actively calls it when the task state changes. When the execution state of the computing task identified by the computing task identifier changes to the completion state, the memory release process is triggered. The completion state indicates that the computing task has been successfully executed and ended, and the data elements it depends on no longer need to be accessed.

[0046] The computing task identifier corresponding to the completion state is queried from the reverse dependency index. The specific method is to traverse the reverse dependency index and find all entries in the index value that contain the computing task identifier. The memory address of the associated data element is extracted from the index key according to the computing task identifier. For each index entry containing the computing task identifier, the index key is extracted as the memory address of the associated data element. The size of the memory space corresponding to the memory address is obtained by querying the memory allocation table, finding the corresponding memory allocation record according to the memory address, and extracting the space size field.

[0047] The memory allocation table is a data structure maintained by the memory management unit, recording the address, size and state of all allocated memory blocks in the system. In practical applications, when the computing task "Task123" is executed, all entries containing "Task123" are found in the reverse dependency index, such as the index value set corresponding to the index key 0x10002000 contains "Task123" and "Task456", at this time the memory address will not be released immediately, because "Task456" depends on it; the index value set corresponding to the index key 0x20003000 only contains "Task123", and there is no other task dependency, so the memory space corresponding to the memory address can be released.

[0048] A memory release descriptor is constructed based on the memory address and the memory space size. The memory release descriptor is a data structure containing the start address, size, permission flag and release priority of the memory block to be released. In the construction process, the memory address is taken as the value of the start address field, the memory space size is taken as the value of the size field, the permission flag is set to read-write permission by default, and the release priority is calculated comprehensively according to the memory size and data access frequency. The larger the memory and the lower the access frequency, the higher the release priority. The memory release descriptor is submitted to the memory management unit for memory fragmentation consolidation. The submission method is to add the memory release descriptor to the release queue of the memory management unit, and the memory management unit processes the descriptors in the queue according to the release priority order.

[0049] Memory fragmentation consolidation refers to the process of combining scattered small memory blocks into continuous large memory blocks, which is implemented by using the mark-clear-merge algorithm. In the mark phase, the memory blocks to be released are identified, in the clear phase, these memory blocks are marked as available, and in the merge phase, adjacent available memory blocks are merged into larger continuous memory blocks. The memory management unit marks the consolidated continuous memory space as reusable and writes it into the memory reuse pool. The reusable state indicates that the memory space has been released and consolidated, and can be re-allocated and used by new computing tasks. The memory reuse pool is a memory resource pool that manages all reusable memory spaces, and uses the buddy allocation algorithm for memory allocation, supporting fast allocation and recovery of memory blocks of different sizes. The memory blocks in the memory reuse pool are stored according to size, which facilitates fast searching of memory blocks that meet specific size requirements. In practical applications, when a 4KB memory block at memory address 0x20003000 is released, a memory release descriptor is constructed, containing start address 0x20003000, size 4KB, read-write permission and high release priority, after being submitted to the memory management unit, the memory block is marked as available and merged with adjacent available memory blocks, and finally an 8KB continuous memory block is written into the memory reuse pool for subsequent task allocation.

[0050] The application realizes accurate management and efficient reuse of memory resources by establishing a reverse dependency index for the instant release subgraph set. This method can accurately track the dependency relationship between data elements and computing tasks, and release the memory resources that are no longer needed in time after the completion of the computing task, avoiding memory leakage and resource waste. The introduction of the reverse dependency index enables the system to quickly locate the releasable memory area, significantly reducing the search overhead of memory recycling. The memory fragmentation consolidation mechanism effectively solves the problem of memory fragmentation, improving the continuity and utilization of memory space. The design of the memory reuse pool supports efficient reuse of memory resources, reducing the delay of memory allocation.

[0051] As shown in Figure 2 The memory prediction and reuse operation flowchart of the embodiment is shown.

[0052] In an optional implementation, matching the predicted access position and the actual access position, reading data from the prediction cache area when matching, and triggering dynamic migration of prediction cache area data to the memory reuse pool when not matching include: A mapping cache table is constructed to record the memory address information of the predicted access position and the actual access position, an address mapping index is generated, and the predicted access position and the actual access position information in the mapping cache table is extracted to construct an access sequence matrix; The spatiotemporal correlation vector of the predicted access position and the actual access position in the access sequence matrix is calculated, the address offset of the predicted access position and the actual access position is calculated according to the spatiotemporal correlation vector, and the matching state of the predicted access position and the actual access position is determined based on the address offset; When the address offset of the predicted access position and the actual access position is zero, it is determined as a matching state, the corresponding data of the predicted access position is read from the prediction cache area through the address mapping index, and the access count in the access sequence matrix is updated; When the address offset of the predicted access position and the actual access position is not zero, it is determined as a non-matching state, data migration description information containing the prediction cache area address and the memory reuse pool address is generated, and the data migration description information is submitted to the memory management unit; The memory management unit executes the dynamic migration of the prediction cache area data to the memory reuse pool according to the data migration description information, writes the migration state into the access sequence matrix, updates the address mapping index according to the access sequence matrix, and completes the memory reuse pool space allocation.

[0053] A mapping cache table is constructed to record the memory address information of the predicted access location and the actual access location. The mapping cache table is a two-dimensional table structure, and each row in the table contains five fields of predicted access location, actual access location, access timestamp, matching state and access count. The predicted access location field stores the memory address to be accessed given by the prediction algorithm, the actual access location field stores the memory address actually accessed by the processor, the access timestamp field records the time point of the access, the matching state field identifies whether the prediction is accurate, and the access count field records the number of occurrences of the mapping relationship.

[0054] The mapping cache table is implemented by a circular buffer, and the table size is usually set to 1024 records. New records will overwrite the oldest records. Generating an address mapping index means constructing a fast query structure based on the mapping cache table, so that the system can quickly locate the related records according to the predicted access location or the actual access location. The address mapping index is implemented by a hash table, and the high part of the memory address is used as the hash key, and the row number of the corresponding record in the mapping cache table is used as the hash value.

[0055] The predicted access location and the actual access location information in the mapping cache table are extracted to construct an access sequence matrix. The access sequence matrix is a two-dimensional matrix, the row represents the memory page number of the predicted access location, the column represents the memory page number of the actual access location, and the matrix element value represents the frequency of the specific predicted location and the actual location pair. The memory page number is the logical number obtained by dividing the memory address by the page size, and the page size is usually 4KB.

[0056] The construction process of the access sequence matrix is to traverse all the records in the mapping cache table, extract the predicted access location and the actual access location, convert them into corresponding memory page numbers, and then accumulate the count in the corresponding position of the access sequence matrix. In practical applications, when the mapping cache table records the predicted access location 0x10002000 and the actual access location 0x10002000 five times, assuming that the page size is 4KB, then the memory page numbers corresponding to the two addresses are both 4096, and the count in the 4096th row and 4096th column of the access sequence matrix is accumulated by 5.

[0057] The time-space correlation vector of the predicted access position and the actual access position in the access sequence matrix is calculated. The time-space correlation vector is a multi-dimensional vector describing the correlation degree of the predicted position and the actual position in the time and space dimensions, including two core components of time correlation and space correlation. The time correlation component represents the statistical characteristics of the time interval between the predicted access and the actual access, and the space correlation component represents the statistical characteristics of the spatial distance between the predicted address and the actual address. The method of calculating the time correlation is to extract the time stamp difference between the predicted access and the actual access from the mapping cache table, and calculate the average value and the standard deviation. The method of calculating the space correlation is to extract the distribution pattern of the predicted page and the actual page from the access sequence matrix, and analyze the aggregation degree and the dispersion degree. The address offset between the predicted access position and the actual access position is calculated according to the time-space correlation vector. The address offset is the memory address difference between the predicted access position and the actual access position, which is calculated by subtracting the predicted access position from the actual access position. The offset is zero, indicating that the prediction is completely accurate, and the offset is not zero, indicating that there is a prediction error. The matching state of the predicted access position and the actual access position is determined based on the address offset.

[0058] The matching state is divided into three types: complete match, partial match and complete mismatch. When the address offset is zero, it is a complete match, when the address offset is not zero but the two addresses belong to the same memory page, it is a partial match, and when the address offset is not zero and the two addresses belong to different memory pages, it is a complete mismatch. In practical applications, when the predicted access position is 0x10002000 and the actual access position is also 0x10002000, the address offset is zero, and it is determined as a complete match; when the predicted access position is 0x10002000 and the actual access position is 0x10002100, they are in the same page, and it is determined as a partial match; when the predicted access position is 0x10002000 and the actual access position is 0x20003000, they are in different pages, and it is determined as a complete mismatch.

[0059] When the address offset between the predicted access position and the actual access position is zero, it is determined as a matching state, and the corresponding data of the predicted access position is read from the prediction cache area through the address mapping index. The prediction cache area is a cache area specially storing predicted data, usually implemented by SRAM, with low access delay. The reading process is to find the actual storage position of the predicted access position in the prediction cache area through the address mapping index, and then read the data from the position.

[0060] After reading, the access count in the access sequence matrix is updated, and the count value corresponding to the predicted page and the actual page pairing is increased to strengthen the statistical information of the access mode. In actual application, when it is detected that the predicted access position 0x10002000 is completely matched with the actual access position 0x10002000, the position of the address in the predicted cache area is found through the address mapping index, such as 0x50000, the predicted loaded data is read from 0x50000, and the count of the 4096th row and the 4096th column in the access sequence matrix is increased by 1.

[0061] When the address offset of the predicted access position and the actual access position is not zero, it is determined that the matching state is not matched, and data migration description information containing the predicted cache area address and the memory multiplex pool address is generated. The data migration description information is a data structure, which contains five fields of source address, target address, data size, migration priority and migration mode. The source address is the address of the predicted data stored in the predicted cache area, the target address is the address allocated in the memory multiplex pool for receiving data, the data size is the data amount to be migrated, the migration priority determines the execution order of the migration operation, and the migration mode specifies synchronous migration or asynchronous migration. The data migration description information is submitted to the memory management unit, and the method is to add the description information to the migration request queue of the memory management unit, and the memory management unit processes the requests in the queue according to the priority order. The memory management unit performs dynamic migration of the predicted cache area data to the memory multiplex pool according to the data migration description information. The migration process adopts the DMA (Direct Memory Access) technology, does not occupy the CPU resources, and improves the migration efficiency. For high-priority migration requests, the synchronous mode is adopted to ensure that the data is immediately available; for low-priority migration requests, the asynchronous mode is adopted to avoid affecting the main processing flow.

[0062] After migration, the migration state is written into the access sequence matrix, the state identifier of the corresponding position is updated, and it is indicated that the predicted and actual access corresponding relationship has been processed. The address mapping index is updated according to the access sequence matrix, the original index item is modified or a new index item is added, and the subsequent access can be accurately positioned. The memory multiplex pool space allocation is completed, appropriate storage space is allocated for the migrated data, and the resource management information of the memory multiplex pool is updated. In actual application, when it is detected that the predicted access position 0x10002000 is completely not matched with the actual access position 0x20003000, the data migration description information is generated, which contains the predicted cache area address 0x50000, the memory multiplex pool address 0x30000, the data size 4KB, the high priority and the synchronous migration mode, is submitted to the memory management unit to perform the migration operation, and the access sequence matrix and the address mapping index are updated after the migration is completed, so that the subsequent access to 0x20003000 can be directly positioned to 0x30000.

[0063] The application significantly improves the memory access efficiency of multi-dimensional data stream real-time processing through the accurate matching of predicted access positions and actual access positions and a dynamic migration mechanism. When the prediction is accurate, data is directly read from a high-speed prediction cache area, avoiding the access delay of the main memory. When the prediction is inaccurate, the dynamic migration mechanism is used to adjust the cache content in time, reducing the performance loss caused by prediction errors. The introduction of the space-time correlation vector enables the system to capture complex access pattern characteristics and continuously improve the prediction accuracy. The access sequence matrix realizes the quantitative analysis of the relationship between the predicted access and the actual access, providing strong support for the prediction algorithm. The dynamic data migration mechanism between the memory reuse pool and the prediction cache area realizes the intelligent management of cache resources and avoids cache pollution.

[0064] In an optional embodiment, the prediction accuracy is calculated, and the capacity allocation ratio of the prediction cache area and the memory reuse pool is adjusted according to the prediction accuracy, including: The ratio of the number of successful matches of the predicted access positions to the total number of the predicted access positions is calculated to generate the prediction accuracy of a plurality of time windows; The prediction accuracy of a plurality of time windows is grouped according to the time sequence, the prediction accuracy weighted value is calculated by combining the access frequency of the predicted access positions, the prediction accuracy sequence is generated, and the prediction cache area capacity mapping relationship is constructed; The prediction cache area expansion capacity and the memory reuse pool expansion capacity are calculated according to the prediction cache area capacity mapping relationship to generate the capacity allocation scheme of the prediction cache area and the memory reuse pool, and the data migration step table is established; The migration process of the prediction cache area data to the memory reuse pool is planned based on the data migration step table to generate the prediction cache area data block migration path and construct the data block migration index; The data migration indicated by the data block migration index is performed to complete the capacity allocation ratio adjustment of the prediction cache area and the memory reuse pool, update the capacity allocation information in the prediction result statistical table, and reconstruct the prediction cache area capacity mapping relationship.

[0065] The ratio of the number of successful matches of the predicted access location to the total number of predicted access locations is calculated. The number of successful matches of the predicted access location refers to the number of times the predicted access location is completely consistent with the actual access location, which is obtained by counting the number of records with an address offset of zero. The total number of predicted access locations refers to the total number of attempts to predict by the system, including all predictions that are successful and unsuccessful. The ratio of the number of successful matches to the total number is the original prediction accuracy, which reflects the effectiveness of the prediction algorithm. The prediction accuracy of multiple time windows is generated by dividing the data stream into several continuous and non-overlapping time periods and calculating the prediction accuracy in each time period. The size of the time window is set according to the characteristics of the data stream, usually between 100 milliseconds and 1 second. The prediction accuracy of multiple time windows forms a time series, reflecting the trend of the prediction accuracy over time. In practical applications, when the system records 80, 85, 90, 88, 92, 95, 93, 91, 89, and 87 successful predictions in 10 consecutive time windows, and the total number of predictions is 100, the generated prediction accuracy sequence is 0.80, 0.85, 0.90, 0.88, 0.92, 0.95, 0.93, 0.91, 0.89, and 0.87.

[0066] The prediction accuracy of multiple time windows is grouped according to the time series. The grouping method is to group time windows with similar trends by calculating the change rate of the prediction accuracy of adjacent windows. The change rate is considered similar if it is within a pre-set threshold. The prediction accuracy weighted value is calculated by combining the access frequency of the predicted access location. The access frequency refers to the number of times a specific memory location is accessed in a unit of time, reflecting the degree of influence of the location on system performance. The weighted value is calculated by multiplying the prediction accuracy by the normalized value of the access frequency, so that the prediction accuracy of high-frequency access locations has a greater impact on the result. The prediction accuracy sequence is generated by arranging the weighted prediction accuracy in chronological order. The mapping relationship between the prediction cache area capacity is established by establishing a corresponding relationship between the prediction accuracy and the optimal prediction cache area capacity. The mapping relationship is expressed by a function, which is a piecewise linear function. In the interval with high prediction accuracy, the cache area capacity grows faster; in the interval with low prediction accuracy, the cache area capacity grows slower or remains unchanged. In practical applications, when the prediction accuracy of a certain time window is 0.85, the average access frequency of the corresponding location is 1000 times per second, and the total access frequency is 5000 times per second, the normalized access frequency is 0.2, and the prediction accuracy weighted value is 0.85 x 0.2 = 0.17.

[0067] The predicted cache area expansion capacity and the memory reuse pool expansion capacity are calculated according to the predicted cache area capacity mapping relationship. The predicted cache area expansion capacity refers to the predicted cache area capacity that needs to be increased or decreased. The calculation method is to substitute the current prediction accuracy into the capacity mapping function to obtain the target capacity, and then subtract the current capacity. The memory reuse pool expansion capacity refers to the memory reuse pool capacity that needs to be increased or decreased. The calculation method is to subtract the target capacity of the predicted cache area from the total memory capacity, and then subtract the reserved memory capacity. The reserved memory capacity is the memory space reserved for system critical data and does not participate in dynamic adjustment. A capacity allocation scheme of the predicted cache area and the memory reuse pool is generated, including four parts: the target capacity of the predicted cache area, the target capacity of the memory reuse pool, the expansion step, and the expansion priority. The expansion step defines the implementation order of capacity adjustment, and the expansion priority defines the processing priority order in the case of resource competition. A data migration step table is established to record the data block information that needs to be migrated in each expansion step, including the source address, the target address, the data size, the migration timing, and the migration method. The migration timing specifies under what conditions the migration is triggered, and the migration method specifies whether to use synchronous migration or asynchronous migration. In actual application, when the prediction accuracy is 0.85, the target capacity of the predicted cache area calculated by the capacity mapping relationship is 1.2 times the original capacity, i.e., when the original capacity is 100MB, the target capacity is 120MB, and the expansion capacity is 20MB; while the total capacity of the memory reuse pool is 500MB, its target capacity is 380MB (total capacity 500MB minus predicted cache area 120MB), and the expansion capacity is -20MB (assuming the current capacity is 400MB).

[0068] The migration process of the predicted cache area data to the memory reuse pool is planned based on the data migration step table. The migration process planning considers three factors: data access mode, data dependency relationship, and migration cost, and uses a multi-objective optimization algorithm to find the best migration scheme. The data block migration path of the predicted cache area is generated to specify the specific migration path of each data block from the source location to the target location. The migration path optimization considers memory bandwidth utilization and migration conflict avoidance, and tries to choose the shortest path and avoid hot areas. The data block migration index is constructed to establish the mapping relationship between the source data block and the migration path, which facilitates the system to quickly find the migration information of a specific data block. The data block migration index adopts a multi-level index structure, the first level index is divided according to the memory area, the second level index is divided according to the data block size, and the third level index is divided according to the migration priority. In actual application, when 20KB data with address range 0x10000000 to 0x10004FFF in the predicted cache area needs to be migrated to the memory reuse pool, the migration path may be specified as batch migration through the high-speed data channel during the idle period, and the migration index records the source address 0x10000000, the target address 0x20000000, the data size 20KB, the migration channel 2, and the medium priority, etc.

[0069] The data migration indicated by the data block migration index is executed. The execution process adopts an asynchronous migration mechanism, and data transmission is performed in the background, without affecting foreground processing tasks. For high-priority data blocks, reserved bandwidth is used to ensure migration performance; and for low-priority data blocks, an idle-time migration strategy is used to avoid resource competition. The capacity allocation ratio of the prediction cache area and the memory reuse pool is adjusted, and the adjustment process includes two steps of physical memory space reallocation and logical address mapping update. The physical memory space reallocation is performed by a memory controller, and the capacity is changed by adjusting the memory region boundary; the logical address mapping update is performed by a memory management unit, to ensure that an application program can correctly access the adjusted memory region. Meanwhile, the capacity allocation information in the prediction result statistics table is updated, to record the new prediction cache area capacity, the memory reuse pool capacity, and the capacity allocation ratio. The prediction cache area capacity mapping relationship is reconstructed, the capacity mapping function parameters are adjusted according to the latest prediction accuracy and capacity allocation effect, and future capacity allocation decisions are optimized. In actual application, after the migration of the aforementioned 20 KB data is completed, the prediction cache area capacity is reduced from 100 MB to 80 MB, the memory reuse pool capacity is increased from 400 MB to 420 MB, the capacity allocation ratio is adjusted from 1:4 to 1:5.25, the capacity information in the prediction result statistics table is updated, and the mapping function is adjusted according to the new prediction accuracy 0.85, so that the slope in the accuracy interval [0.8, 0.9] is increased, and the capacity allocation sensitivity in the interval is improved.

[0070] The present application adjusts the capacity allocation ratio of the prediction cache area and the memory reuse pool according to the dynamically calculated prediction accuracy, to realize adaptive optimization and configuration of memory resources. The method can adjust the cache strategy in real time according to changes in the data access mode, expand the prediction cache area to improve the hit rate when the prediction accuracy is high, and expand the memory reuse pool to improve the resource utilization rate when the prediction accuracy is low. The time window analysis of the prediction accuracy and the access frequency weighting mechanism enable the system to capture short-term and long-term access mode changes and make more accurate resource configuration decisions. The fine planning and index mechanism of data migration greatly reduce the performance overhead in the capacity adjustment process, so that the adjustment process is transparent to the application. The dynamic reconstruction of the capacity mapping relationship enables the system to continuously learn and improve, to adapt to the data access characteristics in different application scenarios.

[0071] In a second aspect of the embodiment of the present application, a memory computing optimization and acceleration system for real-time processing of multi-dimensional data streams is provided, and the system comprises: A first unit is configured to obtain a multi-dimensional data stream, extract data access trajectories of concurrent computing threads, extract time features and space features of the data access trajectories, generate a time-space coupled feature matrix through tensor product operation, and construct a time-space correlation graph. The second unit is configured to perform graph decomposition on the spatiotemporal correlation graph to extract feature subgraphs, calculate graph topology entropy of each feature subgraph, and classify the feature subgraphs into a prediction class subgraph set or an instant release class subgraph set according to a comparison result of the graph topology entropy and a preset classification threshold; The third unit is configured to construct a state transition matrix based on the prediction class subgraph set, and predict an access position and an access time according to the state transition matrix, and pre-load data corresponding to the access position to a prediction cache area before the access time; The fourth unit is configured to establish a reverse dependency index for the instant release class subgraph set, record a computing task identifier corresponding to a data element, and release a memory space to a memory reuse pool when the computing task identifier points to a completed computing task. The fifth unit is configured to match a predicted access position and an actual access position, read data from the prediction cache area when the predicted access position matches the actual access position, trigger dynamic migration of data in the prediction cache area to the memory reuse pool when the predicted access position does not match the actual access position, and calculate a prediction accuracy rate, and adjust a capacity allocation ratio of the prediction cache area and the memory reuse pool according to the prediction accuracy rate.

[0072] In a third aspect, an electronic device is provided, including: a processor; a memory configured to store processor-executable instructions; wherein the processor is configured to invoke the instructions stored in the memory to execute the method described above.

[0073] In a fourth aspect, a computer-readable storage medium is provided, which stores computer program instructions, and the computer program instructions are executed by a processor to implement the method described above.

[0074] The present application can be a method, device, system and / or computer program product. The computer program product can include a computer readable storage medium having computer readable program instructions stored therein, which are used to perform various aspects of the present application.

[0075] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A memory computing optimization and acceleration method for real-time processing of multidimensional data streams, characterized in that, include: Acquire multidimensional data streams, extract data access trajectories of concurrent computing threads, extract temporal and spatial features of data access trajectories, generate spatiotemporal coupling feature matrices through tensor product operations, and construct spatiotemporal correlation graphs; The spatiotemporal correlation graph is decomposed to extract feature subgraphs. The graph topological entropy of each feature subgraph is calculated. Based on the comparison between the graph topological entropy and the preset classification threshold, the feature subgraphs are assigned to the predicted class subgraph set or released immediately. A state transition matrix is ​​constructed based on the set of predicted subgraphs. The access location and access time are predicted based on the state transition matrix. The data corresponding to the access location is preloaded into the prediction cache before the access time. A reverse dependency index is established for the immediate release class subgraph set to record the computation task identifier corresponding to the data element. When the computation task pointed to by the computation task identifier is completed, the memory space is released to the memory reuse pool. The system matches the predicted access location with the actual access location. When a match is found, data is read from the prediction cache. When a mismatch is found, the system triggers a dynamic migration of data from the prediction cache to the memory reuse pool. The prediction accuracy is then calculated, and the capacity allocation ratio between the prediction cache and the memory reuse pool is adjusted based on the prediction accuracy.

2. The method according to claim 1, characterized in that, Acquire multidimensional data streams, extract data access trajectories from concurrent computing threads, extract temporal and spatial features of the data access trajectories, generate a spatiotemporal coupling feature matrix through tensor product operations, and construct a spatiotemporal correlation graph, including: Acquire multidimensional data streams, monitor concurrent computing threads' access operations on data elements within the multidimensional data streams, and record the timestamps and memory addresses of the access operations to form a data access trajectory; Access timestamp sequences are extracted from access events in the data access trajectory. The access timestamp sequences are then decomposed in the frequency domain to obtain the time spectrum. Peak frequency components are identified from the time spectrum as time features. Extract the memory address sequence of accessed data elements from the access events in the data access trajectory, perform spatial clustering analysis on the memory address sequence to obtain multiple address clusters, and extract the cluster center coordinates of each address cluster as spatial features; Tensor product operation is performed on temporal features and spatial features to generate a spatiotemporal coupling matrix, where the row index corresponds to the peak frequency component in the temporal feature, the column index corresponds to the cluster center coordinates in the spatial feature, and the matrix element value represents the access correlation strength between the corresponding peak frequency component and the cluster center coordinates. Extract the matrix positions in the spatiotemporal coupling matrix where the element values ​​exceed a preset coupling threshold, combine the peak frequency component corresponding to the matrix position with the cluster center coordinates as spatiotemporal state nodes, calculate the transition probability between spatiotemporal state nodes as the edge weights between nodes, and construct a spatiotemporal association graph based on the spatiotemporal state nodes and edge weights.

3. The method according to claim 1, characterized in that, The spatiotemporal correlation graph is decomposed to extract feature subgraphs. The graph topological entropy of each feature subgraph is calculated. Based on the comparison between the graph topological entropy and a preset classification threshold, the feature subgraphs are assigned to either the predicted class subgraph set or the immediate release class subgraph set, including: A Laplacian matrix is ​​constructed from the spatiotemporal correlation graph and eigenvalue decomposition is performed to obtain the eigenvalue sequence and eigenvector matrix. The eigenvalue sequence is then mapped to the complex plane to construct an eigenvalue distribution cloud map. In the eigenvalue distribution cloud map, the density gradient abrupt region is identified as the segmentation boundary. The column vector corresponding to the segmentation boundary is extracted from the eigenvector matrix as the segmentation feature vector. Based on the segmentation feature vector, the spatiotemporal correlation graph is divided into multiple connected components as feature subgraphs. For each feature subgraph, a two-layer topology structure including an access dependency layer and a data flow layer is constructed. The inter-layer information transfer volume between the access dependency layer and the data flow layer is calculated. Based on the inter-layer information transfer volume, the graph topology entropy of the feature subgraph is calculated. Establish a mapping function between graph topological entropy and access pattern predictability, and input the graph topological entropy of each feature subgraph into the mapping function to convert it into a predictability score; The predictability score is compared with a preset classification threshold. When the predictability score is higher than the preset classification threshold, the feature subgraph is assigned to the predicted class subgraph set. When the predictability score is lower than or equal to the preset classification threshold, the feature subgraph is assigned to the instant release class subgraph set.

4. The method according to claim 1, characterized in that, A state transition matrix is ​​constructed based on the predicted subgraph set. The access location and access time are predicted according to the state transition matrix. Before the access time, the data corresponding to the access location is preloaded into the prediction cache, including: Nodes of each feature subgraph in the predicted class subgraph set are extracted as access states. The transition frequency between access states in each feature subgraph is counted. The transition frequency is coupled with the access time interval to calculate the time-weighted transition probability. A state transition matrix is ​​constructed based on time-weighted transition probabilities, where the row index represents the source access state, the column index represents the target access state, and the matrix element value represents the time-weighted transition probability from the source access state to the target access state. A multi-step transition deduction is performed on the state transition matrix. Starting from the current access state, the future access state sequence is deduced along the path with the highest transition probability. The memory address associated with the access state is extracted from the future access state sequence as the access location, and the timestamp associated with the access state is extracted as the access time. Calculate the time interval between the current time and the access time. When the time interval meets the preload trigger condition, read the data from the memory address corresponding to the access location and preload the data into the prediction cache.

5. The method according to claim 1, characterized in that, A reverse dependency index is established for the immediate release class subgraph set to record the computation task identifier corresponding to the data element. When the computation task pointed to by the computation task identifier is completed, the memory space is released to the memory reuse pool, including: Traverse the nodes of each feature subgraph in the instant release class subgraph set, extract the data elements and computing tasks associated with each node, construct the reverse mapping relationship from data elements to computing task identifiers, and establish a reverse dependency index based on the reverse mapping relationship, where the memory address of the data element is used as the index key and the set of computing task identifiers is used as the index value. Monitor the execution status of computing tasks. When the execution status of the computing task pointed to by the computing task identifier changes to the completed status, query the computing task identifier corresponding to the completed status from the reverse dependency index. Extract the memory address of the associated data element from the index key based on the computing task identifier, and obtain the memory space size corresponding to the memory address. A memory release descriptor is constructed based on the memory address and memory space size. The memory release descriptor is submitted to the memory management unit for memory defragmentation. The memory management unit marks the defragmented contiguous memory space as reusable and writes it into the memory reuse pool.

6. The method according to claim 1, characterized in that, Matching the predicted access location with the actual access location, reading data from the prediction cache when a match is found, and triggering a dynamic migration of data from the prediction cache to the memory reuse pool when a mismatch occurs includes: Construct a mapping cache table to record the memory address information of the predicted access location and the actual access location, generate an address mapping index, and extract the predicted access location and actual access location information from the mapping cache table to construct an access sequence matrix; Calculate the spatiotemporal correlation vector between the predicted access position and the actual access position in the access sequence matrix, calculate the address offset between the predicted access position and the actual access position based on the spatiotemporal correlation vector, and determine the matching status between the predicted access position and the actual access position based on the address offset. When the address offset between the predicted access location and the actual access location is zero, it is determined to be a matching state. The data corresponding to the predicted access location is read from the prediction cache through the address mapping index, and the access count in the access sequence matrix is ​​updated. When the address offset between the predicted access location and the actual access location is not zero, it is determined to be a mismatch state. Data migration description information containing the predicted cache address and the memory reuse pool address is generated and submitted to the memory management unit. The memory management unit performs dynamic migration of predicted cache data to the memory reuse pool based on the data migration description information, writes the migration status to the access sequence matrix, updates the address mapping index according to the access sequence matrix, and completes the memory reuse pool space allocation.

7. The method according to claim 1, characterized in that, Calculating prediction accuracy and adjusting the capacity allocation ratio between the prediction cache and the memory reuse pool based on the prediction accuracy includes: Calculate the ratio of the number of successfully matched predicted access locations to the total number of predicted access locations, and generate the prediction accuracy for multiple time windows; The prediction accuracy of multiple time windows is grouped according to time series, and the prediction accuracy weighted value is calculated by combining the access frequency of the predicted access location to generate a prediction accuracy sequence and construct a prediction cache capacity mapping relationship. Calculate the predicted cache expansion capacity and memory reuse pool expansion capacity based on the predicted cache capacity mapping relationship, generate the capacity allocation scheme for the predicted cache and memory reuse pool, and establish a data migration step table; Based on the data migration step table, plan and predict the migration process of cache data to the memory reuse pool, generate the predicted cache data block migration path, and build a data block migration index; Perform data migration as indicated by the data block migration index, complete the adjustment of the capacity allocation ratio between the prediction cache and the memory reuse pool, update the capacity allocation information in the prediction result statistics table, and reconstruct the capacity mapping relationship of the prediction cache.

8. A memory-optimized acceleration system for real-time processing of multidimensional data streams, used to implement the method of any one of claims 1-7, characterized in that, include: The first unit is used to acquire multidimensional data streams, extract data access trajectories of concurrent computing threads, extract the temporal and spatial features of the data access trajectories, generate a spatiotemporal coupling feature matrix through tensor product operations, and construct a spatiotemporal correlation graph. The second unit is used to perform graph decomposition on the spatiotemporal correlation graph to extract feature subgraphs, calculate the graph topological entropy of each feature subgraph, and classify the feature subgraphs into the predicted class subgraph set or release the class subgraph set immediately based on the comparison result of the graph topological entropy and the preset classification threshold. The third unit is used to construct a state transition matrix based on the set of predicted subgraphs, predict the access location and access time according to the state transition matrix, and preload the data corresponding to the access location into the prediction cache before the access time. The fourth unit is used to build a reverse dependency index for the immediate release class subgraph set, record the computation task identifier corresponding to the data element, and release the memory space to the memory reuse pool when the computation task pointed to by the computation task identifier is completed. The fifth unit is used to match the predicted access location with the actual access location. When a match is found, data is read from the prediction cache. When a mismatch is found, the data in the prediction cache is dynamically migrated to the memory reuse pool. The prediction accuracy is calculated, and the capacity allocation ratio between the prediction cache and the memory reuse pool is adjusted based on the prediction accuracy.

9. An electronic device, characterized in that, include: processor; Memory used to store processor-executable instructions; The processor is configured to invoke instructions stored in the memory to execute the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having computer program instructions stored thereon, characterized in that, When the computer program instructions are executed by the processor, they implement the method described in any one of claims 1 to 7.