Wave-by-wave current-limiting protection circuit, control method and power converter
By controlling the peak current within a single switching cycle through a wave-by-wave current limiting protection circuit, the problem of false triggering of power converters under nonlinear loads is solved, achieving reliable protection functions. It is suitable for power converters with voltage-type or open-loop topologies, and especially in nonlinear load scenarios, it reduces the probability of false triggering and ensures circuit stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN VAPEL POWER SUPPLY TECH
- Filing Date
- 2025-12-19
- Publication Date
- 2026-04-10
AI Technical Summary
Existing power converters are prone to false triggering of protection circuits under nonlinear loads, leading to unnecessary shutdown and lock-up, which affects normal operation.
The circuit employs a wave-by-wave current limiting protection circuit. Through the combination of sampling voltage divider unit, bias unit, comparison unit, controlled switch unit, positive feed lock unit and reset unit, it realizes current peak control within a single switching cycle. In case of overcurrent, only the switch in the current cycle is turned off, and it is automatically reset after the cycle ends.
It solves the problem of false triggering, improves the reliability and adaptability of protection, and is suitable for power converters with voltage-type or open-loop topologies. Especially in nonlinear load scenarios, it reduces the probability of false triggering and ensures stable operation of the circuit in strong electromagnetic interference environments.
Smart Images
Figure CN121841086A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power converter technology, and more specifically, to a wave-by-wave current limiting protection circuit, control method, and power converter. Background Technology
[0002] In power converter overcurrent protection applications, especially when the main circuit adopts a traditional voltage-type or open-loop topology design, the current protection circuit generally uses the peak output current as the sampling object. When the sampled peak output current reaches the preset protection threshold, the power converter immediately enters the "shutdown lockout" state and stops supplying power to the load. It can only resume operation by powering on after the energy inside the power supply has been completely discharged. There is no dynamic unlocking or automatic restart function.
[0003] In applications with nonlinear loads (such as rectifier-filtered loads, LED driver loads, and motor starting stages), such protection circuits are prone to "false triggering." For example, the peak current during normal load operation may be misjudged as an "abnormal overcurrent peak," causing the power converter to unnecessarily enter a shutdown lockout state, affecting normal operation.
[0004] Therefore, existing technologies need to be improved. Summary of the Invention
[0005] The purpose of this application is to provide a wave-by-wave current limiting protection circuit, control method and power converter, which aims to solve the technical problem that the protection circuit is prone to false triggering in the application scenario of nonlinear load in the prior art.
[0006] To achieve the above objectives, the technical solution adopted in this application is as follows: In a first aspect, this application provides a wave-by-wave current limiting protection circuit, comprising: A sampling voltage divider unit is used to convert the sampled current into a voltage signal and perform voltage division processing to generate a first voltage divider signal and a second voltage divider signal; A bias unit is connected to the sampling voltage divider unit, and the bias unit is used to boost the DC level of the second voltage divider signal; The comparison unit has its negative input connected to the sampling voltage divider unit to receive the first voltage divider signal, and its positive input connected to the bias unit to receive the boosted second voltage divider signal. The comparison unit is used to compare the level of the first voltage divider signal with the level of the second voltage divider signal and generate a level signal based on the comparison result. A controlled switch unit is connected to the output terminal of the comparator unit and is used to receive the level signal and control the switching transistors in the power converter. A positive feedback locking unit is provided, wherein the input terminal of the positive feedback locking unit is connected to the output terminal of the comparator unit, and the output terminal of the positive feedback locking unit is connected to the negative phase input terminal of the comparator unit. When the peak value of the sampling current does not reach a preset threshold, the positive feedback locking unit is turned off; when the peak value of the sampling current reaches the preset threshold, the positive feedback locking unit is turned on and injects current into the negative phase input terminal of the comparator unit to pull up the voltage of the negative phase input terminal of the comparator unit and lock the low-level output of the comparator unit. A reset unit is connected to the negative input terminal of the comparator unit. When the switching cycle ends, the reset unit receives a reset pulse and is triggered to conduct, thereby pulling down the voltage at the negative input terminal of the comparator unit, so that the comparator unit outputs a high level to unlock.
[0007] In one embodiment, the sampling voltage divider unit includes: resistor R20, resistor R324, and resistor R251; The resistors R20, R324, and R251 are connected in series in sequence. The negative phase input terminal of the comparator unit and the reset unit are both connected to the connection node of the resistors R20 and R324. The biasing unit is connected to the connection node between resistor R324 and resistor R251; The non-inverting input terminal of the comparator unit is connected to the side of resistor R251 away from resistor R324; The end of resistor R20 furthest from resistor R324 is used to receive the sampling current signal.
[0008] In one embodiment, the comparison unit includes: comparator U12-A, resistor R255, capacitor C122, resistor R257, capacitor C105, and switching diode D48. The non-inverting input terminal of the comparator U12-A is connected to the sampling voltage divider unit, the first terminal of the resistor R257, and the first terminal of the capacitor C105. The second terminals of the resistor R257 and the second terminals of the capacitor C105 are both connected to the anode of the switching diode D48. The cathode of the switching diode D48 is connected to the output terminal of the comparator U12-A. The positive power supply pin of the comparator U12-A is connected to the positive terminal of the 5V power supply, the first end of the resistor R255, and the first end of the capacitor C122. The negative power supply terminal of the comparator U12-A and the second end of the capacitor C122 are grounded. The second end of the resistor R255 is connected to the output terminal of the comparator U12-A. The negative phase input terminal of the comparator U12-A is connected to the sampling voltage divider unit and the reset unit, respectively.
[0009] In one embodiment, the comparison unit further includes: a first RC parallel network, a first end of which is connected to the non-inverting input of the comparator U12-A, a second end of which is grounded, and the first RC parallel network includes a resistor R253 and a capacitor C124 connected in parallel.
[0010] In one embodiment, the comparison unit further includes: a second RC parallel network, the first end of the second RC parallel network being connected to the negative input terminal of the comparator U12-A, the second end of the second RC parallel network being grounded, and the second RC parallel network including a resistor R81 and a capacitor C121 connected in parallel.
[0011] In one embodiment, the positive feedback locking unit includes: resistor R263, resistor R260, resistor R264, capacitor C83, and transistor Q53; The first end of the resistor R263 is connected to the output end of the comparator U12-A, and the second end of the resistor R263 is connected to the base of the transistor Q53, the first end of the resistor R260, and the first end of the capacitor C83. The second end of the resistor R260 and the second end of the capacitor C83 are connected in parallel to the emitter of the transistor Q53, and the emitter of the transistor Q53 is connected to the DC power supply. The collector of the transistor Q53 is connected to the negative input terminal of the comparator U12-A via the resistor R264.
[0012] In one embodiment, the reset unit includes: resistor R348, resistor R343, capacitor C134, and MOSFET Q47; The first end of the resistor R348 is used to receive the reset pulse signal, and the second end of the resistor R348 is connected to the first end of the resistor R343, the first end of the capacitor C134, and the gate of the MOS transistor Q47. The second terminal of the resistor R343 and the second terminal of the capacitor C134 are both connected to the source of the MOS transistor Q47 and grounded; The drain of the MOS transistor Q47 is connected to the negative input terminal of the comparator U12-A.
[0013] In one embodiment, the reset unit further includes: Switching diode D100, switching diode D101, common cathode diode D102, resistor R346, resistor R347; The cathode of the switching diode D101 is connected to the first reset pulse signal, and the anode of the switching diode D101 is connected to the second terminal of the resistor R347 and the first anode of the common cathode diode D102, respectively. The first terminal of the resistor R347 is connected to a DC power supply. The cathode of the common cathode diode D102 is connected to the first terminal of the resistor R348; The first end of the resistor R346 is connected to a DC power supply, and the second end of the resistor R346 is connected to the second anode of the common cathode diode D102 and the anode of the switching diode D100, respectively. The second cathode of the switching diode D100 is connected to the second reset pulse signal.
[0014] To achieve the above objectives, this application also provides a control method for a wave-by-wave current limiting protection circuit, comprising the following steps: During normal operation: The sampled current is converted into a first voltage divider signal and a second voltage divider signal by the sampling voltage divider unit, and the bias unit raises the level of the second voltage divider signal; the negative phase input terminal of the comparator unit receives the first voltage divider signal, and the positive phase input terminal of the comparator unit receives the raised second voltage divider signal. The voltage at the negative phase input terminal of the comparator unit is lower than the voltage at the positive phase input terminal of the comparator unit, the comparator unit outputs a high level, the controlled switch unit is turned on, and the power converter operates normally. Overcurrent lockout phase: When the peak current of the sampled current reaches the preset threshold, the voltage of the first voltage divider signal is higher than the voltage of the second voltage divider signal after the boost. The comparator unit outputs a low level, the controlled switch unit is cut off, and the switch is forcibly turned off. At the same time, the positive feedback lockout unit is turned on, injecting current into the negative phase input terminal of the comparator unit to pull up the voltage at that terminal, locking the low-level output state of the comparator unit and maintaining the switch off. Reset / Unlock Phase: When the current switching cycle ends, the reset unit receives a reset pulse and is triggered to conduct, pulling down the voltage at the negative input terminal of the comparator unit, making the voltage at the negative input terminal of the comparator unit lower than the voltage of the second voltage divider signal after the boost. The comparator unit outputs a high level, the positive feedback locking unit is turned off, the controlled switching unit is turned on, and the power converter enters a new switching cycle.
[0015] To achieve the above objectives, this application also provides a power converter, which includes the wave-by-wave current limiting protection circuit described above. The wave-by-wave current limiting protection circuit is connected to the switching transistor of the main circuit of the power converter and is used to limit the peak current of the main circuit.
[0016] The beneficial effects of the wave-by-wave current limiting protection circuit, control method, and power converter provided in this application are at least as follows: This application discloses a wave-by-wave current limiting protection circuit, a control method, and a power converter. The wave-by-wave current limiting protection circuit includes: a sampling voltage divider unit, a bias unit, a comparator unit, a controlled switch unit, a positive feedback locking unit, and a reset unit. The sampling voltage divider unit converts the sampled current into a voltage signal and performs voltage division processing to generate a first voltage divider signal and a second voltage divider signal. The bias unit is connected to the sampling voltage divider unit and is used to boost the DC level of the second voltage divider signal. The negative input terminal of the comparator unit is connected to the sampling voltage divider unit to receive the first voltage divider signal, and the positive input terminal of the comparator unit is connected to the bias unit to receive the boosted second voltage divider signal. The comparator unit compares the level of the first voltage divider signal with the level of the second voltage divider signal and generates a level signal based on the comparison result. The controlled switch unit... A switching unit is connected to the output of the comparator unit to receive the level signal and control the switching on and off of the switching transistors in the power converter. The input of the positive feedback locking unit is connected to the output of the comparator unit, and the output of the positive feedback locking unit is connected to the negative input of the comparator unit. When the peak value of the sampled current does not reach a preset threshold, the positive feedback locking unit is turned off; when the peak value of the sampled current reaches the preset threshold, the positive feedback locking unit is turned on and injects current into the negative input of the comparator unit to raise the voltage of the negative input and lock the low-level output of the comparator unit. A reset unit is connected to the negative input of the comparator unit. When the switching cycle ends, the reset unit receives a reset pulse and is triggered to turn on, lowering the voltage of the negative input of the comparator unit, causing the comparator unit to output a high level to unlock. This application uses a wave-by-wave current limiting protection circuit to achieve peak current control within a single switching cycle. In case of overcurrent, only the switching transistor in the current cycle is turned off, and the circuit automatically resets after the cycle ends, solving the problem of false triggering and improving protection reliability. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a schematic diagram of the structure of the wave-by-wave current limiting protection circuit provided in the embodiments of this application; Figure 2 A circuit diagram of the wave-by-wave current limiting protection circuit provided in the embodiments of this application; Figure 3 The circuit timing of the wave-by-wave current limiting protection circuit provided in the embodiments of this application; Figure 4 The control flowchart of the wave-by-wave current limiting protection circuit provided in the embodiments of this application is shown.
[0019] The following are the labeling elements in the figure: 100. Sampling voltage divider unit; 200. Bias unit; 300. Comparison unit; 400. Controlled switch unit; 500. Positive feedback locking unit; 600. Reset unit. Detailed Implementation
[0020] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.
[0021] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it may be directly or indirectly located on that other component. When a component is referred to as "connected to" another component, it may be directly or indirectly connected to that other component. The terms "upper," "lower," "left," "right," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate orientations or positions based on the accompanying drawings, and are for ease of description only, and should not be construed as limiting the technical solution. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features. "A plurality" means two or more, unless otherwise explicitly defined. Example 1
[0022] Please see Figure 1This embodiment provides a wave-by-wave current limiting protection circuit, comprising: a sampling voltage divider unit 100, a bias unit 200, a comparison unit 300, a controlled switch unit 400, a positive feedback locking unit 500, and a reset unit 600. The sampling voltage divider unit 100 converts the sampled current into a voltage signal and performs voltage division processing to generate a first voltage divider signal and a second voltage divider signal. The bias unit 200 is connected to the sampling voltage divider unit 100 and is used to boost the DC level of the second voltage divider signal. The negative input terminal of the comparison unit 300 is connected to the sampling voltage divider unit 100 to receive the first voltage divider signal, and the positive input terminal of the comparison unit 300 is connected to the bias unit 200 to receive the boosted second voltage divider signal. The comparison unit 300 compares the level of the first voltage divider signal with the level of the second voltage divider signal and generates a level signal based on the comparison result. The controlled switch unit 400 is connected to... The output of the comparator unit 300 is connected to receive a level signal and control the switching of the transistors in the power converter. The input of the positive feedback locking unit 500 is connected to the output of the comparator unit 300, and the output of the positive feedback locking unit 500 is connected to the negative input of the comparator unit 300. When the peak value of the sampled current does not reach the preset threshold, the positive feedback locking unit 500 is turned off. When the peak value of the sampled current reaches the preset threshold, the positive feedback locking unit 500 is turned on and injects current into the negative input of the comparator unit 300 to pull up the voltage of the negative input of the comparator unit 300 and lock the low-level output of the comparator unit 300. The reset unit 600 is connected to the negative input of the comparator unit 300. When the switching cycle ends, the reset unit 600 receives a reset pulse and is triggered to turn on, so as to pull down the voltage of the negative input of the comparator unit 300, so that the comparator unit 300 outputs a high level to unlock.
[0023] In this embodiment, the wave-by-wave current limiting protection circuit includes a sampling voltage divider unit 100, a bias unit 200, a comparison unit 300, a controlled switch unit 400, a positive feedback locking unit 500, and a reset unit 600. The sampling voltage divider unit 100 converts the sampled current into a voltage divider signal. The bias unit 200 raises part of the voltage divider signal level. The comparison unit 300 outputs a control signal by comparing the levels of the two voltage divider signals. The positive feedback locking unit 500 locks the low-level output of the comparison unit 300 during overcurrent. The reset unit 600 receives a pulse at the end of the switching cycle to unlock the locked state. This embodiment uses a wave-by-wave current limiting method to limit the peak current within a single switching cycle. During overcurrent, only the switch in the current cycle is forcibly turned off, and the circuit automatically resets and resumes operation after the cycle ends. This solves the problem of false triggering of traditional lockout protection under nonlinear loads. It has the advantages of simple structure, reliable control, and wide adaptability, and can be widely used in voltage-type or open-loop controlled power converters. Example 2
[0024] Specifically, please refer toFigure 2 The sampling voltage divider unit 100 includes: resistor R20, resistor R324 and resistor R251; resistor R20, resistor R324 and resistor R251 are connected in series in sequence, and the negative phase input terminal of the comparison unit 300 and the reset unit 600 are both connected to the connection node of resistor R20 and resistor R324.
[0025] The bias unit 200 is connected at the connection node of resistor R324 and resistor R251.
[0026] The non-inverting input of comparator 300 is connected to the side of resistor R251 away from resistor R324.
[0027] The end of resistor R20 furthest from resistor R324 is used to connect the sampling current signal.
[0028] The comparator unit 300 includes: comparator U12-A, resistor R255, capacitor C122, resistor R257, capacitor C105, and switching diode D48; The non-inverting input terminal of comparator U12-A is connected to the sampling voltage divider unit 100, the first terminal of resistor R257, and the first terminal of capacitor C105, respectively. The second terminals of resistor R257 and capacitor C105 are both connected to the anode of switching diode D48, and the cathode of switching diode D48 is connected to the output terminal of comparator U12-A. The positive power supply pin of comparator U12-A is connected to the positive terminal of 5V power supply, the first end of resistor R255, and the first end of capacitor C122, respectively. The negative power supply pin of comparator U12-A and the second end of capacitor C122 are grounded. The second end of resistor R255 is connected to the output terminal of comparator U12-A. The negative phase input of comparator U12-A is connected to the sampling voltage divider unit 100 and the reset unit 600, respectively.
[0029] Specifically, please refer to Figure 2 The comparator unit 300 further includes: a first RC parallel network, the first end of which is connected to the non-inverting input of the comparator U12-A, the second end of which is grounded, and the first RC parallel network includes a resistor R253 and a capacitor C124 connected in parallel.
[0030] Specifically, please refer to Figure 2 The comparator unit 300 further includes: a second RC parallel network, the first end of which is connected to the negative input terminal of the comparator U12-A, the second end of which is grounded, and the second RC parallel network includes a resistor R81 and a capacitor C121 connected in parallel.
[0031] Specifically, the positive feedback locking unit 500 includes: resistors R263, R260, and R264, capacitor C83, and transistor Q53; The first terminal of resistor R263 is connected to the output terminal of comparator U12-A, and the second terminal of resistor R263 is connected to the base of transistor Q53, the first terminal of resistor R260, and the first terminal of capacitor C83. The second end of resistor R260 and the second end of capacitor C83 are connected in parallel to the emitter of transistor Q53, and the emitter of transistor Q53 is connected to the DC power supply. The collector of transistor Q53 is connected to the negative input terminal of comparator U12-A via resistor R264.
[0032] Specifically, the reset unit 600 includes: resistor R348, resistor R343, capacitor C134, and MOSFET Q47; The first end of resistor R348 is used to connect to the reset pulse signal, and the second end of resistor R348 is connected to the first end of resistor R343, the first end of capacitor C134, and the gate of MOSFET Q47. The second terminal of resistor R343 and the second terminal of capacitor C134 are both connected to the source of MOSFET Q47 and grounded; The drain of MOSFET Q47 is connected to the negative input terminal of comparator U12-A.
[0033] Specifically, please refer to Figure 2 The reset unit 600 also includes: switching diode D100, switching diode D101, common cathode diode D102, resistor R346, and resistor R347.
[0034] The cathode of the switching diode D101 is connected to the first reset pulse signal, and the anode of the switching diode D101 is connected to the second terminal of the resistor R347 and the first anode of the common cathode diode D102, respectively. The first terminal of resistor R347 is connected to a DC power supply. The cathode of the common cathode diode D102 is connected to the first terminal of the resistor R348; The first terminal of resistor R346 is connected to a DC power supply, and the second terminal of resistor R346 is connected to the second anode of common cathode diode D102 and the anode of switching diode D100, respectively. The second cathode of the switching diode D100 is connected to the second reset pulse signal.
[0035] The controlled switch unit 400 can use an IR2110 driver chip to receive the comparator output signal and control the on / off state of the MOS transistor.
[0036] Work process: 1. Normal operating phase (switching cycle T = 10 μs) When the main circuit switching transistor of the power converter is turned on, the sampling current gradually increases. The CT+ signal is converted into a first voltage divider signal (e.g., 1V) and a second voltage divider signal (e.g., 0.5V) by the sampling voltage divider unit 100. The bias unit 200 raises the second voltage divider signal to 3.8V and inputs it to the positive input terminal of the comparator. At this time, the voltage at the negative input terminal of the comparator (1V) is less than the voltage at the positive input terminal (3.8V), and U12-A outputs a high level (5V). The IR2110 driver chip turns on the MOSFET of the main circuit, and the current rises normally until the theoretical on-time (e.g., 5μs) is reached.
[0037] 2. Overcurrent lockout phase (peak current reaches threshold) When a nonlinear load causes a sudden increase in current, the peak sampling current reaches 5A. The first voltage divider signal rises to 2.5V, the second voltage divider signal rises to 1.25V and is then boosted to 4.55V. Due to the rapid increase in current, the first voltage divider signal jumps to 4.8V (exceeding 4.55V) instantaneously. The voltage at the negative input terminal of the comparator is greater than the voltage at the positive input terminal, and U12-A outputs a low level (0V). The IR2110 driver chip is cut off, and the MOSFET in the main circuit is forcibly turned off to prevent the current from continuing to increase.
[0038] At the same time, the low level output of the comparator powers the base of Q53 via R263, turning Q53 on (5V emitter, 4.5V collector output). Current is injected into the negative input of the comparator through R264, maintaining the first voltage divider signal above 4.8V, locking the low-level output state of the comparator, and ensuring that the MOSFET remains off in the current cycle, unaffected by current fluctuations.
[0039] 3. Reset and unlock phase (end of cycle) When the 10μs switching cycle ends, the MCU outputs the first reset pulse (or the second reset pulse, selected according to the operating conditions), which is rectified by D101 / D100 and D102 and input to R348; the gate of MOSFET Q47 is energized and turned on, and the drain voltage (connected to the negative input of the comparator) is pulled down to 0.1V; at this time, the first voltage divider signal (0.1V) is less than the raised second voltage divider signal (3.3V reference), the comparator outputs a high level (5V), the base of Q53 is de-energized and cut off, and the positive feedback lockout is released; the IR2110 driver chip turns on the MOSFET again, and the circuit enters a new switching cycle.
[0040] Working principle: Please combine Figure 3In this embodiment, the sampling voltage divider unit 100 is mainly composed of resistors R20, R324 and R251 connected in series. The input terminal of the sampling voltage divider unit 100 is connected to the current sampling signal CT+. The sampling current is converted into two voltage signals through resistor voltage division. One is the first voltage divider signal, such as the output of the node where resistors R20 and R324 are connected; the other is the second voltage divider signal, such as the output at the end of resistor R251, realizing the conversion of current signal to voltage signal and amplitude adaptation.
[0041] The bias unit 200 is connected to the sampling voltage divider unit 100 via R324 and R251. A DC power supply is used to provide a bias voltage to raise the DC level of the second voltage divider signal, so that the comparison unit 300 has a reasonable comparison threshold and avoids misjudgment caused by zero drift.
[0042] The comparator unit 300 is based on comparator U12-A, combined with an RC filter network and a feedback resistor. The negative input of the comparator receives the first divided voltage signal, and the positive input receives the boosted second divided voltage signal. Resistor R255 is a pull-up resistor to ensure stable output level. Capacitor C122 filters out power supply ripple. Resistor R257, capacitor C105, and switching diode D48 form a positive feedback auxiliary network to improve the comparator's response speed. The first RC parallel network (R253, C124) and the second RC parallel network (R81, C121) respectively filter out high-frequency noise at the positive and negative inputs, further improving comparison accuracy.
[0043] The controlled switching unit 400 typically uses a driving transistor or MOSFET, which is connected to the output of comparator U12-A. It receives high / low level signals to control the switching of the main circuit switching transistor of the power converter, such as turning on when the level is high and turning off when the level is low.
[0044] The positive feedback locking unit 500, composed of transistor Q53 and surrounding resistors and capacitors, is the core component for achieving wave-by-wave locking. When the comparator outputs a low level, the base of transistor Q53 is energized and conducts, injecting current into the negative input terminal of the comparator through resistor R264, raising the first voltage divider signal voltage, and maintaining the comparator output at a low level. This achieves overcurrent locking and avoids frequent switching caused by current fluctuations.
[0045] The reset unit 600 uses MOSFET Q47 as its core, along with diodes, resistors, and capacitors to form a dual-pulse receiving circuit. When the current switching cycle ends, the external controller (such as an MCU) outputs a reset pulse, energizing the gate of MOSFET Q47 and pulling the voltage at the negative input of the comparator low. This breaks the lockout state of the positive feedback locking unit 500, allowing the comparator to return to a high-level output, thus achieving automatic unlocking at the end of the cycle.
[0046] Compared with the prior art, the beneficial effects of this application are as follows: 1. Solve the problem of false triggering. Traditional protection is easily affected by nonlinear load disturbances due to "single peak triggering lock-up". This application's wave-by-wave current limiting locks the overcurrent state only within a single switching cycle and automatically resets after the cycle ends. Non-faulty instantaneous disturbances only affect the current cycle and will not cause the whole machine to lock up, greatly reducing the probability of false triggering.
[0047] 2. Reliable and flexible control. The positive feedback locking unit achieves rigid locking through current injection, ensuring reliable turn-off of the switching transistor during overcurrent; the reset unit adopts pulse control, which is precisely synchronized with the switching cycle, and the unlocking timing is controllable, adapting to power converters of different frequencies.
[0048] 3. Simple structure and easy implementation. The core components are resistors, capacitors, diodes, transistors, and general-purpose comparators. No complex digital control chips are required, resulting in low cost, low failure rate, and easy retrofitting and upgrading of existing power converter circuits.
[0049] 4. Strong anti-interference capability. The RC parallel network of the comparator unit filters out high-frequency noise, the bias unit stabilizes the comparison threshold, and the positive feedback locking unit avoids the influence of signal jitter. Multiple designs ensure that the circuit can work stably in industrial environments with strong electromagnetic interference.
[0050] 5. Wide adaptability. It can be directly applied to various power converters with voltage-type and open-loop topologies (such as DC-DC converters, inverters, chargers, etc.) without adjusting the core structure for specific loads, making it suitable for a wide range of scenarios. Example 3
[0051] To achieve the above objectives, please refer to Figure 4 This application also provides a control method for a wave-by-wave current limiting protection circuit, which includes the following steps: S100, Normal Operation Stage: The sampling current is converted into a first voltage divider signal and a second voltage divider signal by the sampling voltage divider unit. The bias unit raises the level of the second voltage divider signal. The negative phase input terminal of the comparator unit receives the first voltage divider signal, and the positive phase input terminal of the comparator unit receives the raised second voltage divider signal. The voltage at the negative phase input terminal of the comparator unit is lower than the voltage at the positive phase input terminal of the comparator unit. The comparator unit outputs a high level, the controlled switch unit is turned on, and the power converter operates normally.
[0052] S200, Overcurrent Lockout Stage: When the peak current of the sampled current reaches the preset threshold, the voltage of the first voltage divider signal is higher than the voltage of the second voltage divider signal after the boost. The comparator unit outputs a low level, the controlled switch unit is cut off, and the switch is forcibly turned off. At the same time, the positive feedback lockout unit is turned on, injecting current into the negative phase input terminal of the comparator unit to pull up the voltage at that terminal, locking the low-level output state of the comparator unit, and maintaining the switch off. S300, Reset and Unlock Phase: When the current switching cycle ends, the reset unit receives a reset pulse and is triggered to conduct, pulling down the voltage at the negative input terminal of the comparator unit, so that the voltage at the negative input terminal of the comparator unit is lower than the voltage of the second voltage divider signal after the boost. The comparator unit outputs a high level, the positive feedback locking unit is turned off, the controlled switching unit is turned on, and the power converter enters a new switching cycle.
[0053] This embodiment solves the false triggering defects of traditional protection circuits by using wave-by-wave current limiting logic of "sampling voltage division - level comparison - overcurrent lockout - periodic reset", and achieves accurate protection of power converter current. The circuit structure is simple, low cost and reliable control, and can be widely used in voltage-type or open-loop topology power converters. It is especially suitable for nonlinear load scenarios and has important practical value and promotion prospects. Example 4
[0054] To achieve the above objectives, this application also provides a power converter, which includes the above-described wave-by-wave current limiting protection circuit. The wave-by-wave current limiting protection circuit is connected to the switching transistor of the main circuit of the power converter and is used to limit the peak current of the main circuit.
[0055] In summary, this application discloses a wave-by-wave current limiting protection circuit, a control method, and a power converter. The wave-by-wave current limiting protection circuit includes: a sampling voltage divider unit, a bias unit, a comparison unit, a controlled switch unit, a positive feedback locking unit, and a reset unit. The sampling voltage divider unit converts the sampled current into a voltage signal and performs voltage division processing to generate a first voltage divider signal and a second voltage divider signal. The bias unit is connected to the sampling voltage divider unit and is used to boost the DC level of the second voltage divider signal. The negative input terminal of the comparison unit is connected to the sampling voltage divider unit to receive the first voltage divider signal, and the positive input terminal of the comparison unit is connected to the bias unit to receive the boosted second voltage divider signal. The comparison unit compares the level of the first voltage divider signal with the level of the second voltage divider signal and generates a voltage converter based on the comparison result. The control unit and the output of the comparator unit are connected to receive the level signal and control the switching of the transistors in the power converter. The input of the positive feedback locking unit is connected to the output of the comparator unit, and the output of the positive feedback locking unit is connected to the negative input of the comparator unit. When the peak value of the sampled current does not reach the preset threshold, the positive feedback locking unit is turned off; when the peak value of the sampled current reaches the preset threshold, the positive feedback locking unit is turned on and injects current into the negative input of the comparator unit to raise the voltage of the negative input of the comparator unit and lock the low-level output of the comparator unit. The reset unit is connected to the negative input of the comparator unit. When the switching cycle ends, the reset unit receives a reset pulse and is triggered to turn on, thereby lowering the voltage of the negative input of the comparator unit, so that the comparator unit outputs a high level to unlock. This application uses a wave-by-wave current limiting protection circuit to achieve peak current control within a single switching cycle. In case of overcurrent, only the transistor in the current cycle is turned off, and the circuit automatically resets after the cycle ends, solving the problem of false triggering and improving protection reliability.
[0056] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A wave-by-wave current limiting protection circuit, characterized in that, include: A sampling voltage divider unit is used to convert the sampled current into a voltage signal and perform voltage division processing to generate a first voltage divider signal and a second voltage divider signal; A bias unit is connected to the sampling voltage divider unit, and the bias unit is used to boost the DC level of the second voltage divider signal; The comparison unit has its negative input connected to the sampling voltage divider unit to receive the first voltage divider signal, and its positive input connected to the bias unit to receive the boosted second voltage divider signal. The comparison unit is used to compare the level of the first voltage divider signal with the level of the second voltage divider signal and generate a level signal based on the comparison result. A controlled switch unit is connected to the output terminal of the comparator unit and is used to receive the level signal and control the switching transistors in the power converter. A positive feedback locking unit is provided, wherein the input terminal of the positive feedback locking unit is connected to the output terminal of the comparator unit, and the output terminal of the positive feedback locking unit is connected to the negative phase input terminal of the comparator unit. When the peak value of the sampling current does not reach a preset threshold, the positive feedback locking unit is turned off; when the peak value of the sampling current reaches the preset threshold, the positive feedback locking unit is turned on and injects current into the negative phase input terminal of the comparator unit to pull up the voltage of the negative phase input terminal of the comparator unit and lock the low-level output of the comparator unit. A reset unit is connected to the negative input terminal of the comparator unit. When the switching cycle ends, the reset unit receives a reset pulse and is triggered to conduct, thereby pulling down the voltage at the negative input terminal of the comparator unit, so that the comparator unit outputs a high level to unlock.
2. The wave-by-wave current limiting protection circuit as described in claim 1, characterized in that, The sampling voltage divider unit includes: resistor R20, resistor R324 and resistor R251; The resistors R20, R324, and R251 are connected in series in sequence. The negative phase input terminal of the comparator unit and the reset unit are both connected to the connection node of the resistors R20 and R324. The biasing unit is connected to the connection node between resistor R324 and resistor R251; The non-inverting input terminal of the comparator unit is connected to the side of resistor R251 away from resistor R324; The end of resistor R20 furthest from resistor R324 is used to receive the sampling current signal.
3. The wave-by-wave current limiting protection circuit as described in claim 1, characterized in that, The comparison unit includes: comparator U12-A, resistor R255, capacitor C122, resistor R257, capacitor C105, and switching diode D48. The non-inverting input terminal of the comparator U12-A is connected to the sampling voltage divider unit, the first terminal of the resistor R257, and the first terminal of the capacitor C105. The second terminals of the resistor R257 and the second terminals of the capacitor C105 are both connected to the anode of the switching diode D48. The cathode of the switching diode D48 is connected to the output terminal of the comparator U12-A. The positive power supply pin of the comparator U12-A is connected to the positive terminal of the 5V power supply, the first end of the resistor R255, and the first end of the capacitor C122. The negative power supply terminal of the comparator U12-A and the second end of the capacitor C122 are grounded. The second end of the resistor R255 is connected to the output terminal of the comparator U12-A. The negative phase input terminal of the comparator U12-A is connected to the sampling voltage divider unit and the reset unit, respectively.
4. The wave-by-wave current limiting protection circuit as described in claim 3, characterized in that, The comparison unit further includes: a first RC parallel network, the first end of which is connected to the non-inverting input of the comparator U12-A, the second end of which is grounded, and the first RC parallel network includes a resistor R253 and a capacitor C124 connected in parallel.
5. The wave-by-wave current limiting protection circuit as described in claim 3, characterized in that, The comparison unit further includes: a second RC parallel network, the first end of which is connected to the negative input terminal of the comparator U12-A, the second end of which is grounded, and the second RC parallel network includes a resistor R81 and a capacitor C121 connected in parallel.
6. The wave-by-wave current limiting protection circuit as described in claim 3, characterized in that, The positive feedback locking unit includes: resistors R263, R260, and R264; capacitor C83; and transistor Q53. The first end of the resistor R263 is connected to the output end of the comparator U12-A, and the second end of the resistor R263 is connected to the base of the transistor Q53, the first end of the resistor R260, and the first end of the capacitor C83. The second end of the resistor R260 and the second end of the capacitor C83 are connected in parallel to the emitter of the transistor Q53, and the emitter of the transistor Q53 is connected to the DC power supply. The collector of the transistor Q53 is connected to the negative input terminal of the comparator U12-A via the resistor R264.
7. The wave-by-wave current limiting protection circuit as described in claim 3, characterized in that, The reset unit includes: resistor R348, resistor R343, capacitor C134, and MOSFET Q47; The first end of the resistor R348 is used to receive the reset pulse signal, and the second end of the resistor R348 is connected to the first end of the resistor R343, the first end of the capacitor C134, and the gate of the MOS transistor Q47. The second terminal of the resistor R343 and the second terminal of the capacitor C134 are both connected to the source of the MOS transistor Q47 and grounded; The drain of the MOS transistor Q47 is connected to the negative input terminal of the comparator U12-A.
8. The wave-by-wave current limiting protection circuit as described in claim 7, characterized in that, The reset unit further includes: Switching diode D100, switching diode D101, common cathode diode D102, resistor R346, resistor R347; The cathode of the switching diode D101 is connected to the first reset pulse signal, and the anode of the switching diode D101 is connected to the second terminal of the resistor R347 and the first anode of the common cathode diode D102, respectively. The first terminal of the resistor R347 is connected to a DC power supply. The cathode of the common cathode diode D102 is connected to the first terminal of the resistor R348; The first end of the resistor R346 is connected to a DC power supply, and the second end of the resistor R346 is connected to the second anode of the common cathode diode D102 and the anode of the switching diode D100, respectively. The second cathode of the switching diode D100 is connected to the second reset pulse signal.
9. A control method for a wave-by-wave current limiting protection circuit, characterized in that, Includes the following steps: During normal operation: the sampling current is converted into a first voltage divider signal and a second voltage divider signal by the sampling voltage divider unit, and the bias unit raises the level of the second voltage divider signal; The negative input terminal of the comparator receives the first voltage divider signal, and the positive input terminal of the comparator receives the boosted second voltage divider signal. When the voltage at the negative input terminal of the comparator is lower than the voltage at the positive input terminal of the comparator, the comparator outputs a high level, the controlled switch unit is turned on, and the power converter operates normally. Overcurrent lockout phase: When the peak current of the sampled current reaches the preset threshold, the voltage of the first voltage divider signal is higher than the voltage of the second voltage divider signal after the boost. The comparator unit outputs a low level, the controlled switch unit is cut off, and the switch is forcibly turned off. At the same time, the positive feedback lockout unit is turned on, injecting current into the negative phase input terminal of the comparator unit to pull up the voltage at that terminal, locking the low-level output state of the comparator unit and maintaining the switch off. Reset / Unlock Phase: When the current switching cycle ends, the reset unit receives a reset pulse and is triggered to conduct, pulling down the voltage at the negative input terminal of the comparator unit, making the voltage at the negative input terminal of the comparator unit lower than the voltage of the second voltage divider signal after the boost. The comparator unit outputs a high level, the positive feedback locking unit is turned off, the controlled switching unit is turned on, and the power converter enters a new switching cycle.
10. A power converter, characterized in that, Includes a wave-by-wave current limiting protection circuit as described in any one of claims 1-8, wherein the wave-by-wave current limiting protection circuit is connected to the switching transistor of the main circuit of the power converter and is used to limit the peak current of the main circuit.