Light emitting diode array
By forming a dielectric mask layer on a semiconductor layer and etching an array of holes, LED structures with different cross-sectional areas are grown, solving the problem of monolithically integrated multicolor micro-LED arrays. This enables efficient and low-cost manufacturing of multicolor micro-LEDs, meeting the requirements for high-resolution and high-brightness displays.
Patent Information
- Application Number
- CN202512054387.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2019-07-19
- Filing Date
- 2020-07-14
- Publication Date
- 2026-04-10
AI Technical Summary
Existing technologies struggle to achieve monolithic integration of multicolor micro-LED arrays on a single chip, especially for the efficient growth of red, blue, and green micro-LEDs. Furthermore, existing methods suffer from low transfer yield, high cost, and poor image quality and optical efficiency.
By forming a dielectric mask layer on a semiconductor layer and etching an array of holes, LED structures with different cross-sectional areas can be grown. The growth direction of the LED structure can be controlled by the dielectric mask layer, thus realizing the monolithic integration of red, blue, and green micro-LEDs.
This technology enables the efficient growth of multicolor micro-LED arrays on a single wafer, improving transfer yield and image quality, reducing manufacturing costs, and meeting the demands for high-resolution and high-brightness displays.
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Figure CN121843314A_ABST
Abstract
Description
[0001] This application is a divisional application of Chinese Patent Invention Application No. 202080066179.4, filed on July 14, 2020, entitled "Light Emitting Diode Array". Technical Field
[0002] This invention relates to light-emitting diode (LED) arrays and methods for manufacturing LED arrays. Specifically, it relates to micrometer-scale LED arrays. Background Technology
[0003] The growing demand for brighter, higher-resolution, and more power-efficient display panels for smartwatches, smartphones, TVs, and AR / VR devices is driving the development of microdisplay technology, in which micro-LEDs (μLEDs) with a diameter of <100 µm are key components. Compared to organic light-emitting diodes (OLEDs) and liquid crystal displays (LCDs), Group III-nitride μLEDs exhibit many unique characteristics for display applications, as described in the following: ZYFan, JYLin, and HXJiang, J. Phys.D.: Applied Physics Letters 41, 094001 (2008); HXJiang and JYLin, Optical Express 21, A476 (2013); and J.Day, J.Li, DYCLie, C. Bradford, JY Lin, and HX Jiang, Applied Physics Letters 99, 031116 (2011). Unlike LCDs, Group III-nitride-based microdisplays, where μLEDs are the primary component, are self-emissive. Displays using μLEDs exhibit high resolution, high efficiency, and high contrast. OLEDs typically operate at current densities several orders of magnitude lower than semiconductor LEDs to maintain a reasonable lifespan. Therefore, OLED brightness is quite low, typically around 3000 cd / m² for full-color displays. 2 Group III nitride μLEDs exhibit performance higher than 10 5 cd / m 2 High brightness. Of course, compared to OLED, μLEDs based on group III nitrides inherently exhibit longer operating lifetime and chemical robustness. Therefore, it is expected that in the near future, group III nitride μLEDs could potentially replace LCDs and OLEDs for high-resolution and high-brightness displays in a wide range of applications.
[0004] Two main approaches dominate the fabrication of microdisplays. So-called pick-and-place techniques have been proposed for fabricating microdisplays (Vincent W. Lee, Nancy Twu, and Ioannis Kymissis, Information Display 6 / 16 (2016)). A major challenge of pick-and-place techniques is the transfer yield of pixels (i.e., red, blue, and green microLEDs from different wafers). This also significantly increases the cost of the underlying materials used to build the microdisplay or the manufacturing time, thus posing significant challenges in terms of reproducibility and scalability. High-resolution microdisplays, particularly important for smartwatches, smartphones, televisions, and AR / VR devices, require μLEDs with small diameters and small pitches (e.g., <10 μm), which is difficult for pick-and-place techniques. In this context, direct integration of micro-LED arrays with transistor arrays providing activation matrix switching has been employed (HX Zhang, D. Massoube, J. McKendry, Z. Gong, B. Guilhabert, C. Griffin, E. Gu, PE Jessop, J. M. Girkin and M. Dawson, Optics Express 16, 9918–9926 (2008); ZJ Liu, WC Chong, KMWong and KMLau, J. Display Tech 9, 678–682 (2013); and CW Sun, CHChao, HYChen, YHChiu, WYYeh, MHWu, HHYen and CC Liang, SID Digest of Technical Papers, 1042–1045 (2011)). However, this approach suffers from several major drawbacks as described in GB 1816455.8. Furthermore, due to fundamental challenges in producing individual multicolor chips, such microLED-based displays rely on either a single-color or downconversion material. While the latter allows for multicolor emission, it suffers from energy loss, additional costs, and challenges in precisely locating downconversion materials with diameters smaller than the microLEDs, as well as reliability issues. Consequently, image quality and optical efficiency are unsatisfactory, making practical applications extremely difficult.
[0005] Therefore, a new method for fabricating bright and high-resolution microdisplays is needed. A method is desired that involves monolithic integration of microLEDs with different emission wavelengths (such as red, blue, and green microLEDs as individual pixels in an array) with other electronic components. To achieve full-color microdisplays without involving any downconversion materials, the epitaxial wafer should preferably have a monolithic multicolor LED structure including a control configuration. Clearly, achieving multicolor emission from a single wafer is a significant challenge. Another major obstacle exists for achieving multicolor emission from a single wafer. Currently, LEDs based on group III nitrides (i.e., InGaN / GaN quantum wells as the emission region) are grown on c-panel substrates. Due to the large lattice mismatch between InGaN and GaN, polar orientation leads to strain-induced piezoelectric fields. As a result, the LED suffers from reduced overlap between the electronic wavefunction and the aperture wavefunction, leading to reduced quantum efficiency. This worsens with increasing emission wavelengths, such as green LEDs, and thus creates a so-called "green" gap, meaning that the quantum efficiency of green LEDs is much lower than that of blue LEDs. The efficiency of red LEDs based on group III nitrides is even lower than that of green LEDs. Furthermore, this strain also restricts the bonding of indium into GaN, further enhancing the challenge of achieving longer wavelength emission. Therefore, at this point, red LEDs are essentially exclusively based on AlGaInP. This makes it virtually impossible to monolithically integrate arrays of microLEDs with different emission wavelengths (where red, blue, and green microLEDs act as individual pixels) on a single chip.
[0006] Therefore, the key is to develop different methods for growing entirely from group III nitrides on a single wafer and then fabricating monolithic multicolor μLED arrays in order to solve all the aforementioned problems. To meet industrial requirements, any new methods will have to be built on a scalable basis. Summary of the Invention
[0007] The present invention provides a method for manufacturing a light-emitting diode (LED) array, the method comprising: forming a semiconductor layer of a group III nitride material; forming a dielectric mask layer on the semiconductor layer having an array of holes therethrough, each hole exposing a region of the semiconductor layer; and growing an LED structure in each hole. The array may include a first set of holes having a first cross-sectional area and a second set of holes having a second cross-sectional area different from the first cross-sectional area.
[0008] LED structures can be grown on exposed areas of semiconductor layers. Growth will generally be in the upward direction because growth from the dielectric sidewalls of the via will not occur. Therefore, upward growth of the LED structure within the via can produce a layered LED structure, where each layer is generally flat or planar and has a substantially constant thickness.
[0009] Semiconductor layers can be formed on substrates such as group III nitrides (e.g., GaN) or sapphire, silicon (Si), silicon carbide (SiC), or glass.
[0010] The step of growing an LED structure in each hole may include growing an n-type layer. The step of growing an LED structure in each hole may include growing a front layer in each hole. The step of growing an LED structure in each hole may include growing at least one activation layer in each hole. The step of growing an LED structure in each hole may include growing a p-type layer in each hole. The at least one activation layer may be between the n-type layer and the p-type layer. The at least one activation layer may include at least one quantum well layer, and may include multiple quantum well layers. These layers may be formed of, for example, InGaN or other suitable group III nitride materials. For example, the front layer may be an InGaN layer with low indium content and a typical thickness of <100 nm, or an InGaN / GaN superlattice with low indium content (the total thickness of the superlattice is typically less than 300 nm). The n-type layer and the p-type layer may also be group III nitride materials, such as GaN, InGaN, or AlGaN.
[0011] Because each LED structure is grown in a corresponding hole, each LED structure is formed by multiple layers, each with the same cross-sectional area, which is equal to the cross-sectional area of the hole in which the LED structure is grown.
[0012] At least one active layer may have an upper surface located below the top of the dielectric layer. In the case of only one quantum well layer, the upper surface is the uppermost surface of that quantum well layer. In the case of multiple quantum well layers, the upper surface is the uppermost surface of the quantum well layer. The upward direction may be defined as the growth direction of the semiconductor layer and / or the LED structure.
[0013] The steps of forming a dielectric mask layer may include: growing a dielectric material layer; and etching an array of holes into the dielectric material layer. Alternatively, a dielectric layer may be grown around a region, which may have holes formed using a mask, for example, during the growth of the dielectric layer.
[0014] The method may also include etching each exposed area of the semiconductor layer before growing the LED structure in each hole.
[0015] The semiconductor layer can provide a common electrical contact for all LED structures.
[0016] The semiconductor layer may be doped. For example, it may comprise a single layer of n-type or p-type group III nitride material. Alternatively, the semiconductor layer may comprise first and second sublayers, wherein a heterostructure between them is arranged to form a two-dimensional charge carrier gas at the heterostructure interface. The sublayers may form a buffer layer and a barrier layer. The two-dimensional charge carrier gas may be, for example, a two-dimensional electron gas (2DEG). A two-dimensional hole gas (2DHG) may also be used, but it typically has a lower charge carrier density and / or mobility. It is well known that heterostructures, for example, comprising a GaN layer and an AlGaN or InGaN layer, or more generally two AlGaN layers with different Al contents or two InGaN layers with different In contents, can form a 2DEG at the interface between the two layers, wherein the electron density in the 2DEG varies with multiple factors of the Al content of the AlGaN layer or the In content of the InGaN layer. Other group III nitride heterostructures with the same effect may be used.
[0017] The present invention also provides an LED array, comprising: a semiconductor layer; a dielectric layer extending on the semiconductor layer and having an array of LED structures extending through the dielectric layer. The LED structures may include a first group of LED structures all having a first cross-sectional area and a second group of LED structures all having a second cross-sectional area different from the first cross-sectional area.
[0018] The area of the first cross section can be at least 1% or at least 2% larger than the area of the second cross section.
[0019] Each LED structure can fill the holes grown therein, such that each LED structure has the same cross-sectional area as the cross-sectional area of the holes grown therein. Therefore, the LED structure may include a first group of LED structures, all having a first cross-sectional area, and a second group of LED structures, all having a second cross-sectional area different from the first cross-sectional area.
[0020] The first group of LED structures can all be arranged to emit light with a first peak wavelength, and the second group of LED structures can all be arranged to emit light with a second peak wavelength that is different from the first peak wavelength.
[0021] The array of holes may also include a third group of holes, each of which has a third cross-sectional area different from that of the first and second cross-sections.
[0022] The array of LED structures may include a third group of LED structures grown in a third group of holes, and each of the third group of LED structures may be arranged to emit light having a third peak wavelength that is different from the first and second peak wavelengths.
[0023] For example, the three groups could include a red group, a green group, and a blue group for the LED structure.
[0024] The LED structures can be arranged into multiple groups. The method may also include forming multiple contacts, each connected to a corresponding group of LED structures. Each group of LED structures can operate independently of other groups of LED structures, i.e., be turned on and off. This enables the production of pixelated displays, where each pixel is formed by a group of LED structures or by an illumination system with variable color output.
[0025] Each group of LED structures may include at least one LED structure from each group of LED structures. This can be used, for example, in monochrome displays or white light lighting systems.
[0026] Each group of LED structures may consist of only one group of LED structures. This can be used, for example, in color display devices.
[0027] The present invention further provides an LED array, comprising: a semiconductor layer; a dielectric layer extending on the semiconductor layer and having an array of holes passing through the dielectric layer; and LED devices formed in each hole. The array may include a first set of holes having a first cross-sectional area and a second set of holes having a second cross-sectional area different from the first cross-sectional area.
[0028] The method or LED array may include any feasible combination of any one or more features of the preferred embodiments of the invention now described with reference to the accompanying drawings. Attached Figure Description
[0029] The accompanying drawings are provided to further illustrate the invention and constitute a part of this invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1a The original template formed in the process according to the first embodiment of the present invention is shown; Figure 1b It shows Figure 1a A template, wherein a mask pattern is formed in the mask layer of the template; Figure 1c It shows Figure 1a The template in which micro-LEDs are grown in the holes of the mask layer; Figure 1d It shows Figure 1c A template on which electrical contacts are formed; Figure 2 Is it through Figure 1d The cross-section of the LED structure of the template; Figure 3 This is a schematic plan view of an LED array according to another embodiment of the present invention; Figure 4This is a schematic plan view of an LED array according to another embodiment of the present invention; and Figure 5a , Figure 5b and Figure 5c yes Figure 1c A graph showing the electroluminescence of individual LEDs in an array. Detailed Implementation
[0030] refer to Figure 1a A group III nitride or other suitable semiconductor layer (e.g., a standard n-type GaN (n-GaN) layer 100) is initially grown on a substrate 102. The substrate 102 can be a GaN substrate, or any heterostructure substrate such as sapphire, silicon (Si), silicon carbide (SiC), or even glass. The GaN layer 100 can be grown using any standard GaN growth method or any other suitable growth technique, such as metal-organic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE). The resulting “native n-GaN template” can have a thickness greater than 10 µm, but typically this thickness is in the range of 500 nm to 10 µm. Subsequently, a dielectric layer 104 (such as silicon dioxide (SiO2) or silicon nitride (SiN) or any other suitable dielectric material) is deposited on the n-GaN layer 100 using PECVD or any other suitable deposition technique. The thickness of the dielectric layer can be in the range of 20 nm to 500 µm.
[0031] refer to Figure 1bAn array of holes 106 is then formed in the dielectric layer 104. The holes 106 are typically on the micrometer scale and are therefore referred to as microvias. This can be accomplished using photolithography and a subsequent etching process, which can be dry or wet etching. During the formation of the microvias 106, the dielectric layer 104 is etched down through its entire thickness to the upper surface of the n-GaN layer 100. The cross-sectional areas of the microvias vary. Here, cross-sectional area refers to a section in a plane perpendicular to the approximate direction of the etching of the hole and parallel to the plane of the top surface of the substrate. The holes comprise at least two sets of holes, each with a different cross-sectional area. If the holes 106 are circular, they can have a diameter from 1 µm to 500 µm, and the pitch (i.e., the distance between the centers of adjacent microvias) can be, for example, from 1 µm to 500 µm. Further etching of the n-GaN layer 100, only within the microvia region, can be performed using the remaining dielectric layer 104 as a mask. Depending on the n-GaN layer thickness, the n-GaN etch depth can range from zero (meaning no GaN etching) to 10 µm. Typically, the optimal etching method or conditions for the n-GaN layer 100 will differ from those for the dielectric layer 104. For example, SF6 etching can be used to etch the dielectric layer 104, but will not etch the n-GaN layer 100. Therefore, it is easy to completely etch through the dielectric layer 104 and stop at the top surface of the semiconductor layer 100. This is also advantageous for the quality of the LED structure grown in the via 106.
[0032] Hole 106 includes a first group of holes 106a, a second group of holes 106b, and may also include a third group of holes 106c. Each group of holes 106a, 106b, and 106c can be arranged in a regular array, such as a rectangular array, a hexagonal array, or any other shaped array. The diameter of the first group of holes 106a is larger than the diameter of the second group of holes 106b, and the diameter of the second group of holes is larger than the diameter of the third group of holes 106c. Holes 106 are also arranged into groups 107a and 107b. Each group may contain one or more holes 106. Figure 1b As shown by the dashed lines, each group of holes 107a, 107b can be located in a corresponding region of the dielectric layer 104. For example, as... Figure 1b As shown, each of groups 107a and 107b includes one hole from each of groups 106a, 106b, and 106c. As will be described in more detail below, holes of different cross-sectional areas can be combined in different ways for different applications. Each group of holes 107a and 107b may be identical, i.e., containing the same number of holes, having the same cross-sectional area, and arranged in the same relative positions, or the groups may be different in other applications.
[0033] In the illustrated embodiment, hole 106 has a circular cross-section, but other cross-sections, such as elliptical or square, may also be used.
[0034] Next, refer to Figure 1c A standard group III nitride LED structure is grown on the exposed region of a GaN layer 100. However, because only discrete regions of the GaN layer 100 are exposed through micro-holes 106 in the dielectric layer or mask, the LED structure is formed as an array of discrete LEDs 108 separated by the remainder of the dielectric layer 104 between the micro-holes 106. The LED structure 108 is grown using MOVPE or MBE techniques or any other suitable growth technique. Growth occurs upwards from the exposed region of the GaN (or other semiconductor) layer, rather than from the sidewalls of the holes 106. Therefore, a layered LED structure can be built inside each hole 106, where each layer is substantially planar or planar. The LED structure may include an n-GaN layer 110, an InGaN front layer, an active region 112, a thin p-type AlGaN layer (not shown) as a barrier layer, and then a final p-doped GaN layer 114. The active region 112 may include multiple InGaN-based quantum wells (MQWs). (See below for reference.) Figure 2 An example of an LED structure is described in more detail. As mentioned above, due to the dielectric mask 104, the LED structure can be grown only within the micro-hole 106, such as... Figure 1c As shown, this forms a μLED array. Each LED structure 108 will substantially fill the hole 106 grown therein. Therefore, the LEDs comprise multiple groups (three groups in the illustrated example) of LEDs with different cross-sectional areas and thus different emission characteristics. Here, cross-sectional area refers to the area in a plane perpendicular to the approximate growth direction of the LED structure. This is typically substantially constant at the height of the LED structure 108. For example, there may be a first group of LED structures 108a with the largest cross-sectional area, a second group of LED structures 108b with a smaller cross-sectional area than the first group, and a third group of LED structures 108c with an even smaller cross-sectional area. Each group of LEDs is arranged in a regular array in the dielectric layer 104. For example, each group of LEDs may be arranged in a rectangular array or any other shape. The rectangular or other shape arrays may all have the same spacing but may be offset from each other (e.g., ...). Figure 1c As shown in the diagram, each LED from one group forms a group with one LED from each of the other groups. In other arrangements requiring different groups of LEDs, the different groups of LEDs can be arranged in different types of arrays. Each group of LEDs can be identical, i.e., containing the same number of LEDs, having the same cross-sectional area, and arranged in the same relative positions, or in other applications these groups can be different.
[0035] Importantly, the topmost layer of the InGaN MQW 112 should not extend above the upper surface of the dielectric layer 104. Otherwise, this could lead to short-circuit effects after the stencil is fabricated into the final μLED array. Equally important is that the overgrown n-GaN 110 in each microvia region directly contacts the n-GaN layer 100 within the unetched portion of the stencil below the dielectric mask 104, such that all individual μLEDs are electrically connected to each other through the n-GaN layer 100 in the unetched portion below the dielectric mask 104.
[0036] refer to Figure 1d Once the LED array structure is completed, further device fabrication is carried out, including the formation of electrical contacts for the array. For example, an upper contact layer 116 can be formed on the dielectric mask layer 104 and on the upper p-GaN layer of the individual micro-LED devices 108. The upper contact layer 116 thus forms a common p-contact for all LED devices 108. The upper contact layer 116 can be formed of ITO or a Ni / Au alloy. The anode 118 can then be formed on the p-contact layer 116. For example, a portion of the dielectric layer 104 can be etched away, and subsequently, a portion of the LED structure on the etched dielectric layer segment can also be etched down to the n-GaN, thereby exposing region 120 of the n-GaN layer 100 and the cathode 122 formed on this exposed region 120 of the n-GaN.
[0037] The microLED structures produced in this manner exhibit several unique characteristics not found in existing microLEDs. Under the same growth conditions, microLEDs with different diameters can exhibit different emission wavelengths. This is due to a combination of several mechanisms. First, the growth rate of the InGaN / GaN multiple quantum wells (MQWs), which serve as the emission regions in the microLEDs grown within micro-holes, depends on the micro-hole diameter. Different thicknesses of the InGaN MQWs result in different emission wavelengths. Second, the indium doping rate of the InGaN / GaN MQWs also depends on the micro-hole diameter. Different indium contents cause differences in the emission wavelengths of the InGaN / GaN MQWs. Third, the strain relaxation of the InGaN / GaN MQWs along the lateral direction depends on the micro-hole diameter, also causing differences in the emission wavelengths. Therefore, for example, under optimized growth conditions, three groups of microLEDs with three different diameters in each group can emit red, blue, and green light. If two microLEDs with different diameters are present in each group, they can emit blue and yellow light. If four microLEDs with different diameters are present in each group, they can emit red, blue, green, and yellow light. In each of these cases, white light can be generated from each group of LEDs. The color rendering index and color temperature can be adjusted by adding additional micro-LEDs. For example, to increase the color temperature, each group can include two micro-holes of the same diameter for long emission wavelengths (such as green, yellow, or red) and two other micro-holes with different diameters. To decrease the color temperature, each group can include two micro-holes of the same diameter for short emission wavelengths (such as blue) and two other micro-holes with different diameters.
[0038] For example, see the following reference. Figures 5a to 5c The experiments discussed have shown that blue light is emitted in each array of μLEDs with a diameter of 10 μm, green light in each array of μLEDs with a diameter of 20 μm, and red light in each array of μLEDs with a diameter of 30 μm. These microLEDs were obtained by growing them in micropores with corresponding different diameters under the same conditions and in the same growth run.
[0039] The wavelength of light can be selected according to the requirements of any specific application, and thus the cross-sectional area of different groups of LEDs can be chosen. Although there are typically considerable differences between the wavelengths of different groups of LEDs and therefore between the cross-sectional areas, the photolithography process for forming the aperture 106 is very precise, and therefore for micrometer-scale LEDs, it is possible to produce cross-sectional area differences as low as, for example, 2% or even 1%.
[0040] It should be understood that various modifications can be made to the above embodiments. For example, in one modification, the structure is reversed, wherein a p-GaN layer is grown on a substrate and covered by a dielectric layer, and then the p-GaN layer of the LED device 108 is first formed, followed by the formation of a plurality of quantum well layers, and then the formation of an n-GaN layer. An n-contact layer is then formed on top of the dielectric layer instead of the p-contact layer, and the positions of the anode and cathode are reversed.
[0041] exist Figures 1a to 1d In this configuration, the overgrown n-GaN 110 within the microvia 106 must match the unetched portion of the n-GaN layer 100 beneath the dielectric mask 104, such that all individual μLEDs 108 are electrically connected to each other through the n-GaN layer 100. Instead of using the unetched portion of the n-GaN 100 beneath the dielectric mask 104 as the electrical connection channel, in another embodiment, a group III nitride heterostructure with a two-dimensional electron gas (2DEG) at the heterojunction is used as the semiconductor layer, instead of an n-GaN layer. In this embodiment, a standard AlGaN / GaN HEMT structure is used. The electron gas (2DEG) with high substrate density and high electron mobility formed at the interface between the GaN buffer and the AlGaN barrier of the high electron mobility transistor (HEMT) structure is used as the electrical connection channel.
[0042] To fabricate such a device, a standard AlGaN / GaN HEMT structure is initially grown on a GaN substrate or any heterogeneous substrate such as sapphire, Si, SiC, or even glass using any standard GaN growth method employing MOVPE or MBE techniques or any other epitaxial technique. For example, a GaN layer forming a buffer layer can be grown on the substrate, and then an AlGaN layer forming a barrier layer can be grown on top of the GaN layer. This structure is referred to herein as a “native HEMT template.” Subsequently, a dielectric layer (such as SiO2 or SiN, or any other dielectric material, for example, having a thickness in the range of 2 nm to 500 µm) is deposited on the native HEMT template using PECVD or any other suitable deposition technique. The resulting structure will be coupled with… Figure 1aThe structure shown is the same, but the HEMT structure replaces the n-GaN layer 100. Subsequently, the dielectric layer is etched down to the surface of the HEMT structure using photolithography, followed by an etching process (either dry or wet etching) to form an array of microvias within the dielectric layer. The microvia diameter can range from 1µm to 500µm, and the pitch between adjacent aperture centers can range from 10µm to 500µm. The remaining area of the dielectric layer can be used as a mask to perform further etching of the native HEMT within the microvia region. Depending on the AlGaN barrier location of the native HEMT template, the native HEMT etching depth can range from zero (meaning no etching) to 10µm. However, overall, the etching will extend down at least as far as the heterogeneous interface between the two layers of the native HEMT structure to provide good electrical contact between each LED structure and the 2DEG.
[0043] Next, using MOVPE or MBE technology or any other epitaxial technology (e.g., as referenced above) Figure 1c (as described) and the provided contacts (e.g., as referenced above). Figure 1d (As described) standard group III nitride LED structures are grown on a HEMT template with a dielectric mask pattern featuring micropores. (And) Figures 1a to 1d Similar to the previous embodiment, the key point is that the upper surface of the InGaNMQW 212 should be below the upper surface of the dielectric layer 204 in order to avoid short-circuit effects after the final µLED array is fabricated.
[0044] refer to Figure 2 , Figures 1a to 1d The LED structure in the LED array can have any suitable structure and will typically include multiple layers. In one example, they may include an n-GaN layer 210, an InGaN front layer 216 formed on the n-GaN layer 210, multiple InGaN quantum well layers 212 formed on the front layer 216, a p-doped barrier layer 218 of, for example, p-AlGaN, and a subsequent p-GaN layer 214. It should be understood that the structure can be modified in various ways. As mentioned above, it is preferred that the top of the uppermost one of the quantum well layers 212 is below the top of the dielectric layer. It is also preferred that the top of the barrier layer 218 is also below the top of the dielectric layer.
[0045] Return to reference Figures 1a to 1dIn the embodiments shown in these figures, several small groups 107a, 107b of LEDs are treated as large groups of LEDs, including LEDs from each of the three sets of holes 106a, 106b, 106c, which are covered by a single contact layer 116. This creates a single area that can be opened and closed using contacts 118 to produce a white light source. However, it should be understood that LEDs of different sizes and their switching contacts can be arranged in various different ways depending on the application.
[0046] refer to Figure 3 In which the LED structure is to be with Figures 1a to 1d In an arrangement similar to that of LED structures, each of LED groups 307a and 307b has three LEDs 306a, 306b, and 306c, each with a different cross-sectional area and therefore a different emission spectrum and peak wavelength. Each group 307a and 307b may have corresponding contact layer regions 316a and 316b extending above it, allowing for individual contacts for each group of LEDs. This allows each group of LEDs to be turned on and off independently of the other groups. This can be useful, for example, in monochrome displays (e.g., white displays).
[0047] refer to Figure 4 Each LED can have a separate contact layer 416a, 416b, 416c extending thereon, so that each LED can be activated independently of the other LEDs. This arrangement can be used, for example, in a color display, where each pixel can be illuminated in red, green, or blue.
[0048] refer to Figure 5a , Figure 5b and Figure 5c As mentioned above Figures 1a to 1d The diagram describes the production of arrays of micro-LEDs, but in each case, all LEDs in each array have the same diameter: one array has LEDs with a diameter of 10 µm, one has LEDs with a diameter of 20 µm, and one has LEDs with a diameter of 30 µm. The electroluminescence of each LED array was measured, and the results are shown in the figure. It can be seen that the 10 µm diameter LED has a peak wavelength at approximately 500 nm and emits blue light; the 20 µm diameter LED has a peak wavelength at approximately 520 nm and emits green light; and the 30 µm diameter LED has a peak wavelength at approximately 610 nm and emits red light. It should be understood that adjustments such as… Figure 1c The diameters of different LEDs in a multi-color array are varied to achieve different color combinations.
Claims
1. An LED array, comprising: Semiconductor layer; A dielectric layer extends on the semiconductor layer, and the dielectric layer has an array of holes passing through it; An array of LED structures, each LED structure being formed only in a corresponding aperture, and each LED structure having a cross-sectional area defined by the cross-sectional area of the corresponding aperture, the array of LED structures comprising at least a first LED type arranged to emit light having a first peak wavelength and a second LED type arranged to emit light having a second peak wavelength different from the first peak wavelength; as well as The contact architecture includes a common electrode and at least two independently drivable contact networks, a first contact network electrically connected to the first LED type and a second contact network electrically connected to the second LED type, such that the first LED type and the second LED type can be selectively activated independently of each other.
2. The LED array according to claim 1, wherein, The array of LED structures also includes a third type of LED that emits light with a third peak wavelength that is different from the first peak wavelength and the second peak wavelength.
3. The LED array according to claim 1, wherein, The array of LED structures includes a regular array of LED structures of the first type of LED and a regular array of LED structures of the second type of LED.
4. A method for manufacturing a light-emitting diode (LED) array, the method comprising: Forming a semiconductor layer; A dielectric mask layer is formed on the semiconductor layer, the dielectric mask layer having an array of holes passing through it, each hole exposing a corresponding region of the semiconductor layer, the array of holes including a first set of holes and a second set of holes, each hole in the first set of holes exposing a first region, and each hole in the second set of holes exposing a second region different from the first region. as well as An LED structure is grown only in each hole, and the LED structure is defined by the corresponding area exposed by the hole.
5. The method according to claim 4, wherein, Each LED structure includes at least one activation layer.
6. The method according to claim 5, wherein, The upper surface of the at least one activation layer is located below the top of the dielectric mask layer.
7. The method according to claim 4, wherein, The first region is at least 1% larger than the second region.
8. The method according to any one of claims 4 to 7, wherein, The array of holes also includes a third set of holes, each of which exposes a third region that is different from the first region and the second region.
9. An LED array comprising a semiconductor layer, a dielectric layer extending on the semiconductor layer, an array of LED structures extending through holes in the dielectric layer, and a plurality of contacts. in, The LED structure includes: The first group of LED structures, wherein each LED structure has a first cross-sectional area; The second group of LED structures, wherein each LED structure has a second cross-sectional area different from the first cross-sectional area; Each LED structure extending through the corresponding hole includes an activation region having a cross-sectional area defined by the cross-sectional area of the corresponding hole; The LED structures are arranged in multiple groups, and each group of LED structures includes at least one LED structure from each group of LED structures; and Each of the contacts is connected to a corresponding group of the LED structure, so that each group of the LED structure can be activated independently of the other groups of the LED structure.
10. The LED array according to claim 9, wherein, Each group of LED structures includes only one LED structure from the group of LED structures.
Citation Information
Patent Citations
LED Arrays
GB201816455D0