Method and device for rapidly extracting moire fringe alignment deviation based on graphics processor

Abstract

The invention provides a method, a device and equipment for rapidly extracting a moire fringe alignment deviation based on a graphics processor, and the method comprises the steps: receiving two groups of moire fringe signals which are obtained by analyzing two groups of moire fringe patterns representing an alignment state; performing parallel collaborative fast Fourier transform on the two groups of moire fringe signals by using a graphics processor to respectively obtain frequency domain representations corresponding to the two groups of moire fringe signals; calculating to obtain a frequency spectrum function representing the phase deviation of the two groups of moire fringe signals based on the two groups of frequency domain representations by using a graphics processor; wherein the frequency spectrum function is used for determining the phase deviation between the two groups of moire fringe signals, and the phase deviation is used for representing the alignment deviation.

Description

Technical Field

[0001] This disclosure relates to the field of signal processing, and specifically to a method, apparatus, and device for rapid extraction of moiré fringe alignment deviation based on a graphics processor. Background Technology

[0002] Semiconductor lithography is the core process of modern integrated circuit manufacturing, and alignment technology is the key link to ensure nanometer-level precise positioning between the mask and the silicon wafer, which directly affects chip performance and yield.

[0003] Phase measurement methods based on moiré fringes can achieve nanometer-level alignment accuracy and possess good anti-interference capabilities by analyzing the interference fringes generated by the superposition of a mask and a grating on a silicon wafer. However, traditional moiré fringe measurement methods face challenges due to their slow speed, while high-speed measurements require rapid data processing capabilities. To improve the alignment speed of moiré fringes and significantly reduce alignment time to meet the throughput requirements of equipment, many studies have focused on rapidly optimizing the Fast Fourier Transform (FFT), a key technology for phase deviation extraction in moiré fringe image processing. However, this often sacrifices measurement accuracy while increasing speed, making it only suitable for industrial inspection scenarios with low accuracy requirements. Summary of the Invention

[0004] (a) Technical problems to be solved

[0005] In view of the above problems, this disclosure provides a method, apparatus and device for rapid extraction of moiré fringe alignment deviation based on a graphics processor, so as to at least partially solve the technical problem that the prior art cannot achieve both high measurement accuracy and high processing speed in the alignment process.

[0006] (II) Technical Solution

[0007] This disclosure provides a method for fast extraction of moiré fringe alignment deviation based on a graphics processor, comprising: receiving two sets of moiré fringe signals, wherein the moiré fringe signals are obtained by analyzing two sets of moiré fringe patterns representing the alignment state; performing parallel and coordinated fast Fourier transform on the two sets of moiré fringe signals using a graphics processor to obtain the frequency domain representations corresponding to the two sets of moiré fringe signals respectively; and calculating, using the graphics processor, a spectral function characterizing the phase deviation of the two sets of moiré fringe signals based on the two sets of frequency domain representations; wherein the spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation between the mask and the substrate.

[0008] According to embodiments of this disclosure, the two sets of moiré fringe signals have the same length and are obtained by averaging the pixel values ​​of the moiré fringe pattern along a direction perpendicular to the moiré fringe.

[0009] According to embodiments of this disclosure, before performing a parallel and coordinated Fast Fourier Transform on two sets of moiré fringe signals using a graphics processor, the method further includes: allocating contiguous storage space for the two sets of moiré fringe signals in the global memory of the graphics processor; and transferring the configuration information required for the Fast Fourier Transform and the two sets of moiré fringe signals stored in the host-side memory to the allocated storage space, wherein the configuration information includes at least the total number of computational stages of the Fast Fourier Transform determined according to the length of the moiré fringe signals.

[0010] According to embodiments of this disclosure, a parallel-coordinated Fast Fourier Transform is performed on two sets of moiré fringe signals using a graphics processing unit (GPU) to obtain the frequency domain representations corresponding to each set of moiré fringe signals. This includes: configuring and starting a parallel computing kernel on the GPU; scheduling one or more thread blocks in the parallel computing kernel; wherein each thread in the thread block is configured to process a signal data point of the moiré fringe signal; and controlling each thread to synchronously perform multi-level butterfly operations on the two sets of moiré fringe signals through the parallel computing kernel to obtain the frequency domain representations corresponding to each set of moiré fringe signals.

[0011] According to embodiments of this disclosure, a parallel computing kernel controls each thread to synchronously execute multi-level butterfly operations on two sets of moiré fringe signals. This includes: for the i-th level butterfly operation, based on the partitioning rules determined by the current level i and the global index of each thread, dividing the signal data points of each set of moiré fringe signals into odd sequence subsets and even sequence subsets, where i is a positive integer; according to the partitioning rules, each thread determines the signal data points it processes and their corresponding odd or even sequence subset, and determines a partner thread paired with the thread in the i-th level butterfly operation, so that they can collaborate and synchronously execute one butterfly operation; after each thread completes the i-th level butterfly operation, a thread synchronization mechanism enables all threads to jointly enter the (i+1)-th level operation.

[0012] According to embodiments of this disclosure, the parallel and coordinated fast Fourier transform of two sets of moiré fringe signals using a graphics processor further includes: pre-storing complex rotation factors required during the fast Fourier transform in the shared memory of the graphics processor, so as to read the corresponding rotation factors from the shared memory for fast Fourier transform.

[0013] According to embodiments of this disclosure, a spectrum function characterizing the phase deviation of two sets of moiré fringe signals is calculated using a graphics processor based on two sets of frequency domain representations. This includes: performing cross-power spectrum analysis on the two sets of frequency domain representations in the graphics processor to obtain cross-power spectrum data, which is used to characterize the frequency domain correlation between the two sets of moiré fringe signals; and extracting the phase information corresponding to each frequency component in the cross-power spectrum data to form a spectrum function of the phase deviation as a function of frequency.

[0014] According to embodiments of this disclosure, the phase deviation between two sets of moiré fringe signals is determined by obtaining the phase value at the corresponding frequency from the spectrum function based on the pre-calibrated spatial frequency of the moiré fringe.

[0015] Another aspect of this disclosure provides a fast extraction device for moiré fringe alignment deviation based on a graphics processor, comprising: an acquisition module for receiving two sets of moiré fringe signals, wherein the moiré fringe signals are obtained by analyzing two sets of moiré fringe patterns representing the alignment state; a transformation module for performing parallel and coordinated fast Fourier transforms on the two sets of moiré fringe signals using the graphics processor to obtain frequency domain representations corresponding to each of the two sets of moiré fringe signals; and a calculation module for calculating a spectral function characterizing the phase deviation of the two sets of moiré fringe signals based on the two sets of frequency domain representations using the graphics processor; wherein the spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation between the mask and the substrate.

[0016] This disclosure also provides an electronic device, comprising: a host processor for acquiring two sets of moiré fringe patterns representing an alignment state, and parsing the two sets of moiré fringe patterns to obtain corresponding moiré fringe signals; a graphics processor connected to the host processor; and a storage device configured to store one or more computer programs; when the graphics processor executes one or more programs, it causes the graphics processor to perform the following methods: receiving the two sets of moiré fringe signals; using the graphics processor to perform parallel coordinated fast Fourier transforms on the two sets of moiré fringe signals to obtain frequency domain representations corresponding to the two sets of moiré fringe signals respectively; and using the graphics processor to calculate a spectral function characterizing the phase deviation of the two sets of moiré fringe signals based on the two frequency domain representations; wherein the spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation between the mask and the substrate.

[0017] (III) Beneficial Effects

[0018] The method, apparatus, and device for rapid extraction of moiré fringe alignment deviation based on a graphics processor disclosed herein have at least the following technical advantages:

[0019] 1. By utilizing the parallel computing architecture and thread block mechanism of the Graphics Processing Unit (GPU), the butterfly operation of serial iteration in the traditional FFT is transformed into large-scale parallel synchronous execution, which fundamentally solves the time-consuming problem caused by the step-by-step iterative calculation in the traditional method and greatly improves the overall computational efficiency of the phase extraction algorithm.

[0020] 2. Relying on the massive parallel computing cores provided by the GPU, all signal data can complete the butterfly operation synchronously in each loop, thereby reducing the time complexity of the traditional FFT algorithm from O(NlogN) to the O(logN) level. This advantage is particularly significant when processing longer moiré fringe signals, providing a foundation for high-speed real-time alignment.

[0021] 3. By using a fixed mapping between GPU threads and signal data, and a pre-defined odd / even sequence partitioning rule, the redundant function iteration calls and runtime condition checks in traditional algorithms are eliminated, further reducing computational latency. Simultaneously, the continuous device memory allocation strategy ensures the continuity of memory access, improving data reading efficiency.

[0022] 4. The Fast Fourier Transform algorithm, after parallelization design and memory access optimization, requires very little additional storage space. It only needs logarithmic complex variables and simple control variables, and these variables can be placed in the shared memory of GPU thread blocks, which greatly reduces the frequency of access to high-latency global memory, effectively utilizes the limited memory bandwidth of the GPU, and optimizes data access. Attached Figure Description

[0023] To gain a more complete understanding of this disclosure and its advantages, reference will now be made to the following description taken in conjunction with the accompanying drawings, wherein:

[0024] Figure 1 The flowchart of the method for rapid extraction of moiré fringe alignment deviation based on a graphics processor provided in an embodiment of the present disclosure is illustrated schematically.

[0025] Figure 2 This schematic diagram illustrates the overall framework of the graphics processor-based method for rapid extraction of moiré fringe alignment deviation provided in an embodiment of the present disclosure.

[0026] Figure 3 The schematic diagram illustrates the structure of a graphics processor-based rapid extraction device for moiré fringe alignment deviation provided in an embodiment of this disclosure.

[0027] Explanation of reference numerals in the attached figures:

[0028] 1-Host side;

[0029] 2-Graphics Processor (Device Side);

[0030] 3- GPU thread block;

[0031] 4-Moiré fringe signal;

[0032] 5-Equipment-side signal data;

[0033] 6 - Signal data for completing the butterfly operation;

[0034] 7 - Signal data after completing the conjugate dot product calculation;

[0035] 8-Spectrum function;

[0036] 9-Phase deviation. Detailed Implementation

[0037] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0038] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0039] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0040] The accompanying drawings show some block diagrams and / or flowcharts. It should be understood that some blocks or combinations thereof in the block diagrams and / or flowcharts can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing system, so that when executed by the processor, these instructions can create a system for implementing the functions / operations described in these block diagrams and / or flowcharts.

[0041] Research has revealed that high-precision alignment technology based on moiré fringes utilizes the interference of two overlapping gratings on a mask and a silicon wafer to generate moiré fringes. A phase analysis algorithm is used to extract phase information from the fringe image to indirectly obtain the offset information between the mask and the wafer, achieving precise alignment. This improves alignment accuracy from the sub-micron level to the nanometer level, while also exhibiting good process adaptability and strong anti-interference capabilities. However, traditional moiré fringe measurement methods face challenges due to their slow speed, and high-speed measurement requires rapid data processing capabilities. Improving alignment speed is crucial for measurement systems to better and faster adapt to rapidly changing process and production demands. To enhance the alignment speed of moiré fringes and significantly reduce alignment time to meet equipment throughput requirements, numerous studies have focused on rapidly optimizing Fourier transform—a key technology for phase deviation extraction in moiré fringe image processing. Traditional Fast Fourier Transform (FFT) is suitable for static measurement of uniform fringes. While FFT accelerated using deep learning is more than 10 times faster than traditional Discrete Fourier Transform (DFT), its real-time phase difference measurement accuracy decreases, making it suitable only for industrial inspection.

[0042] To overcome the problems in the above-mentioned technologies and improve the speed of moiré fringe alignment while maintaining high accuracy, this disclosure provides a method, apparatus and device for fast extraction of moiré fringe alignment deviation based on a graphics processor. It achieves nanometer-level positioning accuracy and millisecond-level response speed by using the fast Fourier transform, a key component in the phase extraction algorithm, for GPU calculation. That is, by utilizing the fast parallel computing capability of the GPU, using the pixels of the upper and lower moiré fringe patterns as the unit, a speedup ratio of several times that of traditional CPUs can be achieved.

[0043] like Figure 1 As shown, the flowchart of the method for rapid extraction of moiré fringe alignment deviation based on graphics processor includes S1~S4.

[0044] In operation S1, two sets of moiré fringe signals are received. The moiré fringe signals are obtained by analyzing the two sets of moiré fringe patterns that represent the alignment state.

[0045] The host computer can read raw image data representing the current alignment state from the image sensor or storage device. This data contains two spatially separated sets of two-dimensional moiré fringe patterns, each generated by the interference of alignment marks on the mask and substrate. The periodic distribution of the bright and dark fringes directly encodes the relative positional deviation between the two. The host computer can then analyze the two sets of patterns separately, converting them into one-dimensional discrete signal sequences of equal length. For example, for a set of bright and dark fringe patterns of 1024×512 pixels, with each pixel corresponding to a grayscale value of 0~255, an arithmetic average of the 512 pixel grayscale values ​​in each column can yield a 1024×1 one-dimensional signal array. This array presents a sinusoidal pattern on the image, thus forming the corresponding one-dimensional moiré fringe signal. The host computer can then transmit the two sets of moiré fringe signals to the graphics processor (GPU), where they are received. In operation S2, the graphics processor is used to perform parallel and coordinated fast Fourier transform on the two sets of moiré fringe signals to obtain the frequency domain representations of the two sets of moiré fringe signals respectively.

[0046] The two sets of analytically obtained moiré fringe signal data are loaded into the GPU. Using the architecture of the GPU's massively parallel stream processor, batch and parallel fast Fourier transform calculations are performed on the two sets of one-dimensional signals to quickly obtain the one-dimensional frequency domain representation (i.e., spectrum) of each set of signals.

[0047] In operation S3, the graphics processor is used to calculate the spectral function representing the phase deviation of the two sets of moiré fringe signals based on the two sets of frequency domain representations.

[0048] In a GPU, further parallel computation can be performed using two sets of frequency domain data. Through specific frequency domain operations (such as cross-power spectrum analysis), a spectral function that can directly characterize the relative phase deviation between the two sets of moiré fringe signals can be calculated to extract the core of the alignment deviation and transform the spatial positional offset information into a precisely measurable phase difference in the frequency domain.

[0049] The spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation between the mask and the substrate.

[0050] By performing inverse transform or phase unwrapping (to further ensure phase continuity) on the phase deviation spectrum function, the precise phase deviation values ​​corresponding to the two sets of moiré fringe signals in the spatial domain can be extracted. These phase deviation values ​​have a linear or deterministic relationship with the actual alignment deviation between the mask and the substrate. Based on the phase deviation... With alignment offset The relationship between them: ( (where is the average period of the two gratings), which can output the lateral or longitudinal alignment deviation between the mask and the substrate in real time, so that the alignment system can provide high-precision detection results.

[0051] Understandably, by setting the computationally intensive FFT and subsequent frequency domain analysis tasks to be processed in parallel on the GPU, millisecond-level real-time processing of the moiré fringe alignment signal is achieved. Compared with the traditional CPU serial processing method, the speed is significantly improved, thereby increasing the production throughput of the lithography machine.

[0052] In the embodiments of this disclosure, the two sets of moiré fringe signals have the same length and are obtained by averaging the pixel values ​​of the moiré fringe pattern along a direction perpendicular to the moiré fringe.

[0053] To efficiently extract alignment information and adapt to subsequent GPU-based frequency domain processing, dimensionality reduction and signal enhancement can be performed on each set of 2D patterns on the host side. Specifically, firstly, the pattern is scanned along a direction perpendicular to the fringe period (e.g., the sensitive measurement direction corresponding to alignment deviation) based on the direction of the moiré fringes. Then, the pixel grayscale values ​​of each row (or column) of the pattern in this direction are arithmetically averaged to compress redundant spatial information perpendicular to the fringe direction in the 2D image, while retaining complete periodic phase information along the fringe direction, effectively improving the signal-to-noise ratio. Through the above averaging calculation, each set of 2D moiré fringe patterns is transformed into a one-dimensional discrete signal sequence. Each point in this sequence represents the average light intensity of the original pattern at a position perpendicular to the fringe direction.

[0054] To ensure optimal computational efficiency and accuracy in the subsequent Fast Fourier Transform, the generated one-dimensional signal can be normalized, for example, through length constraints and data format conversion. The length constraint ensures that the two generated one-dimensional signals have the same length L, and that L is constrained to be an integer power of 2, i.e., L=2. M Where M is a positive integer, this allows the use of the most efficient radix-2 Fast Fourier Transform algorithm. Data format conversion converts the signal data into a floating-point format (such as float32) suitable for GPU computing.

[0055] Understandably, by preprocessing the moiré fringe pattern, the original two-dimensional image information is accurately and efficiently resolved into two sets of one-dimensional moiré fringe signals with standardized lengths and optimized signal-to-noise ratios. This prepares the data for GPU-based fast frequency domain analysis, while preserving the core alignment phase information and greatly reducing the amount of data to be processed.

[0056] Based on the above embodiments, in this embodiment, before using the graphics processor to perform parallel and coordinated fast Fourier transform on the two sets of moiré fringe signals, the method further includes: allocating contiguous storage space for the two sets of moiré fringe signals in the global memory of the graphics processor; transmitting the configuration information required for the fast Fourier transform and the two sets of moiré fringe signals stored in the host memory to the allocated storage space, wherein the configuration information includes at least the total number of operation stages of the fast Fourier transform determined according to the length of the moiré fringe signals.

[0057] In the GPU's global memory, contiguous storage space can be pre-allocated for the two sets of moiré fringe signals to be processed. The size of this space can be calculated based on the signal length L, and an alignment allocation strategy can be adopted to meet the GPU's "merged access" requirement, ensuring that subsequent thread accesses to global memory in the kernel can be merged into efficient large memory transactions, maximizing memory bandwidth utilization. Then, the two sets of one-dimensional moiré fringe signal data stored in the host memory, along with the simplified configuration information required for computation, can be transferred in batches to the pre-allocated area of ​​the GPU's global memory via a high-speed bus (such as PCIe). The configuration information can include the total number of Fast Fourier Transform (FFT) operation stages M, determined based on the signal length L, which defines the total number of iterations required for the FFT butterfly operation.

[0058] Understandably, by using contiguous memory allocation and streamlined parameter transfer, the communication overhead between the host and the device is minimized, and the parallel computing potential of the GPU is fully utilized.

[0059] Based on the above embodiments, in this embodiment, a parallel and coordinated fast Fourier transform is performed on two sets of moiré fringe signals using a graphics processor to obtain the frequency domain representations corresponding to each set of moiré fringe signals. This includes: configuring and starting a parallel computing kernel on the graphics processor; scheduling one or more thread blocks in the parallel computing kernel; wherein each thread in the thread block is configured to process a signal data point of the moiré fringe signal; and controlling each thread to synchronously perform multi-level butterfly operations on the two sets of moiré fringe signals through the parallel computing kernel to obtain the frequency domain representations corresponding to each set of moiré fringe signals.

[0060] The specific parallel execution logic of FFT can be implemented in the GPU's parallel computing kernel. The host side can calculate the required thread block grid size based on the total signal length L and GPU hardware characteristics (such as the maximum number of threads per thread block, blockDim.x). If L > blockDim.x, the computation task can be distributed across multiple thread blocks for parallel execution, but the global thread is still used for dividing the parity sequence by thread ID and performing butterfly operations. Furthermore, the crucial parity sequence division rule for data points in butterfly operations is not in the form of transferable data, but rather as fixed algorithmic logic, hard-coded into the parallel computing kernel's program code. The basis for each iteration's division judgment is related to the global thread index and the iteration level. This logic is dynamically executed at runtime through bitwise operations (e.g., judging based on (global thread index & (1 << (current level - 1))) == 0), allowing the same kernel to adapt to signals of different lengths without requiring any instruction set or lookup table related to data sorting, greatly simplifying parameter transmission and improving the kernel's versatility.

[0061] Based on the calculated grid and thread block sizes, along with necessary parameters including the number of operation stages M, the host machine can launch a configured parallel computing kernel. This kernel can schedule one or more thread blocks to execute on the GPU's Streaming Multiprocessor (SM). In this process, each thread block is designed to process a continuous segment of the signal. Each thread within a thread block is precisely configured to handle a specific data point in the moiré fringe signal. If the signal length L is large, multiple thread blocks work together to ensure that all L data points are processed by a corresponding thread. Simultaneously, based on the FFT algorithm's requirements for shared memory and registers, appropriate resources can be allocated to each thread block to accelerate data exchange and temporary storage between threads.

[0062] After the kernel boots, all threads on the GPU execute the FFT algorithm defined by the kernel code in parallel. The core of the algorithm can be an M-level synchronous butterfly operation based on the Cooley-Tukey algorithm. During this execution, each thread, according to its global thread ID, reads the corresponding data points from the two sets of signals it is responsible for from the GPU's global memory and loads them into fast on-chip memory (such as registers or shared memory). At this point, the original data from the two sets of signals is completely mapped to the parallel threads. The algorithm can then enter an iterative loop (i.e., "M-time loop") controlled by the total number of operation levels M.

[0063] Based on the above embodiments, in this embodiment, a parallel computing kernel is used to control each thread to synchronously perform multi-level butterfly operations on two sets of moiré fringe signals. This includes: for the i-th level butterfly operation, based on the partitioning rules determined by the current level i and the global index of each thread, the signal data points of each set of moiré fringe signals are divided into odd sequence subsets and even sequence subsets, where i is a positive integer; according to the partitioning rules, each thread determines the signal data points it processes and the odd or even sequence subset to which they belong, and determines the partner thread paired with the thread in the i-th level butterfly operation, so as to cooperate with the partner thread to synchronously perform one butterfly operation; after each thread completes the i-th level butterfly operation, the thread synchronization mechanism enables all threads to enter the (i+1)-th level operation together.

[0064] In each loop (corresponding to the i-th level operation, where i ranges from 1 to M), all threads collaboratively perform the following operations under the GPU's hardware synchronization mechanism: First, for the i-th level butterfly operation, based on the bit-operation-based partitioning rules hard-coded in the kernel, the signal data points of each group of signals are dynamically divided into odd sequence subsets and even sequence subsets. Second, each thread, based on its global thread index (ID), dynamically determines whether the signal data points it processes in this level operation belong to the odd sequence subset or the even sequence subset, according to the partitioning rules hard-coded in the kernel. Then, according to the same partitioning rule, each thread determines its partner thread for the butterfly operation in this level. The paired threads (one processing even sequence points, and the other processing odd sequence points) synchronously execute one butterfly operation, which simultaneously performs complex multiplication and addition calculations on the corresponding data points in the upper and lower signal groups, utilizing the GPU's single instruction multiple data architecture to complete the calculation of two groups of signals in one operation. After completing all butterfly operations in the i-th level, the barrier synchronization mechanism within the thread block ensures that all threads have completed data updates. After that, all threads jointly enter the (i+1)th level operation.

[0065] After completing all M-level butterfly operations, the data points held by each thread have been transformed from the time domain to the frequency domain. Each thread can then write its final calculation result (i.e., the frequency domain complex representation) back to the pre-allocated output area in the GPU's global memory. Finally, in the output area, two sets of frequency domain representations of length L, corresponding one-to-one with the input signals, are obtained.

[0066] Understandably, by using a "one thread, one data" mapping and hierarchical butterfly operations, the algorithm fully exposes the inherent, regular parallelism of FFT computation to the GPU hardware, achieving saturated utilization of computing resources. Simultaneously, through hardware thread synchronization mechanisms (rather than the CPU's serial loop), it ensures simultaneous computation of all data pairs in each butterfly operation level, achieving high speed.

[0067] Based on the above embodiments, in this embodiment, the parallel and coordinated fast Fourier transform of two sets of moiré fringe signals using a graphics processor further includes: pre-storing the complex rotation factors required in the fast Fourier transform process in the shared memory of the graphics processor, so as to read the corresponding rotation factors from the shared memory to perform the fast Fourier transform.

[0068] Complex twiddle factors are important complex multipliers in the FFT butterfly operation, and their values ​​can be determined by the signal length and the number of operation stages. In this embodiment, a pre-computation and on-chip storage strategy can be adopted, that is, before the GPU parallel computing kernel starts or during the initialization phase, all complex twiddle factors required for all M-stage operations are pre-computed based on the total signal length L. Then, the pre-computed complex twiddle factor table can be stored in the shared memory of the graphics processor. Shared memory is a high-speed, low-latency storage space on the GPU chip, with access speed much higher than global memory, but its capacity is limited. Since the total number of twiddle factors is controllable (related to M, much smaller than the signal data volume L), placing them in shared memory is feasible and efficient.

[0069] During each butterfly operation, each thread can read the rotation factor from shared memory as needed. In this process, each thread determines the rotation factor index it needs for its current butterfly operation by using simple calculations (such as modulo or bitwise operations) based on its global thread ID and the current operation level i. Since all threads' required rotation factors are stored in the same table in shared memory, and the access patterns are consistent, the GPU can utilize shared memory's broadcast mechanism or low-conflict access mode to allow multiple threads within a single thread bundle to simultaneously read the required rotation factor values ​​with extremely low latency. Finally, after a thread reads the corresponding rotation factor from shared memory, it can immediately use it for complex multiplication operations in the currently executing butterfly operation.

[0070] Understandably, reading the spin factor from shared memory reduces latency by more than an order of magnitude compared to reading from global memory, effectively reducing the waiting time of the butterfly operation core computing unit.

[0071] Based on the above embodiments, in this embodiment, a graphics processor is used to calculate a spectral function representing the phase deviation of two sets of moiré fringe signals based on two sets of frequency domain representations. This includes: performing cross-power spectrum analysis on the two sets of frequency domain representations in the graphics processor to obtain cross-power spectrum data, which is used to characterize the frequency domain correlation between the two sets of moiré fringe signals; and extracting the phase information corresponding to each frequency component in the cross-power spectrum data to form a spectral function of phase deviation as a function of frequency.

[0072] On the GPU, based on two sets of frequency domain representations and The process of calculating the phase deviation spectrum (corresponding to the upper and lower moiré fringe signals, respectively) can be implemented using a highly parallel kernel. Its core is the parallel execution of cross-power spectral analysis and extraction of phase information. Specifically, within the GPU kernel, a set of frequency domain representations (e.g., ...) is used. For each complex data point, its complex conjugate is calculated. This operation can be performed in parallel by a set of GPU threads corresponding to each data point, with each thread responsible for performing the conjugate operation (i.e., inverting the imaginary part) on a complex point. The result is denoted as... Then, the kernel can schedule the same batch (or another batch of related threads) of threads to perform the conjugate frequency domain representation. With another set of frequency domain representations Perform point-by-point (corresponding to the same frequency points) complex multiplication. This operation is equivalent in the frequency domain to calculating the cross-power spectrum data S(f) of the two sets of signals:

[0073]

[0074] The physical significance of cross-power spectrum lies in its complete characterization of the correlation between two sets of signals in the frequency domain. Its complex result simultaneously includes the amplitude correlation and phase difference information between the signals at each frequency point. Leveraging the massive parallelism capabilities of the GPU, complex multiplications at all frequency points are performed concurrently, efficiently generating a complex array of cross-power spectra. .

[0075] Finally, cross-power spectral data The core value lies in its phase information, which directly corresponds to the relative phase shift between the two sets of signals. Therefore, it can be computed in parallel by the corresponding GPU threads. The phase angle (or phase) at each complex point. For complex numbers Its phase angle Parallel computation of each From the phase angle, we obtain the spectrum function of phase deviation as a function of spatial frequency. This function can directly reflect the relative phase shift of the upper and lower sets of moiré fringe signals in the frequency domain.

[0076] Understandably, high-efficiency conversion is achieved by rapidly converting two sets of frequency domain signals into a spectral function that clearly represents their relative phase difference.

[0077] Based on the above embodiments, in this embodiment, the phase deviation between the two sets of moiré fringe signals is determined by obtaining the phase value at the corresponding frequency from the spectrum function according to the pre-calibrated moiré fringe spatial frequency.

[0078] First, the phase deviation spectrum function obtained by parallel computing on the GPU is... Data is transferred from the graphics processor's global memory back to the host (CPU)'s system memory via a high-speed bus (such as PCIe). The function is a discrete array, where each element corresponds to a spatial frequency point. The phase deviation value.

[0079] On the host side, phase value extraction can be performed based on prior knowledge of the physical properties of the moiré fringes. In this process, the system has first determined the spatial frequencies of the moiré fringes used for alignment through optical design or calibration. This frequency corresponds to the fundamental frequency of the alignment mark, and is the frequency component with the highest signal-to-noise ratio and the most sensitive to position changes. Then, the transmitted spectrum function can be directly accessed in the host's memory. Array. Based on known feature space frequencies Locate its corresponding index in the array and read the phase value at that index. The read The effective phase deviation between the two sets of moiré fringe signals (i.e., the upper and lower alignment marks) is directly determined. This phase deviation It is a scalar value in radians that directly and linearly reflects the relative positional offset between the mask and the substrate in the measurement direction.

[0080] Understandably, compared to transmitting raw, massive images or spectra, transmitting only a finite-length spectral function (ultimately extracting only a scalar value) greatly reduces the amount of communication data between the device and the host, thus lowering system latency.

[0081] Figure 2 The schematic diagram illustrates the overall framework of the graphics processor-based method for rapid extraction of moiré fringe alignment deviations provided in the embodiments of this disclosure.

[0082] like Figure 2 As shown, the framework includes a host 1, a device 2 (GPU), and a GPU thread block 3 at the hardware level; at the software data flow level, it includes, in sequence, the acquired and analyzed moiré fringe signal 4, the device signal data copied to the device 5, the signal data after completing the butterfly operation 6, the signal data after completing the conjugate dot product calculation 7, the spectrum function 8, and the final output moiré fringe phase deviation 9.

[0083] The parameters used in the algorithm provided in this embodiment include: the length of the moiré fringe signal L (L=8 in the example); the number of loops M for performing the butterfly operation (M= in the example). M=3); the maximum number of threads in a GPU thread block is blockDim.x (generally not exceeding 1024).

[0084] The present invention discloses a method for fast extraction of moiré fringe alignment deviation based on a graphics processor. The main steps include: First, the host terminal 1 is responsible for reading the moiré fringe pattern data and averaging the upper and lower sets of patterns along the vertical direction to obtain two sets of one-dimensional discrete moiré fringe signals 4 of length L, the mathematical form of which is:

[0085]

[0086] In the formula, Indicates background light intensity. Indicates amplitude intensity. This represents the spatial frequency component of the moiré fringe signal in the x-direction. , (k=1,2) represents the phase distribution of the upper and lower sets of moiré fringes.

[0087] To facilitate frequency domain processing, the signal is converted into exponential form:

[0088]

[0089] In the formula, express . conjugate.

[0090] Secondly, in the GPU global memory of device 2, storage space is continuously allocated for the two sets of signals of length L to ensure that the data layout meets the requirements of efficient "merged access".

[0091] Then, the two sets of one-dimensional moiré fringe signals 4 and the operation parameters (mainly the total number of iterations M) are copied to the pre-allocated memory of device 2 via the high-speed bus to form device signal 5. Without loss of generality, it is assumed that the signal length L is no greater than the maximum number of threads in a single thread block.

[0092] Furthermore, within GPU thread block 3, the device-side signal data 5 is processed M times in a loop. Each thread in thread block 3 corresponds to a specific data of the signal. In each loop, the corresponding odd and even sequence signals are simultaneously processed in a butterfly operation to generate the final frequency domain signal data 6 that completes the FFT. Assuming that the time for all signal data to perform their respective butterfly operations is the same in each loop, this step is theoretically L times faster than the traditional FFT.

[0093] The Fourier transform result of signal data 5 from the device side is:

[0094]

[0095] Where A, and They represent , and Fourier transform.

[0096] The specific steps of the FFT algorithm performed on device-side signal data 5 within GPU thread block 3 are as follows: 1. Pre-store the rotation factor in shared memory, that is, set M complex variables and assign values. (m=1,2···M); 2. Divide all signal data into Group (k=1); 3. Perform butterfly operation on the signal data in the odd group and the signal data in the even group, and update the data; 4. Wait for all threads to complete synchronization; 5. Update the group number k=k+1, if Then repeat steps 2 to 4; 6. Complete all M-level operations to obtain two sets of frequency domain signals (i.e., signal data 6 that has completed the butterfly operation).

[0097] Next, the complex conjugate of one set of frequency domain signals 6 is taken, and then multiplied point-by-point with the other set of frequency domain signals 6. The phase angle is calculated for the complex result at each frequency point, thus obtaining the phase deviation as a function of spatial frequency 8, i.e. .

[0098] Finally, the spectrum function 8 is transmitted back to the host computer. At the host computer, based on the pre-calibrated spatial frequency of the moiré fringe characteristics... Extract the phase value corresponding to the frequency point from function 8, and determine it as the phase deviation 9 between the two sets of moiré fringe signals, i.e.:

[0099]

[0100] In the formula, This represents the spatial frequency difference in the x-direction between the upper and lower sets of moiré fringes.

[0101] Figure 3 The schematic diagram illustrates the structure of a graphics processor-based rapid extraction device for moiré fringe alignment deviation provided in an embodiment of this disclosure.

[0102] like Figure 3 As shown, the graphics processor-based moiré fringe alignment deviation rapid extraction device 300 of this embodiment includes an acquisition module 301, a transformation module 302, and a calculation module 303.

[0103] The acquisition module 301 is used to receive two sets of moiré fringe signals, which are obtained by analyzing the two sets of moiré fringe patterns representing the alignment state.

[0104] The transformation module 302 is used to perform parallel and coordinated fast Fourier transform on the two sets of moiré fringe signals using a graphics processor, so as to obtain the frequency domain representation of each set of moiré fringe signals.

[0105] The calculation module 303 is used to calculate, based on two sets of frequency domain representations, a spectral function characterizing the phase deviation of the two sets of moiré fringe signals using a graphics processor; wherein the spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation between the mask and the substrate.

[0106] It is understood that the acquisition module 301, transformation module 302, and calculation module 303 can be implemented in a single module, or any one of these modules can be split into multiple modules. Alternatively, at least some of the functions of one or more of these modules can be combined with at least some of the functions of other modules and implemented in a single module. According to embodiments of this disclosure, at least one of the acquisition module 301, transformation module 302, and calculation module 303 can be at least partially implemented as hardware circuitry, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or any other reasonable method of integrating or packaging circuitry, or as hardware or firmware implementation, or as a suitable combination of software, hardware, and firmware implementations. Alternatively, at least one of the acquisition module 301, transformation module 302, and calculation module 303 can be at least partially implemented as a computer program module, which, when run by a computer, can execute the functions of the corresponding module.

[0107] In other embodiments, an electronic device is also provided, the device including: a host processor, such as a central processing unit; a graphics processing unit connected to the host processor and having massively parallel computing capabilities; and a storage device for storing one or more computer programs.

[0108] The host processor is used to obtain two sets of moiré fringe patterns representing the alignment state, and to parse the two sets of moiré fringe patterns to obtain their respective moiré fringe signals, and then transmit the two sets of moiré fringe signals obtained by parsing to the graphics processor.

[0109] When one or more computer programs are executed by the graphics processor (GPU), the GPU performs the following methods to quickly extract alignment deviations. First, utilizing the GPU's parallel computing capabilities, a parallel cooperative Fast Fourier Transform (FFT) is performed on the two sets of signals to efficiently obtain their respective frequency domain representations. Then, within the GPU, based on the obtained frequency domain representations, parallel computations (such as conjugation, dot product, and phase angle calculation) are performed to obtain a spectral function characterizing the phase deviation between the two sets of moiré fringe signals. This spectral function can be used to determine the phase deviation between the two sets of moiré fringe signals, which directly reflects the alignment offset between the mask and the substrate.

[0110] Understandably, by heterogeneously collaborating the host processor (which excels at logic control and data preparation) and the graphics processor (which excels at massively parallel computing), computationally intensive FFT and frequency domain analysis tasks are efficiently offloaded to the graphics processor for execution. This fully utilizes the high parallelism of the graphics processor. Compared to methods where only the host processor processes data serially, this method achieves millisecond-level rapid extraction of moiré fringe alignment deviations, providing a dedicated hardware computing platform for applications requiring high-precision, high-speed, real-time alignment, such as high-end lithography equipment.

[0111] This disclosure also provides a computer-readable medium, which may be included in the device / system / system described in the above embodiments; or it may exist independently and not assembled into the device / system / system. The computer-readable medium carries one or more programs that, when executed, implement the method according to the embodiments of this disclosure.

[0112] Those skilled in the art will understand that the features described in the various embodiments of this disclosure can be combined and / or combined in various ways, even if such combinations and / or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments of this disclosure can be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0113] The above specific embodiments further illustrate the purpose, technical solutions and beneficial effects of this disclosure. It should be understood that the above are only specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A method for rapid extraction of moiré fringe alignment deviation based on a graphics processor, characterized in that, include: Two sets of moiré fringe signals are received, which are obtained by analyzing the two sets of moiré fringe patterns representing the alignment state; The two sets of moiré fringe signals are subjected to parallel and coordinated fast Fourier transform using a graphics processor to obtain the frequency domain representations of the two sets of moiré fringe signals respectively. Using the graphics processor, a spectral function characterizing the phase deviation of the two sets of moiré fringe signals is calculated based on the two sets of frequency domain representations; The spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation.

2. The method according to claim 1, characterized in that, The two sets of moiré fringe signals have the same length and are obtained by averaging the pixel values ​​of the moiré fringe pattern along a direction perpendicular to the moiré fringe.

3. The method according to claim 1, characterized in that, Prior to performing a parallel, coordinated Fast Fourier Transform on the two sets of moiré fringe signals using a graphics processor, the method further includes: In the global memory of the graphics processor, contiguous storage space is allocated for the two sets of moiré fringe signals; The two sets of moiré fringe signals and the configuration information required for the fast Fourier transform stored in the host's memory are transmitted to the allocated storage space, wherein the configuration information includes at least the total number of operation stages of the fast Fourier transform determined according to the length of the moiré fringe signals.

4. The method according to claim 1, characterized in that, The method of using a graphics processor to perform parallel and coordinated fast Fourier transforms on the two sets of moiré fringe signals to obtain the frequency domain representations of the two sets of moiré fringe signals respectively includes: A parallel computing kernel is configured and launched on the graphics processor, the parallel computing kernel scheduling one or more thread blocks, wherein each thread in the thread block is configured to process one signal data point of the moiré fringe signal; The parallel computing kernel controls each thread to synchronously perform multi-level butterfly operations on the two sets of moiré fringe signals, thereby obtaining the frequency domain representations of the two sets of moiré fringe signals respectively.

5. The method according to claim 4, characterized in that, The process of controlling each thread to synchronously perform multi-level butterfly operations on the two sets of moiré fringe signals through the parallel computing kernel includes: For the i-th level butterfly operation, based on the partitioning rules determined by the current level i and the global index of each thread, the signal data points of each group of moiré fringe signals are divided into odd sequence subsets and even sequence subsets, where i is a positive integer; According to the partitioning rules, each thread determines the signal data points it processes and the odd or even sequence subset to which they belong, and determines the partner thread that is paired with the thread in the i-th level butterfly operation, so as to cooperate with the partner thread to synchronously execute one butterfly operation. After each thread completes the i-th level butterfly operation, the thread synchronization mechanism enables all threads to enter the (i+1)-th level operation together.

6. The method according to claim 4 or 5, characterized in that, The method of using a graphics processor to perform parallel and coordinated fast Fourier transform on the two sets of moiré fringe signals further includes: The complex rotation factors required for the Fast Fourier Transform are pre-stored in the shared memory of the graphics processor, so that the corresponding rotation factors can be read from the shared memory to perform the Fast Fourier Transform.

7. The method according to claim 1, characterized in that, The step of using the graphics processor to calculate the spectral function characterizing the phase deviation of the two sets of moiré fringe signals based on the two sets of frequency domain representations includes: In the graphics processor, cross-power spectrum analysis is performed on the two sets of frequency domain representations to obtain cross-power spectrum data; The phase information corresponding to each frequency component in the cross-power spectrum data is extracted to form the spectrum function in which the phase deviation changes with frequency.

8. The method according to claim 1, characterized in that, The phase deviation between the two sets of moiré fringe signals is determined by obtaining the phase value at the corresponding frequency from the spectrum function based on the pre-calibrated spatial frequency of the moiré fringe.

9. A device for rapid extraction of moiré fringe alignment deviation based on a graphics processor, characterized in that, include: The acquisition module is used to receive two sets of moiré fringe signals, which are obtained by analyzing the two sets of moiré fringe patterns representing the alignment state. The transformation module is used to perform parallel and coordinated fast Fourier transform on the two sets of moiré fringe signals using a graphics processor, so as to obtain the frequency domain representations of the two sets of moiré fringe signals respectively. The calculation module is used to calculate, using the graphics processor, a spectral function characterizing the phase deviation of the two sets of moiré fringe signals based on the two sets of frequency domain representations; wherein the spectral function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation.

10. An electronic device, comprising: The host processor is used to obtain two sets of moiré fringe patterns representing the alignment state, and to analyze the two sets of moiré fringe patterns respectively to obtain their respective corresponding moiré fringe signals; The graphics processor is connected to the host-side processor; A storage device configured to store one or more computer programs; The feature is that, when the one or more programs are executed by the graphics processor, the graphics processor performs the following method: Two sets of moiré fringe signals are received; using the graphics processor, parallel and coordinated fast Fourier transforms are performed on the two sets of moiré fringe signals to obtain the frequency domain representations of the two sets of moiré fringe signals respectively; using the graphics processor, a spectrum function characterizing the phase deviation of the two sets of moiré fringe signals is calculated based on the two sets of frequency domain representations; wherein, the spectrum function is used to determine the phase deviation between the two sets of moiré fringe signals, and the phase deviation is used to represent the alignment deviation.

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