Safety monitoring system and circuit thereof

Abstract

The invention provides a safety monitoring system and a key circuit based on a trigger mode in a scene with difficulty in power supply, realizes quick response to capture and obtain external signals, carries out information transmission in an ad hoc network relay mode, and realizes a ship safety monitoring system composed of passive sonar and a magnetic resistance sensing network in detail.

Description

Technical Field

[0001] This application relates to the field of low-power processing in safety monitoring systems and microelectronic circuits, and is particularly suitable for safety monitoring in areas where power supply is difficult, such as underwater safety monitoring, forests, and uninhabited areas. Background Technology

[0002] For security monitoring scenarios involving difficult power supply, such as field camp deployments, submarine energy pipeline deployments, submarine military sonar networks, deep mountains and dense forests, and uninhabited areas, the key characteristic is a severe power supply problem, especially in locations where even solar and wind power are unavailable. Such security monitoring systems require battery-powered electronic products that aim to operate for the longest possible time with the smallest possible battery capacity, necessitating a sleep-wake strategy. However, waking up a circuit from the appearance of an external signal to its ability to function normally requires a certain amount of time, especially when running a large operating system or when the circuit needs time to stabilize. After this time, potentially useful external signals may have disappeared. Therefore, rapid response and the timing of such responses become crucial considerations. Summary of the Invention

[0003] The technical problem this application aims to solve is to provide a sleep / wake-up circuit that enables rapid response to capture and acquire external signals, and its system in the aforementioned security monitoring scenario. This circuit can set a trigger threshold for external signals, has extremely low sleep / standby power consumption, and can store captured signals for later retrieval by user circuits. The storage capacity is sufficient to allow the user circuit to take over the acquisition work after startup without losing any signals. In many cases, the monitored signal may not appear even once a day, or even once every few years. Therefore, by triggering wake-up based on the monitored signal without losing the acquisition and analysis of the monitored signal, the circuit can operate for many years with limited battery power. This circuit can also be used to manage and drive the power supply of high-power-consuming, high-delay user circuits.

[0004] In application, the circuit is divided into three parts: a wake-up circuit, a first-level processor circuit with an extremely short wake-up time, and an external high-power-consuming and long-delay circuit. The circuit of this application includes three parts: a wake-up circuit, a first-level processor circuit, and power management for the external high-power-consuming and long-delay circuit.

[0005] In sleep mode, only the wake-up circuit and the primary processor circuit are powered. Their combined sleep standby power consumption is extremely low, below 1 microamp, while the high-power-consuming, long-delay circuit is powered off. When an external signal reaches the set wake-up threshold, the wake-up circuit triggers the primary processor circuit. The primary processor circuit takes only microseconds from the generation of the external wake-up signal to starting normal operation, and most MCU processors can achieve less than 10 microseconds. 10 microseconds is typically the duration of unwanted signals such as spikes or disturbances for most monitored signals; normal signals take several times longer. After being woken up, the primary processor immediately begins acquiring external signals, generating digital waveforms, and storing them in its memory. It automatically sets the sampling rate based on the set sampling time and storage space size. The set sampling time is determined by the time required for the subsequent high-power-consuming, long-delay circuit to start normal operation after power-on. After being woken up, the primary processor immediately powers on the high-power-consuming, long-delay circuit. When the primary processor circuit receives a handshake signal from the high-power-consumption, high-delay circuit, it stops sampling and transmits the sampling circuit's amplification factor and digital-to-analog conversion resolution, along with the sampled data, to the user circuit via the interconnect interface. This high-power-consumption, high-delay circuit provides and manages power to external devices. Upon receiving a shutdown signal from an external device, it shuts down the external device's power and enters a sleep state.

[0006] The aforementioned circuit is the most crucial part. The system also includes a backend application section, primarily for audio and video acquisition and transmission, as well as alarm signal transmission. In many such scenarios, transmitting the captured signals is difficult, such as underwater or in deep forests. To address this problem, this application implements a radio wave wake-up circuit and an underwater acoustic wave wake-up circuit for use in relay transmission modules. Multiple relay transmission modules constitute long-distance transmission, transmitting information to devices with power supply. The working principle, operating time, and frequency of each repeater are the same as those of the security monitoring equipment; it is triggered only once in a very long period, and each operation is very short. The only difference is the input of the wake-up signal. The aforementioned circuit uses a wired signal for the wake-up signal input, while the repeaters use both wireless and acoustic signals. The repeaters simply change the signal reception method. The radio wave wake-up circuit uses a large antenna with the same frequency as the transmitter of the safety monitoring equipment. The signal received by the antenna is connected to the input of the aforementioned wake-up circuit. The amplification factor of the wake-up circuit is generally quite high and needs to be set to an appropriate point. Data accuracy is not important; as long as the intensity is sufficient for wake-up, it is acceptable. After wake-up, the signal received by the antenna is also sent to the normal receiving circuit of the repeater for reception. In underwater working scenarios, the safety monitoring equipment and the repeater communicate using acoustic waves. The effective data baud rate is low, but the transmission distance is long. The key to the acoustic wake-up circuit of the repeater is also the acquisition and amplification of acoustic waves. For amplification, it is only an amplification of intensity; the signal resolution and reception are still at the normal receiving amplification factor. Underwater acoustic wave reception uses piezoelectric crystals, piezoelectric ceramics, or magnetostrictive materials to convert acoustic wave signals into electrical signals, which is an underwater acoustic transducer.

[0007] In some implementations, the circuit is suitable for use with a disposable lithium ammonium battery and provides a short-term high current to external devices by means of a parallel pulse capacitor.

[0008] In some implementations, since the voltage of lithium-ion batteries can reach up to 3.6V or higher, while most primary processors can only withstand operating voltages below 3.6V, a series diode method is used to step down the power supply to the primary processor instead of using other voltage regulator circuits. This can minimize the power consumption during sleep and standby.

[0009] In some implementations, the standby circuit for capturing external signals uses fewer components for low power consumption purposes. It may not have all the necessary filtering performance, amplification capability, swing, bias, and reference power supply, or even if it does, its performance may not meet the user's signal sampling requirements. In such cases, it is acceptable to use a signal conditioning and amplification circuit powered by the power supply provided by the user after wake-up as the ADC input signal for acquisition.

[0010] In some implementations, the ADC circuit can be provided externally by the user, allowing the user to independently determine the sampling rate and sampling accuracy. In this case, the primary processor uses the communication channel to store the ADC values, and then transmits the data to the user once the external user processor circuit is ready.

[0011] In some implementations, the power supply is divided into two parts: an uninterrupted standby power supply and a normal operating power supply that is only output after the primary processor circuit is woken up. The voltages of these two supplies are not necessarily equal, and in most cases, they are not. The wake-up circuit and the primary processor circuit are powered by the standby power supply in standby mode, and switch to the normal operating power supply after wake-up. The voltage of the normal operating power supply after wake-up is generally higher than the standby power supply voltage, the purpose of which is to achieve low-power standby at low voltage and high-speed, high-efficiency operation and computation at high voltage. This power conversion is automatically achieved by diode isolation, as shown in the attached diagram. Figure 2 As shown.

[0012] In some implementations, the ADC circuit is a circuit that does not require power supply during standby; the ADC circuit is powered by the normal operating power supply after being woken up.

[0013] In some implementations, the primary processor itself does not have enough storage space to store data for a sufficient sampling time. Therefore, an external memory is needed to work after the primary processor is woken up and to store the collected data. This external memory is also a circuit that does not require power supply during standby and is powered by the normal operating power supply after wake-up.

[0014] In some implementations, the primary processor needs to maintain the same state of I / O output as before entering standby mode and ensure that the standby current it generates is less than 1uA. This is to support the provision of programmable gain by low-power multiplexers and resistor networks without using programmable gain op-amps.

[0015] In some implementations, for circuit sections that require a standby power supply to maintain a permanent power supply, except for the primary processor, the normal operating current of each integrated circuit does not exceed 1uA, and the current of each resistor loop and capacitor leakage loop is strictly controlled to be below 0.1uA.

[0016] In some implementations, this circuit manages the power supply to external circuits, that is, it manages the power supply to all external circuits of the circuit in question and the user portion using this circuit. Otherwise, for the power supply battery, it does not control or manage the power supply to the non-standby circuit portion, only supplying power to the standby backup circuit, which is meaningless even if the standby power consumption is very low. External power supply management is achieved by controlling the switching device after the primary processor is woken up. The switching device itself is also permanently connected to the battery, the main power source, so its static leakage current in the off state is controlled to be below 1uA.

[0017] In some implementations, there is no difference between front-end safety monitoring equipment and back-end relay equipment; both can serve as nodes that simultaneously perform safety monitoring and relay functions.

[0018] In some implementations, the underwater system of this application can be used as a military listening network. Because it does not require a power supply for a long time, it is similar to passive operation and can be fixed in a specific body of water (it needs to be anchored to avoid drifting due to seabed currents, which would make it impossible to determine its location) as a passive sonar network. It is small in size, easy to network, and highly concealed, enabling functions such as listening to ships. Attached Figure Description

[0019] The above is merely an overview of the technical solution of this application. In order to better understand the technical means of this application, the following description, in conjunction with the accompanying drawings and specific embodiments, will provide a more detailed explanation of this application.

[0020] Figure 1 This is the key circuit structure block diagram of this application.

[0021] Figure 2 This is a schematic diagram showing the connection between the standby power supply and the normal operating power supply. Detailed Implementation

[0022] The preferred embodiments of this application are described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit this application.

[0023] Figure 1 The circuit structure of this application is depicted in the form of a block diagram.

[0024] Figure 1 The part indicated by 3 is the main power supply of the circuit, which can be composed of various types of single or multiple batteries and some pulse capacitors connected in parallel. The specific number of batteries and pulse capacitors depends on the power supply requirements of the external user circuit, mainly the required power and duration. If the required instantaneous power is relatively large but the working time is short, the number of parallel pulse capacitors can be calculated and weighed. If there are many short-term high-power power supply intervals or a high frequency, a small number of batteries will not be able to complete the charging of the pulse capacitors between two output intervals, so the number of parallel batteries must be calculated and weighed. A typical implementation scheme uses one 3.6V lithium ammonium battery ER32L connected in parallel with two SPC1520 pulse capacitors as the main power supply. After passing through a boost module, it can provide a short-term power output of 5V voltage and 2-4A current, with an output duration of about 50 seconds. The charging time of the battery to the capacitors takes tens of minutes to several hours. Choosing lithium ammonium batteries and pulse capacitors is the best solution to enable the circuit to work for 5-10 years or more without replacing the batteries or externally charging them.

[0025] Figure 1 The part indicated by 4 in the diagram is the switching circuit and the voltage regulator module that provides power to the external user, and as shown in the diagram... Figure 1 The output is controlled to start or stop after being woken up by a primary processor. If the battery voltage is lower than the user's required voltage, a boost mode is used; otherwise, a buck mode is used. A typical implementation uses an SGM2537-13.7RD as the power load switch controller and a ZCC 2007 for boosting, outputting a 5V / 3A power supply.

[0026] Figure 1 The thick black arrows indicate the path and direction of the power supply. Figure 1 The part within the thick dashed box is the part that requires permanent power supply, which is referred to as the standby power domain in this application. The power supply consisting of a battery and a pulse capacitor can permanently power this part. After the primary processor wakes up, the standby power domain can also be powered by the normal operating power supply through the voltage regulator module. Figure 2 This section further details the power supply scheme. A typical implementation involves a wide operating voltage range for the standby power domain circuit, between 1.2V and 5V. When the circuit is in standby mode, it is powered by the aforementioned lithium-ion battery and pulse capacitor, passing through a diode, with the voltage kept below 3.3V to minimize standby power consumption. When the circuit is awakened by a monitoring signal, the switch to external power is turned on, and the boost circuit boosts the voltage to 5V. If the standby power domain circuit is to operate at a voltage below 5V, such as 3.3V, an additional voltage is added. Figure 1 The step-down circuit shown in 9 provides a higher voltage to the standby power domain after wake-up to achieve high-speed and efficient computing, since the maximum operating and computing speed of most processors is related to the power supply voltage.

[0027] Figure 1The standby power domain primarily handles the reception, filtering, amplification, and comparison of the monitored signal. To adjust the amplitude of the wake-up signal, a gain adjustment module is also included. These modules are always operational, without distinct standby or running states, unlike the primary processor module in this domain, which has both standby and running states. A typical implementation uses low-power operational amplifiers, such as the SGM8142, for filtering, amplification, and comparison. Gain adjustment is achieved using a low-power analog multiplexer, the SGM48751_SO, paired with a resistor network. The control signals for the analog multiplexer require I / O ports from the primary processor, necessitating that the processor maintain its I / O output state during standby. For example, using an STC microcontroller like the STC8H8K64U-48PIN-USB. Most STC MCUs have I / O ports capable of maintaining output during standby with very low power consumption.

[0028] Figure 1 The normal operating power domain shown in Figure 2 is the area that supplies power to circuits that do not have a standby mode or whose power consumption is high even if they do have a standby mode. As mentioned earlier, the power supply for this part of the circuit is provided by the external output power that is turned on after wake-up. This part of the region is in a power-off state before the primary processor is woken up and turns on the power supply to the external system. This region can also include and expand to include many high-power circuits.

[0029] The external communication module in the normal operating power domain can be a transceiver circuit such as CAN, RS485, ETH-PHY, USB-PHY, etc., including various communication interfaces that start working after the primary processor is woken up. A typical implementation is to not expand the communication module externally, but only use the SPI or USB communication interface that starts working after the primary processor STC8H8K64U-48PIN-USB is woken up, to realize high-speed data transmission and command transmission and reception.

[0030] A data cache module is essential in the normal operating power domain because the internal space of the primary processor for caching high-speed acquired data is very small. It cannot save all the ADC data of the monitored signals before the user circuit has finished booting up and started operating. Therefore, external memory is needed for high-speed data caching. The size of the external memory should meet the user's requirements for data acquisition accuracy, rate, and duration. The duration requirement is to allow time for the user circuit to boot up. A typical implementation is to use a 64MByte external SPI bus interface RAM chip, EMI7002WSMI.

[0031] ADC chips typically have relatively high standby power consumption, so they operate in the normal operating power domain rather than the standby power domain. The input signal for an ADC chip can come from two or more sources: one is the monitored signal input, filtering, and amplification circuit in the standby power domain, and the other is a more complex amplification and filtering circuit provided by the user in the normal operating power domain.

[0032] In addition to the high-speed communication interface with the user circuit, there are also independent hardware signal lines connected to the user circuit. These include the external ready signal input from the user circuit to this circuit, the acquisition end signal output from this circuit to the user circuit, and the sleep signal input from the user circuit to this circuit. In particular, the external ready signal and the acquisition end signal must be implemented using hardware signal lines rather than through software communication.

[0033] One of the key features of this application is that it enables a relay-style acquisition of the same signal by the primary processor and the user processor. Although the amplification factor and filter circuit composition of the two processors for the same signal are different, they can be sequentially connected. After the primary processor finishes acquisition, it sends the acquired data to the user and informs the user processor of the amplification factor, sampling rate, and resolution. The user processor can then use these parameters to perform appropriate interpolation or extraction, numerical amplification or reduction, smoothing, etc., thereby connecting with the data acquired by the user.

[0034] The user circuit inputs an external ready signal to this circuit to inform the primary processor of this circuit that the user circuit is ready to start taking over data acquisition from the primary processor of this circuit. The acquisition end signal output by this circuit to the user circuit is used to inform the user circuit that its acquisition has ended. The sleep signal input by the user circuit to this circuit is used to notify this circuit to enter sleep mode.

[0035] While software communication can achieve the same function as hardware signal lines, the response time to software communication commands during MCU and user processor operation is significantly longer than that of hardware signal lines as interactive signals. This is crucial for preventing momentary interruptions in signal acquisition, which could lead to data distortion, and for ensuring a tight enough connection between the primary processor and the user processor to minimize distortion. Furthermore, software communication continuously checks for incoming commands throughout the entire software operation, significantly consuming processor resources and reducing data acquisition capabilities, thus limiting the sampling rate. External ready and acquisition completion signals are examples of such signals.

[0036] The sleep signal is a signal that can be implemented without hardware, and can also be achieved through software communication. However, if there are problems with the software communication and there is no repeated handshake, the system will continue to work and will not be able to enter the sleep state.

[0037] The following section uses an underwater passive sonar system as an example to illustrate the specific circuitry, connections between circuits, and system deployment. It should be reiterated that "passive" means it can operate normally for several years or even decades without requiring additional power, not that it requires no electricity. It simply means it is extremely energy-efficient and uses batteries such as lithium-ion batteries that can store energy for several years or even decades as its power source.

[0038] The maximum acoustic communication transmission distance for each node in an underwater passive sonar system is between 20 and 30 kilometers, which can be reduced as needed. The nodes are arranged in a nearly uniform chessboard pattern, numbered horizontally and vertically. When a node (x, y) is awakened by a sonar event, its communication acoustic waves are received and awakened by its four neighboring nodes (x-1, y), (x+1, y), (x, y-1), and (x, y+1). These four awakened nodes determine whether the event was triggered by an event or by communication. If it was a communication awakening, they identify the node from which the event originated and calculate, based on their stored chessboard map, whether they are on the shortest transmission path (i.e., the minimum number of relay nodes required for the event detected by node (x, y) to be transmitted to the control center). If the node (e.g., (x+1, y)) is on the number of these nodes, it will forward the data. The forwarded data contains the path information, namely the original event sending node, the nodes it passed through during the transmission to this node, and the coordinates of this node. After forwarding, it will wake up 1 or 3 nodes around the current relay node (because the previous node may have already woken up 1 or 2 other nodes around this node, plus the previous node itself, so only one node may be woken up by this node). These woken-up nodes calculate the path according to the communication wake-up and the received communication data and continue to forward the data as described above until it is received by the control center.

[0039] The connections and operating links between the circuits and electronic components of each passive sonar energy-saving device are as follows: An underwater acoustic transducer P1 and a magnetoresistive sensor (optional) are used to detect the passing of ships. The underwater acoustic transducer is not only used to detect ships, but can also be used for acoustic communication, while the magnetoresistive sensor can better detect ships and effectively exclude acoustic signals emitted by fish and seabed currents.

[0040] The electrical interface of the underwater acoustic transducer is first connected to the common contact of two single-pole double-throw relays S1 and S2. The normally closed contact of relay S1 is connected to one input terminal A1-P1 of the dual operational amplifier A1 used for wake-up. The normally open contact of S1 is left floating to disconnect from the wake-up circuit when the transducer is used for transmission. The normally closed contact of S2 is connected to the input terminal of a signal conditioning circuit called L1, which consists of filtering and amplification of the normal acoustic input signal. The normally open contact of S2 is connected to the output terminal of a high-voltage transmitter to isolate the low-voltage operating circuit when the transducer is used for communication by transmitting acoustic waves. The output terminal of L1 is simultaneously connected to the analog signal input pins of both the primary processor CPU1 and the secondary processor CPU2, or to the input pin of an external analog-to-digital converter R1. Even if the signal is acquired by R1 and then transmitted to the processor via digital communication instead of being directly acquired by the processor, this will be referred to as the processor acquiring the output of L1. The coil control of S1 and S2 is completed by the secondary processor CPU2.

[0041] The characteristic of a magnetoresistive sensor is that it can sense magnetic field disturbances and detect the presence and movement of large metal objects such as ships. When a magnetoresistive sensor is used as the sensing unit, the S1 relay in the above-mentioned underwater acoustic transducer circuit can be omitted or continued to be used to form a complementary sensing system of sonar and magnetoresistive sensors. The output terminal of the magnetoresistive sensor is connected to one input terminal A1-P2 of the dual operational amplifier A1 used for wake-up.

[0042] The amplification factor of the wake-up operational amplifier A1 is determined by the feedback resistor value selected by the 4-to-1 analog switch B1, which is controlled by a pin of the primary processor CPU1. The pin of the primary processor CPU1 can maintain its output in its sleep state. The output of the wake-up operational amplifier A1 is connected to the positive comparison input of comparator D1. The negative comparison input of comparator D1 is a fixed voltage set using a resistor. The output of comparator D1 is connected to a wake-up pin of the primary processor CPU1.

[0043] When the signal strength received by the sensing unit consisting of the underwater acoustic transducer and the magnetoresistive sensor is sufficient to wake up the primary processor CPU1, it begins to supply power to the acquisition signal conditioning circuit L1, the secondary processor CPU2, and the backup buffer memory SRAM1 through the power switch circuit E1 controlled by its pins. During the startup of CPU2, CPU1 acquires the output signal of L1 and stores it in its own memory or in the backup buffer memory SRAM1. After the startup of CPU2 is completed, CPU2 begins to acquire the output signal of L1 and, as appropriate, receives the acquisition data of L1 from the primary processor CPU1 and splices it together.

[0044] To save energy, and because this kind of ship sensing does not require a long signal acquisition time, the signal acquisition time after wake-up is very short, generally only a few seconds or no more than 1 minute, based on the ability to receive all communication messages.

[0045] Next, CPU2 analyzes the acquired data, with a key focus on whether it contains data bits. In the system's acoustic communication, the frequency F of the acoustic waves is consistent, serving as the carrier frequency. If a certain number of carrier waves are received within a fixed time period, such as 1 / 10 of F, for example, 8, it is considered that bit 1 has been received; conversely, if the number of carrier waves received is 0, it is considered bit 0. A common serial asynchronous communication protocol is used, where the transmitter sends a long 1 followed by a 0 as a start bit. This is a purely internal acquisition and analysis method without external circuitry. Alternatively, an acoustic phase-locked loop (PLL1) circuit can be used to increase the accuracy of the receiver's judgment and reduce the computational load. The main function of the PLL1 is to acquire and output high and low levels (bits 1 and 0) for acoustic waves of a specific frequency. Depending on the transmission distance, the baud rate of acoustic communication can range from hundreds to tens of kilobits per second. For encrypted communication, frequency hopping and other techniques can be used.

[0046] After acquiring the communication signal, the CPU determines whether to send information, as mentioned above, based on the routing information. If transmission is required, the secondary processor activates the power switch E2, controlled by its own pins, to power the communication circuitry, including relays S1 and S2 and the high-voltage acoustic emission circuit P1. Once powered on, CPU2 first controls the coils of S1 and S2 to switch contacts, connecting the underwater acoustic transducer's transmitting interface to the high-voltage acoustic emission communication circuit. Simultaneously, it disconnects the electrical connection from the low-voltage circuit to protect it. After switching, CPU2 sends a digital sequence via its pins to control P1 to emit acoustic signals for data transmission.

[0047] The above is a typical example of an underwater safety monitoring system. The process and circuit control principle of the land-based system are essentially the same; the difference lies in the type of input signal. Besides sound and vibration, there are also passive infrared receivers. The collected information includes instantaneous capture of sound and images. Communication uses radio wave relay. In deep mountains and dense forests, the deployment of radio waves and relays may be denser, but the relay transmission range can be narrowed by selecting a certain area for higher solar power supply facilities and satellite / mobile network communication systems.

[0048] The above description is merely a preferred embodiment of this application and is not intended to limit this application in any way. Any simple modifications, equivalent changes, or alterations made by those skilled in the art using the disclosed technical content shall fall within the protection scope of this application.

Claims

1. A safety monitoring system and its circuit, characterized in that: The circuit consists of three parts: a wake-up circuit, a primary processor circuit, and power management for external high-power-consuming and long-delay circuits. In hibernation mode, only the wake-up circuit and the primary processor circuit are powered. When the external signal reaches the set wake-up value, the wake-up circuit triggers the wake-up of the first-level processor circuit. The time from the generation of the external wake-up signal to the start of normal operation of the first-level processor circuit is controlled within microseconds. After the primary processor is awakened, it immediately begins to collect external signals, form digital waves, and save them in its own memory. It automatically sets the sampling rate according to the set sampling time length and storage space size. The set sampling time length is determined based on the time required for the subsequent high-power-consuming and long-delay circuit to start working normally from power-on. Once the primary processor is awakened, the power supply to the high-power-consuming, long-delay circuit is immediately turned on; When the primary processor circuit receives the handshake signal from the high-power-consuming and long-delay circuit, it stops sampling and transmits the amplification factor and digital-to-analog conversion resolution of the sampling circuit, along with the sampled data, to the user circuit through the interconnection interface. The primary processor maintains the same I / O output state as before entering standby mode; Programmable gain is provided using low-power multiplexers and resistor networks.

2. The system circuit according to claim 1, characterized in that, include: The circuit provides and manages power to external devices. When it receives a power-off signal or sleep signal from an external device, it shuts down the power to the external device and enters sleep mode. Instead of using other voltage regulator circuits, a series diode method is used to provide step-down power to the primary processor, which can minimize the power consumption during sleep and standby.

3. The system circuit according to claim 1, characterized in that, include: The ADC circuit is a type of circuit that does not require power supply during standby. After being woken up, the ADC circuit is powered by the normal operating power supply.

4. The system circuit according to claim 1, characterized in that, include: An external memory is added to the primary processor to operate after wake-up and store the acquired data. This external memory does not require power during standby and is powered by the normal operating power supply after wake-up.

5. The system circuit according to claim 1, characterized in that, include: The primary processor has independent hardware signal lines connected to the user circuit, including the external ready signal input from the user circuit to this circuit and the acquisition end signal output from the primary processor circuit to the user circuit.

6. The system circuit according to claim 1, characterized in that, include: The acquisition of signals by the primary processor and the acquisition of the same signal by the user processor can be sequential in timing; After the primary processor finishes acquiring data, it sends the acquired data to the user and informs the user processor of the magnification, sampling rate, and resolution. The user processor can then use these parameters to perform appropriate interpolation or extraction, numerical amplification or reduction, smoothing, etc., to connect with the data acquired by the user.

7. The system circuit according to claim 1, characterized in that, include: The wake-up trigger circuit can be directly used as the input signal of the ADC, but the input circuit of the ADC can be provided externally by the user. In this way, the user can decide the sampling rate and sampling accuracy independently. At this time, the first-level processor uses the communication channel to save the ADC value, and transmits the data to the user after the external user processor circuit is ready.

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