Integrated magneto-optical trap chip and preparation method thereof

Abstract

The invention provides an integrated magneto-optical trap chip, and relates to the technical field of integrated light quantum chips, the integrated magneto-optical trap chip is composed of a glass shell, a functional chip and a magnetic field chip, and the three parts are sequentially superposed to form an integrated structure; the functional chip comprises a diffraction grating manufactured on the upper surface of the first semiconductor substrate, a microgroove for accommodating a solid-state atom source and a microgroove for accommodating a non-evaporable getter; the glass shell is made into a cavity-shaped structure with an opening in the bottom surface, the bottom surface of the glass shell is attached to the grooving surface of the functional chip, and the glass shell is hermetically connected with the functional chip through a bonding process; the magnetic field chip is characterized in that a planar copper wire coil is formed on a second semiconductor substrate through an electroplating process; and bonding and fixing the non-grooving surfaces of the magnetic field chip and the functional chip by using a curing adhesive. By adopting the scheme of the invention, the application scene is widened. And the maturity of photoetching, etching and bonding is high, and batch and standardized production of devices is easy to realize.

Description

Technical Field

[0001] This invention belongs to the field of integrated optical quantum chip technology, and particularly relates to an integrated magneto-optical trap chip and its fabrication method. Background Technology

[0002] Cold atom technology, as a core frontier of quantum science, uses techniques such as laser cooling and trapping to prepare atomic systems at extremely low temperatures, enabling them to exhibit highly coherent quantum properties. This provides an important platform for high-precision scientific research and advanced engineering technologies. Cold atom-based systems have already demonstrated enormous application potential in multiple fields: in quantum information, cold atoms can serve as carriers of qubits with long coherence times, laying the foundation for building highly stable quantum computers and long-distance quantum communication systems; in precision measurement, cold atom-based atomic clocks, atomic interferometers, and atomic gyroscopes have achieved order-of-magnitude breakthroughs in measurement accuracy compared to traditional instruments, providing key technological support for next-generation navigation and positioning, high-precision time synchronization, and gravity field detection systems. With the rapid development of these applications, cold atom systems not only face higher performance requirements but also urgently need to overcome laboratory limitations and evolve towards miniaturization, portability, and chip-based architecture to meet the needs of practical applications such as fieldwork and airborne equipment.

[0003] The magneto-optical trap system, as the core device for the preparation and manipulation of cold atoms, is the most critical component of the cold atom system. Its core function is to efficiently trap atoms from a room-temperature atomic gas chamber and cool them through the synergistic effect of laser and magnetic field, ultimately forming a high-density cold atom cluster. A typical conventional magneto-optical trap system mainly consists of three core modules: a three-dimensional anti-Helmholtz coil that generates a spatial gradient magnetic field, a complex optical system that provides three pairs of orthogonal laser beams, and a vacuum device that maintains an ultra-high vacuum environment.

[0004] Chinese Patent Publication CN114114884A discloses a coherent population trapping cold atom clock based on a grating chip and its application method, which optimizes the cold atom clock structure and reduces the overall device size to a certain extent. The coherent population trapping cold atom clock based on a grating chip provided by this patent includes a grating magneto-optical trap, a detection system, a magnetic shielding system, and an atomic source. The magnetic shielding system includes a first magnetic shielding mechanism and a second magnetic shielding mechanism disposed within the first magnetic shielding mechanism. The grating magneto-optical trap includes a vacuum cavity located within the second magnetic shielding mechanism, a grating chip disposed at the bottom of the vacuum cavity, a pair of anti-Helmholtz coils disposed on the upper and lower sides of the vacuum cavity, and an incident light component atomic source located on the upper side of the second magnetic shielding mechanism, with one end connected to the vacuum cavity. The detection system includes a detection light component and a reflection component disposed opposite to each other on both sides of the second magnetic shielding mechanism, and a pair of Helmholtz coils disposed opposite to each other on both sides of the vacuum cavity.

[0005] However, this traditional architecture has significant technical limitations: anti-Helmholtz coils are typically bulky, consume a lot of power, and generate significant heat; the optical path system, constructed from discrete optical components such as mirrors, waveplates, and beam splitters, is not only structurally cumbersome and lacks stability, but is also sensitive to vibration and requires precise optical alignment, severely restricting the system's reliability, power efficiency, and integration; meanwhile, vacuum systems typically include molecular pumps, ion pumps, and complex metal tubing and sealing structures, resulting in a large volume and weight, which also significantly hinders the compactness and portability of magneto-optical trap systems. These limitations make it difficult for traditional magneto-optical traps to meet the stringent requirements of applications such as field exploration, airborne platforms, and portable quantum sensors.

[0006] To overcome the problems of large size and low integration of traditional magneto-optical trap systems, researchers have conducted extensive research on local miniaturization and made some progress. In terms of optical systems, a scheme has been proposed to replace traditional bulk optical elements with micro-nano grating chips, utilizing the diffraction properties of gratings to achieve laser beam splitting and focusing, effectively reducing the size of the optical system. In terms of vacuum technology, components such as micro ion pumps and micro vacuum valves have also been developed, further reducing the space occupied by vacuum systems.

[0007] Chinese Patent Publication CN118919122A discloses a microchip and method for preparing ultracold atoms. The microchip includes a chip substrate with an oxide isolation layer. A wire etching layer is formed on the oxide isolation layer by ion evaporation sputtering. Wires are etched on the wire etching layer using photolithography. The wires are designed as double U-shaped and double H-shaped wires, with a groove size of 15 μm between the wires. This invention utilizes the highly gradient potential well field generated by the double U-shaped and double H-shaped wires on the chip to trap and manipulate cold atoms on-chip. This overcomes the limitations imposed by large coils and complex optical paths in traditional magneto-optical traps on the optical systems and magnetic field coils in miniaturized atomic vacuum physics units. Furthermore, its compact and steep potential well provides an effective way to further achieve rapid on-chip evaporation cooling for the preparation of ultracold atoms.

[0008] However, existing research largely focuses on the independent optimization of single or a few components, lacking a system-wide integrated design that coordinates all functional modules. The different miniaturized components still rely on complex external connections, such as optical fibers, wires, and vacuum tubes, to work together, resulting in a loose overall system structure and limited integration, failing to achieve true high integration and compactness in magneto-optical trap systems. Therefore, developing an integrated magneto-optical trap chip that organically integrates core functions such as magnetic field generation, optical control, and vacuum maintenance, and adopting a solution that integrates functional chips and magnetic field elements into a single magneto-optical trap system, has become a key breakthrough direction for promoting the practical application of cold atom technology. Summary of the Invention

[0009] To address the aforementioned technical problems, the first aspect of this invention proposes an integrated magneto-optical trap chip, which includes a glass shell, a functional chip, and a magnetic field chip; the glass shell, the functional chip, and the magnetic field chip are sequentially stacked to form a three-layer structure. The functional chip includes a first semiconductor substrate, and a diffraction grating, a microgroove for accommodating a solid atom source, a microgroove for accommodating a non-evaporable getter, and a connecting groove formed on the upper surface of the first semiconductor substrate. The glass shell is a cavity structure with an open bottom surface, and its bottom surface is in contact with the grooved surface of the functional chip, and the glass shell is sealed to the functional chip. The magnetic field chip includes a second semiconductor substrate and copper wire coils, through-hole copper pillars and copper pads disposed on the second semiconductor substrate; the magnetic field chip is bonded and fixed to the non-grooved surface of the functional chip.

[0010] The solid-state atomic source is a rubidium source.

[0011] As described in the first aspect of the present invention, the integrated magneto-optical trap chip is made of borosilicate glass, specifically a flat borosilicate glass of predetermined thickness. A bowl-shaped cavity structure is etched onto one plane of the flat borosilicate glass using micro-nano processing technology; the other plane of the borosilicate glass is a light-transmitting surface. The opening size of the cavity meets the following requirements: the length of the cavity opening is greater than or equal to the length of the diffraction grating, the width of the cavity opening is greater than or equal to the width of the diffraction grating, the depth of the cavity is less than the thickness of the flat borosilicate glass, and a predetermined width of sealing connection edge is left between the opening of the cavity and the edges of the four sides of the flat borosilicate glass. The sealing connection edge of the flat borosilicate glass is sealed to the upper surface of the first semiconductor substrate of the functional chip using an anodic bonding process.

[0012] The integrated magneto-optical trap chip as described in the first aspect of the present invention includes: a diffraction grating, a connecting groove, at least one atomic source microgroove for accommodating a solid atomic source, and at least one getter microgroove for accommodating a non-evaporable getter, fabricated on a first semiconductor substrate using a micro-nano etching process; The atomic source microgroove containing the solid atomic source and the getter microgroove are connected to the connecting groove through a channel made by micro-nano etching process; the connecting groove is connected to the diffraction grating made by micro-nano etching process.

[0013] The integrated magneto-optical trap chip as described in the first aspect of the present invention includes: a magnetic field chip substrate, copper wires located on the upper surface of the magnetic field chip substrate, copper pillars with through holes passing through the magnetic field chip substrate, and copper pads located on the lower surface of the magnetic field chip substrate; the upper surface of the magnetic field chip substrate is bonded to the non-grooved surface of the functional chip with a curing adhesive.

[0014] As described in the first aspect of the present invention, the integrated magneto-optical trap chip has a silicon substrate and two sets of copper ring structures. Each set of copper ring structures is composed of multiple rings of copper wires connected in sequence. The inner and outer ring ends of each set of copper ring structures are respectively connected to a through-hole copper pillar. The copper pads on the lower surface of the magnetic field chip substrate are connected to the through-hole copper pillars.

[0015] A second aspect of the present invention provides a method for fabricating an integrated magneto-optical trap chip, the method being used to produce an integrated magneto-optical trap chip as described in any of the preceding claims, the method comprising the following steps: Step 1: Use high borosilicate glass to make a glass shell including an internal cavity and an air extraction pipe; Step 2: A functional chip is fabricated on a first semiconductor substrate using a micro-nano etching process. The functional chip includes: a diffraction grating, an atomic source microgroove for accommodating a solid atomic source, a getter microgroove for accommodating a non-evaporable getter, and a connecting groove. Step 3: Fabricate the magnetic field chip on the second semiconductor substrate using micro-nano processes; Step 4: Complete the assembly of the three-layer structure chip to create an integrated magneto-optical trap chip.

[0016] The preparation method as described in the second aspect of the present invention, step 1 includes the following sub-steps: Step 1.1: A whole piece of flat borosilicate glass is laser-cut to cut through a predetermined area to create a lower layer of insulating glass with through holes. Step 1.2: Use another flat borosilicate glass as the upper glass layer, and use a bonding process to bond the upper glass layer to the lower insulating glass layer to form a glass shell with a cavity. Step 1.3: Drill a through hole at the position corresponding to the cavity on the side wall of the glass shell, and use a bonding process to connect the glass tube to the through hole so that the glass tube is connected to the cavity.

[0017] As described in the second aspect of the present invention, step 2 includes the following sub-steps: Step 2.1: A multi-pass process is used to etch grooves on the first semiconductor substrate in sequence, forming the following grooved regions: microgrooves of the diffraction grating preset area, microgrooves of the atomic source, microgrooves of the getter, and connecting grooves; the multi-pass process includes: spin coating, photolithography exposure, development, cleaning, and plasma etching; Step 2.2: Etch the grating at the location of the groove in the preset region of the diffraction grating using the multi-pass process to create a diffraction grating with a predetermined etching depth, a specified period, and a specified duty cycle. Step 2.3: Use magnetron sputtering to deposit an aluminum film of a specified thickness in the diffraction grating region.

[0018] The etching depth of the micro / nano diffraction grating is 1000-300nm, with a typical value of 200nm; the duty cycle of the diffraction grating is 1:1; and the aluminum film thickness is 50-145nm, with a typical value of 100nm.

[0019] As described in the second aspect of the present invention, step 3 includes the following sub-steps: Step 3.1: Clean the second semiconductor substrate as the magnetic field chip substrate, and deposit a silicon dioxide support layer on a predetermined area on the upper surface of the magnetic field chip substrate using a photolithography deposition process; the photolithography deposition process includes: photolithography exposure, development, etching and plasma-enhanced chemical vapor deposition; Step 3.2: On the upper surface of the magnetic field chip substrate, blind holes and wire trenches are sequentially fabricated using the following processes: spin coating, photolithography exposure, development, and etching. Step 3.3: Use magnetron sputtering to coat the wire grooves and blind holes with titanium and copper seed layers; Step 3.4: Fill the wire groove and blind hole with copper material using an electroplating copper process to form copper wires and fill the blind holes with copper material; Step 3.5: Remove the silicon dioxide support layer using hydrofluoric acid etching. Step 3.6: Thin the lower surface of the magnetic field chip substrate until the copper material at the bottom of the blind hole is exposed, forming a through-hole copper pillar that penetrates the magnetic field chip substrate; Step 3.7: On the lower surface of the magnetic field chip substrate, a copper pad is formed at the end of the through-hole copper pillar using a magnetron sputtering process.

[0020] As described in the second aspect of the present invention, step 4 includes the following sub-steps: Step 4.1: Place the solid atomic source into the atomic source microgroove of the functional chip, and place the non-evaporable getter into the getter microgroove; Step 4.2: Use anodizing bonding process to bond the lower end face of the lower insulating glass of the glass shell to the upper end face of the functional chip. Step 4.3: Use curing adhesive to bond and fix the lower end face of the functional chip to the upper end face of the magnetic field chip; Step 4.4: After the curing adhesive has fully cured, connect the glass tube of the glass shell to the external vacuum system and evacuate to the maximum vacuum level that the vacuum system can achieve. Step 4.5: After activating the solid-state atomic source, the glass tube is melted and sealed using a flame melting method to form a closed vacuum environment; Step 4.6: Activate the non-evaporable getter to complete the manufacturing of the integrated magneto-optical trap chip.

[0021] The beneficial effects of this invention are: 1. This invention achieves chip-level integration and extreme miniaturization of the magneto-optical trap system. This invention designs the three core modules—vacuum, optical field, and magnetic field—individually on individual chips, and integrates them into a single unit through precision assembly processes, ultimately forming a single magneto-optical trap chip with a centimeter-level size. This invention completely eliminates the magneto-optical trap's dependence on large three-dimensional anti-Helmholtz coils, discrete optical components, and bulky vacuum cavities, achieving a significant leap in system integration.

[0022] 2. This invention significantly reduces the power consumption of the magneto-optical trap system. The invention employs a miniaturized magnetic field chip that generates the gradient magnetic field required to trap atoms with only low power consumption. Furthermore, after activation and fusion sealing, the chip can maintain ultra-high vacuum and operate normally for extended periods without relying on external vacuum pumps or additional rubidium source heating devices, thereby greatly reducing the operating power consumption of the magneto-optical trap system.

[0023] 3. The magneto-optical trap chip provided by this invention has a simplified operation process and higher reliability. In the atomic trapping operation, only a single beam of circularly polarized light needs to be incident and the copper wire of the magnetic field chip needs to be energized to complete the cooling and trapping process; the integrated packaging structure effectively isolates external environmental interference such as vibration, avoids failures caused by loose discrete components in traditional systems, reduces the cumbersome manual debugging steps in traditional systems, and significantly improves the long-term stability and operational reliability of the system.

[0024] 4. This invention provides a low-cost, portable magneto-optical trap chip, broadening its application scenarios. The micro-nano fabrication processes employed in this invention, such as photolithography, etching, and bonding, are highly mature, facilitating mass production and standardized manufacturing of the device, thereby significantly reducing unit costs. This magneto-optical trap chip features small size, light weight, and high stability, and can be easily integrated into airborne, vehicle-mounted, and portable field systems. It overcomes the bottleneck of traditional magneto-optical traps being limited to laboratory environments, providing a miniaturized, high-performance, and low-cost integrated solution for portable quantum precision measurement, cold atom navigation and positioning, and other fields. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the magneto-optical trap chip structure proposed in this invention; Figure 2 This is a schematic diagram of a glass shell structure in the magneto-optical trap chip of the present invention; Figure 3 This is a schematic diagram of the functional chip structure of the present invention; Figure 4 This is a schematic diagram of the magnetic field chip structure of the present invention; Figure 5 This is a cross-sectional view of the magnetic field chip structure of the present invention; Figure 6 This is a schematic diagram of the glass shell manufacturing process; Figure 7This is a schematic diagram of the functional chip fabrication process; Figure 8 This is a schematic diagram of the magnetic field chip fabrication process; Figure 9 This is a schematic diagram of the magneto-optical trap chip assembly process.

[0026] Among them, 1. Glass shell; 11. Upper glass; 12. Lower hollow glass; 13. Glass tube; 2. Functional chip; 21. First semiconductor substrate; 22. Diffraction grating; 23. Atom source microgroove; 24. Getter microgroove; 3. Magnetic field chip; 31. Magnetic field chip substrate; 32. Copper wire; 33. Through-hole copper pillar; 34. Copper pad. Detailed Implementation

[0027] The magneto-optical trap system, as the core device for the preparation and manipulation of cold atoms, is the most critical component of the cold atom system. Its core function is to efficiently capture atoms from a room-temperature atomic gas chamber and cool the atoms through the synergistic effect of laser and magnetic field, ultimately forming a high-density cold atom cluster.

[0028] The objective of this invention is to fabricate an integrated and extremely miniaturized magneto-optical trap system chip. This invention designs the three core modules—vacuum, optical field, and magnetic field—individually on individual chips, and integrates them into a single chip using precision assembly processes, ultimately forming a single magneto-optical trap chip with a centimeter-scale dimensions. This invention avoids the large three-dimensional anti-Helmholtz coils typically used in magneto-optical traps, thus achieving a significant leap in system integration.

[0029] This invention utilizes micro-nano lithography technology to design and fabricate a magnetic field chip, which can generate the gradient magnetic field required to trap atoms with only low power consumption. At the same time, after the chip is activated and melt-sealed, it can maintain ultra-high vacuum and work normally for a long time without relying on external vacuum pump groups and additional rubidium source heating devices, thereby greatly reducing the operating power consumption of the magneto-optical trap system.

[0030] The magneto-optical trap chip provided by this invention only requires a single beam of circularly polarized light to be incident and the copper wires of the magnetic field chip to be energized during the atomic trapping operation to complete the cooling and trapping process. The integrated packaging structure effectively isolates external environmental interference such as vibration, avoids failures caused by loose discrete components, reduces manual debugging steps, and significantly improves the long-term stability and operational reliability of the system.

[0031] The micro-nano fabrication technology used in this invention is highly mature, which is conducive to the mass production and standardization of devices, thereby significantly reducing the cost per unit. This magneto-optical trap chip features small size, light weight, and high stability, and can be easily integrated into airborne, vehicle-mounted, and portable field systems, providing a miniaturized, high-performance, and low-cost integrated solution for portable quantum precision measurement, cold atom navigation and positioning, and other fields.

[0032] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0033] The magneto-optical trap chip structure of the present invention is shown in the appendix. Figure 1 As shown.

[0034] The first aspect of the present invention provides an integrated magneto-optical trap chip, the magneto-optical trap chip comprising a glass shell 1, a functional chip 2, and a magnetic field chip 3; the glass shell 1, the functional chip 2, and the magnetic field chip 3 are stacked sequentially to form a three-layer structure; The functional chip 2 includes a first semiconductor substrate, and a diffraction grating, a microgroove for accommodating a solid atom source, a microgroove for accommodating a non-evaporable getter, and a connecting groove formed on the upper surface of the first semiconductor substrate. The glass shell 1 is a cavity structure with an open bottom surface, and its bottom surface is in contact with the grooved surface of the functional chip 2. The glass shell 1 and the functional chip 2 are sealed together. The magnetic field chip 3 includes a second semiconductor substrate and copper wire coils, through-hole copper pillars and copper pads disposed on the second semiconductor substrate; the magnetic field chip 3 is bonded and fixed to the non-grooved surface of the functional chip 2.

[0035] The solid-state atomic source is a rubidium source.

[0036] Example 1 The main technical feature of the chip-level magneto-optical trap structure of the present invention is that it adopts a "sandwich" stacked configuration, which separates the vacuum system, optical field system and magnetic field system of the traditional magneto-optical trap into chips, and integrates them from top to bottom into three main parts: glass shell 1, functional chip 2 and magnetic field chip 3 through micro-nano fabrication and integration technology, and finally forms a monolithic device with a length × width × height of 4cm × 3cm × 1.5cm.

[0037] Glass shell 1 is made of high borosilicate glass and measures 4cm × 3cm × 9mm, as shown in the attached image. Figure 2 As shown, it includes an upper glass layer 11, a lower insulating glass layer 12, and a glass tube 13; the upper glass layer 11 has dimensions of 4cm×3cm×3mm and serves as the top cover of the cavity without additional processing; the lower insulating glass layer 12 has dimensions of 4cm×3cm×6mm and is formed by laser cutting in a preset area to create a 2cm×2cm through cavity. The glass frame is approximately 6mm thick. The rectangular cutting area is 1cm, 1cm, and 5mm away from the upper edge, lower edge, and right edge, respectively, forming the sidewall of the cavity; the glass tube 13 has an outer diameter of 4mm, an inner diameter of 2mm, and a length of 8cm.

[0038] Assembly Relationship: The upper glass 11 and the lower insulating glass 12 are fixed together by a glass-to-glass bonding process, forming a micro-cavity with an opening at the bottom, as shown in the attached diagram. Figure 2As shown; the glass tube 13 is fixed to the center of the side wall of the lower insulating glass 12 using a glass bonding process, with one end connected to the central cavity and the other end used to connect to the external vacuum system. Of course, the glass shell 1 mentioned above can also be made of a single piece of borosilicate glass, and a micro cavity with a bottom opening can be formed by photolithography and optical polishing.

[0039] The functional chip is made of silicon, but other semiconductor materials can also be used as the substrate. The silicon substrate dimensions are 4cm × 3cm × 0.3cm, as shown in the attached image. Figure 3 As shown, the functional chip 2 includes a first semiconductor substrate 21, a diffraction grating 22, an atomic source microgroove 23, a getter microgroove 24, and a connecting groove 25. The diffraction grating 22 is located in the region slightly to the right of the center of the first semiconductor substrate. The center of this region is 2cm from the two long sides and 1.5cm from the right short side. During fabrication, this region is first deeply etched to a depth of 2mm, and then a diffraction grating with a grating period of 1.1μm, an etching depth of 200nm, and a duty cycle of 1:1 is obtained through photolithography and etching processes. Finally, a 100nm aluminum film is deposited on the grating surface to enhance light reflectivity. There are two atomic source microgrooves 23, with dimensions of 0.45cm × 0.65cm × 0.2cm, located on either side of the center. Figure 3 As shown, the atomic source can be a rubidium source. The upper rubidium source groove is 0.5 cm from the upper edge and 0.2 cm from the left edge, respectively, and the lower rubidium source groove is 0.5 cm from the lower edge and 0.2 cm from the left edge, respectively. There are two getter microgrooves 24, each with dimensions of 0.45 cm × 0.65 cm × 0.2 cm, located on either side of the center, as shown. Figure 3 As shown, the dimensions of the getter slot located at the top are 0.5cm and 0.85cm from the top and left edges, respectively, and the dimensions of the getter slot located at the bottom are 0.5cm and 0.85cm from the bottom and left edges, respectively. The connecting slot 25 has dimensions of 1.3cm × 0.5cm × 0.2cm, and is located 1.75cm and 0.2cm from the top and left edges, respectively. The connecting slot 25 is connected to the other four slots through slots with dimensions of 0.2cm × 0.1cm × 0.2cm, respectively.

[0040] The functions of each part of the functional chip 2 are as follows: the diffraction grating 22 performs first-order diffraction on the incident 780nm cooling laser to form a converging light field for atomic trapping; the solid rubidium source placed in the atomic source micro-groove 23 releases rubidium atoms after activation; and the non-evaporating getter placed in the getter micro-groove 24 adsorbs residual gas after activation to maintain the cavity vacuum.

[0041] The magnetic field chip 3 measures 4cm × 3cm × 0.3cm, as shown in the attached image. Figure 4 and Figure 5As shown, the magnetic field chip includes a magnetic field chip substrate 31, copper wires 32, through-hole copper pillars 33, and copper pads 34. The magnetic field chip substrate 31 is the main body of the magnetic field chip 3, supporting the other parts. The copper wires 32 provide a magnetic field gradient for atomic trapping. They are designed as two sets of concentric circular coils with different radii and numbers of turns, with specific parameters determined by calculations based on the operating point requirements of the magnetic field and the corresponding electromagnetic field equations. The through-hole copper pillars 33 are used to connect the circuits on the upper and lower surfaces, and their diameter is 0.05 cm. The copper pads 34 are located at the ends of the through-hole copper pillars, and their size is 0.3 cm × 0.3 cm. They serve two purposes: to achieve electrical connection with the copper pillars and to facilitate the soldering and connection of external wires.

[0042] The parameter design process for diffraction grating 22 and copper wire 32 is as follows: The present invention is designed so that after the incident 780nm laser is diffracted by the grating, a convergence center for atomic trapping is formed above the central region of the grating. The parameters of the diffraction grating 22 and the copper wire 32 need to be determined according to the working point and the size of the magneto-optical trap chip.

[0043] The specific calculation process is as follows: Given that the side length of the grating region is L = 2 cm and the preset atomic trapping working point height is h = 5 mm, θ =arctan(0.25× L / h ) = arctan(0.5 / 0.5) = 45°; according to the grating equation d sinθ=n λ (n=1st order diffraction, λ =780nm), from which the grating period can be obtained. d = λ / sinθ=780nm / sin45°≈1.103μm, the actual value is 1.1μm to adapt to the process accuracy.

[0044] The operating point and parameters of the copper conductor 32 are determined by the following formula: in, µ 0 is the permeability of free space. I It is the driving current. z 0 is the working point. r 1n and r 2n It is the radius of the nth turn of the inner and outer coils. B z and B z / z represents the magnetic field strength and magnetic field gradient, respectively.

[0045] The operating point is set 5 mm above the diffraction grating 22. Structurally, the diffraction grating 22 region is etched down 2 mm relative to the functional chip surface, while the copper wire 32 of the magnetic field chip is etched down 1 mm relative to its substrate surface. Therefore, the actual operating point is located 7 mm above the geometric center plane of the copper wire 32. The magnetic field objective of this design is to achieve zero magnetic field strength at 7 mm above the center of the copper wire 32, while generating a magnetic field with a spatial gradient of 10 Gs / cm to satisfy the rubidium atom trapping conditions. To achieve this objective, all known physical and geometric constraints are substituted into the electromagnetic field equations for solution. Through an ergonomic optimization algorithm, a set of optimal coil parameters is finally determined. The inner coil radius ranges from 0.75 to 5.78 mm, with a total of 13 turns and an operating current of 2.94 A; the outer coil radius ranges from 9.28 to 12.14 mm, with an operating current of 2.22 A; the center-to-center distance between adjacent wires in both the inner and outer coils is 0.27 mm.

[0046] As described in the first aspect of the present invention, the integrated magneto-optical trap chip is made of borosilicate glass. A flat borosilicate glass of predetermined thickness is used, and a bowl-shaped cavity structure is etched on one plane of the flat borosilicate glass using micro-nano processing technology; the other plane of the borosilicate glass is a light-transmitting surface. The opening size of the cavity meets the following requirements: the length of the cavity opening is greater than or equal to the length of the diffraction grating 22, the width of the cavity opening is greater than or equal to the width of the diffraction grating 22, the depth of the cavity is less than the thickness of the flat borosilicate glass, and a predetermined width of sealing connection edge is left between the opening of the cavity and the edges of the four sides of the flat borosilicate glass. The sealing connection edge of the flat borosilicate glass is sealed to the upper surface of the first semiconductor substrate of the functional chip 2 using an anodic bonding process.

[0047] As described in the first aspect of the present invention, the integrated magneto-optical trap chip 2 includes: a diffraction grating 22, a connecting groove 25, at least one atomic source microgroove 23 for accommodating a solid atomic source, and at least one getter microgroove 24 for accommodating a non-evaporable getter, all fabricated on a first semiconductor substrate 21 using a micro-nano etching process. The atomic source microgroove 23 containing the solid atomic source and the getter microgroove 24 are connected to the connecting groove 25 through a channel made by micro-nano etching process; the connecting groove 25 is connected to the diffraction grating 22 made by micro-nano etching process.

[0048] As described in the first aspect of the present invention, the integrated magneto-optical trap chip, the magnetic field chip 3 includes: a magnetic field chip substrate 31, copper wires 32 located on the upper surface of the magnetic field chip substrate 31, copper pillars 33 with through holes passing through the magnetic field chip substrate 31, and copper pads 34 located on the lower surface of the magnetic field chip substrate 31; the upper surface of the magnetic field chip substrate 31 is bonded to the non-grooved surface of the functional chip 2 with a curing adhesive.

[0049] As described in the first aspect of the present invention, in the integrated magneto-optical trap chip, the substrate 31 of the magnetic field chip 3 is made of silicon material, and the copper wire 32 is a set of copper ring structures. Each set of copper ring structures is composed of multiple rings of copper wires connected in sequence. The inner and outer ring ends of each set of copper ring structures are respectively connected to a through-hole copper pillar 33. The copper pad 34 on the lower surface of the magnetic field chip substrate 31 is connected to the through-hole copper pillar 33.

[0050] A second aspect of the present invention provides a method for fabricating an integrated magneto-optical trap chip, the method being used to produce an integrated magneto-optical trap chip as described in any of the preceding claims, the method comprising the following steps: Step 1: Use high borosilicate glass to make a glass shell 1 including an internal cavity and an air extraction pipe; Step 2: A functional chip 2 is fabricated on the first semiconductor substrate 21 using a micro-nano etching process. The functional chip 2 includes: a diffraction grating 22, an atomic source microgroove 23 for accommodating a solid atomic source, a getter microgroove 24 for accommodating a non-evaporable getter, and a connecting groove 25. Step 3: Fabricate magnetic field chip 3 on the second semiconductor substrate using micro-nano technology; Step 4: Complete the assembly of the three-layer structure chip to create an integrated magneto-optical trap chip.

[0051] Example 2 The specific steps of the fabrication method of the magneto-optical trap chip of the present invention are as follows: Step 1: Preparation of glass shell 1, as shown in the attached document. Figure 6 As shown, the specific steps include: 1a: The upper glass 11 and the lower insulating glass 12 are ultrasonically cleaned with deionized water and anhydrous ethanol, and then dried with nitrogen gas. 1b: Using laser cutting equipment, a rectangular through cavity with a size of 2cm×2cm is processed on the lower insulating glass 12. The center of the cavity is 2cm from both long sides of the glass and 1.5cm from the right short side.

[0052] 1c: The upper glass 11 and the lower insulating glass 12 are bonded together using a glass-to-glass process; 1d: A 4mm diameter through hole is machined into the side wall of the cavity using mechanical drilling to connect the cavity with the outside. 1e: Take a hollow cylindrical glass tube 13 with an outer diameter of 4mm, an inner diameter of 2mm, and a length of 8cm. Coat the contact surface between the tube and the hole with a light adhesive. After applying a certain pressure and baking at high temperature, fix the glass tube 13 to the through hole to achieve communication between the tube and the cavity.

[0053] Step 2: Fabrication of functional chip 2, as shown in the attached diagram. Figure 7 As shown, the specific steps include: 2a: The first semiconductor substrate 21 of the functional chip is ultrasonically cleaned with deionized water and anhydrous ethanol in sequence, and then dried with nitrogen gas to ensure surface cleanliness.

[0054] 2b: The diffraction grating region 22, the atomic source microgroove 23, the getter microgroove 24, and the connecting groove 25 are obtained by homogenization, photolithography, and etching. The size of the diffraction grating region is 2cm×2cm. The size of the four grooves is 0.45cm×0.65cm×0.2cm. The length, width, and depth of the connecting groove 25 are 1.3cm×0.5cm×0.2cm. The connecting groove is connected to the four grooves through a groove with a length, width, and depth of 0.2cm×0.1cm×0.2cm.

[0055] 2c: In the diffraction grating 22 region, a grating structure with a period of 1100nm, a duty cycle of 1:1, and an etching depth of 200nm is obtained again through homogenization, photolithography, and etching processes.

[0056] 2d: A 100nm thick aluminum film is deposited on the grating surface by magnetron sputtering.

[0057] Step 3: Fabrication of magnetic field chip 3, as shown in the attached document. Figure 8 As shown, the specific steps include: 3a: The magnetic field chip substrate 31 is ultrasonically cleaned sequentially with deionized water and anhydrous ethanol, and then dried with nitrogen gas to ensure surface cleanliness.

[0058] 3b: A 1mm deep trench is etched in the conductor area using micro-nano fabrication processes such as spin coating, photolithography, and etching.

[0059] 3c: A 100μm thick silicon dioxide layer is deposited in the etched area using a chemical vapor deposition process; 3d: Copper grooves and blind vias are fabricated in the copper wire region again through spin coating, photolithography and etching processes.

[0060] 3e: In the copper wire groove and blind hole, a 20 nm thick titanium adhesion layer and a 200 nm thick copper seed layer are deposited sequentially by sputtering process; 3f: Using an electroplating process, copper material is used to fill the copper wire groove and blind hole to form a planar copper wire 32 and a blind hole copper pillar.

[0061] 3g: Use hydrofluoric acid to remove the silicon dioxide layer.

[0062] 3h: Perform chemical mechanical polishing to thin the lower surface of the magnetic field chip substrate 31 until the blind hole copper pillar is exposed, forming the through hole copper pillar 33; 3i: A 200nm thick copper layer is deposited on the surface of the magnetic field chip substrate 31 by magnetron sputtering, and then patterned to form copper pads 34.

[0063] Step 4: Integration of discrete components, as shown in the attached diagram. Figure 9 As shown, the specific steps include: 4a: The solid rubidium source and the non-evaporable getter are placed into the atomic source microgroove 23 and getter microgroove 24 of the functional chip 2, respectively. Then, the lower end face of the lower insulating glass 12 of the glass shell 1 is aligned with the upper end face of the functional chip 2 and bonded through an anodic bonding process.

[0064] 4b: Apply curing adhesive to the lower surface of the functional chip 2 and align and bond it to the upper surface of the magnetic field chip 3.

[0065] 4c: Connect the glass tube 13 of the glass shell 1 to the external vacuum system through a metal sealing joint, evacuate to the system's ultimate vacuum, and then use a high-power laser to activate the solid rubidium source and the non-evaporable getter respectively.

[0066] 4d: Using the flame melting method, the glass tube is heated and melted to form a sealed cavity.

[0067] The preparation method as described in the second aspect of the present invention, step 1 includes the following sub-steps: Step 1.1: A whole piece of flat borosilicate glass is cut through a preset area using a laser cutting process to make a lower layer of insulating glass 12 with through holes; Step 1.2: Take another flat borosilicate glass as the upper glass 11, and use a bonding process to bond the upper glass 11 to the lower hollow glass 12 to form a glass shell 1 with a cavity; Step 1.3: Drill a through hole at the position corresponding to the cavity on the side wall of the glass shell 1, and use a bonding process to connect the glass tube 13 to the through hole so that the glass tube 13 is connected to the cavity.

[0068] As described in the second aspect of the present invention, step 2 includes the following sub-steps: Step 2.1: In the first semiconductor substrate 21, a multi-pass process is used to etch grooves in sequence to form the following grooved areas: microgrooves in the preset area of ​​the diffraction grating 22, atomic source microgrooves 23, getter microgrooves 24, and connecting grooves 25; the multi-pass process includes: spin coating, photolithography exposure, development, cleaning, and plasma etching; Step 2.2: The grating is etched using the multi-pass process at the position of the preset region groove of the diffraction grating 22 to form a diffraction grating 22 with a predetermined etching depth, a specified period and a specified duty cycle. Step 2.3: Use magnetron sputtering to deposit an aluminum film of a specified thickness in the region of the diffraction grating 22.

[0069] The etching depth of the micro / nano diffraction grating is 1000-300nm, with a typical value of 200nm; the duty cycle of the diffraction grating is 1:1; and the aluminum film thickness is 50-145nm, with a typical value of 100nm.

[0070] As described in the second aspect of the present invention, step 3 includes the following sub-steps: Step 3.1: Clean the second semiconductor substrate as the magnetic field chip substrate 31, and deposit a silicon dioxide support layer on a predetermined area on the upper surface of the magnetic field chip substrate 31 using a photolithography deposition process; the photolithography deposition process includes: photolithography exposure, development, etching and plasma-enhanced chemical vapor deposition; Step 3.2: On the upper surface of the magnetic field chip substrate 31, blind holes and wire trenches are sequentially fabricated using the following processes: spin coating, photolithography exposure, development, and etching. Step 3.3: Use magnetron sputtering to coat the wire grooves and blind holes with titanium and copper seed layers; Step 3.4: Fill the wire groove and blind hole with copper material using the electroplating copper process to form copper wire 32 and fill the blind hole with copper material; Step 3.5: Remove the silicon dioxide support layer using hydrofluoric acid etching. Step 3.6: Thin the lower surface of the magnetic field chip substrate 31 until the copper material at the bottom of the blind hole is exposed, to form a through-hole copper pillar 33 penetrating the magnetic field chip substrate 31; Step 3.7: On the lower surface of the magnetic field chip substrate 31, a copper pad 34 is formed at the end of the through-hole copper pillar 33 using a magnetron sputtering process.

[0071] As described in the second aspect of the present invention, step 4 includes the following sub-steps: Step 4.1: Place the solid atomic source into the atomic source micro-groove 23 of the functional chip 2, and place the non-evaporable getter into the getter micro-groove 24; Step 4.2: Use anodizing bonding process to bond the lower end face of the lower insulating glass 11 of the glass shell 1 to the upper end face of the functional chip 2. Step 4.3: Use curing adhesive to bond and fix the lower end face of the functional chip 2 to the upper end face of the magnetic field chip 3; Step 4.4: After the curing adhesive has completely cured, connect the glass tube 13 of the glass shell 1 to the external vacuum system and evacuate to the maximum vacuum level that the vacuum system can achieve. Step 4.5: After activating the solid-state atomic source, the glass tube 12 is melted and sealed using a flame melting method to form a closed vacuum environment; Step 4.6: Activate the non-evaporable getter to complete the manufacturing of the integrated magneto-optical trap chip.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention and are not intended to limit them. Although the embodiments of the present invention have been described in detail with reference to the above preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions to the technical solutions of the embodiments of the present invention should not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An integrated magneto-optical trap chip, characterized in that, The magneto-optical trap chip includes a glass shell (1), a functional chip (2), and a magnetic field chip (3); the glass shell (1), the functional chip (2), and the magnetic field chip (3) are stacked sequentially to form a three-layer structure; The functional chip (2) includes a first semiconductor substrate, and a diffraction grating, a microgroove for accommodating a solid atom source, a microgroove for accommodating a non-evaporable getter, and a connecting groove formed on the upper surface of the first semiconductor substrate. The glass shell (1) is a cavity structure with an open bottom surface. Its bottom surface is in contact with the grooved surface of the functional chip (2), and the glass shell (1) and the functional chip (2) are sealed together. The magnetic field chip (3) includes a second semiconductor substrate and copper wire coils, through-hole copper pillars and copper pads disposed on the second semiconductor substrate; the magnetic field chip (3) is bonded and fixed to the non-grooved surface of the functional chip (2).

2. The integrated magneto-optical trap chip as described in claim 1, characterized in that, The glass shell (1) is made of borosilicate glass, and a flat borosilicate glass of predetermined thickness is used. A bowl-shaped cavity structure is etched on one plane of the flat borosilicate glass using micro-nano processing technology; the other plane of the borosilicate glass is a light-transmitting surface. The opening size of the cavity meets the following requirements: the length of the cavity opening is greater than or equal to the length of the diffraction grating (22), the width of the cavity opening is greater than or equal to the width of the diffraction grating (22), the depth of the cavity is less than the thickness of the flat borosilicate glass, and a predetermined width of sealing connection edge is left between the opening of the cavity and the edges of the four sides of the flat borosilicate glass. The sealing connection edge of the flat borosilicate glass is sealed to the upper surface of the first semiconductor substrate of the functional chip (2) using an anodic bonding process.

3. The integrated magneto-optical trap chip as described in claim 1, characterized in that, The functional chip (2) includes: a diffraction grating (22), a connecting groove (25), at least one atomic source microgroove (23) for accommodating a solid atomic source, and at least one getter microgroove (24) for accommodating a non-evaporable getter, fabricated on a first semiconductor substrate (21) using a micro-nano etching process. The atomic source microgroove (23) containing the solid atomic source and the getter microgroove (24) are connected to the connecting groove (25) through a channel made by micro-nano etching process; the connecting groove (25) is connected to the diffraction grating (22) made by micro-nano etching process.

4. The integrated magneto-optical trap chip as described in claim 1, characterized in that, The magnetic field chip (3) includes: a magnetic field chip substrate (31), copper wires (32) located on the upper surface of the magnetic field chip substrate (31), copper pillars (33) passing through the magnetic field chip substrate (31), and copper pads (34) located on the lower surface of the magnetic field chip substrate (31); the upper surface of the magnetic field chip substrate (31) is bonded to the non-grooved surface of the functional chip (2) with a curing adhesive.

5. The integrated magneto-optical trap chip as described in claim 4, characterized in that, The substrate (31) of the magnetic field chip (3) is made of silicon material. The copper wire (32) consists of two sets of copper ring structures. Each set of copper ring structures is composed of multiple copper wire rings connected in sequence. The inner and outer ring ends of each set of copper ring structures are respectively connected to a through-hole copper pillar (33). The copper pad (34) on the lower surface of the magnetic field chip substrate (31) is connected to the through-hole copper pillar (33).

6. A method for fabricating an integrated magneto-optical trap chip, the method being used to produce the integrated magneto-optical trap chip as described in any one of claims 1-5, characterized in that, The preparation method includes the following steps: Step 1, use high borosilicate glass to make a glass shell including an internal cavity and an air extraction pipe (1). Step 2: A functional chip (2) is fabricated on a first semiconductor substrate (21) using a micro-nano etching process. The functional chip (2) includes: a diffraction grating (22), an atomic source microgroove (23) for accommodating a solid atomic source, a getter microgroove (24) for accommodating a non-evaporable getter, and a connecting groove (25). Step 3: Fabricate a magnetic field chip on the second semiconductor substrate using micro-nano technology (3). Step 4: Complete the assembly of the three-layer structure chip to create an integrated magneto-optical trap chip.

7. The preparation method according to claim 6, characterized in that, Step 1 includes the following sub-steps: Step 1.1: A whole piece of flat borosilicate glass is cut through the preset area using laser cutting technology to make a lower layer of insulating glass with through holes (12). Step 1.2: Take another flat borosilicate glass as the upper glass (11), and use a bonding process to bond the upper glass (11) to the lower insulating glass (12) to form a glass shell (1) with a cavity. Step 1.3: Drill a through hole at the position corresponding to the cavity on the side wall of the glass shell (1), and use a bonding process to connect the glass tube (13) to the through hole so that the glass tube (13) is connected to the cavity.

8. The preparation method according to claim 7, characterized in that, Step 2 includes the following sub-steps: Step 2.1, a multi-pass process is used to etch grooves on the first semiconductor substrate (21) in sequence, and the following groove areas are etched on the first semiconductor substrate respectively: microgrooves of the preset area of ​​the diffraction grating (22), atomic source microgrooves (23), getter microgrooves (24) and connecting grooves (25); the multi-pass process includes: spin coating, photolithography exposure, development, cleaning and plasma etching; Step 2.2: The grating is etched using the multi-pass process at the position of the preset region groove of the diffraction grating (22) to form a diffraction grating (22) with a predetermined etching depth, a specified period and a specified duty cycle. Step 2.3: Use magnetron sputtering to deposit an aluminum film of a specified thickness in the region of the diffraction grating (22).

9. The preparation method according to claim 8, characterized in that, Step 3 includes the following sub-steps: Step 3.1: Clean the second semiconductor substrate as the magnetic field chip substrate (31), and deposit a silicon dioxide support layer on a predetermined area on the upper surface of the magnetic field chip substrate (31) using a photolithography deposition process; the photolithography deposition process includes: photolithography exposure, development, etching and plasma-enhanced chemical vapor deposition; Step 3.2, blind holes and wire trenches are sequentially prepared on the upper surface of the magnetic field chip substrate (31) using the following processes, the processes including: spin coating, photolithography exposure, development and etching; Step 3.3: Use magnetron sputtering to coat the wire grooves and blind holes with titanium and copper seed layers; Step 3.4: Fill the wire groove and blind hole with copper material using the electroplating copper process to form copper wire (32) and fill the blind hole with copper material; Step 3.5: Remove the silicon dioxide support layer using hydrofluoric acid etching. Step 3.6: Thin the lower surface of the magnetic field chip substrate (31) until the copper material at the bottom of the blind hole is exposed, and make a through-hole copper pillar (33) that penetrates the magnetic field chip substrate (31). Step 3.7: On the lower surface of the magnetic field chip substrate (31), a copper pad (34) is formed at the end of the through-hole copper pillar (33) using a magnetron sputtering process.

10. The preparation method according to claim 9, characterized in that, Step 4 includes the following sub-steps: Step 4.1: Place the solid atomic source into the atomic source micro-groove (23) of the functional chip (2), and place the non-evaporable getter into the getter micro-groove (24); Step 4.2: Use anodizing bonding process to bond the lower end face of the lower insulating glass (11) of the glass shell (1) to the upper end face of the functional chip (2); Step 4.3: Use curing adhesive to bond and fix the lower end face of the functional chip (2) to the upper end face of the magnetic field chip (3); Step 4.4 After the curing adhesive has fully cured, connect the glass tube (13) of the glass shell (1) to the external vacuum system and evacuate to the maximum vacuum level that the vacuum system can achieve. Step 4.5: After activating the solid atomic source, the glass tube (12) is melted and sealed by flame melting to form a closed vacuum environment; Step 4.6: Activate the non-evaporable getter to complete the manufacturing of the integrated magneto-optical trap chip.

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