Cold backup computer with high power supply and instruction integrity

Abstract

One aspect of the present disclosure relates to a cold backup computer architecture, comprising an instruction calculation module for receiving a backup activation signal and controlling a first power supply switch based on the received backup activation signal; the interface management / communication module is used for receiving the backup activation signal and controlling a second power supply switch based on the received backup activation signal; the power supply interface is used for being activated from a cold backup state to supply power to one or more external units when the first power supply switch and the second power supply switch are closed; and an interface chip module for activating from the cold backup state for communicating with the one or more external units when both the first and second power supply switches are closed, where the instruction calculation module determines a control law function output signal according to a control law when both the first and second power supply switches are closed, and the control law function output signal is transmitted to the interface chip module through the interface management / communication module. Other aspects also include a corresponding method and the like.

Description

Technical Field

[0001] This application generally relates to the main flight control system of civil aircraft, and more particularly to the cold backup computer of the main flight control system. Background Technology

[0002] The main flight control system of civil aircraft is one of the key technologies to ensure flight safety and performance. With the development of aviation technology, the flight control system has undergone a transformation from mechanical transmission to fly-by-wire (FBW), which has greatly improved the aircraft's maneuverability, safety and efficiency.

[0003] Fly-by-wire control systems replace traditional mechanical transmissions with electronic signals, allowing pilot commands to be processed by a computer and directly control the aircraft's control surfaces and actuators. In this context, the cold backup computer of the main flight control system becomes a crucial component.

[0004] The primary function of a cold backup computer is to quickly take over flight control tasks and ensure aircraft safety when the main flight control computer fails. This design improves system redundancy and reliability, and is an important consideration in the design of modern civil aircraft flight control systems.

[0005] Cold backup computers are typically in standby mode and do not participate in normal flight control calculations, but they can immediately start up and take over control when a problem is detected with the main computer. This design allows the aircraft to continue flying safely or perform an emergency landing even if the main flight control system fails.

[0006] Therefore, there is a need in this field for an improved backup activation scheme for the backup computer of the main flight control system of civil aircraft. Summary of the Invention

[0007] One aspect of this disclosure relates to a cold backup computer architecture, including an instruction calculation module for receiving a backup activation signal and controlling a first power supply switch based on the received backup activation signal; an interface management / communication module for receiving the backup activation signal and controlling a second power supply switch based on the received backup activation signal; a power supply interface for activating from a cold backup state to provide power to one or more external units when both the first and second power supply switches are closed; and an interface chip module for activating from the cold backup state to communicate with the one or more external units when both the first and second power supply switches are closed, wherein when both the first and second power supply switches are closed, the instruction calculation module determines a control law function output signal according to a control law and transmits the control law function output signal to the interface chip module through the interface management / communication module.

[0008] According to some exemplary embodiments, in this cold backup computer architecture, the instruction calculation module and the interface management / communication module independently receive the backup activation signal, and the backup activation signal includes main system status information, ground speed information, or both.

[0009] According to some exemplary embodiments, in this cold backup computer architecture, the interface chip module is further configured to perform at least one of the following: convert the control law function output signal into a control signal that can be received by the corresponding external unit among the one or more external units, and transmit the converted control signal to the corresponding external unit; and receive an external unit input signal from at least one of the one or more external units, convert the external unit input signal into a control law function input signal, and transmit the converted control law function input signal to the instruction calculation module through the interface management / communication module.

[0010] According to some exemplary embodiments, in this cold backup computer architecture, the instruction calculation module and the interface management / communication module include an isolation interface. The isolation interface provides level isolation between the instruction calculation module and the interface management / communication module, and the instruction calculation module and the interface management / communication module communicate through the isolation interface, including the transmission of the control law function input signal, the control law function output signal, or both.

[0011] According to some exemplary embodiments, in this cold backup computer architecture, the first power supply switch and the second power supply switch are connected in series between the power supply and the power supply interface.

[0012] According to some exemplary embodiments, in this cold backup computer architecture, the instruction calculation module and the interface management / communication module each include a corresponding activation function submodule. The instruction calculation module further includes an instruction calculation submodule, and the interface management / communication module further includes an interface management function submodule. When the cold backup computer architecture is in the cold backup state, only the respective activation function submodules of the instruction calculation module and the interface management / communication module operate to independently receive the backup activation signal. When the corresponding backup activation signal meets predetermined conditions, the activation function submodule in the instruction calculation module activates the instruction calculation submodule to determine the control law function output signal according to the control law, and the activation function submodule in the interface management / communication module activates the interface management function submodule to transmit the control law function output signal to the interface chip module.

[0013] According to some exemplary embodiments, in this cold backup computer architecture, when the activation function submodule in the instruction calculation module activates the instruction calculation submodule, the instruction calculation module cyclically runs the activation function submodule and the instruction calculation submodule.

[0014] Another aspect of this disclosure relates to a method for a cold backup computer architecture, comprising: receiving a backup activation signal by an instruction calculation module and controlling a first power supply switch based on the received backup activation signal; receiving the backup activation signal by an interface management / communication module and controlling a second power supply switch based on the received backup activation signal; activating a power supply interface from a cold backup state to provide power to one or more external units when both the first and second power supply switches are closed; and activating an interface chip module from the cold backup state to communicate with the one or more external units when both the first and second power supply switches are closed, wherein when both the first and second power supply switches are closed, the instruction calculation module determines a control law function output signal according to a control law and transmits the control law function output signal to the interface chip module through the interface management / communication module.

[0015] According to some exemplary embodiments, in this method, the instruction calculation module and the interface management / communication module include an isolation interface, which provides level isolation between the instruction calculation module and the interface management / communication module, and the instruction calculation module and the interface management / communication module communicate through the isolation interface, including the transmission of the control law function input signal, the control law function output signal, or both.

[0016] According to some exemplary embodiments, in this method, the instruction calculation module and the interface management / communication module each include a corresponding activation function submodule, wherein the instruction calculation module further includes an instruction calculation submodule, and the interface management / communication module further includes an interface management function submodule. When the cold backup computer architecture is in the cold backup state, only the respective activation function submodules of the instruction calculation module and the interface management / communication module operate to independently receive the backup activation signal. Furthermore, when the corresponding backup activation signal meets predetermined conditions, the activation function submodule in the instruction calculation module activates the instruction calculation submodule to determine the control law function output signal according to the control law, and the activation function submodule in the interface management / communication module activates the interface management function submodule to transmit the control law function output signal to the interface chip module.

[0017] Other aspects of this disclosure include corresponding apparatus, devices, and computer-readable media. Attached Figure Description

[0018] Figure 1 A schematic diagram of the backup computer architecture of the main flight control system according to one aspect of this disclosure is shown.

[0019] Figure 2 A schematic diagram of a cold backup computer architecture according to one aspect of this disclosure is shown.

[0020] Figure 3 A diagram illustrating the external interconnections of a cold backup computer architecture according to one aspect of this disclosure is shown.

[0021] Figure 4 A flowchart illustrating a method for cold backup computer architecture according to one aspect of this disclosure is shown. Detailed Implementation

[0022] In practical applications in this field, flight control systems can consist of multiple computers, including elevator and aileron computer (ELAC), spoiler and elevator computer (SEC), and flight stability augmentation computer (FAC), which work together to achieve stable control of the aircraft. Among these computers, some are designed with backup functions to ensure that in the event of failure of the primary control computer, the backup computer can quickly take over and maintain the aircraft's flight control.

[0023] In summary, the cold backup computer of the main flight control system of civil aircraft is a key technology for improving aircraft safety and reliability. It ensures aircraft safety in the event of a failure in the main flight control system by providing immediate backup control capabilities. This design philosophy reflects the high importance modern civil aircraft place on flight safety and system reliability.

[0024] In the technical field of backup computers for the main flight control system of civil aircraft, the key technologies involved may include, but are not limited to, the following aspects: Multi-system backup methods and devices: This technical field focuses on how to ensure the normal operation of an aircraft when some systems fail, and how to implement a master-backup scheme. This involves a master flight control computing unit sharing control information with multiple backup flight control computing units. When the status data of the master or backup flight control computing units meet preset fault conditions, the backup flight control computing units that meet the conditions update and adjust their controller outputs in real time using the acquired control information to smoothly execute the master-backup switchover of the flight control computing units.

[0025] Backup Flight Control System and Method: This technical field provides a backup flight control system, including a cockpit command device, a flight control center device, a backup flight control device, and flight control actuation devices. This system can activate the backup flight control device in the event of a failure of the primary flight control device, thereby ensuring aircraft safety.

[0026] Fly-by-wire flight backup control system and method: This technical field proposes a novel fly-by-wire flight control backup control system, which adopts a backup system architecture independent of the main control channel to ensure the security of the backup control system. In the event of a common-mode failure of the main control computer, the backup control system can quickly take over aircraft control, providing the aircraft with the ability to continue safe flight and make an emergency landing as soon as possible.

[0027] Backup Control System Based on Distributed Fly-by-Wire Architecture: This technical field relates to a backup control system for distributed fly-by-wire flight control systems in civil aircraft. Such a system includes a backup control module and multiple remote electronic control units (ECUs) distributed across a set of control surfaces on the aircraft and used to manipulate those surfaces. When an actuator control ECU fails and the number of failures exceeds a threshold, the backup control module provides backup control commands to the multiple remote ECUs via a backup control channel for that set of control surfaces.

[0028] Method and System for Activating Backup Flight Control System in Large Transport Aircraft: This technical field focuses on the method and system for activating the backup flight control system in the fly-by-wire flight control system architecture of large transport aircraft. The system aims to solve the problem in the existing architecture where the failure of several actuator control electronics (ACEs) leads to the system not meeting the minimum acceptable control (MAC) requirement, by activating the backup control computer (BCC) and taking over the ACE's control functions over the control surfaces.

[0029] Dual CAN Bus Multi-Redundancy Hot Backup Flight Control Computer System and Method: This technical field discloses a dual CAN bus multi-redundancy hot backup flight control computer system and method, including an interface module, a control module, and a monitoring module. Based on a dual CAN bus, this system can achieve multi-redundancy hot backup of the control modules through precise monitoring of the operating status of multiple control modules, thereby improving the reliability of the flight control computer.

[0030] There is a need in this field for an improved backup activation scheme for the backup computer of the main flight control system of civil aircraft.

[0031] Figure 1 A schematic diagram of a main flight control system backup computer architecture 100 according to one aspect of this disclosure is shown. Figure 1 As shown, an exemplary embodiment of the main flight control system backup computer architecture 100 according to one aspect of this disclosure may include, but is not limited to, an instruction calculation module 102, an interface management / communication module 104, a power supply interface 106, and an interface chip module 108.

[0032] According to an exemplary embodiment, the instruction calculation module 102 and the interface management / communication module 104 respectively receive a backup activation signal and control the corresponding power supply switch based on the received backup activation signal.

[0033] According to an exemplary embodiment, power supply switches corresponding to the instruction calculation module 102 and the interface management / communication module 104 are connected in series between the power supply and the power supply interface 106. Therefore, power is supplied to the power supply interface 106 only when both power supply switches corresponding to the instruction calculation module 102 and the interface management / communication module 104 are closed.

[0034] According to an exemplary embodiment, in cold backup mode, both the instruction calculation module 102 and the interface management / communication module 104 only run activation control functions (e.g., activation control software) to independently receive external backup activation signals. According to an exemplary embodiment, the external backup activation signal may include external status information, such as master system status information and / or ground speed information, or any combination thereof. When the instruction calculation module 102 and / or the interface management / communication module 104 are activated by the external backup activation signal, they each close their associated power supply switches.

[0035] According to an exemplary embodiment, when the instruction calculation module 102 is activated by an external backup activation signal, the instruction calculation module 102 can further run control law software to realize the function of servo control, and receive control law function input signals from the interface management / communication module 104, and / or transmit control law function output signals to the interface management / communication module 104.

[0036] According to an exemplary embodiment, when the interface management / communication module 104 is activated by an external backup activation signal, the interface management / communication module 104 can communicate with the instruction calculation module 102 and the interface chip module 108 respectively to implement the interface management function of control law function input and output signals. For example, the interface management / communication module 104 can receive control law function output signals from the instruction calculation module 102 and transmit the received control law function output signals to the interface chip module 108 (e.g., to one or more of the corresponding sub-modules of the interface chip module 108 or any combination thereof).

[0037] According to an exemplary embodiment, an isolation interface 110 is included between the instruction calculation module and the interface management / communication module, thereby enabling communication between the instruction calculation module (MCU) 102 and the interface management / communication module (PLD) 104 via the isolation interface 110. The isolation interface 110 provides level isolation between the interface instruction calculation module 102 and the interface management / communication module 104. According to an exemplary embodiment, when the corresponding power supply switch controlled by the MCU and the corresponding power supply switch controlled by the PLD are not simultaneously closed, the interface hardware module and the power supply interface are not activated. At this time, the isolation interface 110 between the instruction calculation module 102 and the interface management / communication module 104 is disabled, resulting in no signal interaction between the instruction calculation module 102 and the interface management / communication module 104. The isolation interface 110 between the instruction calculation module 102 and the interface management / communication module 104 is enabled to allow signal interaction between the instruction calculation module 102 and the interface management / communication module 104, provided that the corresponding power supply switch controlled by the MCU and the corresponding power supply switch controlled by the PLD are simultaneously closed to activate the hardware module and the power supply interface.

[0038] According to an exemplary embodiment, the interface management / communication module 104 may receive, and convert, control law function input signals from external servo units and / or other components from the interface chip module 108 (e.g., from one or more of the respective sub-modules of the interface chip module 108 or any combination thereof), and transmit them to the instruction calculation module 102.

[0039] According to an exemplary embodiment, the instruction calculation module 102 can calculate commands for external servo units and / or other components based on received external status information (e.g., master system status information and / or ground speed information, or any combination thereof) according to the backup control computer's operating external rules. According to a further exemplary embodiment, when a signal is received from the external servo unit and / or other components from the interface management / communication module 104, the instruction calculation module 102 can further calculate further commands for the external servo unit and / or other components based on the received external status information (e.g., master system status information and / or ground speed information, or any combination thereof) according to the backup control computer's operating control law.

[0040] The above-disclosed solution relates to a streamlined backup control computer scheme. This scheme includes a device architecture capable of processing backup activation logic input signals, controlling backup control activation, and managing the backup control computer's operating control laws, while meeting security requirements. The core of this system is to simplify the cold backup process to an interface chip module and a power supply interface, merging the activation logic function with the servo control function and interface management function, respectively.

[0041] According to some exemplary embodiments, Figure 1The backup computer architecture 100 for the main flight control system may include only two cores: an instruction calculation module (MCU) (e.g., instruction calculation module 102) and an interface management / communication module (PLD) (e.g., interface management / communication module 104). The MCU may have activation logic and servo control functions, while the PLD may have activation logic and interface management functions. Both the MCU and PLD are hot-backup, receiving backup activation signals from the outside and controlling the switching of the interface chip module and power supply interface. The power supply interface 106 and interface chip module 108 of the backend device remain in a cold-backup state. The interface chip module and power supply interface are activated only when both the switch controlled by the MCU and the switch controlled by the PLD are active simultaneously. Furthermore, according to some exemplary embodiments, the MCU and PLD can communicate using an isolated interface to exchange data, achieving level isolation, and there is no signal interaction when inactive, satisfying the independence requirements of the MCU and PLD. This ensures the availability and integrity of the device.

[0042] The main control modules of the backup computer for high power supply and command integrity disclosed herein include an instruction calculation module (MCU) 102 and an interface management / communication module (PLD) 104, each having its own backup activation signal input. For example, according to some exemplary embodiments, the backup activation signal inputs of the instruction calculation module (MCU) 102 and the interface management / communication module (PLD) 104 may include a main system status information input interface and a ground speed signal (e.g., A429 ground speed signal) input interface. The instruction calculation module (MCU) 102 and the interface management / communication module (PLD) 104 independently determine whether to activate the main flight control system backup computer architecture 100 by judging the main system status information and the ground speed information.

[0043] In the control scheme of the exemplary embodiments of this disclosure, under normal circumstances, the power supply interface 106 and interface chip module 108 of the main flight control system backup computer architecture 100 remain in a cold backup state, while the instruction calculation module (MCU) 102 and interface management / communication module (PLD) 104 are in a hot backup state as independent activation control modules, and control their respective switches based on their independently received backup activation signals, for example, through enable signals. Power is supplied to the back-end devices through the common power interface 106 only when the corresponding switches independently controlled by the instruction calculation module (MCU) 102 and the interface management / communication module (PLD) 104 are closed, and the interface chip module 108 is activated to communicate with the back-end devices. At this time, the instruction calculation module (MCU) 102 and the interface management / communication module (PLD) 104 each undertake instruction calculation and interface management / communication functions, and can exchange data through isolated interfaces, thereby achieving level isolation.

[0044] Therefore, the solution disclosed herein includes a minimal backup computer architecture with dual redundancy of the activation module and cold backup of the interface module, which can meet the requirements of independence and integrity.

[0045] Figure 2 A schematic diagram of a cold backup computer architecture 200 according to an exemplary aspect of this disclosure is shown. Figure 2 As shown, an exemplary embodiment of the cold backup computer architecture 200 according to one aspect of this disclosure may include, but is not limited to, an instruction calculation module, an interface management / communication module, a power supply interface, a cockpit sensor excitation interface, a flight control bus interface, and a cockpit sensor demodulation interface.

[0046] According to an exemplary embodiment, the instruction calculation module of the cold backup computer architecture 200 can be implemented using an MCU, wherein the MCU may include an instruction calculation submodule and an activation function submodule. The activation function submodule is used for activation control. The instruction calculation submodule is used for control law calculation and operates only after activation. According to some exemplary embodiments, one or more of the instruction calculation submodule and the activation function submodule may be implemented by software, firmware, hardware, or any combination thereof.

[0047] According to an exemplary embodiment, when the cold backup computer architecture 200 is in a cold backup state, the instruction calculation module is in a hot backup state, where only the activation function submodule is running and the activation control software receives external status information (e.g., including main system status information and ground speed information) as a backup activation signal. Figure 2 In an exemplary embodiment, when the received backup activation signal (e.g., main system status information and ground speed information) meets predetermined conditions, the activation function submodule correspondingly activates other submodules in its module and correspondingly controls the state of the corresponding power supply switch in the power supply control module (shown in the dashed box) (e.g., closed). According to some exemplary embodiments, when the power supply control module is activated, the instruction calculation module (MCU) can, for example but not limited to, run the instruction calculation submodule and the activation function submodule in a cyclic mode to implement servo control and activation control functions. According to some other exemplary embodiments, when the power supply control module is activated, the instruction calculation module (MCU) can also, for example but not limited to, run the instruction calculation submodule and the activation function submodule in a time-sharing and partitioning mode to implement servo control and activation control functions.

[0048] According to an exemplary embodiment, the interface management / communication (PLD) module used in this solution may include an activation function submodule and an interface management function submodule. The activation function submodule is used for activation control. The interface management function submodule is responsible for handling the transmission of control law function input / output signals of the instruction calculation module and only operates after activation. According to some exemplary embodiments, one or more of the activation function submodule and the interface management function submodule may be implemented by software, firmware, hardware, or any combination thereof.

[0049] According to an exemplary embodiment, when the cold backup computer architecture 200 is in a cold backup state, the interface management / module is in a hot backup state, where only the activation function submodule is running and the activation control software receives external status information (e.g., including master system status information and ground speed information) as a backup activation signal. Figure 2 In an exemplary embodiment, when the received backup activation signal (e.g., master system status information and ground speed information) meets predetermined conditions, the activation function submodule accordingly controls the state of the corresponding power supply switch in the power supply control module (shown in the dashed box) (e.g., closed).

[0050] According to an exemplary embodiment, the instruction calculation module and the interface management / communication module are powered by a power supply through corresponding power supply modules, and each includes a corresponding activation function module for receiving backup activation signals and controlling the corresponding power supply switch based on the received backup activation signals.

[0051] According to an exemplary embodiment, power supply switches controlled by the instruction calculation module and the interface management / communication module, respectively, are connected in series between the power supply and the power supply interface. Thus, the power supply will only supply power to the servo control unit's power supply interface when both the instruction calculation module and the interface management / communication module control their respective power supply switches to close. As may be understood, although the effect of achieving this effect through series power supply switches is described herein, this disclosure is not limited thereto, but may include other circuits that achieve similar effects.

[0052] According to an exemplary embodiment, in cold backup mode, both the instruction calculation module and the interface management / communication module only run the activation control function (e.g., activation control software) to receive external backup activation signals. According to an exemplary embodiment, the external backup activation signal may include external status information, such as master system status information and / or ground speed information, or any combination thereof. When the instruction calculation module and / or the interface management / communication module are activated by the external backup activation signal, they each close their associated power supply switches.

[0053] According to an exemplary embodiment, when the instruction calculation module is activated by an external backup activation signal, the instruction calculation module can further run the control law software in the instruction calculation module to realize the function of servo control, and receive control law function input signals from the interface management / communication module, and / or transmit control law function output signals to the interface management / communication module.

[0054] According to an exemplary embodiment, an isolation interface (e.g., an RS422 isolation interface) is included between the instruction calculation module and the interface management / communication module, allowing the instruction calculation module (MCU) and the interface management / communication module (PLD) to communicate using the isolation interface. The isolation interface provides level isolation between the interface instruction calculation module and the interface management / communication module. According to an exemplary embodiment, when the corresponding power supply switch controlled by the MCU and the corresponding power supply switch controlled by the PLD are not simultaneously closed, the interface hardware module and the power supply interface are not activated. At this time, the isolation interface between the instruction calculation module and the interface management / communication module is disabled, resulting in no signal interaction between them. The isolation interface between the instruction calculation module and the interface management / communication module 104 is enabled to allow signal interaction between them only when the corresponding power supply switch controlled by the MCU and the corresponding power supply switch controlled by the PLD are simultaneously closed to activate the hardware module and the power supply interface.

[0055] According to an exemplary embodiment, when the interface management / communication module is activated by an external backup activation signal, the interface management / communication module can communicate with the command calculation module, the flight control bus interface, and the cockpit sensor demodulation interface, respectively, and implement the interface management function for control law function input and output signals. For example, the interface management / communication module can receive control law function output signals from the command calculation module and transmit the received control law function output signals to the flight control bus interface and / or the cockpit sensor demodulation interface, etc.

[0056] According to an exemplary embodiment, the interface management / communication module can receive control law function input signals from external servo units and / or other components, and convert them, from the flight control bus interface and / or cockpit sensor demodulation interface, and then transmit them to the command calculation module.

[0057] According to an exemplary embodiment, the instruction calculation module can calculate commands for external servo units and / or other components based on received external status information (e.g., master system status information and / or ground speed information, or any combination thereof) and the backup control computer's operating control law. According to a further exemplary embodiment, when a signal is received from an external servo unit and / or other component from the interface management / communication module, the instruction calculation module can further calculate further commands for the external servo unit and / or other components based on the received external status information (e.g., master system status information and / or ground speed information, or any combination thereof) and the backup control computer's operating control law.

[0058] According to some exemplary embodiments, Figure 2 The cold backup computer architecture 200 may also include one or more of the following or any combination thereof.

[0059] Uninterruptible power supply module

[0060] The uninterruptible power supply (UPS) module in this solution converts the input power into the power required by each module in the device. The power supply to the power interface and interface chip module is controlled by the power supply control module. This module controls whether power is supplied to the power interface and interface chip module.

[0061] Power supply control module

[0062] According to an exemplary embodiment, the power supply control module may include power supply switch 1 and power supply switch 2, which respectively include power supply switches that can be controlled by instruction computing module (MCU) and interface management / communication module (PLD), and are connected in series between power supply and power supply interface.

[0063] For example, power switch 1 can be controlled to open or close by an MCU, and power switch 2 can be controlled to open or close by a PLD. According to an exemplary embodiment, the power supply control module will only supply power to the power supply interface when both power switch 1 and power switch 2 are closed.

[0064] Power interface

[0065] The cold backup computer 200 not only needs to send commands to the servo control unit, but also needs to provide power to the servo control unit. Therefore, the device has a servo control unit power supply interface, and the power supply of the power supply interface is controlled by the aforementioned power supply control module.

[0066] Interface chip module

[0067] Interface chip modules may include, but are not limited to, cockpit sensor excitation interfaces, flight control bus interfaces, and cockpit sensor demodulation interfaces.

[0068] The cold backup computer 200 sends commands to the servo control unit only when it is active. The interface chip module in this solution converts the internal signals provided by the communication module into control commands that the servo control unit can receive. The interface chip module can only send control commands externally when the power supply control module provides power and the communication module issues a command.

[0069] Figure 3 A diagram illustrating the external interconnection relationship 300 of the cold backup computer architecture 200 according to this disclosure is shown. The process of how the cold backup computer processes external status signals and enters the activation state is described in detail below, taking the entry into backup control as an example.

[0070] exist Figure 3 In the example, the external servo control unit is coupled to the servo control unit power supply interface and flight control bus interface of the cold backup computer architecture 200 according to the present disclosure; the external cockpit components are coupled to the cockpit sensor excitation interface and cockpit sensor demodulation interface of the cold backup computer architecture 200 according to the present disclosure.

[0071] According to an exemplary embodiment, under normal circumstances, the main system operates normally, and the cold backup computer 200 is in backup mode. According to an exemplary embodiment, when the main system fails, the instruction calculation module (MCU) and interface management / communication module (PLD) of the cold backup computer 200 respectively detect that the main system status information has failed. Based on this, the cold backup computer 200 enters an active state, where the MCU can control the power supply switch 1 to close, and the PLD can control the power supply switch 2 to close, thereby allowing power to be supplied to external units (e.g., servo control units) through the power supply interface, and stimulating external units (e.g., cockpit components) through the excitation circuit via the cockpit sensor excitation interface. On the other hand, when the cold backup computer 200 enters the active state, the MCU can run control law software, and the PLD can run interface data management logic, for example, communicating with cockpit components through the cockpit sensor demodulation interface and transmitting control commands to them, thereby realizing backup control functions.

[0072] The backup computer architecture of the main flight control system with high power supply and command integrity disclosed herein is a cold backup architecture, which uses the instruction calculation module (MCU) and communication module (PLD) as active control modules. Both the MCU and PLD are hot backups and jointly control the power supply to the bus interface chip. Furthermore, the MCU and PLD can exchange data through an isolation interface, thereby achieving level isolation.

[0073] Figure 4 A flowchart illustrating a method 400 for cold backup computer architecture according to one aspect of this disclosure is shown. According to an exemplary embodiment, Figure 4The method 400 for cold backup computer architecture may include, in block 402, receiving a backup activation signal by an instruction calculation module and controlling a first power supply switch based on the received backup activation signal.

[0074] In box 404, the interface management / communication module receives the backup activation signal and controls the second power supply switch based on the received backup activation signal.

[0075] In box 406, a power supply interface is activated from a cold backup state to provide power to one or more external units when both the first power supply switch and the second power supply switch are closed.

[0076] In box 408, the interface chip module is activated from the cold backup state to communicate with the one or more external units when both the first power switch and the second power switch are closed. When both the first power switch and the second power switch are closed, the instruction calculation module determines the control law function output signal according to the control law and transmits the control law function output signal to the interface chip module through the interface management / communication module.

[0077] The above descriptions are merely exemplary embodiments of the present invention. However, the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

[0078] The various illustrative logic blocks, modules, and circuits described in this disclosure can be implemented or executed using a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in alternatives, the processor may be any commercially available processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors cooperating with a DSP core, or any other such configuration.

[0079] The steps of the methods or algorithms described in this disclosure can be implemented directly in hardware, in a software module executed by a processor, or in a combination of both. The software module can reside in any form of storage medium known in the art. Some examples of usable storage media include random access memory (RAM), read-only memory (ROM), flash memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, and the like. The software module can include a single instruction or many instructions, and can be distributed across several different code segments, across different programs, and across multiple storage media. The storage medium can be coupled to the processor so that the processor can read and write information from / to the storage medium. Alternatively, the storage medium can be integrated into the processor.

[0080] The methods disclosed herein include one or more steps or actions for achieving the described methods. These method steps and / or actions may be interchanged with each other without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and / or use of specific steps and / or actions may be modified without departing from the scope of the claims.

[0081] A processor can execute software stored on a machine-readable medium. The processor may be implemented using one or more general-purpose and / or special-purpose processors. Examples include microprocessors, microcontrollers, DSP processors, and other circuit systems capable of executing software. Software should be interpreted broadly as instructions, data, or any combination thereof, whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. As examples, a machine-readable medium may include RAM (random access memory), flash memory, ROM (read-only memory), PROM (programmable read-only memory), EPROM (erasable programmable read-only memory), EEPROM (electrically erasable programmable read-only memory), registers, disks, optical disks, hard drives, or any other suitable storage medium, or any combination thereof. The machine-readable medium may be implemented in a computer program product. This computer program product may include packaging materials.

[0082] In hardware implementations, machine-readable media can be a separate part of the processing system from the processor. However, as those skilled in the art will readily appreciate, machine-readable media or any portion thereof can be external to the processing system. As examples, machine-readable media may include transmission lines, data-modulated carrier waves, and / or computer products separate from wireless nodes, all accessible to the processor via a bus interface. Alternatively or additionally, machine-readable media or any portion thereof may be integrated into the processor, such as caches and / or general-purpose register files.

[0083] The processing system can be configured as a general-purpose processing system having one or more microprocessors providing processor functionality, and external memory providing at least a portion of machine-readable medium, all linked to other supporting circuitry via an external bus architecture. Alternatively, the processing system can be implemented using an ASIC (Application-Specific Integrated Circuit) with a processor, bus interface, user interface (in the case of an access terminal), supporting circuitry, and at least a portion of machine-readable medium integrated on a single chip, or using one or more FPGAs (Field-Programmable Gate Arrays), PLDs (Programmable Logic Devices), controllers, state machines, gated logic, discrete hardware components, or any other suitable circuitry, or any combination of circuitry capable of performing the various functionalities described throughout this disclosure. Depending on the specific application and the overall design constraints imposed on the system, those skilled in the art will recognize how best to implement the functionality described regarding the processing system.

[0084] Machine-readable media may include several software modules. These software modules include instructions that, when executed by a device such as a processor, cause the processing system to perform various functions. These software modules may include transfer modules and receive modules. Each software module may reside in a single storage device or be distributed across multiple storage devices. As an example, when a trigger event occurs, a software module may be loaded from a hard drive into RAM. During the execution of a software module, the processor may load some instructions into a cache to improve access speed. One or more cache lines may subsequently be loaded into a general-purpose register file for processor execution. In the context of the functionality of the software module described below, it will be understood that such functionality is implemented by the processor when the processor executes the instructions from the software module.

[0085] If implemented in software, the functions can be stored or transmitted as one or more instructions or codes on or through a computer-readable medium. Computer-readable media includes both computer storage media and communication media, encompassing any medium that facilitates the transfer of a computer program from one location to another. Storage media can be any available medium accessible to a computer. By way of example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Any connection is also legitimately referred to as computer-readable media. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology (such as infrared (IR), radio, and microwave), then that coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technology (such as infrared, radio, and microwave) is included in the definition of medium. As used herein, disk and disc include compact discs (CDs), laser discs, optical discs, digital multi-purpose discs (DVDs), floppy disks, and Blu-ray® discs, where disks typically reproduce data magnetically, while discs optically reproduce data using lasers. Therefore, in some aspects, computer-readable media may include non-transient computer-readable media (e.g., tangible media). Additionally, in other aspects, computer-readable media may include transient computer-readable media (e.g., signals). Combinations of the above should also be included within the scope of computer-readable media.

[0086] Therefore, certain aspects may include computer program products for performing the operations set forth herein. For example, such computer program products may include computer-readable media on which instructions are stored (and / or encoded) that can be executed by one or more processors to perform the operations described herein. In some aspects, computer program products may include packaging materials.

[0087] It will be understood that the claims are not limited to the precise configurations and components described above. Various modifications, substitutions, and variations can be made to the layout, operation, and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. A cold backup computer architecture, comprising: The instruction calculation module is used to receive the backup activation signal and control the first power supply switch based on the received backup activation signal. An interface management / communication module is used to receive the backup activation signal and control the second power supply switch based on the received backup activation signal. A power supply interface is used to be activated from a cold backup state to provide power to one or more external units when both the first power supply switch and the second power supply switch are closed. as well as An interface chip module is configured to be activated from the cold backup state when both the first power switch and the second power switch are closed for communication with the one or more external units, wherein... When both the first power supply switch and the second power supply switch are closed, the instruction calculation module determines the control law function output signal according to the control law, and transmits the control law function output signal to the interface chip module through the interface management / communication module.

2. The cold backup computer architecture as described in claim 1, wherein: The instruction calculation module and the interface management / communication module each independently receive the backup activation signal, and The backup activation signal includes main system status information, ground speed information, or both.

3. The cold backup computer architecture as described in claim 1, wherein the interface chip module is further configured to perform at least one of the following: The control law function output signal is converted into a control signal that can be received by the corresponding external unit among the one or more external units, and the converted control signal is transmitted to the corresponding external unit; and The module receives external unit input signals from at least one of the one or more external units, converts the external unit input signals into control law function input signals, and transmits the converted control law function input signals to the instruction calculation module through the interface management / communication module.

4. The cold backup computer architecture as described in claim 3, wherein the instruction calculation module and the interface management / communication module include an isolation interface, the isolation interface level-isolates the instruction calculation module and the interface management / communication module, and the instruction calculation module and the interface management / communication module communicate through the isolation interface, including the transmission of the control law function input signal, the control law function output signal, or both.

5. The cold backup computer architecture as described in claim 1, wherein the first power supply switch and the second power supply switch are connected in series between the power supply and the power supply interface.

6. The cold backup computer architecture as described in claim 1, wherein the instruction calculation module and the interface management / communication module each include a corresponding activation function submodule, and wherein the instruction calculation module further includes an instruction calculation submodule, and the interface management / communication module further includes an interface management function submodule, wherein... When the cold backup computer architecture is in the cold backup state, only the corresponding activation function submodules of the instruction calculation module and the interface management / communication module operate to independently receive the backup activation signal. When the corresponding backup activation signal meets a predetermined condition, the activation function submodule in the instruction calculation module activates the instruction calculation submodule to determine the control law function output signal according to the control law, and the activation function submodule in the interface management / communication module activates the interface management function submodule to transmit the control law function output signal to the interface chip module.

7. The cold backup computer architecture as described in claim 6, wherein when the activation function submodule in the instruction calculation module activates the instruction calculation submodule, the instruction calculation module cyclically runs the activation function submodule and the instruction calculation submodule.

8. A method for cold backup computer architecture, comprising: The instruction calculation module receives the backup activation signal and controls the first power supply switch based on the received backup activation signal. The interface management / communication module receives the backup activation signal and controls the second power supply switch based on the received backup activation signal; The power supply interface is activated from the cold backup state when both the first power supply switch and the second power supply switch are closed to provide power to one or more external units; as well as The interface chip module is activated from the cold backup state to communicate with the one or more external units when both the first power switch and the second power switch are closed, wherein When both the first power supply switch and the second power supply switch are closed, the instruction calculation module determines the control law function output signal according to the control law, and transmits the control law function output signal to the interface chip module through the interface management / communication module.

9. The method of claim 8, wherein the instruction calculation module and the interface management / communication module include an isolation interface, the isolation interface level-isolates the instruction calculation module and the interface management / communication module, and the instruction calculation module and the interface management / communication module communicate through the isolation interface, including the transmission of the control law function input signal, the control law function output signal, or both.

10. The method of claim 8, wherein the instruction calculation module and the interface management / communication module each include a corresponding activation function submodule, and wherein the instruction calculation module further includes an instruction calculation submodule, and the interface management / communication module further includes an interface management function submodule, wherein... When the cold backup computer architecture is in the cold backup state, only the corresponding activation function submodules of the instruction calculation module and the interface management / communication module operate to independently receive the backup activation signal. When the corresponding backup activation signal meets a predetermined condition, the activation function submodule in the instruction calculation module activates the instruction calculation submodule to determine the control law function output signal according to the control law, and the activation function submodule in the interface management / communication module activates the interface management function submodule to transmit the control law function output signal to the interface chip module.

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