Adaptive equalizer circuit and operating method thereof

Abstract

The invention provides an adaptive equalizer circuit and an operation method thereof. The adaptive equalizer circuit includes an amplifier circuit and an adaptive circuit. The amplifier circuit is coupled to the adaptive circuit. The amplifier circuit receives an input signal. The amplifier circuit provides a compensation signal to the adaptive circuit based on an input signal. The adaptability circuit provides a compensation setpoint and a feedback signal to the amplifier circuit based on the compensation signal. A low-frequency response and a high-frequency gain of the amplifier circuit are adjusted based on the feedback signal and the compensation setpoint, respectively.

Description

Technical Field

[0001] This invention relates to an equalizer circuit, and more particularly to an adaptive equalizer circuit and its operation method. Background Technology

[0002] In high-speed transmission, the high-frequency components of the signal suffer significant loss. Conventional receivers incorporate independent low-frequency feedback and adaptive circuits to compensate for the high and low-frequency components of the signal. Specifically, the low-frequency feedback circuit ensures a more uniform compensation result, while the adaptive circuit allows the receiver's equalizer to adapt to signals with varying degrees of loss.

[0003] However, the independent low-frequency feedback circuit and adaptive circuit increase the receiver's power consumption, and both circuits have low-pass filters with large circuit areas. Summary of the Invention

[0004] In view of this, the present invention provides an adaptive equalizer circuit and its operation method, which can save power consumption and reduce circuit area.

[0005] The adaptive equalizer circuit of this invention includes an amplifier circuit and an adaptive circuit. The amplifier circuit is coupled to the adaptive circuit. The amplifier circuit receives an input signal. The amplifier circuit provides a compensation signal to the adaptive circuit based on the input signal. The adaptive circuit provides a compensation setpoint and a feedback signal to the amplifier circuit based on the compensation signal. The low-frequency response and high-frequency gain of the amplifier circuit are adjusted based on the feedback signal and the compensation setpoint, respectively.

[0006] The operating method of the adaptive equalizer circuit of the present invention includes: receiving an input signal through an amplifier circuit; providing a compensation signal to the adaptive circuit based on the input signal through the amplifier circuit; and providing a compensation setpoint and a feedback signal to the amplifier circuit based on the compensation signal through the adaptive circuit, wherein the low-frequency response and high-frequency gain of the amplifier circuit are adjusted based on the feedback signal and the compensation setpoint, respectively.

[0007] Based on the above, the adaptive equalizer circuit and its operation method provided by the present invention can compensate for the input signal to provide an output signal in which the ratio of high-frequency components to low-frequency components tends to be consistent, and adjust the low-frequency response and high-frequency gain of the amplifier circuit based on the compensation signal to effectively improve the compensation capability for the input signal.

[0008] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0009] Figure 1 A schematic diagram of an adaptive equalizer circuit according to an embodiment of the present invention is shown.

[0010] Figure 2 A schematic diagram of an adaptive equalizer circuit according to a first embodiment of the present invention is shown.

[0011] Figure 3 The circuit diagrams of the amplifier circuit, buffer, and low-pass filter according to the first embodiment of the present invention are shown.

[0012] Figure 4 A schematic diagram of an adaptive equalizer circuit according to a second embodiment of the present invention is shown;

[0013] Figure 5 A flowchart illustrating the operation method of an adaptive equalizer circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0014] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element symbols are used in the drawings and description to denote the same or similar parts.

[0015] Figure 1 A schematic diagram of an adaptive equalizer circuit according to an embodiment of the present invention is shown. Please refer to... Figure 1 The adaptable equalizer circuit 100 includes an input terminal Ein, an amplifier circuit 110, an adaptability circuit 120, and an output terminal Eout. Amplifier circuit 110 is coupled to adaptability circuit 120 and is also coupled between input terminal Ein and output terminal Eout. In this embodiment, amplifier circuit 110 includes amplifiers EQ1 to EQ3. Amplifier EQ1 is coupled between input terminal Ein and amplifier EQ2. Amplifier EQ2 is coupled between amplifier EQ1 and amplifier EQ3. Amplifier EQ3 is coupled between amplifier EQ2 and output terminal Eout. In this embodiment, amplifier EQ1 is a linear equalizer amplifier including capacitor C1 and variable resistor R1. In this embodiment, amplifiers EQ2 and EQ3 are buffer amplifiers.

[0016] In this embodiment, amplifier circuit 110 can be used to receive input signal Sin. Specifically, amplifier EQ1 in amplifier circuit 110 can receive input signal Sin from input terminal Ein. Input signal Sin is, for example, a high-speed transmission signal.

[0017] Amplifier circuit 110 can provide a compensation signal Sc to adaptability circuit 120 based on the input signal Sin. Specifically, amplifier EQ1 can perform high-frequency compensation on the input signal Sin to enhance the high-frequency components of the input signal Sin, thereby generating signal S1. Next, amplifier EQ2 in amplifier circuit 110 can perform low-frequency compensation on signal S1 to make the high-frequency and low-frequency components in signal S1 more uniform (i.e., to make the ratio of high-frequency to low-frequency components in signal S1 more consistent), thereby generating compensation signal Sc, and providing compensation signal Sc to adaptability circuit 120.

[0018] The adaptability circuit 120 can provide a compensation setpoint Vc and a feedback signal Sf to the amplifier circuit 110 based on the compensation signal Sc. The low-frequency response and high-frequency gain of the amplifier circuit 110 are adjusted based on the feedback signal Sf and the compensation setpoint Vc, respectively. Specifically, amplifier EQ1 of amplifier circuit 110 receives the compensation setpoint Vc from the adaptability circuit 120, and the high-frequency gain of amplifier EQ1 is adjusted based on the compensation setpoint Vc to adapt to different input signals Sin. In addition, amplifier EQ2 of amplifier circuit 110 receives the feedback signal Sf from the adaptability circuit 120, and the low-frequency response of amplifier EQ2 is adjusted based on the feedback signal Sf. On the other hand, amplifier EQ3 can provide an output signal Sout to the output terminal Eout based on the compensation signal Sc.

[0019] Based on the above, amplifier circuit 110 can compensate for the input signal Sin to provide an output signal Sout with a ratio of high-frequency components to low-frequency components that is more consistent. Additionally, adaptability circuit 120 can provide a compensation setpoint Vc and a feedback signal Sf to amplifier circuit 110 based on the compensation signal Sc to adjust the low-frequency response and high-frequency gain of amplifier circuit 110, thereby improving its compensation capability for the input signal Sin.

[0020] Figure 2 A schematic diagram of an adaptive equalizer circuit according to a first embodiment of the present invention is shown. Please refer to... Figure 2 In this embodiment, the adaptable equalizer circuit 200 includes an input terminal Ein, an amplifier circuit 210, an adaptability circuit 220, and an output terminal Eout. The amplifier circuit 210 includes amplifiers EQ1 to EQ5. Amplifier EQ1 is a linear equalizer amplifier including capacitor C1 and variable resistor R1, and amplifier EQ4 is a linear equalizer amplifier including capacitor C4 and resistor R4. Amplifiers EQ2, EQ3, and EQ5 are buffer amplifiers. Although... Figure 2 The number of amplifiers EQ4 (or EQ5) shown is 1, but the number of amplifiers EQ4 (or EQ5) can be designed according to actual needs, and this invention does not limit it.

[0021] The adaptability circuit 220 includes a low-pass filter LF, a high-pass filter HF, rectifiers RF1 and RF2, a comparator CMP, a counter CT, and a buffer B1. The low-pass filter LF is coupled to amplifier EQ2. The high-pass filter HF is coupled to amplifier EQ2. Rectifier RF1 is coupled to the low-pass filter LF. Rectifier RF2 is coupled to the high-pass filter HF. Comparator CMP is coupled to rectifiers RF1 and RF2. Counter CT is coupled to comparator CMP. Buffer B1 is coupled to the low-pass filter LF.

[0022] In this embodiment, the low-pass filter LF, high-pass filter HF, rectifier RF1, rectifier RF2, comparator CMP, counter CT, and buffer B1 can be, for example, any programmable digital circuit known to those skilled in the art.

[0023] In this embodiment, the adaptability circuit 220 may include a low-frequency feedback loop and an adaptation loop. The low-frequency feedback loop consists of a low-pass filter LF and a buffer B1, while the adaptation loop consists of a low-pass filter LF, a high-pass filter HF, rectifiers RF1 and RF2, a comparator CMP, and a counter CT. In this embodiment, the low-frequency feedback loop and the adaptation loop share a single low-pass filter LF, which can reduce the power consumption of the adaptability equalizer circuit 200 and save circuit area.

[0024] In this embodiment, amplifier EQ1 receives the input signal Sin from its input terminal Ein. The input signal Sin is, for example, a high-speed transmission signal with significant high-frequency component loss. Amplifier EQ1 can perform high-frequency compensation on the input signal Sin to generate signal S0, and amplifier EQ4 can perform high-frequency compensation on signal S0 to generate signal S1. Next, amplifier EQ2 can perform low-frequency compensation on signal S1 to make the high-frequency and low-frequency components in signal S1 more uniform, thereby generating a compensated signal Sc.

[0025] Amplifier EQ2 can output the compensation signal Sc to amplifier EQ5. Accordingly, amplifiers EQ5 and EQ3 can provide output signals Sout to the output terminal Eout based on the compensation signal Sc, which has a relatively uniform ratio of high-frequency to low-frequency components.

[0026] On the other hand, amplifier EQ2 can provide the compensation signal Sc to the low-frequency feedback loop and adaptive loop of adaptive circuit 220 to improve the compensation capability of adaptive equalizer circuit 200. Specifically, amplifier EQ2 can provide the compensation signal Sc to the low-pass filter LF and high-pass filter HF of adaptive circuit 220.

[0027] Regarding the low-frequency feedback loop, the low-pass filter LF extracts the low-frequency component from the compensation signal Sc, thereby generating the low-frequency component signal Sl. Next, the low-pass filter LF provides the low-frequency component signal Sl to the buffer B1. Accordingly, the buffer B1 provides a feedback signal Sf to the amplifier EQ2 based on the low-frequency component signal Sl, thereby adjusting the low-frequency response of the amplifier EQ2.

[0028] Regarding the adaptive circuit, the low-pass filter LF extracts the low-frequency component from the compensation signal Sc to generate a low-frequency component signal Sl, which is then provided to rectifier RF1. Rectifier RF1 can generate a low-frequency intensity signal Sli based on the low-frequency component signal Sl, and provide Sli to comparator CMP. Similarly, the high-pass filter HF extracts the high-frequency component from the compensation signal Sc to generate a high-frequency component signal Sh, which is then provided to rectifier RF2. Rectifier RF2 can generate a high-frequency intensity signal Shi based on the high-frequency component signal Sh, and provide Shi to comparator CMP. Next, comparator CMP can generate a comparison result R based on the low-frequency intensity signal Sli and the high-frequency intensity signal Shi, and provide R to counter CT. Finally, counter CT can generate a compensation setting value Vc based on the comparison result R, and provide Vc to amplifier EQ1 to adjust the high-frequency gain of amplifier EQ1.

[0029] Based on the above, the adaptability circuit 220 can reduce the power consumption of the adaptability equalizer circuit 200 and save circuit area by multiplexing the low-pass filter LF. Furthermore, the adaptability circuit 220 can also provide a compensation setpoint Vc and a feedback signal Sf to the amplifier circuit 210 based on the compensation signal Sc, thereby adjusting the low-frequency response and high-frequency gain of the amplifier circuit 210 to improve its compensation capability for the input signal Sin. This allows the amplifier circuit 210 to provide an output signal Sout with a more consistent ratio of high-frequency to low-frequency components.

[0030] Figure 3 The circuit diagram showing the amplifier circuit, buffer, and low-pass filter according to the first embodiment of the present invention is shown. Please refer to... Figure 2 and Figure 3In this embodiment, the input terminal Ein includes input terminal Ein1 and input terminal Ein2, and the output terminal Eout includes output terminal Eout1 and output terminal Eout2.

[0031] Amplifier EQ1 includes variable resistors R1, R11, and R12, capacitor C1, transistors M11 and M12, current sources IB11 and IB12. The control terminal of transistor M11 is coupled to input terminal Ein1. The control terminal of transistor M12 is coupled to input terminal Ein2. Variable resistor R1 is coupled between the second terminals of transistors M11 and M12. Capacitor C1 is coupled between the second terminals of transistors M11 and M12. Resistor R11 is coupled between the first terminal of transistor M11 and the reference high voltage VDD. Resistor R12 is coupled between the first terminal of transistor M12 and the reference high voltage VDD. Current source IB11 is coupled between the second terminal of transistor M11 and the reference low voltage GND (e.g., ground). Current source IB12 is coupled between the second terminal of transistor M12 and the reference low voltage GND.

[0032] Amplifier EQ4 is coupled between amplifiers EQ1 and EQ2. Amplifier EQ4 includes resistors R4, R41, and R42, capacitor C4, transistors M41 and M42, current sources IB41 and IB42. The control terminal of transistor M41 is coupled to the first terminal of transistor M12. The control terminal of transistor M42 is coupled to the first terminal of transistor M11. Resistor R4 is coupled between the second terminals of transistors M41 and M42. Capacitor C4 is coupled between the second terminals of transistors M41 and M42. Resistor R41 is coupled between the first terminal of transistor M41 and the reference high voltage VDD. Resistor R42 is coupled between the first terminal of transistor M42 and the reference high voltage VDD. Current source IB41 is coupled between the second terminal of transistor M41 and the reference low voltage GND. Current source IB42 is coupled between the second terminal of transistor M42 and the reference low voltage GND.

[0033] Amplifier EQ2 includes resistors R21 and R22, transistors M21 and M22, and current source IB2. Low-pass filter LF includes resistors R61 and R62, and capacitors C61 and C62. The control terminal of transistor M21 is coupled to the first terminal of transistor M42 and the first terminal of buffer B1. The control terminal of transistor M22 is coupled to the first terminal of transistor M41 and the first terminal of buffer B1. The first terminal of transistor M21 is coupled to the first terminal of resistor R61. The first terminal of transistor M22 is coupled to the first terminal of resistor R62. Capacitor C61 is coupled between the second terminal of resistor R62, the second terminal of buffer B1, and the reference low voltage GND. Capacitor C62 is coupled between the second terminal of resistor R61, the second terminal of buffer B1, and the reference low voltage GND. Resistor R21 is coupled between the first terminal of transistor M21 and the reference high voltage VDD. Resistor R22 is coupled between the first terminal of transistor M22 and the reference high voltage VDD. Current source IB2 is coupled between the second terminal of transistor M21, the second terminal of transistor M22, and the reference low voltage GND.

[0034] Amplifier EQ5 is coupled between amplifiers EQ2 and EQ3. Amplifier EQ5 includes resistors R51 and R52, transistors M51 and M52, and current source IB5. The control terminal of transistor M51 is coupled to the first terminal of transistor M22 and the first terminal of resistor R62. The control terminal of transistor M52 is coupled to the first terminal of transistor M21 and the first terminal of resistor R61. Resistor R51 is coupled between the first terminal of transistor M51 and the reference high voltage VDD. Resistor R52 is coupled between the first terminal of transistor M52 and the reference high voltage VDD. Current source IB5 is coupled between the second terminal of transistor M51, the second terminal of transistor M52, and the reference low voltage GND.

[0035] Amplifier EQ3 includes resistors R31 and R32, transistors M31 and M32, and current source IB3. The control terminal of transistor M31 is coupled to the first terminal of transistor M52. The control terminal of transistor M32 is coupled to the first terminal of transistor M51. Resistor R31 is coupled between the first terminal of transistor M31 and the reference high voltage VDD. Resistor R32 is coupled between the first terminal of transistor M32 and the reference high voltage VDD. Current source IB3 is coupled between the second terminals of transistors M31 and M32 and the reference low voltage GND.

[0036] In this embodiment, transistors M11, M12, M21, M22, M31, M32, M41, M42, M51, and M52 are implemented as N-type field-effect transistors (FETs). In this embodiment, transistors M11, M12, M21, M22, M31, M32, M41, M42, M51, and M52 are implemented as N-type metal-oxide-semiconductor-effect transistors (MOSFETs). In some embodiments, transistors M11, M12, M21, M22, M31, M32, M41, M42, M51, and M52 are implemented as NPN bipolar transistors (BJTs).

[0037] Figure 4 A schematic diagram of an adaptive equalizer circuit according to a second embodiment of the present invention is shown. Please refer to... Figure 4 In this embodiment, the adaptable equalizer circuit 400 includes an input terminal Ein, an amplifier circuit 410, an adaptability circuit 420, and an output terminal Eout. The amplifier circuit 410 includes amplifiers EQ1 to EQ5 and an adder A1. Adder A1 is coupled between amplifiers EQ2 and EQ5 (or, amplifier EQ3). Amplifiers EQ1 and EQ4 are linear equalizers, and amplifiers EQ2, EQ3, and EQ5 are buffer amplifiers. The number of amplifiers EQ4 and EQ5 can be designed according to actual needs, and this invention does not impose any limitations. The adaptability circuit 420 includes a low-pass filter LF, a high-pass filter HF, rectifiers RF1 and RF2, a comparator CMP, a counter CT, a buffer B1, and a buffer B2. Buffer B2 is coupled between the high-pass filter HF and adder A1. In this embodiment, adder A1 and buffer B2 can be, for example, any programmable digital circuit known to those skilled in the art.

[0038] In this embodiment, the adaptability circuit 420 may include a low-frequency feedback loop, an adaptive loop, and a high-frequency enhancement loop. The low-frequency feedback loop consists of a low-pass filter LF and a buffer B1. The adaptive loop consists of a low-pass filter LF, a high-pass filter HF, rectifiers RF1 and RF2, a comparator CMP, and a counter CT. The high-frequency enhancement loop consists of a high-pass filter HF and a buffer B2. In this embodiment, the low-frequency feedback loop and the adaptive loop share a low-pass filter LF, and the high-frequency enhancement loop and the adaptive loop share a high-pass filter HF, which can reduce the power consumption of the adaptability equalizer circuit 400 and save the circuit area of ​​the adaptability equalizer circuit 400.

[0039] In this embodiment, amplifier EQ1 receives the input signal Sin from its input terminal Ein. The input signal Sin is, for example, a high-speed transmission signal with significant high-frequency component loss. Amplifier EQ1 can perform high-frequency compensation on the input signal Sin to generate signal S0, and amplifier EQ4 can perform high-frequency compensation on signal S0 to generate signal S1. Amplifier EQ2 can perform low-frequency compensation on signal S1 to make the high-frequency and low-frequency components in signal S1 more uniform, thereby generating a compensated signal Sc.

[0040] Next, amplifier EQ2 can provide the compensation signal Sc to the low-frequency feedback loop, adaptive loop, and high-frequency enhancement loop of adaptability circuit 420 to improve the compensation capability of adaptability equalizer circuit 400. Amplifier EQ2 can also provide the compensation signal Sc to the low-pass filter LF and high-pass filter HF of adaptability circuit 420.

[0041] For implementation details regarding low-frequency feedback loops and adaptive loops, please refer to [link / reference]. Figure 2 The descriptions of low-frequency feedback loops and adaptive loops in the text will not be repeated here.

[0042] Regarding the high-frequency enhancement circuit, the high-pass filter HF extracts the high-frequency components from the compensation signal Sc to generate a high-frequency component signal Sh, which is then provided to buffer B2. Buffer B2 can provide the high-frequency component signal Sh to adder A1. Next, adder A1 sums the high-frequency component signal Sh with the compensation signal Sc to generate a high-frequency enhancement signal Sc', thereby enhancing the high-frequency components of the compensation signal Sc. Finally, adder A1 provides the high-frequency enhancement signal Sc' to amplifier EQ5, enabling amplifiers EQ5 and EQ3 to generate an output signal Sout based on the high-frequency enhancement signal Sc', and providing the output signal Sout to the output terminal Eout.

[0043] Based on the above, the adaptability circuit 420 can reduce the power consumption and save circuit area of ​​the adaptability equalizer circuit 400 by multiplexing the low-pass filter LF and the high-pass filter HF. Furthermore, the adaptability circuit 420 can provide a compensation setpoint Vc and a feedback signal Sf to the amplifier circuit 410 based on the compensation signal Sc, thereby adjusting the low-frequency response and high-frequency gain of the amplifier circuit 410 to improve the compensation capability for the input signal Sin, enabling the amplifier circuit 410 to provide an output signal Sout with a more consistent ratio of high-frequency to low-frequency components. In addition, the adaptability circuit 420 can also provide a high-frequency component signal Sh to the amplifier circuit 410 to enhance the high-frequency components of the output signal Sout, addressing the severe loss of high-frequency components in the input signal Sin due to transmission rate and transmission line path limitations.

[0044] Figure 5 This flowchart illustrates an operation method of an adaptive equalizer circuit according to an embodiment of the present invention. The operation method of this embodiment can be derived from… Figure 1 The adaptive equalizer circuit 100 is executed. Please refer to... Figure 1 and Figure 5 In step S501, the input signal Sin is received by the amplifier circuit 110. In step S502, the amplifier circuit 110 provides a compensation signal Sc to the adaptability circuit 120 based on the input signal Sin. In step S503, the adaptability circuit 120 provides a compensation setpoint Vc and a feedback signal Sf to the amplifier circuit 110 based on the compensation signal Sc, wherein the low-frequency response and high-frequency gain of the amplifier circuit 110 are adjusted based on the feedback signal Sf and the compensation setpoint Vc, respectively.

[0045] The implementation details of steps S501 to S503 have been described in detail in the foregoing embodiments, and therefore will not be repeated here.

[0046] In summary, the adaptive equalizer circuit and its operation method provided by the embodiments of the present invention can save power consumption and reduce circuit area by reusing components in the adaptive circuit, and improve the compensation capability for input signals by continuously adjusting the low-frequency response and high-frequency gain of the amplifier circuit.

[0047] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An adaptive equalizer circuit, characterized in that, include: An amplifier circuit is used to receive input signals; as well as Adaptability circuitry, coupled to the amplifier circuitry, wherein The amplifier circuit provides a compensation signal to the adaptability circuit based on the input signal. The adaptability circuit provides a compensation setpoint and a feedback signal to the amplifier circuit based on the compensation signal. The low-frequency response and high-frequency gain of the amplifier circuit are adjusted based on the feedback signal and the compensation setting value, respectively.

2. The adaptive equalizer circuit according to claim 1, characterized in that, Also includes: Input terminal; as well as The output terminal, wherein the amplifier circuit is coupled between the input terminal and the output terminal, and the amplifier circuit further includes a first amplifier, a second amplifier, and a third amplifier, wherein... The first amplifier is coupled between the input terminal and the second amplifier; The second amplifier is coupled between the first amplifier and the third amplifier; The third amplifier is coupled between the second amplifier and the output terminal, wherein... The first amplifier receives the input signal from the input terminal. The second amplifier provides the compensation signal to the adaptability circuit. The third amplifier provides an output signal to the output terminal.

3. The adaptive equalizer circuit according to claim 2, characterized in that, The second amplifier receives the feedback signal from the adaptability circuit, and the low-frequency response of the second amplifier is adjusted based on the feedback signal.

4. The adaptive equalizer circuit according to claim 2, characterized in that, The first amplifier receives the compensation setting value from the adaptability circuit, and the high-frequency gain of the first amplifier is adjusted based on the compensation setting value.

5. The adaptive equalizer circuit according to claim 2, characterized in that, The amplifier circuit also includes: At least one fourth amplifier, coupled between the first amplifier and the second amplifier, wherein the at least one fourth amplifier is a linear equalizer; and At least one fifth amplifier is coupled between the second amplifier and the third amplifier, wherein the at least one fifth amplifier is a buffer amplifier.

6. The adaptive equalizer circuit according to claim 2, characterized in that, The adaptability circuit also includes: A low-pass filter, coupled to the second amplifier, is used to generate a low-frequency component signal based on the compensation signal; A high-pass filter, coupled to the second amplifier, is used to generate a high-frequency component signal based on the compensation signal; A first rectifier, coupled to the low-pass filter, is used to generate a low-frequency intensity signal based on the low-frequency component signal; and The second rectifier, coupled to the high-pass filter, is used to generate a high-frequency intensity signal based on the high-frequency component signal.

7. The adaptive equalizer circuit according to claim 6, characterized in that, The adaptability circuit also includes: A comparator, coupled to the first rectifier and the second rectifier, is used to generate a comparison result based on the low-frequency intensity signal and the high-frequency intensity signal; and A counter, coupled to the comparator, is used to generate the compensation set value based on the comparison result.

8. The adaptive equalizer circuit according to claim 6, characterized in that, The adaptability circuit also includes: A first buffer, coupled to the low-pass filter, is used to provide the feedback signal to the second amplifier based on the low-frequency component signal.

9. The adaptive equalizer circuit according to claim 6, characterized in that, The adaptability circuit further includes a second buffer, and the amplifier circuit further includes an adder, wherein The second buffer is coupled to the high-pass filter to provide the high-frequency component signal to the adder. The adder is coupled between the second amplifier and the third amplifier, and is used to sum the high-frequency component signal and the compensation signal to generate a high-frequency enhanced signal. The third amplifier generates the output signal based on the high-frequency enhancement signal and provides the output signal to the output terminal.

10. The adaptive equalizer circuit according to claim 2, characterized in that, The first amplifier is a linear equalizer, and the second and third amplifiers are buffer amplifiers.

11. The adaptive equalizer circuit according to claim 2, characterized in that, The first amplifier includes: A first transistor, wherein the control terminal of the first transistor is coupled to the input terminal; The second transistor, wherein the control terminal of the second transistor is coupled to the input terminal; A variable resistor is coupled between the second terminal of the first transistor and the second terminal of the second transistor; and A capacitor is coupled between the second terminal of the first transistor and the second terminal of the second transistor.

12. The adaptive equalizer circuit according to claim 11, characterized in that, The first amplifier includes: A first resistor is coupled between the first terminal of the first transistor and a reference high voltage; A first current source is coupled between the second terminal of the first transistor and a reference low voltage. A second resistor is coupled between the first terminal of the second transistor and the reference high voltage; and A second current source is coupled between the second terminal of the second transistor and the reference low voltage.

13. The adaptive equalizer circuit according to claim 11, characterized in that, The second amplifier includes: A third transistor, wherein the control terminal of the third transistor is connected to the first terminal of the second transistor, and the control terminal of the third transistor is coupled to the first terminal to the adaptability circuit; A fourth transistor, wherein the control terminal of the fourth transistor is connected to the first terminal of the first transistor, and the control terminal of the fourth transistor is coupled to the first terminal to the adaptability circuit. A third resistor is coupled between the first terminal of the third transistor and a reference high voltage. A fourth resistor is coupled between the first terminal of the fourth transistor and the reference high voltage; and A third current source is coupled between the second terminal of the third transistor, the second terminal of the fourth transistor, and a reference low voltage.

14. The adaptive equalizer circuit according to claim 13, characterized in that, The third amplifier includes: The fifth transistor has its control terminal connected to the first terminal of the fourth transistor, and its first terminal coupled to the output terminal. A sixth transistor, wherein the control terminal of the sixth transistor is connected to the first terminal of the third transistor, and the first terminal of the sixth transistor is coupled to the output terminal; A fifth resistor is coupled between the first terminal of the fifth transistor and the reference high voltage; A sixth resistor is coupled between the first terminal of the sixth transistor and the reference high voltage; and A fourth current source is coupled between the second terminal of the fifth transistor, the second terminal of the sixth transistor, and the reference low voltage.

15. A method for operating an adaptive equalizer circuit, characterized in that, include: The input signal is received through an amplifier circuit; The amplifier circuit provides a compensation signal to the adaptability circuit based on the input signal. as well as The adaptability circuit provides a compensation setpoint and a feedback signal to the amplifier circuit based on the compensation signal. The low-frequency response and high-frequency gain of the amplifier circuit are adjusted based on the feedback signal and the compensation setting value, respectively.

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