Display substrate, brightness compensation system and display device

Abstract

The invention discloses a display substrate, a brightness compensation system and a display device, and belongs to the technical field of display. The display substrate may include a substrate, and a sub-pixel, a plurality of test transistors and a plurality of test pad groups located on one side of the substrate. According to the display substrate, the test transistors and the test bonding pad groups are arranged on the display substrate, so that the electrical performance of the corresponding test transistors can be tested through the test bonding pad groups, and the structural parameters of the test transistors are the same as the structural parameters of the driving transistors of the sub-pixels; therefore, the uniformity of the electrical properties of the plurality of test transistors can be directly or indirectly equivalent to the uniformity of the electrical properties of the plurality of driving transistors of the plurality of sub-pixels. Furthermore, the uniformity of the display brightness of the display substrate can be quantified, and finally, the brightness compensation can be performed on the display substrate by adopting the matching compensation precision, so that the excessive compensation cost is avoided.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display substrate, a brightness compensation system, and a display device. Background Technology

[0002] With the rapid development of organic light-emitting diode (OLED) display technology, the requirements for display uniformity are becoming increasingly stringent.

[0003] The display panel consists of multiple sub-pixels, and the uniformity of the electrical performance of the transistors (such as driving transistors) in the sub-pixels affects the uniformity of the display brightness of the display panel.

[0004] Currently, brightness uniformity compensation in display panels is primarily achieved through optical compensation. This requires determining compensation parameters for the display panel using optical detection equipment and compensation algorithms after the panel manufacturing process. The impact of the uniformity of the electrical performance of the transistors in sub-pixels on brightness uniformity cannot yet be quantified. The degree of brightness uniformity generally varies between different batches of display panels, but all use a fixed compensation precision for optical compensation. Display panels with less uniformity issues have higher optical compensation costs, while those with significant uniformity problems have insufficient compensation effectiveness. Summary of the Invention

[0005] This application provides a display substrate, a brightness compensation system, and a display device. It solves the problem that the impact of the brightness uniformity of existing display panels or display substrates cannot be quantified. The technical solution is as follows: On one hand, a display substrate is provided, the display substrate having a display area and a peripheral area distributed around the display area; the display substrate includes: a substrate, and sub-pixels, a plurality of test transistors and a plurality of test pad groups located on one side of the substrate; The sub-pixel is located within the display area, and the sub-pixel has a driving transistor; the structural parameters of the driving transistor are the same as the structural parameters of the test transistor; The plurality of test pad groups are located within the peripheral area and correspond to the plurality of test transistors; the control terminal, input terminal, and output terminal of the test transistor are respectively electrically connected to different test pads in the corresponding test pad groups; The test pad group is configured to test the electrical performance of the corresponding test transistor so that the accuracy for brightness compensation of the display substrate can be obtained subsequently.

[0006] Optionally, the test pad group includes: a first test pad, a second test pad, and a third test pad; the first test pad is electrically connected to the control terminal, the second test pad is electrically connected to the input terminal, and the third test pad is electrically connected to the output terminal. The test pad group is configured to: connect the first test pad to a control signal to turn on the corresponding test transistor, and connect the second test pad to a first test signal and acquire the second test signal transmitted by the third test pad to test the electrical performance of the test transistor.

[0007] Optionally, different third test pads in different test pad groups can be set independently; The first test pads in different test pad groups are reused as the same pad; and / or, the second test pads in different test pad groups are reused as the same pad.

[0008] Optionally, the plurality of test transistors are divided into at least one test transistor group, a single test transistor group comprising a plurality of test transistors arranged in an array, and the single test transistor group is distributed within the display area or the peripheral area.

[0009] Optionally, the peripheral area includes: a non-display area distributed around the display area, and a cut-out area distributed around the non-display area; The individual test transistor groups are distributed within the display area or the non-display area; the multiple test pad groups are all distributed within the area to be cut.

[0010] Optionally, the non-display area includes a bonding area; the test transistor groups are distributed close to the bonding area, and in the extending direction of the bonding area, a single test transistor group is distributed on any side of the bonding area.

[0011] On the other hand, a brightness compensation system is provided for performing compensation tests on any of the above-described display substrates, the brightness compensation system comprising: a testing device and a compensation device; The testing equipment is configured to: test the electrical performance of the plurality of test transistors through the plurality of test pad groups in the display substrate; and determine the accuracy for brightness compensation of the display substrate based on the electrical performance of the plurality of test transistors. The compensation device is configured to perform a compensation test operation on the display substrate based on the accuracy of the brightness compensation for the display substrate, so as to determine the compensation parameters for the brightness compensation of the display substrate.

[0012] Optionally, the testing equipment is configured to: after testing the electrical performance of the plurality of test transistors, acquire the transfer characteristic curve of each of the test transistors; determine the degree of brightness difference of the sub-pixels of the display substrate under a preset display brightness based on the transfer characteristic curve of each of the test transistors; and determine the accuracy for brightness compensation of the display substrate based on the degree of brightness difference. The degree of brightness difference is positively correlated with the accuracy of brightness compensation for the display substrate.

[0013] Optionally, the testing device is configured to: acquire the voltage difference between the control terminal and the input terminal of the driving transistor of the sub-pixel when displaying the preset brightness; acquire the output current of each test transistor based on the voltage difference and the transfer characteristic curve of each test transistor; and determine the degree of brightness difference of the sub-pixel of the display substrate when displaying the preset brightness based on the degree of difference in the output current of the multiple test transistors.

[0014] In another aspect, a display device is provided, comprising: a display panel, a storage module, and a driver chip bonded and connected to the display panel; The display panel includes at least a portion of any of the display substrates described above; the storage module stores compensation parameters obtained through any of the brightness compensation systems described above; and the driving chip is configured to drive the display panel to display according to the compensation parameters.

[0015] The beneficial effects of the technical solutions provided in this application are: By setting multiple test transistors and multiple test pad groups on the display substrate, the electrical performance of the corresponding test transistors can be tested through the test pad groups. Since the structural parameters of the test transistors are the same as those of the driving transistors of the sub-pixels, the uniformity of the electrical performance of the multiple test transistors can be equivalent to the uniformity of the electrical performance of the multiple driving transistors of the multiple sub-pixels. Furthermore, the uniformity of the display brightness of the display substrate can be quantified. Finally, brightness compensation of the display substrate can be performed using a compensation accuracy that matches the uniformity of the current display brightness, avoiding excessive compensation costs. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1A top view of the display substrate provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of the test transistor and test pad assembly provided in an embodiment of this application; Figure 3 This is another schematic diagram of the test transistor and test pad assembly provided in an embodiment of this application; Figure 4 Another top view of the display substrate provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of the brightness compensation system provided in the embodiments of this application; Figure 6 A schematic diagram of the transfer characteristic curve of the test transistor provided in the embodiments of this application; Figure 7 A circuit diagram of a sub-pixel provided in an embodiment of this application; Figure 8 A schematic flowchart illustrating the brightness compensation method provided in this application embodiment; Figure 9 A schematic flowchart illustrating the simulation calculation method provided in the embodiments of this application; Figure 10 This is a schematic diagram of the structure of the display device provided in the embodiments of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0019] To overcome the uniformity problem of display brightness in display panels, some embodiments use optical compensation to compensate for this uniformity. The compensation parameters for optical compensation need to be stored in a memory module, which can be integrated into the driver chip or located externally. Due to hardware cost limitations, the storage space for storing compensation parameters in the memory module is limited, especially for memory modules integrated into the driver chip. Furthermore, the higher the precision of optical compensation, the larger the amount of data required for the compensation parameters. Even when manufactured under the same design process parameters, two different display panels may still exhibit differences in the uniformity of their display brightness. Therefore, using the same compensation precision to compensate for the same model of display panels results in some panels having excessively high compensation precision while others have insufficient precision. To ensure the yield rate of optical compensation, or in other words, to ensure that the uniformity of the display panel meets the requirements, using higher compensation precision has become the main technical approach. This leads to higher hardware costs for the memory module. Therefore, how to quantify the uniformity of display brightness in a display panel becomes a problem that needs to be solved.

[0020] For example, the compensation precision levels can be 1×1, 2×2, 3×3, 4×4, 5×5, etc. Taking a 10×10 pixel area to be compensated as an example, using a compensation precision level of 1×1 generates 100 compensation parameters, while using 2×2 generates 25 compensation parameters, and 5×5 only generates 4 compensation parameters. With the development of technology, such as the resolution of most smartphones being above 1080×720, and high-end smartphones having even higher resolutions, using excessively high compensation precision would result in an excessively large amount of compensation parameter data, occupying too much storage space in the storage module.

[0021] In this embodiment, by setting test transistors and test pads on the display substrate, and measuring the degree of difference in the electrical performance of multiple test transistors through the test pads, the uniformity of the display brightness of the display substrate can be quantified. This allows for optical compensation with appropriate compensation accuracy, and the amount of data for optical compensation is appropriate, thus controlling the cost of the storage module of the display device.

[0022] This application provides a display substrate; please refer to... Figure 1 , Figure 1 This is a top view of the display substrate provided in the embodiments of this application. The display substrate 000 has a display area 00a and a peripheral area 00b distributed around the display area 00a. The display substrate 000 may include: a substrate 001, and sub-pixels 002, a plurality of test transistors 003 and a plurality of test pad groups 004 located on one side of the substrate 001.

[0023] Sub-pixel 002 is located within display area 00a, and sub-pixel 002 has a driving transistor 002a; the structural parameters of the driving transistor 002a are the same as those of the test transistor 003.

[0024] Multiple test pad groups 004 are located within the peripheral area 00b and correspond to multiple test transistors 003; the control terminal 031, input terminal 032, and output terminal 033 of the test transistor 003 are electrically connected to different test pads in the corresponding test pad group 004.

[0025] The test pad group 004 is configured to test the electrical performance of the corresponding test transistor 003 so that the accuracy used for brightness compensation of the display substrate 000 can be obtained subsequently.

[0026] For example, there can be multiple sub-pixels 002, which are arranged in multiple rows and columns on one side of the substrate 001. Each sub-pixel 002 includes a pixel driving circuit 021 and a light-emitting device, with the pixel driving circuit 021 and the light-emitting device being electrically connected. The pixel driving circuit 021 includes at least a switching transistor 002b and a driving transistor 002a.

[0027] For example, the driving transistor 002a of the pixel driving circuit 021 uses a polycrystalline silicon layer as the active layer. The active layer requires first forming an amorphous silicon film layer, and then using a crystallization process to form polycrystalline silicon. Currently, crystallization processes can include various methods such as excimer laser annealing (ELA), solid-state crystallization (SPC), and metal-induced crystallization (MIC). Taking excimer laser annealing as an example, research has found that it suffers from short-range inhomogeneity, leading to differences in the degree of crystallization of the active layers of adjacent transistors. This ultimately results in uneven brightness in the display panel, especially noticeable when displaying low grayscale images. Even though two display substrates / panels from different batches may use the same ELA process, their actual parameters will inevitably differ, resulting in varying degrees of brightness unevenness between the two substrates / panels. The brightness unevenness (mura) caused by the ELA process can be either striped mura or sandy mura. Currently, optical compensation requires imaging the display substrate / display panel, but low-grayscale sandy mura is difficult to image clearly, resulting in poor performance from conventional optical compensation. This is because the degree of low-grayscale sandy mura is difficult to quantify, leading to a mismatch in compensation accuracy.

[0028] In this embodiment, by setting multiple test transistors 003 and multiple test pad groups 004 on the display substrate 000, the electrical performance of the corresponding test transistors 003 can be tested through the test pad groups 004. Since the structural parameters of the test transistors 003 are the same as the structural parameters of the driving transistors 002a of the sub-pixels 002, the uniformity of the electrical performance of the multiple test transistors 003 can be directly or indirectly equivalent to the uniformity of the electrical performance of the multiple driving transistors 002a of the multiple sub-pixels 002. Furthermore, the uniformity of the display brightness of the display substrate 000 can be quantified, and finally, brightness compensation of the display substrate 000 can be performed by using a compensation accuracy that matches the uniformity of the display brightness, avoiding excessive compensation costs. It should be noted that the display substrate 000 can be used directly as a display panel without cutting, or it can be cut to obtain a display panel.

[0029] The structural parameters of the test transistor 003 are identical to those of the driving transistor 002a of the sub-pixel 002. All structures of the test transistor 003 and their corresponding structures in the driving transistor 002a are co-layered and made of the same material, meaning they are formed in a single process step, and their dimensions are identical. For example, the active layer of the test transistor 003 is co-layered and made of the same material as the active layer of the driving transistor 002a. Furthermore, the area and shape of the active layer of the test transistor 003 projected onto the substrate 001 are identical to those of the active layer of the driving transistor 002a projected onto the substrate 001. The width and length of the channels of the test transistor 003 and the driving transistor 002a are also the same. Thus, the test transistor 003 can be considered as the driving transistor 002a, and the measured electrical performance of multiple test transistors 003 can be used as the electrical performance of multiple driving transistors 002a, thereby quantifying the uniformity of the display brightness of the display substrate 000.

[0030] Among some possible implementations, please refer to the reference. Figure 2 , Figure 2 This is a schematic diagram of the structure of the test transistor and test pad group provided in the embodiment of this application; the test pad group 004 may include: a first test pad 041, a second test pad 042 and a third test pad 043; the first test pad 041 is electrically connected to the control terminal 031, the second test pad 042 is electrically connected to the input terminal 032, and the third test pad 043 is electrically connected to the output terminal 033.

[0031] The test pad group 004 is configured to: connect the first test pad 041 to a control signal to turn on the corresponding test transistor 003, and connect the second test pad 042 to a first test signal and acquire the second test signal transmitted by the third test pad 043 to test the electrical performance of the test transistor 003.

[0032] For example, in the embodiments of this application, the transfer characteristic curve and / or output characteristic curve of the test transistor 003 can be measured; or the output signal of the output terminal 033 of the test transistor 003 under preset measurement parameters can be measured. For example, the control terminal 031 of the test transistor 003 is connected to a control signal, the input terminal 032 is connected to a first test signal, the control signal and the first test signal are signals with fixed voltages, the second test signal is obtained through the output terminal 033, and the uniformity of the electrical performance of the multiple test transistors 003 is obtained by comparing the degree of difference of the second test signals of the multiple test transistors 003.

[0033] In this embodiment, simulation data such as the voltage difference and voltage value between the input and control terminals of the driving transistor 002a when displaying a preset grayscale brightness can be obtained based on the display parameters designed for the display substrate 000. Display parameters may include parameters such as display frame rate, resolution / line count, and the voltage value of the storage capacitor in the pixel driving circuit 021. Based on the simulation data, corresponding first test signals and control signals can be designed. Thus, by connecting the corresponding control signals and the first test signals to the control terminal 031 and input terminal 032 of the test transistor 003, the current value of the second test signal can be obtained through the output terminal 033 of the test transistor 003. Finally, by comparing the uniformity of the output current of the output terminals 033 of multiple test transistors 003, the uniformity of the display brightness of multiple sub-pixels 002 of the display substrate 000 can be simulated. It should be noted that the above examples are for illustrative purposes only; the display uniformity of the display substrate 000 can be simulated using the test transistor 003, and the measurement method described in the examples is not necessarily required.

[0034] Among some possible implementations, please refer to the reference. Figure 3 , Figure 3 This is another structural schematic diagram of the test transistor and test pad group provided in the embodiments of this application; different third test pads 043 in different test pad groups 004 are independently set.

[0035] The first test pad 041 in different test pad groups 004 is reused as the same pad; and / or, the second test pad 042 in different test pad groups 004 is reused as the same pad.

[0036] In this embodiment, the control signals and the first test signal connected to the control terminals 031 and input terminals 032 of the multiple test transistors 003 can be the same. Therefore, the first test pad 041 and the second test pad 042 in the multiple test pad groups 004 corresponding to the multiple test transistors 003 can be reused, reducing the number of test pads. This results in a smaller overall area occupied by the multiple test pad groups 004. Furthermore, by electrically connecting the same first test pad 041 to the control terminals 031 of each test transistor 003 and the same second test pad 042 to the input terminals 032 of each test transistor 003, it is ensured that the control signals connected to each test transistor 003 are the same as the first test signal. This allows for a more accurate determination of the uniformity of the electrical performance of the multiple test transistors 003 based on the degree of difference in the second test signals output from the output terminals 033 of each test transistor 003. This is because using two different first test pads 041 to input control signals to the control terminals 031 of two test transistors 003 may result in differences in the control signals output from these two first test pads 041. In different test pad groups 004, the first test pad 041 is reused as the same pad, and the difference in the output control signal between the two first test pads 041 is minimal. The same applies to the second test pad 042.

[0037] For some possible implementation methods, please refer to Figure 1 and Figure 4 , Figure 4 This is another top view of the display substrate provided in an embodiment of the present application. A plurality of test transistors 003 are divided into at least one test transistor group 003A. A single test transistor group 003A contains a plurality of test transistors 003 arranged in an array, and the single test transistor group 003A is distributed in the display area 00a or the peripheral area 00b.

[0038] In this embodiment, the orientation of the array of multiple test transistors 003 in a single test transistor group 003A is the same as the orientation of the array of multiple sub-pixels 002. That is, the orientation of the array of multiple test transistors 003 is the same as the orientation of the array of multiple driving transistors 002a. This ensures the consistency between the test transistors 003 and the driving transistors 002a, thereby using measurement data of the electrical performance of the multiple test transistors 003 to simulate the uniformity of the electrical performance of the multiple driving transistors 002a.

[0039] For example, multiple sub-pixels 002 are arranged in multiple rows in the first direction X and multiple columns in the second direction Y. Similarly, multiple driving transistors 002a of the multiple sub-pixels 002 are arranged in multiple rows in the first direction X and multiple columns in the second direction Y, where the first direction X and the second direction Y intersect. In the same test transistor group 003A, multiple test transistors 003 are arranged in multiple rows in the first direction X and multiple columns in the second direction Y. The distance between two adjacent test transistors 003 in the first direction X can be equal to the distance between two adjacent driving transistors 002a in the first direction X; and / or, the distance between two adjacent test transistors 003 in the second direction Y can be equal to the distance between two adjacent driving transistors 002a in the second direction Y. In this way, the multiple test transistors 003 and the multiple driving transistors 002a are irradiated by the excimer laser in the same way. Therefore, the degree of difference in the electrical performance of the multiple test transistors 003 can be more accurately equated to the degree of difference in the electrical performance of the multiple driving transistors 002a, because the variables are further controlled.

[0040] For some possible implementation methods, please refer to Figure 1 and Figure 4 The peripheral area 00b may include: a non-display area 00c distributed around the display area 00a, and a cut-out area 00d distributed around the non-display area 00c.

[0041] Among them, a single test transistor group 003A is distributed in the display area 00a or the non-display area 00c; multiple test pad groups 004 are all distributed in the area to be cut 00d.

[0042] In this embodiment, by placing multiple test pad groups 004 within the cutting area 00d, the display substrate 000 obtains the display panel by cutting away the cutting area 00d. Since the test pad groups 004 are not present on the display panel, their appearance and the size of the non-display area 00c are not affected. Furthermore, because the test pad groups 004 are all distributed within the cutting area 00d, they can be flexibly positioned at any location within the cutting area 00d, resulting in more flexible wiring.

[0043] For some possible implementation methods, please refer to Figure 1 and Figure 4 The non-display area 00c may include the bonding area 00c1, and the display area 00a and the bonding area 00c1 are arranged along the first direction X; the test transistor group 003A is distributed close to the bonding area 00c1, and in the extension direction of the bonding area 00c1, a single test transistor group 003A is distributed on any side of the bonding area 00c1.

[0044] In this embodiment, the bonding area 00c1 of the display substrate 000 can be used to bond and connect with the driver chip. A single test transistor group 003A is distributed on either side of the bonding area 00c1 in the second direction Y. In this way, the arrangement of signal lines such as fan-out leads between the bonding area 00c1 and the display area 00a will not be affected.

[0045] In summary, the display substrate provided in this application embodiment may include: a substrate, and sub-pixels, multiple test transistors, and multiple test pad groups located on one side of the substrate. By setting multiple test transistors and multiple test pad groups on the display substrate, the electrical performance of the corresponding test transistors can be tested through the test pad groups. Since the structural parameters of the test transistors are the same as the structural parameters of the driving transistors of the sub-pixels, the uniformity of the electrical performance of the multiple test transistors can be equivalent to the uniformity of the electrical performance of the multiple driving transistors of the multiple sub-pixels. Furthermore, the uniformity of the display brightness of the display substrate can be quantified, and finally, matching compensation accuracy can be used to perform brightness compensation on the display substrate, avoiding excessive compensation costs.

[0046] This application also provides a brightness compensation system; please refer to... Figure 5 , Figure 5 This is a schematic diagram of the structure of a brightness compensation system provided in an embodiment of this application, used to perform compensation tests on the display substrate described in any of the above embodiments. The brightness compensation system may include: a test device 100 and a compensation device 200.

[0047] The test equipment 100 is configured to: test the electrical performance of multiple test transistors 003 through multiple test pad groups 004 in the display substrate 000; and determine the accuracy for brightness compensation of the display substrate 000 based on the electrical performance of the multiple test transistors 003.

[0048] The compensation device 200 is configured to perform a compensation test operation on the display substrate 000 based on the accuracy of the brightness compensation for the display substrate 000, so as to determine the compensation parameters for the brightness compensation of the display substrate 000.

[0049] In this embodiment of the application, the test device 100 can test the electrical performance of multiple test transistors 003 through multiple test pad groups 004 in the display substrate 000; based on the electrical performance of the multiple test transistors 003, the degree of difference in the electrical performance of the driving transistors 002a of the multiple sub-pixels 002 is obtained, and the accuracy for brightness compensation of the display substrate 000 is determined, and the accuracy for brightness compensation of the display substrate 000 is matched with the uniformity of the current display brightness of the display substrate 000.

[0050] The compensation device 200 can perform a compensation test on the display substrate 000 based on the required accuracy for brightness compensation, thereby determining the compensation parameters for brightness compensation of the display substrate 000. Because the accuracy for brightness compensation of the display substrate 000 will not be too high or too low, the amount of data for the compensation parameters used for brightness compensation will not be too large, ensuring both good compensation results and controlled storage costs.

[0051] In summary, the brightness compensation system provided in this application tests the electrical performance of the corresponding test transistors by testing the pad group. Since the structural parameters of the test transistors are the same as those of the driving transistors of the sub-pixels, the uniformity of the electrical performance of multiple test transistors can be equivalent to the uniformity of the electrical performance of multiple driving transistors of multiple sub-pixels. Furthermore, the uniformity of the display brightness of the display substrate can be quantified, and finally, a compensation accuracy matching the uniformity of the current display brightness of the display substrate can be used to compensate the brightness of the display substrate, avoiding excessive compensation costs.

[0052] In some possible implementations, the test device 100 is configured to: after testing the electrical performance of multiple test transistors 003, acquire the transfer characteristic curve of each test transistor 003; determine the degree of brightness difference of the sub-pixels 002 of the display substrate 000 under a preset display brightness based on the transfer characteristic curve of each test transistor 003; and determine the accuracy for brightness compensation of the display substrate 000 based on the degree of brightness difference.

[0053] Among them, the degree of brightness difference is positively correlated with the accuracy of brightness compensation used for display substrate 000.

[0054] In the embodiments of this application, please refer to Figure 6 , Figure 6 This is a schematic diagram of the transfer characteristic curves of the test transistors provided in an embodiment of this application. The test equipment 100 can obtain the transfer characteristic curves of each test transistor 003 based on the measurement results of the electrical performance of multiple test transistors 003, such as... Figure 6 The transfer characteristic curves L0, L1, and L2 shown can be compared by comparing multiple transfer characteristic curves, such as comparing the current difference under the same voltage, or the voltage difference corresponding to the same current, or the slope of the curve under the same voltage, to determine the degree of difference in the transfer characteristic curves of multiple test transistors 003. In this way, the degree of difference in the transfer characteristic curves of multiple driving transistors 002a can be determined, and finally, the degree of brightness difference of the sub-pixel 002 of the display substrate 000 under the preset display brightness can be determined.

[0055] In some possible implementations, the test device 100 is configured to: acquire the voltage difference between the control terminal and the input terminal of the driving transistor 002a of the sub-pixel 002 when displaying a preset brightness; acquire the output current of each test transistor 003 based on the voltage difference and the transfer characteristic curve of each test transistor 003; and determine the degree of brightness difference of the sub-pixel 002 of the display substrate 000 under the preset brightness based on the degree of difference in the output current of the multiple test transistors 003.

[0056] In this embodiment, the test device 100 obtains the leakage current Id of the output terminal 033 of the test transistor 003 under at least one gate-source voltage Vgs, based on the transfer characteristic curves of each test transistor 003. Since the luminous intensity of the light-emitting device is theoretically proportional to the output current of the driving transistor 002a, the uniformity of the display brightness of the multiple sub-pixels 002 can be obtained by determining the degree of difference in the output current of the driving transistor 002a when the voltage difference between the control terminal and the input terminal of the multiple driving transistors 002a is the same. Furthermore, since the test transistor 003 and the driving transistor 002a have the same structural parameters, the degree of difference in the output current of the multiple test transistors 003 can be used to determine the brightness difference of the sub-pixels 002 of the display substrate 000 under a preset display brightness.

[0057] For example, please refer to Figure 7 , Figure 7 The circuit diagram of a sub-pixel provided in this application embodiment shows that sub-pixel 002 may include a pixel driving circuit 021 and a light-emitting device 022. The specific implementation of the pixel driving circuit 021 is not limited. The pixel driving circuit 021 includes a storage capacitor CST, a switching transistor 002b, and a driving transistor 002a. Theoretically, when sub-pixel 002 displays a preset brightness, the switching transistor 002b outputs the corresponding data potential Data and charges the storage capacitor CST, so the potential of node N1 is equal to the data potential. However, in reality, the switching transistor 002b has a voltage drop, and the circuit also has parasitic parameters and the influence of charging and discharging time. Therefore, in displaying one frame, the final potential of node N1 may not be equal to the data potential. The pixel driving circuit 021 may also include a reset transistor 002c, which can write an initial potential Vinit to point N1 after light emission is completed. Charging and discharging control can be achieved by connecting scan signals (control signals) Scan1 and Scan2 to the control terminals of the switching transistor 002b and the reset transistor 002c. Of course, the pixel driving circuit 021 can also be implemented in other ways, or include more transistors for control, and the embodiments of this application are not limited thereto.

[0058] Therefore, the testing equipment provided in this application simulates the display parameters of the display substrate to obtain the voltage difference between the control terminal and the input terminal of the driving transistor when displaying a preset brightness. The display parameters of the display substrate include the display frame rate, resolution, and the capacitance value of the storage capacitor. These display parameters affect the maximum charging and discharging time of the driving transistor. For example, two display substrates with different display frame rates but the same other display parameters will have different control signal voltage values ​​at the control terminals of the driving transistors under the same data signal drive. This will result in different output currents at the output terminals of the driving transistors, ultimately leading to different luminous brightness in the light-emitting devices. Thus, the testing equipment provided in this application can determine the voltage difference between the control terminal and the input terminal of the driving transistor of a sub-pixel when displaying a preset brightness based on the display parameters of the display substrate, rather than directly using data signals and high-level voltage signals to calculate the voltage difference. Furthermore, the output current of each test transistor obtained from the voltage difference and the transfer characteristic curves of each test transistor is more accurate.

[0059] This application also provides a brightness compensation method, which can be applied to the brightness compensation system described in the above embodiments. Please refer to... Figure 8 , Figure 8 This is a flowchart illustrating the brightness compensation method provided in an embodiment of this application. The brightness compensation method may include: Step S001: Provide a driving backplane or a display substrate; the display substrate can be any of the display substrates described in the above embodiments, and the display substrate can include a driving backplane and a light-emitting device, with the light-emitting device electrically connected to the driving backplane.

[0060] In this embodiment of the application, when a drive backplane is provided, please refer to... Figure 1 The driving backplane includes a substrate 001, a pixel driving circuit 021, multiple test transistors 003, and multiple test pad groups 004 located on one side of the substrate 001. The pixel driving circuit 021 is located within the display area 00a and has a driving transistor 002a; the structural parameters of the driving transistor 002a are the same as those of the test transistors 003. The multiple test pad groups 004 are located within the peripheral area 00b and correspond to the multiple test transistors 003; the control terminal 031, input terminal 032, and output terminal 033 of the test transistors 003 are electrically connected to different test pads in the corresponding test pad groups 004. The test pad groups 004 are configured to test the electrical performance of the corresponding test transistors 003 to obtain the accuracy for subsequent brightness compensation of the display substrate 000. In other words, the display substrate 000 is formed by creating light-emitting devices on the driving backplane.

[0061] Step S002: Test the electrical performance of multiple test transistors using multiple test pad groups in the display substrate or driving backplane, and determine the accuracy for brightness compensation of the display substrate based on the electrical performance of the multiple test transistors.

[0062] In this embodiment of the application, the test equipment 100 tests the electrical performance of a plurality of test transistors 003 through a plurality of test pad groups 004 in the display substrate 000 or the driving backplane; based on the electrical performance of the plurality of test transistors 003, the accuracy for brightness compensation of the display substrate 000 is determined.

[0063] Step S003: Based on the accuracy of brightness compensation for the display substrate, perform a compensation test on the display substrate to determine the compensation parameters used for brightness compensation of the display substrate.

[0064] In this embodiment of the application, the compensation device 200 performs a compensation test operation on the display substrate 000 based on the accuracy of the brightness compensation for the display substrate 000, so as to determine the compensation parameters for the brightness compensation of the display substrate 000.

[0065] The brightness compensation method provided in this application tests the electrical performance of the corresponding test transistors by testing the pad group. Since the structural parameters of the test transistors are the same as those of the driving transistors of the sub-pixels, the uniformity of the electrical performance of multiple test transistors can be equivalent to the uniformity of the electrical performance of multiple driving transistors of multiple sub-pixels. Furthermore, the uniformity of the display brightness of the display substrate can be quantified. Finally, a compensation accuracy matching the uniformity of the current display brightness of the display substrate can be used to compensate the brightness of the display substrate, avoiding excessive compensation costs.

[0066] This application also provides a simulation calculation method for the uniformity of driving current, used to simulate the output current of the output terminal of the driving transistor 002a on a display substrate. The display substrate can be the display substrate 000 described in the above embodiments. The output current of the output terminal of the driving transistor 002a is used to drive the light-emitting device to emit light, and therefore can also be defined as the driving current. Please refer to... Figure 9 , Figure 9 This is a flowchart illustrating the simulation calculation method provided in the embodiments of this application. The simulation calculation method may include: Step S100: Obtain the voltage difference between the control terminal and the input terminal of the driving transistor 002a of the sub-pixel of the display substrate when displaying a preset brightness.

[0067] In this embodiment of the application, during the process from the start of charging at the control terminal 031 of the test transistor 003 to the end of the charging time, the potential of the control terminal 031 of the test transistor 003 can be calculated by differential iteration. Each iteration compensation corresponds to a first voltage change. The voltage difference between the control terminal 031 and the input terminal 032 of the test transistor 003 is obtained by subtracting the sum of multiple first voltage changes and the sum of the initial voltage value.

[0068] by Figure 7 Taking the pixel driving circuit 021 shown as an example, the voltage change of the control terminal of the test transistor 003 during the data writing stage of the pixel driving circuit 021 is simulated by using the test transistor 003 and the voltage change function, as the voltage value changes from the initial voltage value to the data signal voltage value.

[0069] In one exemplary embodiment, the mathematical expression for the voltage change function is: Vi=1 / Cst×IN× t;VN=Vinit+∑ Vj-VDD, the integration range is from j=0 to j=i-1; V0=0.

[0070] in, Vi represents the first voltage change obtained in the i-th iteration; Cst represents the capacitance value of the storage capacitor; IN represents the current value obtained from the transfer characteristic curve of the test transistor 003 when the voltage difference between the control terminal 031 and the input terminal 032 of the test transistor 003 is VN, where VN is the voltage difference between the control terminal 031 and the output terminal 033 of the test transistor 003; Vinit represents the initial voltage value; VDD represents the high-level potential. Vj represents the first voltage change obtained in the j-th iteration; i is a positive integer, and j is an integer; t represents the iteration step size. For example... Figure 7 As shown, the initial voltage value is provided by the signal of the initial signal line, and the data signal voltage value is provided by the signal of the data signal line.

[0071] The iteration step size can be determined based on the compensation time and the number of iterations; the compensation time is determined based on the scanning frequency (display frame rate) and the number of lines of the display substrate 000.

[0072] Step S200: Obtain the output current of each test transistor based on the voltage difference and the transfer characteristic curve of each test transistor.

[0073] In this embodiment, the drive current value of the test transistor 003 can be read from the transfer characteristic curve of the test transistor 003 based on the voltage difference between the control terminal 031 and the input terminal 032 of the test transistor 003; the transfer characteristic curve of the test transistor 003 is determined based on the measurement data of the electrical performance of the test transistor 003.

[0074] Step S300: Determine the brightness difference of the sub-pixels of the display substrate under the preset display brightness based on the degree of difference in the output current of multiple test transistors.

[0075] In this embodiment, by testing the transistor 003 to simulate the sub-pixel 002 under a preset display brightness, the process of the potential of the control terminal of the transistor 003 iterating from the initial potential Vinit to the data potential Vdata is determined. Combined with the display parameters of the display substrate 000, the final potential of the control terminal 031 of the transistor 003 is determined to be VN1 = Vinit + ∑ Vj. The output current of multiple test transistors 003 is read using the transfer characteristic curves of multiple test transistors 003. Based on the uniformity / difference of the output current of multiple test transistors 003, the uniformity / difference of the output current of multiple driving transistors 002a is simulated to determine the brightness uniformity / difference of the sub-pixel 002 of the display substrate 000 under the preset display brightness.

[0076] For example, the uniformity / difference of the output current of multiple test transistors 003 can be compared, and calculation formulas such as range and standard deviation can be used to determine the value. Since the uniformity / difference of the output current of multiple test transistors 003 on different display substrates 000 are different, the required brightness compensation accuracy also differs. Therefore, the simulation calculation method provided in this application embodiment can simulate the uniformity of the driving current of the driving transistor 002a based on the test transistors 003; the brightness compensation method provided in this application embodiment can obtain compensation parameters by matching the compensation accuracy of the driving current uniformity of the driving transistor 002a to the display substrate 000.

[0077] In this embodiment, the parameters for optical compensation can be determined using a brightness compensation method, and then written into the storage module of the display device. The brightness uniformity of the displayed image is then re-detected to determine if the brightness compensation effect is satisfactory. If the current compensation accuracy does not meet the requirements, the compensation accuracy level can be increased, and optical compensation can be performed again. Furthermore, by using simulation calculations to determine the uniformity of the display panel's brightness, it is possible to determine whether optical compensation is needed and, if so, the level of accuracy required. In other words, selective optical compensation can be implemented, with the compensation accuracy matching the display uniformity of the current display substrate.

[0078] This application also provides a display device, please refer to... Figure 10 , Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. The display device 010 may include: a display panel, a storage module 400, and a driver chip 300 that is bonded and connected to the display panel.

[0079] The display panel may include at least a portion of the display substrate 000 described in any of the above embodiments; the storage module 400 stores compensation parameters obtained by the brightness compensation system described in any of the above embodiments; and the driving chip 300 is configured to drive the display panel 000A to display according to the compensation parameters.

[0080] For example, the display substrate 000 can be used directly as the display panel 000A without cutting, or it can be cut to obtain the display panel 000A. The storage module 400 can be integrated inside the driver chip 300, or it can be external and independent of the driver chip 300.

[0081] For example, such as Figure 7 As shown, the display device 010 may further include a flexible circuit board 500 and a main board 600. One end of the flexible circuit board 500 is bonded to the display panel 000A, and the other end is electrically connected to the main board 600. The storage module 400 may be disposed on the main board 600, or on the flexible circuit board 500 or the display panel 000A.

[0082] The display device 010 can be a display screen in a display device such as a mobile phone, tablet computer, laptop computer, monitor, or smart TV. The display device 010 can also have the technical effects of the display substrate 000 / display panel 000A described above, which will not be repeated here.

[0083] It should be noted that the dimensions of layers and regions may be exaggerated in the accompanying drawings for clarity. Furthermore, it is understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or there may be intermediate layers. Additionally, it is understood that when an element or layer is referred to as being "below" another element or layer, it can be directly below the other element, or there may be more than one intermediate layer or element. Furthermore, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or there may be more than one intermediate layer or element. Similar reference numerals throughout indicate similar elements.

[0084] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "multiple" refers to two or more unless otherwise expressly defined.

[0085] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0086] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A display substrate, characterized in that, The display substrate has a display area and a peripheral area distributed around the display area; the display substrate includes: a substrate, and sub-pixels, a plurality of test transistors and a plurality of test pad groups located on one side of the substrate; The sub-pixel is located within the display area, and the sub-pixel has a driving transistor; the structural parameters of the driving transistor are the same as the structural parameters of the test transistor; The plurality of test pad groups are located within the peripheral area and correspond to the plurality of test transistors; the control terminal, input terminal, and output terminal of the test transistor are respectively electrically connected to different test pads in the corresponding test pad groups; The test pad group is configured to test the electrical performance of the corresponding test transistor so that the accuracy for brightness compensation of the display substrate can be obtained subsequently.

2. The display substrate according to claim 1, characterized in that, The test pad group includes: a first test pad, a second test pad, and a third test pad; the first test pad is electrically connected to the control terminal, the second test pad is electrically connected to the input terminal, and the third test pad is electrically connected to the output terminal. The test pad group is configured to: connect the first test pad to a control signal to turn on the corresponding test transistor, and connect the second test pad to a first test signal and acquire the second test signal transmitted by the third test pad to test the electrical performance of the test transistor.

3. The display substrate according to claim 2, characterized in that, The different third test pads in different test pad groups are set independently; The first test pads in different test pad groups are reused as the same pad; and / or, the second test pads in different test pad groups are reused as the same pad.

4. The display substrate according to any one of claims 1-3, characterized in that, The plurality of test transistors are divided into at least one test transistor group, and a single test transistor group contains a plurality of test transistors arranged in an array, and the single test transistor group is distributed within the display area or the peripheral area.

5. The display substrate according to claim 4, characterized in that, The peripheral area includes: a non-display area distributed around the display area, and a cut-out area distributed around the non-display area; The individual test transistor groups are distributed within the display area or the non-display area; the multiple test pad groups are all distributed within the area to be cut.

6. The display substrate according to claim 5, characterized in that, The non-display area includes a bonding area; the test transistor groups are distributed close to the bonding area, and in the extension direction of the bonding area, a single test transistor group is distributed on any side of the bonding area.

7. A brightness compensation system, characterized in that, The brightness compensation system is used to perform compensation testing on the display substrate according to any one of claims 1-6, and the brightness compensation system includes: a testing device and a compensation device; The testing equipment is configured to: test the electrical performance of the plurality of test transistors through the plurality of test pad groups in the display substrate; and determine the accuracy for brightness compensation of the display substrate based on the electrical performance of the plurality of test transistors. The compensation device is configured to perform a compensation test operation on the display substrate based on the accuracy of the brightness compensation for the display substrate, so as to determine the compensation parameters for the brightness compensation of the display substrate.

8. The brightness compensation system according to claim 7, characterized in that, The testing equipment is configured to: after testing the electrical performance of the plurality of test transistors, acquire the transfer characteristic curve of each of the test transistors; and determine the degree of brightness difference of the sub-pixels of the display substrate under a preset display brightness based on the transfer characteristic curve of each of the test transistors. Based on the degree of brightness difference, the accuracy used for brightness compensation of the display substrate is determined; The degree of brightness difference is positively correlated with the accuracy of brightness compensation for the display substrate.

9. The brightness compensation system according to claim 8, characterized in that, The testing equipment is configured to: acquire the voltage difference between the control terminal and the input terminal of the driving transistor of the sub-pixel when displaying the preset brightness; acquire the output current of each test transistor based on the voltage difference and the transfer characteristic curve of each test transistor; and determine the degree of brightness difference of the sub-pixel of the display substrate when displaying the preset brightness based on the degree of difference in the output current of the multiple test transistors.

10. A display device, characterized in that, include: Display panel, storage module, and driver chip bonded and connected to the display panel; The display panel includes at least a portion of the display substrate according to any one of claims 1-6; The storage module stores compensation parameters obtained by the brightness compensation system according to any one of claims 7-9; the driving chip is configured to drive the display panel to display according to the compensation parameters.

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