High-low voltage isolating ring structure based on composite buried layer, integrated device and preparation method
By employing two low-concentration impurity ion implantations in the BCD platform to form a composite buried layer with a concentration gradient, the isolation effect and breakdown problem between high and low voltage devices were solved, achieving an increase in device breakdown voltage and a reduction in leakage current without increasing the area.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SOUTHEAST UNIV
- Filing Date
- 2026-01-26
- Publication Date
- 2026-04-24
AI Technical Summary
In the BCD platform, it is difficult to prevent premature breakdown and leakage of the isolation ring without increasing the area of the isolation ring.
A composite buried layer with a concentration gradient is formed by two low-concentration implantation methods of impurity ions of different first conductivity types, with a high concentration in the central region and a low concentration in the edge region, in order to improve the isolation effect and reduce the electric field strength at the edge of the isolation ring.
Without increasing the area of the isolation ring, this method prevents premature breakdown and leakage of the isolation ring, increases the breakdown voltage of the device, and reduces production costs.
Smart Images
Figure CN121925104A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a high- and low-voltage isolation ring structure, integrated device, and fabrication method based on a composite buried layer. Background Technology
[0002] BCD (Bipolar-CMOS-DMOS) is a mainstream power integrated circuit manufacturing technology, widely used in the global power semiconductor market for developing power integrated circuits. The BCD process integrates bipolar junction transistors (BJTs), complementary metal-oxide-semiconductor (CMOS) field-effect transistors, and either laterally-diffused metal-oxide-semiconductor (LDMOS) or vertically-diffused metal-oxide-semiconductor (VDMOS) transistors onto a single chip. It combines the advantages of bipolar devices (high transconductance and strong load drive capability), CMOS (high integration density and low power consumption), and DMOS (high voltage withstand capability), allowing them to complement each other and compensate for each other's weaknesses.
[0003] In BCD platforms, junction isolation and dielectric isolation are commonly used to isolate devices at different voltage levels. Junction isolation is the most common isolation method due to its low cost and ease of fabrication. It is often used in conjunction with buried layer technology to form an isolation ring structure for good isolation performance. However, as voltage levels increase, to prevent punch-through without increasing the area of the isolation ring, it is necessary to use buried layers with higher doping concentrations. This can lead to excessively high electric field strength at the edges of the buried layers, resulting in premature breakdown.
[0004] In summary, while ensuring the isolation effect between high and low voltage devices in the BCD platform, it is necessary to prevent the isolation ring from breaking down prematurely. This requires proposing an isolation ring structure and formation method based on a composite buried layer. Summary of the Invention
[0005] To address the aforementioned problems, this invention proposes a high-low voltage isolation ring structure, integrated device, and fabrication method based on a composite buried layer. By implanting two low-concentration impurity ions of different first conductivity types twice, a composite buried layer with a concentration gradient is formed to improve the isolation effect.
[0006] This invention employs a composite buried layer 4 with a concentration gradient, characterized by a high concentration in the central region and a low concentration in the edge region. The high concentration region at the center of the composite buried layer prevents punch-through leakage and ensures isolation effectiveness, while the low concentration region at the edge reduces the electric field at the edge of the isolation ring, thereby improving the device's breakdown voltage. The technical solution is as follows: The present invention discloses a high-low voltage isolation ring structure based on a composite buried layer, comprising a second conductivity type substrate and a second conductivity type epitaxial layer disposed on the second conductivity type substrate. A first conductivity type first buried layer is disposed within the second conductivity type substrate. A first conductivity type annular composite buried layer and a first conductivity type annular first well region are disposed within the second conductivity type epitaxial layer. The first conductivity type annular composite buried layer is located above the first conductivity type first buried layer, and the first conductivity type annular first well region is located above the first conductivity type annular composite buried layer. A first conductivity type second well region is disposed within the first conductivity type annular first well region, and a first conductivity type first heavily doped region is disposed within the second well region. The first conductivity type annular composite buried layer comprises a composite inner layer, and a composite outer layer is wrapped around the composite inner layer. Furthermore, the doping concentration of the composite inner layer is higher than that of the composite outer layer.
[0007] The present invention discloses a high-low voltage integrated device, comprising a second conductivity type substrate and a second conductivity type epitaxial layer disposed on the second conductivity type substrate. An isolation ring structure is provided on the second conductivity type epitaxial layer. The inner side of the isolation ring structure is a high-voltage region and is provided with a lateral high-voltage device, while the outer side of the isolation ring structure is a low-voltage region and is provided with a lateral low-voltage device. The isolation ring structure includes a first conductivity type first buried layer disposed within the second conductivity type substrate, a first conductivity type annular composite buried layer and a first conductivity type annular first well region disposed within the second conductivity type epitaxial layer, the first conductivity type annular composite buried layer being located above the first conductivity type first buried layer, the first conductivity type annular first well region being located above the first conductivity type annular composite buried layer, and a first conductivity type second well region being disposed within the first conductivity type annular first well region, the second well region being provided with a first conductivity type first heavily doped region. The first conductivity type annular composite buried layer includes a composite inner layer, and a composite outer layer is wrapped around the composite inner layer, with the doping concentration of the composite inner layer being higher than that of the composite outer layer. When the first conductivity type is n-type, the first conductivity type first heavily doped region is connected to the operating voltage of the lateral high-voltage device; when the first conductivity type is p-type, the first conductivity type first heavily doped region is grounded.
[0008] The method for preparing an isolation ring structure according to the present invention includes the following steps: A substrate of a second conductivity type is obtained, and ion implantation is performed on the substrate of the second conductivity type to form a first buried layer of ions of a first conductivity type. A first epitaxial layer of a second conductivity type is grown to form a partial epitaxial layer; after first ion implantation of the first conductivity type is performed on the partial epitaxial layer, second ion implantation of the first conductivity type is performed, wherein the diffusion rate of the first ion is less than the diffusion rate of the second ion, and the implantation dose of the first ion and the second ion is 1-8e13cm. -2 An energy of 10-50 keV is injected to form a composite buried layer; then, a second epitaxial layer of a second conductivity type is grown to form another epitaxial layer. In the second epitaxial layer, ions of the first conductivity type are implanted to form a first well region; Ion implantation is performed in the first well region to form the second well region, and ion implantation is performed in the second well region to form the first heavily doped region.
[0009] Compared with the prior art, the structure of the present invention has the following advantages: The isolation ring based on a composite buried layer described in this invention has a concentration gradient. On the one hand, the high concentration of traditional high-concentration buried layers leads to a high local electric field strength at the edge of the isolation ring, resulting in premature breakdown. The low concentration at the edge of the composite buried layer described in this invention reduces the electric field strength at the edge of the isolation ring, preventing premature breakdown. On the other hand, the low concentration of traditional low-concentration buried layers leads to easy depletion of the buried layer, forming leakage paths and resulting in poor isolation performance. The high concentration at the center of the composite buried layer described in this invention reduces leakage current in the isolation ring, prevents punch-through, and ensures isolation performance without increasing the area of the isolation ring. The isolation ring based on the composite buried layer described in this invention can reduce the electric field at the edge of the isolation ring, increase the breakdown voltage of the device, prevent punch-through leakage, and ensure isolation performance. Furthermore, the formation process of the composite buried layer described in this invention uses only one mask, without introducing unnecessary process steps, thus controlling production costs. Attached Figure Description
[0010] Figure 1 The diagram shown is a schematic representation of the structure of this invention. Figure 2 This is a schematic diagram of a composite buried layer isolation ring structure when the lateral high-voltage device is a high-voltage LDMOS in one embodiment of the present invention; Figure 3 This is a schematic diagram of the process flow for forming the composite buried layer isolation ring proposed in this invention. Figure 4 This is a schematic diagram of the composite embedded layer formation process proposed in this invention.
[0011] The following simulation illustrates the effects of the proposed isolation ring structure and formation method based on the composite buried layer, using a high-voltage LDMOS as an example of a lateral high-voltage device: Figure 5 -a shows the TCAD simulation concentration distribution of a traditional low-concentration buried isolation ring. Figure 5-b is the TCAD simulation concentration distribution diagram of the composite buried layer isolation ring after using the present invention; Figure 6 -a shows the current density distribution before off-state breakdown in a traditional low-concentration buried layer isolation ring as simulated by TCAD. Figure 6 -b shows a comparison of leakage current between the composite buried layer isolation ring and the traditional low-concentration buried layer isolation ring after using the present invention; Figure 7 -a shows the electric field distribution before off-state breakdown in a traditional high-concentration buried layer isolation ring as simulated by TCAD. Figure 7 -b shows the electric field distribution before the downstate breakdown of the composite buried layer isolation ring in TCAD simulation. Detailed Implementation Example 1
[0012] A high-low voltage isolation ring structure based on a composite buried layer includes a second conductivity type substrate 1 and a second conductivity type epitaxial layer disposed on the second conductivity type substrate 1. A first conductivity type first buried layer 2 is disposed within the second conductivity type substrate 1. A first conductivity type annular composite buried layer 4 and a first conductivity type annular first well region 6 are disposed within the second conductivity type epitaxial layer. The first conductivity type annular composite buried layer 4 is located above the first conductivity type first buried layer 2, and the first conductivity type annular first well region 6 is located above the first conductivity type annular composite buried layer 4. A first conductivity type second well region 8 is disposed within the first conductivity type annular first well region 6, and a first conductivity type first heavily doped region 10 is disposed within the second well region 8. The first conductivity type annular composite buried layer 4 includes a composite inner layer 41, and a composite outer layer 42 is wrapped around the composite inner layer 41. The doping concentration of the composite inner layer 41 is higher than that of the composite outer layer 42. In this embodiment, the doping concentration of the composite inner layer 41 is 1-8e16cm⁻. 3 The doping concentration of the composite outer layer (42) is 0-1e16cm⁻ 3 . Example 2
[0013] A high- and low-voltage integrated device includes a second conductivity type substrate 1 and a second conductivity type epitaxial layer disposed on the second conductivity type substrate 1. An isolation ring structure is provided on the second conductivity type epitaxial layer. The inner side of the isolation ring structure is a high-voltage region and is provided with a lateral high-voltage device, while the outer side of the isolation ring structure is a low-voltage region and is provided with a lateral low-voltage device. The isolation ring structure includes a first conductivity type first buried layer 2 disposed within the second conductivity type substrate 1, and a first conductivity type annular composite buried layer 4 and a first conductivity type annular first well region 6 disposed within the second conductivity type epitaxial layer. The first conductivity type annular composite buried layer 4 is located above the first conductivity type first buried layer 2. A first annular well region 6 of the first conductivity type is located above the first conductivity type annular composite buried layer 4. A second well region 8 of the first conductivity type is provided within the first conductivity type annular well region 6, and a first heavily doped region 10 of the first conductivity type is provided within the second well region 8. The first conductivity type annular composite buried layer 4 includes a composite inner layer 41, and a composite outer layer 42 is wrapped around the composite inner layer 41. The doping concentration of the composite inner layer 41 is higher than that of the composite outer layer 42. When the first conductivity type is n-type, the first heavily doped region 10 of the first conductivity type is connected to the operating voltage of the lateral high-voltage device; when the first conductivity type is p-type, the first heavily doped region 10 of the first conductivity type is grounded. In this embodiment, A first body region 7 of the second conductivity type is provided in the high voltage region. The lateral high voltage device is an LDMOS. The LDMOS includes a source, a drain and a gate. The drain is located in the first ring first well region 6 of the first conductivity type and is connected to the first heavily doped region 10 of the first conductivity type in the isolation ring structure. The source is located in the high voltage region. The gate extends from above the source to above the first ring first well region 6 of the first conductivity type. A fourth well region 16 of the second conductivity type and a fifth well region 17 of the first conductivity type are provided in the low-voltage region. A first conductivity type channel MOS is provided in the fourth well region 16 of the second conductivity type, and a second conductivity type channel MOS is provided in the fifth well region 17 of the first conductivity type. The first conductivity type channel MOS includes a first conductivity type source region 22 and a drain region 23 disposed in the fourth well region, and a second conductivity type fourth well region located between the source and drain regions. A gate 24 is provided above the fourth well region. The second conductivity type channel MOS includes a second conductivity type source region 19 and a drain region 20 disposed in the fifth well region, and a first conductivity type fifth well region located between the source and drain regions. A gate 24 is provided above the fifth well region. Example 3
[0014] A method for preparing an isolation ring structure includes the following steps: Obtain a substrate 1 of the second conductivity type, and perform ion implantation on the substrate 1 of the second conductivity type to form a first buried layer 2 of the first conductivity type ion formation; The fabrication of a second conductivity type epitaxial layer and its internal composite buried layer 4 involves: growing a second conductivity type first epitaxial layer 3 to form a partial epitaxial layer; performing first ion implantation of the first conductivity type on the partial epitaxial layer, followed by second ion implantation of the first conductivity type, wherein the diffusion rate of the first ion is less than that of the second ion, and the implantation dose of the first and second ions is 1-8e13cm. -2 An energy of 10-50 keV is injected to form a composite buried layer; then, a second epitaxial layer of the second conductivity type is grown to form another epitaxial layer. In the second epitaxial layer 5, ions of the first conductivity type are implanted to form the first well region 6; Ion implantation is performed in the first well region 6 to form the second well region 8, and ion implantation is performed in the second well region 8 to form the first heavily doped region 10.
[0015] In this embodiment, Ion implantation in the first well region 6 includes the following steps: Step 1: Inject ions of the first conductivity type, with an injection dose of 1-4e12 cm⁻² and an injection energy of 700-900 keV; Step 2: Inject ions of the first conductivity type, with an injection dose of 1-3e12 cm⁻² and an injection energy of 150-350 keV; Step 3: Inject ions of the first conductivity type, with an injection dose of 1-3e12 cm⁻² and an injection energy of 160-360 keV; Step 4: Inject ions of the first conductivity type, with an injection dose of 1.5-2.5e12 cm⁻² and an injection energy of 30-70 keV, a tilt angle of 7-10°, and a rotation angle of 225°. Ion implantation in the second well region 8 includes the following steps: Step 1: Inject ions of the first conductivity type, with an injection dose of 1-2e15 cm⁻² and an injection energy of 10-30 keV; Step 2: Inject ions of the first conductivity type, with an injection dose of 3-5e15 cm⁻² and an injection energy of 10-30 keV; Step 3: Inject ions of the first conductivity type, with an injection dose of 0.8-1e14 cm⁻² and an injection energy of 30-50 keV; The doping concentration of the first epitaxial layer 3 of the second conductivity type and the second epitaxial layer 5 of the second conductivity type is 1-8e15cm. -3 The thickness is 6μm.
[0016] The first conductivity type described in this invention can be N-type or P-type. When the first conductivity type is N-type, the second conductivity type is P-type; when the first conductivity type is P-type, the second conductivity type is N-type.
[0017] The present invention will now be described in detail with reference to the accompanying drawings.
[0018] An isolation ring structure based on a composite buried layer. Figure 1 This is a schematic diagram of the structure of the present invention. The composite buried layer isolation ring is located between the lateral high-voltage device and the low-voltage device. The lateral high-voltage device is located inside the isolation ring, and the low-voltage device is located outside the isolation ring. The composite buried layer isolation ring structure includes a first buried layer 2 of a first conductivity type, a composite buried layer 4 of a first conductivity type, and a first well region 6 of a first conductivity type. The formation process is as follows: after forming the first buried layer 2 of the first conductivity type on the substrate 1 of the second conductivity type, the first epitaxial layer 3 of the second conductivity type is epitaxially grown; after forming the composite buried layer 4 of the first conductivity type by two low-concentration implantations of different impurity ions of the first conductivity type in the first epitaxial layer 3, the second epitaxial layer 5 of the second conductivity type is epitaxially grown; then, the first well region 6 of the first conductivity type is formed on the surface of the second epitaxial layer 5; the second well region 8 of the first conductivity type is formed in the first well region 6 near the isolation ring side, and the first heavily doped region of the first conductivity type is formed in the second well region 8, thereby forming the isolation ring contact region.
[0019] In one embodiment, the lateral high-voltage device is a high-voltage LDMOS, and the low-voltage device is a CMOS, such as... Figure 2 As shown, the high-voltage LDMOS is located inside the isolation ring. A third well region 9 of the first conductivity type and a second heavily doped region 11 of the first conductivity type are located within the first well region 6 and inside the second well region 8, thus forming the drain contact region of the LDMOS. A first body region 7 of the second conductivity type is formed in the middle region within the isolation ring. A third heavily doped region 12 of the first conductivity type and a fourth heavily doped region 13 of the second conductivity type are formed within the first body region, thus forming the source contact region and body contact region of the LDMOS. The gate 15 extends from above the first body region 7 and covers the field oxide 14. The third heavily doped region 12 of the first conductivity type and one side of the gate structure 15 are self-aligned. The low-voltage CMOS is located outside the isolation ring. A first-conductivity-type channel MOS is formed in the fourth well region 16 of the second conductivity type, and a second-conductivity-type channel MOS is formed in the fifth well region 17 of the first conductivity type. The first-conductivity-type channel MOS includes a first-conductivity-type source region 22 and a drain region 23 disposed in the fourth well region, and a second-conductivity-type fourth well region located between the source and drain regions. A gate 24 is disposed above the fourth well region. The second-conductivity-type channel MOS includes a second-conductivity-type source region 19 and a drain region 20 disposed in the fifth well region, and a first-conductivity-type fifth well region located between the source and drain regions. A gate 24 is disposed above the fifth well region.
[0020] The following uses an N-type composite buried layer isolation ring as an example to illustrate the isolation ring formation process of the present invention, such as... Figure 3As shown: After forming an N-type first buried layer 2 on a P-substrate 1, a P-type first epitaxial layer 3 is formed; an N-type composite buried layer 4 is formed in the P-type first epitaxial layer through two low-concentration implantations; a P-type second epitaxial layer 5 is formed; a first N-well 6 is formed on the surface of the P-type second epitaxial layer; a second N-well 8 and an N-well 9 are formed in the first N-well. + Region 10, thus forming an N-type isolation ring contact area.
[0021] The following uses an N-type composite buried layer as an example to illustrate the composite buried layer formation process in this invention, such as... Figure 4 As shown: after forming the first P-type epitaxial layer 3, a first low-concentration N-ion implantation is performed; then, with the photolithography window unchanged, a second low-concentration N-ion implantation is performed, using different impurity ions for the two implantations; the resist is removed, and the layer is annealed to form an N-type composite buried layer 4 with a high concentration in the middle and a low concentration at the edges.
[0022] The invention will now be further described with reference to the accompanying drawings.
[0023] Working principle of the invention: In forming the N-type composite buried layer 4, this invention utilizes the difference in diffusion coefficients of different impurity ions and employs two low-concentration implantations of impurity ions of different first conductivity types to form a composite buried layer with a concentration gradient. The concentration is high in the central region to prevent penetration leakage, while the concentration is low at the edges to prevent premature breakdown caused by high local electric field strength.
[0024] The effects of this invention are illustrated below using a high-voltage NLDMOS as an example of a lateral high-voltage device. An N-type composite buried isolation ring is located between the high-voltage NLDMOS and the low-voltage device, with the NLDMOS situated inside the isolation ring.
[0025] Figure 5 -a shows the TCAD simulation concentration distribution of a traditional low-concentration buried isolation ring. Figure 5 -b is the TCAD simulation concentration distribution diagram of the composite buried layer isolation ring after using the present invention.
[0026] Figure 6 -a shows the current density distribution before the off-state breakdown of a traditional low-concentration buried layer isolation ring in TCAD simulation. As shown in the figure, the low-concentration buried layer isolation ring cannot completely isolate the device, forming a leakage path. The breakdown voltage of the device is 108.1V. Figure 6 -b shows a comparison of leakage current between the composite buried layer isolation ring and the traditional low-concentration buried layer isolation ring after using the present invention. At 100V, the leakage current is reduced by two orders of magnitude after using the composite buried layer isolation ring of the present invention.
[0027] Figure 7 -a shows the electric field distribution before off-state breakdown in a traditional high-concentration buried layer isolation ring as simulated by TCAD. As shown in the figure, the high-concentration buried layer makes the electric field strength at the edge of the isolation ring high, which makes it easy for premature breakdown to occur. The breakdown voltage of the device is 91.3V. Figure 7 -b shows the electric field distribution before the off-state breakdown of the composite buried layer isolation ring in TCAD simulation. The electric field strength at the edge of the isolation ring decreases, and the breakdown voltage of the device increases to 113.6V.
[0028] This confirms that the isolation ring structure and formation method based on the composite buried layer proposed in this invention can reduce the electric field at the edge of the isolation ring and increase the breakdown voltage of the device while preventing leakage current and ensuring the isolation effect through the composite buried layer with a concentration gradient.
Claims
1. A high-low voltage isolation ring structure based on a composite buried layer, comprising a second conductivity type substrate (1) and a second conductivity type epitaxial layer disposed on the second conductivity type substrate (1), wherein a first conductivity type first buried layer (2) is disposed within the second conductivity type substrate (1), characterized in that, A first conductive type annular composite buried layer (4) and a first conductive type annular first well region (6) are provided within the second conductive type epitaxial layer. The first conductive type annular composite buried layer (4) is located above the first conductive type first buried layer (2). The first conductive type annular first well region (6) is located above the first conductive type annular composite buried layer (4). A first conductive type second well region (8) is provided within the first conductive type annular first well region (6). A first conductive type first heavily doped region (10) is provided within the second well region (8). The first conductive type annular composite buried layer (4) includes a composite inner layer (41). A composite outer layer (42) is wrapped around the composite inner layer (41). The doping concentration of the composite inner layer (41) is higher than that of the composite outer layer (42).
2. The high and low voltage isolation ring structure based on a composite buried layer according to claim 1, characterized in that, The doping concentration of the composite inner layer (41) is 1-8e16cm⁻ 3 The doping concentration of the composite outer layer (42) is 0-1e16cm. ⁻3 .
3. A high-low voltage integrated device, comprising a second conductivity type substrate (1) and a second conductivity type epitaxial layer disposed on the second conductivity type substrate (1), wherein an isolation ring structure is provided on the second conductivity type epitaxial layer, the inner side of the isolation ring structure is a high voltage region and is provided with a lateral high voltage device, and the outer side of the isolation ring structure is a low voltage region and is provided with a lateral low voltage device, characterized in that, The isolation ring structure includes a first buried layer (2) of the first conductivity type disposed in a substrate (1) of the second conductivity type, a first annular composite buried layer (4) of the first conductivity type and a first annular well region (6) of the first conductivity type disposed in the epitaxial layer of the second conductivity type, the first annular composite buried layer (4) of the first conductivity type being located above the first buried layer (2) of the first conductivity type, the first annular well region (6) of the first conductivity type being located above the first annular composite buried layer (4), a second well region (8) of the first conductivity type being disposed in the first annular well region (6), and a first heavily doped region (10) of the first conductivity type being disposed in the second well region (8); the first annular composite buried layer (4) of the first conductivity type includes a composite inner layer (41), a composite outer layer (42) is wrapped around the composite inner layer (41), and the doping concentration of the composite inner layer (41) is higher than that of the composite outer layer (42); when the first conductivity type is n-type, the first heavily doped region (10) of the first conductivity type is connected to the working voltage of the lateral high voltage device, and when the first conductivity type is p-type, the first heavily doped region (10) of the first conductivity type is grounded.
4. The high- and low-voltage integrated device according to claim 3, characterized in that, A second conductivity type first body region (7) is provided in the high voltage region. The lateral high voltage device is LDMOS. The LDMOS includes a source, a drain and a gate. The drain is located in the first conductivity type annular first well region (6) and is connected to the first conductivity type first heavily doped region (10) in the isolation ring structure. The source is located in the high voltage region. The gate extends from above the source to above the first well region (6) of the first conductivity type.
5. The high- and low-voltage integrated device according to claim 4, characterized in that, The low-voltage region has a fourth well region (16) of the second conductivity type and a fifth well region (17) of the first conductivity type. An NMOS is provided in the fourth well region (16) of the second conductivity type and a PMOS is provided in the fifth well region (17) of the first conductivity type.
6. A method for preparing an isolation ring structure, characterized in that, Includes the following steps: A second conductivity type substrate (1) is obtained, and ion implantation is performed on the second conductivity type substrate (1) to form a first conductivity type ion-formed first buried layer (2). A first epitaxial layer of the second conductivity type is grown (3) to form a partial epitaxial layer; after first ion implantation of the first conductivity type is performed on the partial epitaxial layer, second ion implantation of the first conductivity type is performed, and the diffusion rate of the first ion is less than the diffusion rate of the second ion, and the implantation dose of the first ion and the second ion is 1-8e13cm. -2 An energy of 10-50 keV is injected to form a composite buried layer; then, a second epitaxial layer of the second conductivity type is grown (5) to form another epitaxial layer; In the second epitaxial layer (5), ions of the first conductivity type are injected to form a first well region (6); Ion implantation is performed in the first well region (6) to form the second well region (8), and ion implantation is performed in the second well region (8) to form the first heavily doped region (10).
7. The method for preparing the isolation ring structure according to claim 6, characterized in that, Ion implantation is performed in the first trap region (6). Includes the following steps: The first step involves injecting ions of the first conductivity type at a dose of 1-4e12 cm⁻² and an energy of 700-900 keV. The second step involves injecting ions of the first conductivity type at a dose of 1-3e12 cm⁻² and an energy of 150-350 keV. The third step involves injecting ions of the first conductivity type at a dose of 1-3e12 cm⁻² and an energy of 160-360 keV. The fourth step involves injecting ions of the first conductivity type at a dose of 1.5-2.5e12 cm⁻² and an energy of 30-70 keV, with a tilt angle of 7-10° and a rotation angle of 225°.
8. The method for preparing the isolation ring structure according to claim 6, characterized in that, Ion implantation in the second well region (8) includes the following steps: Step 1: Inject ions of the first conductivity type, with an injection dose of 1-2e15 cm⁻² and an injection energy of 10-30 keV; Step 2: Inject ions of the first conductivity type, with an injection dose of 3-5e15 cm⁻² and an injection energy of 10-30 keV; Step 3: Inject ions of the first conductivity type, with an injection dose of 0.8-1e14 cm⁻² and an injection energy of 30-50 keV.
9. The method for preparing the isolation ring structure according to claim 6, characterized in that, The doping concentrations of the first epitaxial layer (3) of the second conductivity type and the second epitaxial layer (5) of the second conductivity type are 1-8e15cm. -3 The thickness is 6μm.