Composite substrate for fiber integrated circuit and preparation method thereof

Abstract

The invention discloses a composite substrate for a fiber integrated circuit, and the composite substrate comprises a flexible polymer layer, the flexible polymer layer comprises a modified surface, the modified surface is obtained through plasma treatment, and the material of the flexible polymer layer is one of polydimethylsiloxane, styrene-butadiene-styrene block copolymer and polyurethane; the buffer layer is located on the flexible polymer layer and attached to the modified surface, and the buffer layer is made of poly-p-xylylene. The surface flatness of the composite substrate is high, a good platform is provided for subsequent application of electronic devices, the stability of the electronic devices on the composite substrate is guaranteed, under the synergistic effect of the flexible polymer layer and the buffer layer, the stripping and open circuit risks of a fiber integrated circuit function module can be effectively restrained, and long-term stable work of the devices is guaranteed. The invention further discloses a preparation method of the composite substrate for the fiber integrated circuit, the fiber integrated circuit and application of the fiber integrated circuit.

Description

Technical Field

[0001] This invention relates to the field of intelligent electronic devices, and in particular to a composite substrate for fiber integrated circuits and its preparation method, fiber integrated circuits and their applications, intelligent wearable devices, and implantable sensors. Background Technology

[0002] Fiber integrated circuits (FICs), as a core innovation direction in the field of flexible electronics, are driving technological transformation in areas such as smart textiles, biomedical sensing, and wearable devices due to their unique advantages of miniaturization, flexibility, and integrability. An ideal fiber integrated circuit can integrate multifunctional modules such as computing, sensing, and communication within a single fiber. It can not only achieve complex data processing but also withstand mechanical deformations such as bending and stretching, demonstrating irreplaceable value in scenarios such as real-time physiological monitoring in healthcare, environmental sensing in industrial safety, and posture analysis in motion. Its technological breakthroughs have broken the form limitations of traditional smart devices, providing core support for building new applications such as "wearable computers" and "fiber optic laboratories," becoming an important interface connecting the physical and digital worlds, and its research and development are of great significance.

[0003] Unlike traditional information processors fabricated on rigid planar silicon substrates, the core challenge in developing fiber optic integrated circuits lies in integrating a large number of interconnected micro-devices, such as transistors, resistors, and capacitors, onto a specialized fiber substrate. The performance stability of fiber optic integrated circuits is highly dependent on the fabrication process, with the surface flatness of the substrate being a key factor determining device reliability.

[0004] Several existing technologies have made preliminary explorations in this area. For example, patent CN115274699A discloses a method for fabricating flexible fiber integrated circuits, but the substrate used has problems such as large microscopic undulations and high surface roughness, which fails to meet the requirements for high-precision device fabrication. Patent CN118338740A discloses a fibrous organic electroluminescent device and its fabrication method, which sets the light-emitting device on a substrate. The light-emitting fiber itself has low precision requirements, and the light-emitting device itself is different from electronic devices such as transistors in integrated circuits, with low requirements for flatness. Flatness basically does not affect the operation of the light-emitting device.

[0005] For fiber optic integrated circuits (FICs), which highly integrate multiple complex electronic devices, substrate flatness defects directly lead to a series of technical bottlenecks. On the one hand, microscopic irregularities on the substrate surface cause uneven deposition of subsequent functional devices (such as conductive paths and transistors), resulting in localized stress concentrations. On the other hand, uneven interfaces reduce the effective contact area between functional layers and the substrate, weakening interlayer bonding. Ultimately, this leads to frequent failures of FICs in practical applications such as bending, twisting, and stretching, including module peeling, circuit breaks, and performance degradation. Furthermore, insufficient substrate flatness limits the integration density of FICs, making it difficult to achieve high transistor density multifunctional integration and severely hindering its commercialization. Therefore, solving the substrate flatness problem and improving the stability of interlayer structures have become critical technical barriers that need to be overcome in the development of FIC technology. Summary of the Invention

[0006] To address the aforementioned technical problems, embodiments of the present invention disclose a composite substrate for fiber optic integrated circuits, comprising:

[0007] A flexible polymer layer, the flexible polymer layer including a modified surface, the modified surface being obtained by plasma treatment, the material of the flexible polymer layer being one of polydimethylsiloxane, styrene-butadiene-styrene block copolymer and polyurethane;

[0008] A buffer layer is located on top of the flexible polymer layer and adhered to the modified surface. The material of the buffer layer is parylene.

[0009] By adopting the above technical solution, plasma modification treatment and the application of buffer layer can jointly achieve surface smoothing modification of flexible polymer layer, significantly improving the surface smoothness of composite substrate, providing a good platform for subsequent application of electronic devices, ensuring the stability of electronic devices on composite substrate, and significantly improving the interlayer bonding strength of composite substrate. Under the synergistic effect of flexible polymer layer and buffer layer, the risk of peeling and open circuit of fiber integrated circuit functional module under mechanical deformation such as bending, torsion and stretching can be effectively suppressed, ensuring long-term stable operation of device.

[0010] Optionally, the flexible polymer layer is made of polydimethylsiloxane, and the plasma treatment is plasma etching.

[0011] Optionally, the thickness of the flexible polymer layer is 4-15 μm, and the thickness of the buffer layer is 100-800 nm.

[0012] Optionally, the root mean square roughness Rq of the composite substrate is 0.1-0.8 nm, and the arithmetic mean roughness Ra is 0.1-0.5 nm.

[0013] Optionally, the Young's modulus of the flexible polymer layer is 0.5-4 MPa, and the Young's modulus of the buffer layer is 2-5 GPa.

[0014] Another embodiment of the present invention discloses a method for preparing the above-mentioned composite substrate for fiber integrated circuits, comprising the following steps:

[0015] Preparation of flexible polymer layer: A flexible polymer layer material is coated on the surface of a carrier, cured, and then subjected to plasma treatment to obtain a flexible polymer layer with a modified surface;

[0016] Preparation of buffer layer: Deposit parylene on the modified surface to obtain buffer layer, thereby obtaining the composite substrate.

[0017] By adopting the above technical solution, the surface flatness of the flexible polymer layer can be optimized through plasma treatment, providing a uniform and dense substrate for the subsequent deposition of the parylene buffer layer. The entire preparation process does not require complicated treatment, the process is mild and highly compatible, and ensures the dimensional stability and interlayer bonding of the composite substrate.

[0018] Optionally, in the step of preparing the flexible polymer layer, polydimethylsiloxane is spin-coated onto the surface of polyethylene terephthalate sheet at a rotation speed of 4500-5000 rpm for 110-120 s, followed by UV curing for 50-60 min.

[0019] Optionally, the plasma treatment is plasma etching performed under conditions of 70-75 W power and 8-10 Pa pressure.

[0020] Optionally, in the step of preparing the buffer layer, parylene is deposited on the modified surface by chemical vapor deposition.

[0021] Another embodiment of the present invention discloses a fiber optic integrated circuit, comprising:

[0022] The aforementioned composite substrate;

[0023] Electronic devices are disposed on the composite substrate.

[0024] By adopting the above technical solution, the composite substrate provides a high-flatness and high-adhesion bearing interface for the functional modules through the synergistic effect of the plasma-modified flexible polymer layer and the parylene buffer layer. This effectively avoids the risk of peeling and open circuit of the functional modules under bending, stretching and other deformations. The fiber integrated circuit has both excellent flexibility and structural stability, which can meet the application requirements of high integration and long cycle operation.

[0025] Another embodiment of the present invention discloses the application of the above-described fiber integrated circuit in smart wearables or implanted sensors.

[0026] By adopting the above technical solution, fiber integrated circuits can achieve good flexible bonding with the fabric substrate of smart textiles and the human body contact interface of medical sensing devices. This not only ensures the comfort and motion tracking of smart textiles, but also improves the accuracy and long-term safety of physiological signal monitoring of medical sensing devices, providing reliable technical support for the application of flexible electronic devices in various scenarios.

[0027] Another embodiment of the present invention discloses a smart wearable device, including the fiber integrated circuit described above.

[0028] Another embodiment of the present invention discloses an implantable sensor, including the fiber integrated circuit described above. Attached Figure Description

[0029] Figure 1 A schematic diagram of the composite substrate of the present invention is shown;

[0030] Figure 2 A schematic diagram of the preparation method of the composite substrate of the present invention is shown;

[0031] Figure 3 The following is an atomic force microscope image of the surface in Comparative Example 1;

[0032] Figure 4 Comparative Example 2 shows an atomic force microscope image of the surface;

[0033] Figure 5 An atomic force microscope image of the composite substrate surface of Example 1 is shown;

[0034] Figure 6 An optical microscope image of the fiber integrated circuit prepared in Example 1 after being exposed to 100°C for 24 hours is shown.

[0035] Figure 7 An optical microscope image of the surface of the fiber integrated circuit prepared in Example 1 after 10,000 bending cycles is shown.

[0036] Figure 8 An optical microscope image of the surface of the fiber integrated circuit prepared in Comparative Example 2 after 10,000 bending cycles is shown.

[0037] Figure 9 The output current variation curve of the fiber integrated circuit prepared in Example 1 under 45% tensile strain is shown.

[0038] Figure 10 The output current variation curve of the fiber integrated circuit prepared in Comparative Example 2 under 45% tensile strain is shown.

[0039] Figure 11 An optical microscope image of the fiber integrated circuit prepared in Example 1 under 45% tensile strain is shown.

[0040] Figure 12 An optical microscope image of the fiber integrated circuit prepared in Comparative Example 2 after recovery from 10% tensile strain is shown.

[0041] Figure 13 The frequency response performance curves of the transistors in the fiber integrated circuit prepared in Example 1 are shown.

[0042] Figure 14 The frequency response performance curves of the transistors in the fiber integrated circuit prepared in Comparative Example 1 are shown.

[0043] Figure 15 The frequency response performance curves of the transistors in the fiber integrated circuit prepared in Comparative Example 3 are shown.

[0044] Figure 16 This diagram illustrates the structure of a fiber optic integrated circuit according to an embodiment of the present invention.

[0045] Figure 17 A cross-sectional photograph of a fiber integrated circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0046] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Although the description of the present invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may be derived based on the claims of the present invention. To provide a deep understanding of the invention, many specific details will be included in the following description. The invention may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0047] It should be noted that in this specification, similar reference numerals and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0048] The terms “first”, “second”, etc., are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0049] In the description of this embodiment, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set up," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this embodiment based on the specific circumstances.

[0050] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0051] like Figure 1 As shown, a first aspect of the present invention discloses a composite substrate 1 for fiber optic integrated circuits, comprising:

[0052] The flexible polymer layer 2 includes a modified surface, which is obtained by plasma treatment. That is, the surface of the flexible polymer layer 2 itself is plasma treated to obtain the modified surface. The material of the flexible polymer layer 2 is one of polydimethylsiloxane (PDMS), styrene-butadiene-styrene block copolymer (SBS), and polyurethane (PU).

[0053] The buffer layer 3 is located on top of the flexible polymer layer 2 and is attached to the modified surface. The material of the buffer layer 3 is parylene (also known as parylene).

[0054] During their exploration of fiber integrated circuits, the inventors discovered that the flatness of the substrate has a significant impact on the lifespan, durability, and stability of subsequent fiber integrated circuits. Therefore, the composite substrate of this invention is a pioneering invention made in this field after in-depth research and repeated experiments, addressing the technical pain points of poor flatness and weak interlayer bonding of existing fiber integrated circuit substrates, which leads to easy peeling of functional modules.

[0055] On the one hand, plasma treatment modifies the surface of the flexible polymer layer, significantly reducing its microscopic undulations and enhancing its surface activity. This also creates a highly adaptable adhesion interface for the subsequent buffer layer. On the other hand, the parylene buffer layer itself is dense and pinhole-free. During the close adhesion process to the modified surface, it further fills the fine pores on the flexible polymer layer surface. Through the synergistic effect of plasma treatment and the buffer layer, the surface smoothness of the final composite substrate is greatly improved, enabling it to effectively support electronic devices.

[0056] Meanwhile, the parylene buffer layer is tightly bonded to the surface of the modified flexible polymer layer. Utilizing the dense nature of parylene, it prevents solvent damage to the flexible polymer layer, avoiding swelling, deformation, or performance degradation due to solvent erosion. It also blocks the intrusion of external moisture and impurities, further enhancing the environmental stability of the composite substrate and ensuring the long-term reliable operation of fiber integrated circuits. Research shows that introducing a parylene buffer layer between the flexible polymer layer and the circuit can reduce the strain of the circuit layer by 99.6% during deformation, significantly slowing down the aging process: circuits with a buffer layer maintain uniform continuity after 10,000 bending cycles, while circuits without a buffer layer show obvious wrinkles and cracks.

[0057] Specifically, the relatively soft, low-modulus flexible polymer layer and the relatively harder, high-modulus parylene buffer layer together form a reliable support for the fiber integrated circuit. When the fiber integrated circuit is subjected to mechanical deformation such as bending, torsion, and stretching, the low-modulus flexible polymer layer can absorb most of the stress through its own elastic deformation, avoiding damage to the functional module caused by rigid transmission. Meanwhile, the buffer layer can maintain the stability of the surface morphology and provide a flat and solid bearing substrate for the functional module. The two work together to completely solve the technical problems of interlayer delamination and functional module failure in traditional substrates, greatly improve the structural stability and fatigue resistance of fiber integrated circuits, break through the technical barriers that restrict the commercial application of fiber integrated circuits, and integrate a variety of high-precision electronic devices in fiber integrated circuits. It can realize the integration of multiple functional modules in a single fiber to achieve a closed-loop system of sensing-signal processing-display-energy storage, or form wearable fabrics through multiple fibers to achieve monitoring and other functions.

[0058] In an embodiment of the present invention, the material of the flexible polymer layer is polydimethylsiloxane. Polydimethylsiloxane itself has excellent flexibility, elasticity and biocompatibility. After plasma modification, its flexible properties are not damaged and its flatness can be greatly optimized.

[0059] With the combination of polydimethylsiloxane and parylene, the composite substrate can combine many advantages such as good flexibility, toughness, biocompatibility and durability, thereby improving the stability and reliability of fiber integrated circuits. It can be safely applied to implantable medical sensing and other scenarios, and can meet the dual requirements of comfort and durability for wearable devices such as smart textiles, thus expanding its application prospects.

[0060] In embodiments of the present invention, plasma treatment is plasma etching, which possesses precise surface morphology control capabilities, enabling controllable optimization of surface roughness. Simultaneously, this modification method overcomes the chemical inertness of polydimethylsiloxane, significantly improving the interfacial bonding with the parylene buffer layer, without compromising the inherent advantages of polydimethylsiloxane. Furthermore, the process characteristics of plasma etching do not cause swelling or deformation of polydimethylsiloxane, exhibiting excellent compatibility with subsequent processes. Plasma etching can also achieve large-area uniform modification, avoiding stress concentration caused by localized flatness differences, ensuring the consistency of the overall performance of the composite substrate, and meeting the needs of large-scale fabrication of fiber integrated circuits. Specifically, the plasma is selected from at least one of oxygen plasma, air plasma, argon plasma, nitrogen plasma, CF4 plasma, and SF6 plasma. Oxygen plasma is preferred.

[0061] In embodiments of the present invention, the thickness of the flexible polymer layer is 4-15 μm, and the thickness of the buffer layer is 100-800 nm. This thickness ratio achieves a precise balance between flexible support and rigid load-bearing. The thicker flexible polymer layer of 4-15 μm provides sufficient space for elastic deformation, effectively absorbing the mechanical stress generated when the fiber integrated circuit is bent and stretched. The thinner buffer layer of 100-800 nm ensures surface flatness and density without excessively increasing the overall thickness and rigidity of the substrate. The synergistic cooperation of the two thicknesses allows the composite substrate to have both excellent flexibility and structural stability, meeting the application requirements of miniaturization and high reliability of fiber integrated circuits. Preferably, the thickness of the flexible polymer layer is 5-10 μm and the thickness of the buffer layer is 300-500 nm. Further, the thickness of the flexible polymer layer can be 5-10 μm and the thickness of the buffer layer can be 300-500 nm to further optimize the mechanical matching and bonding of the composite substrate. The elastic deformation capability of the flexible polymer layer and the surface support function of the buffer layer achieve a better synergistic state, which is more in line with the stringent requirements of application scenarios such as smart wearables and implantable sensors.

[0062] In the embodiments of the present invention, the root mean square roughness Rq of the composite substrate is 0.1-0.8 nm and the arithmetic mean roughness Ra is 0.1-0.5 nm, which greatly improves the interfacial bonding force and effectively avoids problems such as warping and peeling of the buffer layer during subsequent device processing or mechanical deformation, providing a reliable support foundation for the high-precision integration of fiber integrated circuit functional modules.

[0063] In embodiments of the present invention, the Young's modulus of the flexible polymer layer is 0.5-4 MPa, and the Young's modulus of the buffer layer is 2-5 GPa. The low-modulus flexible polymer layer can efficiently absorb the mechanical stress generated during bending and stretching of the fiber integrated circuit through its own elastic deformation, while the high-modulus buffer layer can maintain the stability of the surface morphology and provide a solid support interface for the functional module. The synergistic modulus of the two ensures both the flexibility and adaptability of the composite substrate and enhances the structural stability.

[0064] The second aspect of the present invention discloses a method for preparing a composite substrate for fiber integrated circuits according to the above embodiments, with reference to... Figure 2 It includes the following steps:

[0065] Preparation of flexible polymer layer: A flexible polymer layer material is coated on the surface of a carrier, cured, and then subjected to plasma treatment to obtain a flexible polymer layer with a modified surface;

[0066] Preparation of buffer layer: Deposit parylene on modified surface to obtain buffer layer, and then obtain composite substrate.

[0067] This preparation method is simple and controllable. The combined plasma treatment and deposition processes are both dry operations, requiring no solvents. This effectively avoids swelling, deformation, or residual impurities in the flexible polymer layer, ensuring the dimensional accuracy and surface cleanliness of the composite substrate. Furthermore, the plasma treatment process parameters can be precisely adjusted and are highly compatible with the subsequent parylene deposition process, achieving molecular-level adhesion between the modified interface and the buffer layer. This significantly improves the yield and performance consistency of the composite substrate, making it suitable for large-scale production applications.

[0068] In an embodiment of the present invention, in the step of preparing the flexible polymer layer, polydimethylsiloxane is spin-coated onto the surface of a polyethylene terephthalate sheet at a rotation speed of 4500-5000 rpm for 110-120 s, followed by UV curing for 50-60 min. This yields a polydimethylsiloxane flexible polymer layer with uniform thickness and regular morphology. Furthermore, UV curing can reduce or avoid the generation of bubbles in the flexible polymer layer, effectively improving the density and structural uniformity of the flexible polymer layer, and further enhancing the overall quality of the flexible polymer layer.

[0069] In an embodiment of the present invention, plasma treatment is performed by plasma etching at a power of 70-75 W and a pressure of 8-10 Pa. The etching under these parameters can precisely control the microstructure of the polydimethylsiloxane surface, and introduce active groups while removing surface defects, thereby achieving dual optimization of surface smoothness and adhesion.

[0070] In an embodiment of the present invention, in the step of preparing the buffer layer, parylene is deposited on the modified surface by chemical vapor deposition. The vapor deposition process can achieve good coverage of the parylene film and form a close molecular-level adhesion with the plasma-etched modified polydimethylsiloxane surface, further improving the interlayer bonding force and structural stability of the composite substrate.

[0071] Specifically, using chemical vapor deposition, the dimeric raw material of parylene is first heated to 100-150°C in a vacuum environment (5-7 Torr) to convert it into a gaseous state. Then, the temperature is set to 650-700°C, and the gaseous dimer decomposes into free radical monomers. Finally, parylene is deposited on the modified surface at near room temperature.

[0072] A third aspect of the present invention discloses a fiber optic integrated circuit, comprising:

[0073] The composite substrates of the above embodiments;

[0074] Electronic devices are mounted on a composite substrate.

[0075] The composite substrate, through the synergistic effect of a plasma-modified flexible polymer layer and a parylene buffer layer, provides a highly flat and adhesive interface for the functional modules, effectively mitigating the risks of peeling and open circuits under bending, stretching, and other deformations. The fiber integrated circuit possesses both excellent flexibility and structural stability, meeting the application requirements of high integration and long-cycle operation. Furthermore, a closed-loop system of sensing, signal processing, display, and energy storage can be realized within a single fiber through functional modules, achieving signal processing, storage, and output, filling the technological gap in fiber electronics that lacks information processing capabilities.

[0076] Furthermore, such as Figure 16 As shown, the electronic device is connected by wires to form a functional circuit layer. The electronic device includes at least one of organic electrochemical transistors, organic thin-film transistors, or metal oxide transistors. The conductor material of the wires is selected from one or more of gold, silver, copper, aluminum, platinum, titanium / gold composite layers, chromium / gold composite layers, conductive carbon materials, conductive polymers, or transparent conductive materials. Specifically, the functional circuit layer is formed by at least one of the following processes: photolithography-deposition-stripping, etching, thin-film printing, spin coating, evaporation, sputtering, electroplating, printing, spraying, and transfer.

[0077] Furthermore, the surface of the functional circuit layer is coated with a semi-cured elastomer, such as semi-cured PDMS, as an interlayer adhesive layer to improve adhesion and the stability of electronic devices.

[0078] Furthermore, such as Figure 17As shown, the fiber integrated circuit also includes locally thickened structures located on one or more edges of the composite substrate. The fiber integrated circuit is a multi-layered helical laminated fiber body wound around the locally thickened structure as its axis. After winding, the thickened structure is located at the axis of the fiber integrated circuit, and the composite substrate is on the outside of the fiber integrated circuit. The thickened structure is, for example, made of PDMS material.

[0079] The fourth aspect of the present invention discloses the application of the fiber integrated circuit of the above embodiments in smart wearables or implantable sensors.

[0080] Fiber integrated circuits can achieve excellent flexible bonding with the fabric substrate of smart textiles and the human body contact interface of medical sensing devices. This ensures the comfort and motion tracking of smart textiles while improving the accuracy and long-term safety of physiological signal monitoring in medical sensing devices. For example, they can be used as brain-computer interfaces to achieve precise signal acquisition and output, providing reliable technical support for the application of flexible electronic devices in various scenarios.

[0081] A fifth aspect of the present invention discloses a smart wearable device, including the fiber integrated circuits of the above embodiments, expanding its application scenarios to include motion posture recognition, health sign monitoring, and other diverse applications. Specifically, the smart wearable device is obtained by weaving fiber integrated circuits.

[0082] A sixth aspect of the present invention discloses an implantable sensor comprising the dimensional integrated circuits described in the above embodiments. For example, by implanting a single fiber integrated circuit in the human body, sensing can be performed to achieve high-precision, long-term in-situ monitoring of the target object. Furthermore, the fiber integrated circuit can also directly process information within the human body and communicate with external devices. More specific embodiments will be described below.

[0083] Example 1:

[0084] Example 1 is a composite substrate, and its preparation method is as follows:

[0085] Preparation of flexible polymer layers: such as Figure 2 As shown, polydimethylsiloxane (PDMS-601, mass ratio 9:1, Wacker Chemie AG) was spin-coated onto the surface of polyethylene terephthalate (PET) sheets (Shenzhen Dongsheng Plastic Products Co., Ltd.) at a speed of 5000 rpm for 120 seconds. After spin-coating, the sheets were cured by ultraviolet (UV) light for 1 hour to complete the crosslinking reaction. The cured PDMS surface was then treated with oxygen plasma for 3 minutes using a reactive ion etching system (Trion T2, Sichuan Ion Technology Co., Ltd.) at a power of 75W and a pressure of 10Pa to improve surface uniformity and adhesion.

[0086] Preparation of buffer layer: Using a parylene coating machine (Specialty Coating Systems, PDS 2010, Gisco Corporation), a high-modulus parylene buffer layer was deposited on the plasma-treated PDMS surface by chemical vapor deposition (CVD) to obtain a composite substrate, which provides mechanical support for subsequent functional device layers.

[0087] Comparative Example 1:

[0088] The difference between Comparative Example 1 and Example 1 is that Comparative Example 1 does not have a buffer layer and the PDMS has not been plasma modified.

[0089] Comparative Example 2:

[0090] The difference between Comparative Example 2 and Example 1 is that Comparative Example 2 does not have a buffer layer.

[0091] Comparative Example 3:

[0092] The difference between Comparative Example 3 and Example 1 is that the buffer layer material used in Comparative Example 3 is not parylene, but polyvinyl alcohol.

[0093] The surface roughness levels of Example 1, Comparative Example 1, and Comparative Example 2 were measured, such as... Figures 3-5 As shown, compared to unmodified PDMS surfaces (such as...) Figure 3 As shown), the PDMS surface treated with plasma (e.g. Figure 4 The smoothness of the composite substrate surface (as shown) is significantly improved, and the surface smoothness of the composite substrate in Example 1 (as shown) is significantly improved. Figure 5 As shown, the root mean square roughness (Rq) and arithmetic mean roughness (Ra) were reduced by 87.5% and 87.4% respectively, with the final parameters reaching Rq = 0.64 nm and Ra = 0.48 nm, which is comparable to the surface roughness level of commercial silicon wafers.

[0094] Further, electronic devices, specifically photolithographic transistors, were applied to Example 1 to fabricate a fiber integrated circuit, and the thermal stability of the fiber integrated circuit was tested. For example... Figure 6 As shown, the results of the 100℃, 24-hour high-temperature test show that the composite substrate of Example 1 did not exhibit delamination, cracking or aging in the integrated circuit, confirming its excellent thermal stability.

[0095] Fiber integrated circuits were fabricated by photolithography on transistors in Comparative Example 2. Bending cycle tests were then performed on the fiber integrated circuits of Example 1 and Comparative Example 2. Figure 7 As shown, after 10,000 bending cycles, the surface of the fiber integrated circuit prepared in Example 1 still maintains structural stability, while... Figure 8As shown, the fiber integrated circuit prepared in Comparative Example 2 developed cracks and wrinkles on its surface after 10,000 bending cycles. The circuit stability of fiber integrated circuits under cyclic deformation is directly related to the aging process of functional materials—greater cyclic strain accelerates microscopic damage, aging, and performance degradation. Therefore, controlling strain (especially plastic strain) is key to mitigating material aging and extending device lifespan. The composite substrate of this invention can significantly improve the stability of fiber integrated circuits and delay aging.

[0096] Furthermore, the failure mechanism of the fiber integrated circuit is also attributed to excessive strain generated during deformation, which in turn leads to mechanical fracture of the functional layer. Failure tests were performed on the fiber integrated circuit prepared in Example 1 and the fiber integrated circuit prepared in Comparative Example 2, respectively. Figure 9 It can be seen that when the tensile strain reaches 45%, the fiber integrated circuit prepared in Example 1 still has current output, while according to Figure 10 The fiber integrated circuit prepared in Comparative Example 2 showed no current output and was in a failed state when the tensile strain reached 20%. Meanwhile, as... Figure 11 As shown, when the fiber integrated circuit prepared in Example 1 was stretched to 40%, cracks were observed in the conductive circuit. Figure 12 As shown, wrinkles were observed in the conductive circuit of the fiber integrated circuit prepared in Comparative Example 2 after the tensile strain was released from 10%. This also indicates that the composite substrate of the present invention can significantly improve the stability of the fiber integrated circuit and delay aging.

[0097] Fiber integrated circuits were further fabricated by photolithography on Comparative Examples 1 and 3, and the transistor frequency response of the fiber integrated circuits obtained in Example 1, Comparative Examples 1 and 3 were tested. Figure 13 As shown, the transistors in the fiber integrated circuit prepared in Example 1 exhibit frequency response performance and output current (IL). out ) and input voltage (V G To maintain consistency, such as Figure 14 As shown, the transistors in the fiber integrated circuit prepared in Comparative Example 1 exhibit extremely large leakage current (I0). G ), output current (I out The value is almost zero because the unmodified substrate, due to its excessive roughness, cannot support the stable operation of transistor devices and is prone to short circuits. For example... Figure 15 As shown, the transistors in the fiber integrated circuit prepared in Comparative Example 3 exhibit extremely large leakage current (I0). G ), output current (I outSignificant drift occurred because the polyvinyl alcohol buffer layer is intolerant to photolithography polar solvents, failing to guarantee stable and uniform operation of the transistor device. Although the present invention has been illustrated and described with reference to certain preferred embodiments, those skilled in the art should understand that the above description is a further detailed explanation of the invention in conjunction with specific embodiments, and should not be construed as limiting the specific implementation of the invention to these descriptions. Various changes in form and detail can be made by those skilled in the art, including several simple deductions or substitutions, without departing from the spirit and scope of the invention.

Claims

1. A composite substrate for fiber optic integrated circuits, characterized in that, include: A flexible polymer layer, the flexible polymer layer including a modified surface, the modified surface being obtained by plasma treatment, the material of the flexible polymer layer being one of polydimethylsiloxane, styrene-butadiene-styrene block copolymer and polyurethane; A buffer layer is located on top of the flexible polymer layer and adhered to the modified surface. The material of the buffer layer is parylene.

2. The composite substrate for fiber optic integrated circuits as described in claim 1, characterized in that, The flexible polymer layer is made of polydimethylsiloxane, and the plasma treatment is plasma etching.

3. The composite substrate for fiber integrated circuits as described in claim 2, characterized in that, The thickness of the flexible polymer layer is 4-15 μm, and the thickness of the buffer layer is 100-800 nm.

4. The composite substrate for fiber integrated circuits as described in claim 2, characterized in that, The composite substrate has a root mean square roughness Rq of 0.1-0.8 nm and an arithmetic mean roughness Ra of 0.1-0.5 nm.

5. The composite substrate for fiber integrated circuits as described in claim 2, characterized in that, The Young's modulus of the flexible polymer layer is 0.5-4 MPa, and the Young's modulus of the buffer layer is 2-5 GPa.

6. A method for preparing a composite substrate for fiber optic integrated circuits as described in any one of claims 1-5, characterized in that, Includes the following steps: Preparation of flexible polymer layer: A flexible polymer layer material is coated on the surface of a carrier, cured, and then subjected to plasma treatment to obtain a flexible polymer layer with a modified surface; Preparation of buffer layer: Deposit parylene on the modified surface to obtain buffer layer, thereby obtaining the composite substrate.

7. The method for preparing a composite substrate for fiber integrated circuits as described in claim 6, characterized in that, In the step of preparing the flexible polymer layer, polydimethylsiloxane is spin-coated onto the surface of polyethylene terephthalate sheet at a speed of 4500-5000 rpm for 110-120 s, followed by UV curing for 50-60 min.

8. The method for preparing a composite substrate for fiber integrated circuits as described in claim 7, characterized in that, The plasma treatment involves plasma etching at a power of 70-75 W and a pressure of 8-10 Pa.

9. The method for preparing a composite substrate for fiber integrated circuits as described in claim 7, characterized in that, In the step of preparing the buffer layer, parylene is deposited on the modified surface by chemical vapor deposition.

10. A fiber optic integrated circuit, characterized in that, include: Composite substrate as described in any one of claims 1-5; Electronic devices are disposed on the composite substrate.

11. The application of the fiber integrated circuit as described in claim 10 in smart wearables or implantable sensors.

12. A smart wearable device, characterized in that, Including the fiber integrated circuit as described in claim 10.

13. An implantable sensor, characterized in that, Including the fiber integrated circuit as described in claim 10.

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