Concurrent processing of command partitions using graphical kernel groups

Abstract

A processing system includes two or more graphics cores, each graphics core disposed on a respective die and configured for concurrent processing of command packets. For this purpose, the processing system is configured to determine two or more command partitions associated with a command packet, and to assign each command partition to a graphics kernel. Each graphics kernel then executes the same command packet by executing only the instructions of the command packets associated with the command partitions assigned to the graphics kernel. Further, after executing the instruction of the command packets based on the one or more allocated partitions, each graphics core adjusts one or more counters for synchronizing execution of the command packets across the graphics cores.

Description

Background Technology

[0001] When executing instructions from an application, some processing systems include multiple chiplets that work together to perform various operations based on instructions issued from the application. To distribute these instructions to the chiplets, the processing system includes a central command processor that bridges across the chiplets and is configured to receive command packets from a command queue. Based on these command packets, the central command processor issues appropriate instructions to each chiplet. However, distributing instructions to the chiplets in this manner increases the likelihood of clock domain crossover or voltage domain crossover when signals from the central command processor are provided across the bus. Due to this possibility of clock domain crossover and voltage domain crossover, the processing system includes circuitry to help mitigate or prevent these crossovers. However, this circuitry increases the complexity of the processing system and introduces additional processing to provide instructions to the chiplets, which reduces the system's processing efficiency. Furthermore, increasing the number of chiplets supported by the central command processor increases the likelihood of introducing bottlenecks in issuing and executing instructions, negatively impacting the efficiency of the processing system and limiting its scalability. Summary of the Invention

[0002] A system with one or more processing components may be configured to perform specific operations or actions by installing software, firmware, hardware, or combinations thereof on the system, which in operation cause the system to perform these actions. One or more computer programs may be configured to perform specific operations or actions by including instructions that, when executed by a data processing device, cause that device to perform these actions.

[0003] One general aspect includes a processing unit comprising a plurality of graphics kernels each assigned to a corresponding command partition, wherein each of the plurality of graphics kernels is configured to: receive a command packet indicating one or more instructions, wherein the command packet is received by each of the plurality of graphics kernels; and, in response to executing the one or more instructions based on the corresponding command partition, provide an indication that the graphics kernel has observed the one or more instructions. Other embodiments of this aspect include a corresponding computer system, apparatus, and computer program recorded on one or more computer storage devices, each configured to perform the actions of these methods.

[0004] Specific implementations may include one or more of the following features. In the processing unit, a corresponding command partition for a graphics kernel may include one or more corresponding work items of command groups. Each graphics kernel is configured to execute one or more instructions based on whether one or more instructions are within a work item indicated by the corresponding command partition. The corresponding command partition for a graphics kernel may include a corresponding partition of screen space. Each graphics kernel is configured to execute one or more instructions based on whether one or more instructions indicate one or more primitives within the corresponding partition of screen space of the corresponding command partition. Each graphics kernel is configured to provide a counting signal to one or more other graphics kernels in response to executing one or more instructions based on the corresponding command partition. Each graphics kernel is configured to determine synchronization with one or more other graphics kernels by querying one or more counters associated with one or more other graphics kernels. Specific implementations of the described techniques may include hardware, methods or processes, or computer software on a computer-accessible medium.

[0005] One general aspect includes a method. The method further includes: receiving, at each of a plurality of graphics kernels, a command packet indicating one or more instructions, wherein each of the plurality of graphics kernels is assigned a corresponding command partition; and, in response to executing one or more instructions at one of the plurality of graphics kernels based on the corresponding command partition associated with the graphics kernel, providing an indication that the graphics kernel has observed the one or more instructions. Other embodiments of this aspect include a corresponding computer system, apparatus, and computer program recorded on one or more computer storage devices, each configured to perform the actions of these methods.

[0006] Specific implementations may include one or more of the following features. In this method, a corresponding command partition for a graphics kernel may include one or more corresponding work items of command groups. The method may include: at each of the plurality of graphics kernels, executing one or more instructions based on whether one or more instructions are within a work item indicated by the corresponding command partition assigned to the graphics kernel. The corresponding command partition for a graphics kernel may include a corresponding partition of screen space. The method may include: at each of the plurality of graphics kernels, executing one or more instructions based on whether the one or more instructions indicate one or more primitives within the corresponding partition of screen space assigned to the corresponding command partition of the graphics kernel. According to the method of claim 12, the method may include: at the graphics kernel among the plurality of graphics kernels, providing a counting signal to one or more other graphics kernels among the plurality of graphics kernels in response to executing one or more instructions based on the corresponding command partition associated with the graphics kernel. According to the method of claim 13, the method may include: at the graphics kernel among the plurality of graphics kernels, determining synchronization with one or more other graphics kernels among the plurality of graphics kernels by querying one or more counters associated with one or more other graphics kernels among the plurality of graphics kernels. Specific implementations of the described techniques may include hardware, methods or processes, or computer software on a computer-accessible medium.

[0007] One general aspect includes a processing unit, a graphics kernel allocated to a partition of screen space, and comprising: front-end circuitry; and a plurality of back-end circuitry instances, each of the plurality of back-end circuitry instances being allocated to a corresponding sub-partition of the partition of screen space. The unit further includes a front-end circuitry configured to assign a corresponding instruction set to each of the plurality of back-end circuitry instances based on the corresponding sub-partition allocated to the corresponding back-end circuitry instance. Other embodiments of this aspect include a corresponding computer system, apparatus, and computer program recorded on one or more computer storage devices, each configured to perform the actions of these methods. Attached Figure Description

[0008] This disclosure can be better understood by referring to the accompanying drawings, and many of its features and advantages will be apparent to those skilled in the art. The same reference numerals are used in different drawings to denote similar or identical items.

[0009] Figure 1 It is a block diagram of a processing system configured to concurrently process command partitions by a set of graphics kernels, according to some implementation schemes.

[0010] Figure 2 This is a block diagram of a processing system that uses a centralized counter group to synchronize command partitions, based on some implementation schemes.

[0011] Figure 3 This is a block diagram of a processing system that uses a local counter to synchronize command partitions according to some implementation schemes.

[0012] Figure 4 It is a block diagram of one or more command partitions based on command grouping according to some implementation schemes.

[0013] Figure 5 This is a flowchart of an example operation for concurrent processing of command partitions, including screen space, according to some implementation schemes.

[0014] Figure 6 This is a flowchart illustrating example operations of command-based partitioning for processing graphical commands, based on some implementation schemes.

[0015] Figure 7 This is a block diagram of an example screen space with one or more command partitions according to some implementation schemes.

[0016] Figure 8 This is a flowchart of an example method for concurrent processing of command partitions, based on some implementation schemes. Detailed Implementation

[0017] The techniques and systems described herein address improving the performance efficiency of processing units executing commands from one or more command groups. To this end, the processing system includes a processing unit comprising two or more graphics cores. Each graphics core is disposed on a corresponding die, such that each graphics core in the group is disposed on its own separate die. Additionally, each graphics core includes a corresponding command processor and front-end circuitry configured to support one or more instances of back-end circuitry. To execute command groups, the command processor of each graphics core is configured to receive command groups indicating one or more commands, instructions, draw calls, or any combination thereof to be executed for one or more computing applications, graphics applications, or both. Based on the received command groups, the command processor of each graphics core provides the one or more commands, instructions, draw calls, or any combination thereof indicated in the command groups to the front-end circuitry of the graphics core. The front-end circuitry of the graphics core then executes the one or more commands, instructions, draw calls, or any combination thereof provided by the command processor, determining one or more commands, instructions, draw calls, or any combination thereof to be provided to one or more instances of back-end circuitry, or both. As an example, the front-end circuitry performs vector shading operations, primitive assembly operations, or both, based on draw calls indicated in a command group to determine a primitive set. Based on the determined primitive set, the front-end circuitry determines a draw call group, primitive, primitive group, or any combination thereof to be processed by one or more corresponding back-end circuitry instances of the graphics kernel supported by the front-end circuitry. The front-end circuitry then provides instructions, commands, draw calls, or both associated with the determined draw call group, primitive, primitive group, or any combination thereof to the corresponding back-end circuitry instance. The back-end circuitry instance then executes the instructions and commands provided by the front-end circuitry to, for example, render the primitives to produce one or more graphics objects and store the rendered primitives in a frame buffer.

[0018] To improve the performance efficiency of executing commands, instructions, and draw calls indicated in the command buffer, the processing system is configured to first divide the commands, instructions, draw calls, or any combination thereof indicated in a command group into two or more command partitions. The processing system is then configured to assign one or more command partitions from the command group to the corresponding graphics kernel of the processing system. Based on the command partitions assigned to the graphics kernel, the graphics kernel is configured to execute the commands, instructions, and draw calls indicated in the received command group. As an example, the processing system first divides the command group into two or more partitions, where each partition includes one or more distinct work blocks of the command group. The processing system then assigns each partition of the command group to the corresponding graphics kernel. That is, the processing system assigns one or more partitions of the command group to the corresponding graphics kernel. The command group buffer then provides the command group to each graphics kernel. Upon receiving the command group, the graphics kernel determines whether the command or instruction indicated in the command group is within the partition of the command group assigned to the graphics kernel. If the command or instruction is within the partition of the command group assigned to the graphics kernel, the graphics kernel executes the command or instruction. Furthermore, if the command or instruction is not within the partition of the command group assigned to the graphics kernel, the graphics kernel does not execute the command or instruction.

[0019] As another example, the processing system divides the screen space into two or more partitions. Each partition of the screen space represents one or more pixels in a first direction and one or more pixels in a second direction. After dividing the screen into two or more partitions, each partition is assigned to a corresponding graphics kernel of the processing unit. To render the graphics objects of the scene within the screen space, a command packet buffer first supplies command packets to each graphics kernel in the graphics kernel group. Based on the received graphics operation packets, the corresponding command processor of each graphics kernel within the graphics kernel group provides the same set of draw calls to the corresponding front-end circuitry. After receiving the draw calls, the front-end circuitry of each graphics kernel then determines whether each primitive indicated in each received draw call is at least partially within the corresponding partition of the screen space assigned to the graphics kernel. For example, the front-end circuitry of the graphics kernel determines the location of the primitive indicated by the draw call. The front-end circuitry then compares the determined primitive location with the location of the partition of the screen space assigned to the graphics kernel to determine whether one or more primitives are at least partially within the corresponding partition of the screen space. Based on primitives that are at least partially located within a corresponding partition of screen space, the front-end circuitry determines the set of primitives, groups of primitives, draw calls, or any combination thereof to be executed by the graphics kernel. The front-end circuitry then provides instructions, commands, or both associated with the set of primitives, groups of primitives, draw calls, or any combination thereof to be executed to one or more back-end circuitry instances. In response to receiving one or more instructions or commands from the front-end circuitry, the back-end circuitry instance renders one or more primitives, groups of primitives, or both and stores them in a frame buffer.

[0020] In this way, each graphics kernel within a graphics kernel group responds to a received command packet by executing commands and instructions within its assigned command partition, without communicating with other graphics kernels. Because each graphics kernel can execute commands and instructions only within its assigned command partition without communicating with other graphics kernels, the processing burden on each graphics kernel is reduced, thereby improving the system's processing efficiency. Furthermore, because the graphics kernels do not need to communicate with each other to execute the instructions and commands in the command packet, the number of connections required between graphics kernels is reduced, which reduces the processing system's footprint.

[0021] To aid in synchronizing the execution of command groups across graphics kernels, each graphics kernel includes synchronization circuitry configured to help maintain a set of counters. For example, the counter set tracks the number of times each of one or more graphics kernels has observed one or more instructions, commands, or draw calls indicated in the command group. For instance, the counters track the number of times each graphics kernel has observed one or more instructions, commands, draw calls, or any combination thereof of a specific type indicated in the command group. In some processing systems, each graphics kernel includes or is otherwise connected to counters configured to track the number of times each graphics kernel has observed one or more instructions, commands, draw calls, or any combination thereof of a specific type, while other processing systems include a centralized set of counters configured to track the number of times each graphics kernel has observed one or more instructions, commands, draw calls, or any combination thereof of a specific type. During the execution of a command group, the synchronization circuitry of each graphics kernel is configured to adjust one or more counters. For example, based on the execution of one or more instructions, commands, draw calls, or any combination thereof indicated in the command group by the graphics kernel, the synchronization circuitry of the graphics kernel is configured to increment one or more counters indicating the number of times the graphics kernel has observed the instruction, command, or draw call. As another example, based on the fact that the instructions, commands, draw calls, or any combination thereof indicated in the command group are not associated with the command partition assigned to the graphics kernel, the graphics kernel's synchronization circuitry is configured to increment one or more counters that indicate the number of times the graphics kernel has observed an instruction, command, or draw call.

[0022] When synchronization is required across two or more graphics kernels, the synchronization circuitry of each graphics kernel checks one or more counters to determine whether each graphics kernel has observed the same number of certain instructions, commands, draw calls, or any combination thereof indicated in the command group. As an example, based on a command group indicating that synchronization is required across two or more graphics kernels, the graphics kernels begin to idle, and the synchronization circuitry of the graphics kernels queries one or more counters to determine whether the two or more graphics kernels have observed the same number of certain instructions, commands, draw calls, or any combination thereof. If the counters indicate that the graphics kernels have not yet observed the same number of certain instructions, commands, draw calls, or any combination thereof, the graphics kernels remain idle. If the counters indicate that the graphics kernels have observed the same number of certain instructions, commands, draw calls, or any combination thereof, the graphics kernels execute the next command, instruction, or draw call indicated in the command group. In this way, the graphics kernels are synchronized while executing command groups, with minimal communication between graphics kernels, which helps reduce the number of connections required between graphics kernels. Because the number of connections is reduced, the processing system footprint is also reduced.

[0023] Now for reference Figure 1 According to some specific embodiments, a processing system 100 configured for concurrent processing of command partitions is presented. The processing system 100 includes or has access to memory 106 or other storage components implemented using non-transitory computer-readable media (e.g., dynamic random access memory (DRAM)). However, in specific embodiments, memory 106 is implemented using other types of memory (including, for example, static random access memory (SRAM), non-volatile RAM, etc.). According to specific embodiments, memory 106 includes external memory implemented outside the processing units implemented in the processing system 100. The processing system 100 also includes a bus 132 to support communication between entities implemented in the processing system 100, such as memory 106. Some specific embodiments of the processing system 100 include other buses, bridges, switches, routers, etc., which are not shown for clarity. Figure 1 As shown in the image.

[0024] In an implementation, processing system 100 is configured to execute one or more applications 110. Such applications 110 may include computing applications, graphics applications, or both. As an example, a computing application, when executed by processing system 100, causes processing system 100 to perform one or more computations, such as machine learning computations, neural network computations, database computations, etc. A graphics application, when executed by processing system 100, causes processing system 100 to render a scene including one or more graphical objects within screen space and display them, for example, on display 130. To execute one or more applications 110, processing system 100 includes processing unit 128. For example, processing unit 128 may include, for example, one or more vector processors, auxiliary processors, graphics processing units (GPUs), general-purpose GPUs (GPGPUs), nonscalar processors, highly parallel processors, artificial intelligence (AI) processors, inference engines, machine learning processors, other multi-threaded processing units, scalar processors, serial processors, or any combination thereof. In an implementation, processing unit 128 executes one or more commands, instructions, draw calls, or any combination thereof indicated in application 110. For example, processing unit 128 executes one or more commands, instructions, draw calls, or any combination thereof to render an image for presentation on display 130 according to one or more graphics applications. For this purpose, as an example, processing unit 128 renders graphics objects (e.g., primitives) to produce pixel values ​​provided to display 130, which uses these pixel values ​​to display an image representing the rendered graphics objects. In embodiments, as an example, commands indicated in application 110 include scheduling commands, wait commands, prediction commands, occlusion queries, pipeline status commands, stream output operation commands, memory acquire commands, memory release commands, pipeline end event commands, shader end event commands, partial refresh commands, or any combination thereof, to name just a few.

[0025] To execute commands, instructions, drawing calls, or any combination thereof for application 110, processing unit 128 includes a plurality of dies 112, each die including a corresponding graphics core 114. That is, each graphics core 114 of processing unit 128 is disposed on a corresponding die 112, such that each graphics core 114 is disposed on a different die 112. According to embodiments, the graphics cores 114 of processing unit 128 are configured to execute instructions, commands, and drawing calls concurrently or in parallel. In various embodiments, one or more graphics cores 114 include SIMD units that perform the same operation on different datasets. As an example, one or more graphics cores 114 include SIMD units that perform the same operation as indicated by one or more commands, instructions, or both from application 110. Although Figure 1The example implementation presents the processing unit 128 as comprising three dies (112-1, 112-2, 112-N), which represent N dies, each including a corresponding graphics kernel (114-1, 114-2, 114-N). However, in other implementations, the processing unit 128 may include any number of dies 112, each having a corresponding graphics kernel 114.

[0026] In some implementations, each graphics core 114 of processing unit 128 includes a command processor 116, front-end circuitry 118, and one or more back-end circuitry instances 122 or otherwise connected to them. To execute one or more commands, instructions, or both of application 110, graphics core 114 first receives command packets from, for example, bus 132 at command processor 116. Such command packets, for example, include one or more commands, instructions, operations, draw calls, or any combination thereof to be executed for application 110, as indicated by program code 108. As an example, for a computing application, the command packets include one or more commands, instructions, operations, or any combination thereof that, when executed by graphics core 114, cause graphics core 114 to generate data (e.g., results) for one or more computations. As another example, for a graphics application, the command packets include one or more draw calls to be executed for the graphics application. For example, each draw call indicates one or more instructions for rendering one or more primitives of a scene. Based on the received command packets, command processor 116 of graphics core 114 determines one or more commands, instructions, operations, draw calls, or any combination thereof to be executed by graphics core 114. Command processor 116 includes, for example, circuitry configured to receive and parse command packets and, based on the received command packets, issue instructions to front-end circuitry 118. As an example, command processor 116 determines one or more instructions representing one or more draw calls indicated in the command packets and assigns them to front-end circuitry 118. For example, front-end circuitry 118 of graphics kernel 114 is configured to execute one or more commands, instructions, or both provided by command processor 116, assigning one or more commands or instructions, or both, to one or more back-end circuitry instances 122. For example, when executing command packets from a computing application, front-end circuitry 118 is configured to execute one or more commands, instructions, operations, or any combination thereof indicated by the command packets.

[0027] As another example, when executing a group of commands from a graphics application, front-end circuitry 118 is configured to support one or more back-end circuitry instances 122 by, for example, performing one or more vertex operations, shading operations, primitive assembly operations, primitive culling operations, or any combination thereof. For this purpose, front-end circuitry 118 first receives one or more draw calls indicated by a received group of commands from command processor 116. Based on the draw calls, front-end circuitry 118 then determines the location of one or more primitives within the scene. As an example, front-end circuitry 118 performs one or more vertex shader operations, primitive assembly operations, bounding box operations, frustum operations, or any combination thereof to determine the location of primitives within the scene. Based on the determined primitives, at least partially within the scene, front-end circuitry 118 determines the set of primitives, groups of primitives (e.g., small meshes), or both to be rendered. Additionally, in some embodiments, front-end circuitry 118 is configured to perform one or more culling operations on the set of primitives, groups of primitives, or both to be rendered based on the location of the primitives within the scene. For example, front-end circuitry 118 is configured to cull one or more primitives, primitive groups, or both based on the position of a primitive or sub-primitive, the depth of a primitive or sub-primitive, the visibility of a primitive or sub-primitive, or any combination thereof (to name just a few). After determining the set of primitives, primitive groups, or both to be rendered, front-end circuitry 118 provides one or more instructions to one or more primitives, position data (e.g., the position of primitives or primitive groups within the scene), or both from the set of primitives, primitive groups, or both to be rendered to one or more back-end circuitry instances 122.

[0028] Back-end circuit instance 122 is configured, for example, to render one or more primitives or groups of primitives by performing one or more rasterization operations, fragment shader operations, geometry processing operations, vertex processing operations, or any combination thereof. For example, based on instructions received from front-end circuit 118 indicating one or more primitives and positional information of one or more primitives, back-end circuit instance 122 is configured to rasterize and render the primitives indicated by the instructions to produce one or more pixel values ​​representing the primitives. After producing these pixel values, back-end circuit instance 122 is configured to store the pixel values ​​in a frame buffer. According to an embodiment, the back-end circuit instances 122 of graphics kernel 114 operate concurrently and in parallel to render the primitives indicated in a draw call provided from front-end circuit 118, wherein each back-end circuit instance 122 executes at least a portion of a command, instruction, or both issued from front-end circuit 118. Although Figure 1The example implementation presents a graphics kernel 114 as comprising three back-end circuit instances (122-1, 122-2, 122-M) representing M back-end circuit instances; however, in other implementations, the graphics kernel 114 may include any number of back-end circuit instances 122. Furthermore, each graphics kernel 114 may have its own corresponding number of back-end circuit instances 122, different from one or more other graphics kernels 114. According to the implementation, each back-end circuit instance 122 is also configured to execute one or more instructions, operations, or both for computing applications.

[0029] To help improve the performance efficiency of executing command groups from application 110, processing unit 128 is configured to divide the command groups into one or more command partitions 120. For example, each command partition 120 represents at least a portion of a command, instruction, draw call, or any combination thereof within the command group. For example, based on command groups issued from a computing application, processing unit 128 is configured to divide the command groups into two or more partitions, each partition representing a command partition 120. As an example, processing unit 128 divides the command groups into two or more command partitions 120, each command partition representing a corresponding number of different work blocks (e.g., one or more work items) associated with the command group. After dividing the command groups into two or more command partitions 120, processing unit 128 assigns each command partition 120 to a corresponding graphics kernel 114. That is, processing unit 128 assigns one or more corresponding command partitions 120 to each graphics kernel 114 such that each graphics kernel 114 executes only the commands, instructions, or both within the command group assigned to the partition (e.g., command partition 120) of the command group assigned to graphics kernel 114. Reference Figure 1 In the example implementation shown, the processing unit 128 assigns the first command partition 0 120-1 to the first graphics kernel 114-1, the second command partition 1 120-2 to the second graphics kernel 114-2, and the third command partition 120-N to the third graphics kernel 114-N.

[0030] As another example, based on command groups issued from a graphics application, processing unit 128 is configured to divide the screen space into two or more partitions, where each partition of the screen space represents a command partition 120. For example, each partition of the screen space includes a first number of pixels in a first (e.g., horizontal) direction and a second number of pixels in a second (e.g., vertical) direction. In one embodiment, each partition of the screen space has the same size, while in other embodiments, one or more partitions of the screen space have a size different from the size of one or more other partitions of the screen space. After dividing the screen space into two or more partitions, processing unit 128 then assigns each partition of the screen space (e.g., command partition 120) to a corresponding graphics kernel 114. That is, processing unit 128 assigns each partition of the screen space to a corresponding graphics kernel 114 such that each graphics kernel 114 executes only the instructions, commands, draw calls, or any combination thereof of the command group, which instructs primitives, primitive groups, or both within the partition of the screen space assigned to the graphics kernel 114. Additionally, in this implementation, processing unit 128 is configured to partition the screen space such that each partition of the screen space (e.g., command partition 120) includes one or more corresponding sub-partitions (e.g., command sub-partitions 124). For example, processing unit 128 is configured to assign each command sub-partition 124 of command partition 120 to a corresponding back-end circuitry instance 122 of graphics kernel 114 assigned to command partition 120. (See reference...) Figure 1 In an example implementation, processing unit 128 assigns command screen sub-partition 0 124-1 to the first back-end circuit instance 0 122-1 of graphics kernel 114, assigns the second command sub-partition 1 124-2 to the second back-end circuit instance 1 122-2 of graphics kernel 114, and assigns the third command sub-partition M 124-M to the third back-end circuit instance M 122-M of graphics kernel 114.

[0031] After processing unit 128 has assigned each command partition 120 to the corresponding graphics core 114, each graphics core 114 is configured to receive the same command packets and to execute the command packets based on the command partition 120 assigned to the graphics core 114. As an example, based on the command packets originating from a computing application, the command processor 116 of each graphics core 114 first parses the command packets and issues the same set of commands, instructions, or both to the corresponding front-end circuitry 118. As an example, the command processor 116 iterates through the command packets and, based on this iteration, issues commands, instructions, or both to the corresponding front-end circuitry 118. In response to receiving a command, instruction, or both, the front-end circuitry 118 then determines whether the command, instruction, or both is within the command partition 120 assigned to the graphics core 114. That is, the front-end circuitry 118 determines whether the command or instruction issued from the command processor 116 is within the partition (e.g., the number of different work items) of the command packets assigned to the graphics core 114. If the command or instruction is not in the command partition 120 assigned to the graphics kernel 114, the front-end circuitry 118 does not execute the command or instruction. If the command or instruction is in the command partition 120 assigned to the graphics kernel 114, the front-end circuitry 118 executes the command or instruction, sending the command or instruction, or both, to the corresponding back-end circuitry instance 122. In this way, the graphics kernel 114 is only configured to execute the partitions (e.g., command partition 120) of the command groups assigned to the graphics kernel 114.

[0032] As another example, based on command groups originating from a graphics application, the command processor 116 of each graphics kernel 114 issues the same set of draw calls to the corresponding front-end circuitry 118. Based on the set of draw calls, the front-end circuitry 118 of the graphics kernel 114 is configured to determine whether one or more primitives, primitive groups, or both indicated by the draw calls are at least partially within a partition of the screen space allocated to the graphics kernel 114 (e.g., command partition 120). For example, the front-end circuitry 118 performs one or more vertex shader operations, primitive assembly operations, bounding box operations, frustum operations, or any combination thereof to determine whether each primitive, sub-primitive, or both indicated in the draw call is at least partially within a partition of the screen space allocated to the graphics kernel 114. Based on which primitives, primitive groups, or both are at least partially within the command partition 120 allocated to the corresponding graphics kernel 114, the front-end circuitry 118 determines the appropriate set of instructions, commands, draw calls, or any combination thereof to issue to the back-end circuitry instance 122. As an example, for each primitive, sub-primitive, or both identified as being at least within the command partition 120 assigned to graphics kernel 114, front-end circuitry 118 determines a set of instructions, commands, draw calls, or any combination thereof instructing the primitive, primitive group, or both. In this way, the instructions, commands, draw calls, or any combination thereof issued by front-end circuitry 118 only include instructions, commands, or draw calls instructing one or more primitives or primitive groups at least partially within the command partition 120 assigned to graphics kernel 114. Therefore, each graphics kernel 114 is configured to execute command groups concurrently without needing to communicate with other graphics kernels 114 for the purpose of executing one or more commands. Because each graphics kernel 114 is able to execute only the instructions and commands within its assigned command partition 120 without communicating with other graphics kernels 114, the processing burden on each graphics kernel 114 is reduced, thereby improving the processing efficiency of processing system 100. Furthermore, because graphics kernels 114 do not need to communicate with each other to execute commands, the number of connections required between graphics kernels 114 is reduced, which reduces the footprint of the processing system.

[0033] Once the front-end circuitry 118 has determined whether each primitive, sub-primitive, or both is at least partially within the command partition 120 allocated to the corresponding graphics kernel 114, the front-end circuitry 118 provides the back-end circuitry instance 122 of the graphics kernel 114 with a set of instructions, commands, draw calls, or any combination thereof. For example, in some embodiments, the front-end circuitry 118 is configured to provide each back-end circuitry instance 122 with instructions, commands, draw calls, or any combination thereof based on a corresponding command sub-partition 124 allocated to the back-end circuitry instance 122. As an example, the front-end circuitry 118 is configured to determine whether a primitive, group of primitives, or both indicated in a draw call received from the command processor 116, indicated by the determined set of instructions, commands, draw calls, or any combination thereof, or both, is at least partially within the command sub-partition 124 (e.g., a sub-partition of screen space) allocated to the back-end circuitry instance 122. Based on the fact that at least a portion of a primitive or sub-primitive is within command sub-partition 124, front-end circuitry 118 provides instructions, commands, or draw calls indicative of the primitive or sub-primitive to the corresponding back-end circuitry 122 instance assigned to command sub-partition 124. In response to receiving an instruction, command, or draw call from front-end circuitry 118, back-end circuitry instance 122 then performs one or more rasterization operations, fragment shader operations, geometry processing operations, vertex processing operations, or any combination thereof to render one or more primitives or groups of primitives. Back-end circuitry instance 122 then stores the rendered primitives or groups of primitives in a frame buffer. By assigning a corresponding command sub-partition 120 to each graphics kernel 114 in this manner, each graphics kernel 114 operates to render primitives within its assigned command sub-partition 120 in response to receiving the same command group.

[0034] According to some embodiments, the processing system 100 is configured to synchronize the execution of command packets among two or more graphics kernels 114 of the processing unit 128. For this purpose, in some embodiments, the processing system 100 includes a set of counters configured to track the number of times each graphics kernel 114 has observed one or more corresponding commands, instructions, draw calls, pipeline events (e.g., computation pipeline or one or more specific points in the graphics pipeline), or any combination thereof, of a command packet. As an example, the set of counters includes: a first counter that tracks the number of times a first graphics kernel 114-1 has observed certain commands, instructions, draw calls, or any combination thereof; a second counter that tracks the number of times a second graphics kernel 114-2 has observed certain commands, instructions, draw calls, or any combination thereof; and a third counter that tracks the number of times a third graphics kernel 114-N has observed certain commands, instructions, draw calls, or any combination thereof. As another example, the set of counters includes: a first counter configured to track the number of times the associated graphics kernel 114 has observed a first command; and a second counter configured to track the number of times the associated graphics kernel 114 has observed a second command different from the first command. In some embodiments, the set of counters is localized, wherein each graphics kernel 114 maintains a corresponding set of counters representing the number of times each graphics kernel 114 has observed certain commands, instructions, draw calls, or any combination thereof. In other embodiments, the set of counters is globalized within the processing system 100, wherein each graphics kernel 114 interacts with the counters via synchronization management circuitry.

[0035] To maintain the counters, each graphics kernel 114 includes synchronization circuitry (not shown for clarity) configured to adjust (e.g., increment, decrement) the counters based on the execution of command groups. For example, based on the execution of one or more instructions, commands, draw calls, or any combination thereof indicated by the command group by the graphics kernel 114, the synchronization circuitry increments one or more counters indicating the number of times the graphics kernel 114 has observed the instructions, commands, draw calls, or any combination thereof indicated by the command group. Additionally, based on the determination by the front-end circuitry 118 of the graphics kernel 114 that the instructions, commands, draw calls, or any combination thereof indicated by the command group are not associated with the command partition 120 assigned to the graphics kernel 114, the synchronization circuitry adjusts one or more counters indicating the number of times the graphics kernel 114 has observed the instructions, commands, draw calls, or any combination thereof indicated by the command group. In this way, each graphics kernel 114 is configured to maintain a count of the number of times the graphics kernel 114 has observed certain instructions, commands, draw calls, or any combination thereof indicated by the command group.

[0036] In the implementation, one or more command groups include one or more synchronization commands. For example, such synchronization commands include instructions for graphics kernel 114 to wait until one or more other graphics kernels 114 of processing unit 128 are at the same point in the pipeline (e.g., a compute pipeline, a graphics pipeline) indicated by the command group. That is, the instructions for graphics kernel 114 wait until one or more other graphics kernels 114 of processing unit 128 have completed the same number of one or more specific commands, instructions, draw calls, or any combination thereof as graphics kernel 114. When the synchronization command is executed, graphics kernel 114 suspends the execution of the command group and queries one or more counters to determine the number of times each graphics kernel 114 has observed one or more specific commands, instructions, draw calls, or any combination thereof. Based on the counters indicating that each graphics kernel 114 has not yet observed the same number of one or more specific commands, instructions, draw calls, or any combination thereof, graphics kernel 114 continues to suspend the execution of the command group. Based on the counters indicating that each graphics kernel 114 has observed the same number of one or more specific commands, instructions, draw calls, or any combination thereof, graphics kernel 114 executes the next command, instruction, draw call, or any combination thereof indicated by the command group. In this way, the processing system 100 is configured to maintain unified counters for one or more pipelines (e.g., compute pipelines, graphics pipelines) executed by the graphics kernel 114. Because of these unified counters, the processing system 100 is able to synchronize the execution of command packets between the graphics kernels 114 with minimal communication between them. Since communication between the graphics kernels 114 is kept to a minimum, the number of connections required between the graphics kernels 114 is reduced, which reduces the processing system's footprint.

[0037] The processing system 100 also includes a central processing unit (CPU) 102, which is connected to and thus communicates with the processing unit 128 and memory 106 via the bus 132. The CPU 102 implements multiple processor cores 104-1 to 104-N that execute instructions concurrently or in parallel. In a specific implementation, one or more processor cores of the processor cores 104 operate as SIMD units performing the same operation on different datasets. Although in Figure 1In the illustrated example implementation, three processor cores (104-1, 104-2, 104-K) representing K cores are presented, but the number of processor cores 104 implemented in CPU 102 is a matter of design choice. Therefore, in other implementations, CPU 102 may include any number of processor cores 104. Processor cores 104 execute instructions (such as program code 108 of one or more applications 110 stored in memory 106), and CPU 102 stores information (such as the results of executed instructions) in memory 106. CPU 102 is also capable of initiating processing by issuing one or more command packets to processing unit 128. In implementations, CPU 102 implements multiple processor cores that execute instructions concurrently or in parallel (for clarity). Figure 1 (Not shown in the image). Input / output (I / O) engine 126 includes hardware and software for handling input or output operations associated with display 130, as well as other components of processing system 100, such as a keyboard, mouse, printer, external disk, etc. I / O engine 126 is coupled to bus 132, enabling I / O engine 126 to communicate with memory 106, processing unit 128, or CPU 102. According to some embodiments, processing system 100 includes one or more graphics cores 114 designated for communicating with a host, driver, or both executed by CPU 102. For example, in some embodiments, one or more graphics cores 114 are configured to receive data from and send data to a host, driver, or both executed by CPU 102. In some implementations, the graphics kernel 114, designated to communicate with a host, driver, or both executed by the CPU 102, is also assigned one or more command partitions 120, while in other implementations, the graphics kernel 114, designated to communicate with a host, driver, or both executed by the CPU 102, is not assigned any command partitions 120.

[0038] Now for reference Figure 2According to the implementation, an example operation 200 for synchronizing graphics kernels using a global counter group is presented. In the implementation, the example operation 200 first involves one or more graphics kernels (114-1, 114-2, 114-N) receiving the same command group 205. The command group 205, for example, indicates one or more commands, instructions, draw calls, or any combination thereof to be executed against one or more applications 110. In the implementation, the command group 205 includes one or more operation commands 215, synchronization commands 225, or both. These operation commands 215, for example, represent one or more commands, instructions, draw calls, or any combination thereof to be executed against a pipeline (e.g., a compute pipeline, a graphics pipeline). As an example, operation commands 215 include scheduling commands, wait commands, prediction commands, occlusion queries, pipeline status commands, stream output operation commands, memory acquire commands, memory release commands, pipeline end event commands, shader end event commands, partial refresh commands, draw calls, instructions, or any combination thereof associated with the pipeline. For example, each of the synchronization commands 225 includes instructions for graphics kernel 114 to wait until one or more other graphics kernels 114 of processing unit 128 are at the same point in the pipeline indicated by the command group 205 being executed. As an example, the instructions for graphics kernel 114 wait until one or more other graphics kernels 114 of processing unit 128 have completed one or more specific operation commands 215 as many as graphics kernel 114.

[0039] To enable the execution of synchronization command 225, each graphics kernel 114 includes a corresponding synchronization circuit (240-1, 240-2, 240-N). For example, synchronization circuit 240 is configured to communicate with synchronization management circuit 242 to synchronize the execution of commands, instructions, draw calls, or any combination thereof across two or more graphics kernels 114. For example, each corresponding synchronization circuit 240 is configured to communicate with synchronization management circuit 242 via synchronization bus 241. For example, synchronization circuit 240 is configured to synchronize the execution of one or more commands, instructions, draw calls, pipeline events (e.g., calculation pipeline or certain points in the graphics pipeline), or any combination thereof between two or more graphics kernels 114 by maintaining counter group 244, checking counter group, or both. According to an embodiment, based on the graphics kernel 114 observing one or more commands, instructions, draw calls, or any combination thereof indicated by operation command 215 of command group 205, the synchronization circuit 240 of graphics kernel 114 is configured to generate a count signal 255. For example, the count signal 255 includes an indication that the graphics kernel 114, which generates the count signal 255, has observed one or more specific commands, instructions, draw calls, or any combination thereof. As an example, based on the execution of a draw call by the graphics kernel 114, the synchronization circuit 240 of the graphics kernel 114 generates the count signal 255 indicating that the graphics kernel 114 has observed the draw call. That is, the synchronization circuit 240 generates an indication that the graphics kernel 114 has observed the draw call. As another example, based on the graphics kernel 114 determining that a command, instruction, draw call, or any combination thereof is not associated with the command partition 120 assigned to the graphics kernel 114 (e.g., the graphics kernel 114 determines, based on the command partition 120 assigned to the graphics kernel 114, that a command, instruction, draw call, or any combination thereof will not be executed), the synchronization circuit 240 of the graphics kernel 114 generates the count signal 255 indicating that the graphics kernel 114 has observed the command, instruction, draw call, or any combination thereof. In this way, the synchronization circuit 240 generates the count signal 255 whenever the operation command 215 of the command group 205 is parsed (e.g., observed).

[0040] After generating the count signal 255, the synchronization circuit 240 provides the count signal 255 to the synchronization management circuit 242 via the synchronization bus 241. For example, the synchronization management circuit 242 is configured to maintain counter groups 244, which include counter sets 246, each counter set including hardware-based counters, software-based counters, or both, and the counter sets are configured to track the number of times the corresponding graphics kernel 114 has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof. As an example, counter set 244 includes: a first counter set 0 246-1, configured to track the number of times a first graphics kernel 114-1 has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof; a second counter set 1 246-2, configured to track the number of times a second graphics kernel 114-2 has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof; and a third counter set 2 246-3, configured to track the number of times a third graphics kernel 114-N has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof. Based on the received count signal 255, synchronization management circuitry 242 is configured to adjust (e.g., increment, decrement) one or more counters in counter set 244. For example, synchronization management circuitry 242 is configured to increment one or more counters in counter set 246 associated with the graphics kernel 114 that sent the count signal 255. According to the implementation scheme, the synchronization management circuit 242 is configured to adjust the counters in the counter set 246 corresponding to the command, instruction, draw call, or pipeline event indicated in the received counting signal 255. As an example, based on the counting signal 255 indicating the first graphics kernel 114-1 and the first graphics kernel 114-1 having observed a first command, the synchronization management circuit 242 increments the counters in the counter set 246-1 corresponding to the first command (e.g., the counter set associated with the first graphics kernel 114-1). As another example, based on the counting signal 255 indicating the first graphics kernel 114-1 and the first graphics kernel 114-1 having observed a first pipeline event (e.g., the first graphics kernel 114-1 at a first point in the pipeline), the synchronization management circuit 242 increments the counters in the counter set 246-1 corresponding to the pipeline event (e.g., the counter set associated with the first graphics kernel 114-1).

[0041] According to the implementation scheme, in order to execute the synchronization command 225 indicated in command group 205, example operation 200 first includes pausing the execution of command group 205 by the synchronization circuit 240 of graphics kernel 114, and then sending a synchronization request 265 to the synchronization management circuit 242 via the synchronization bus 241. For example, the synchronization request 265 includes data indicating the graphics kernel 114 that sent the request and data indicating one or more commands, instructions, draw calls, pipeline events, or any combination thereof tracked by counter group 244. That is, the synchronization request 265 includes data requesting the synchronization management circuit 242 to alert graphics kernel 114 when one or more other graphics kernels 114 are at the same point in the pipeline indicated by command group 205 (e.g., the same number of commands, instructions, draw calls, or pipeline events indicated by synchronization command 225 have been observed). Based on the received synchronization request 265, the synchronization management circuit 242 checks one or more counters in one or more counter sets 246 corresponding to the commands, instructions, draw calls, or pipeline events indicated in the synchronization request 265. Based on the fact that counter set 246 indicates that two or more graphics kernels 114 have not yet observed the same number of commands, instructions, draw calls, or pipeline events indicated in synchronization request 265, synchronization management circuitry 242 waits and continues to check counter set 246. That is, synchronization management circuitry 242 waits until counters in two or more counter sets 246 indicate that two or more graphics kernels 114 have observed the same number of commands, instructions, draw calls, pipeline events, or any combination thereof indicated in the received synchronization request 265 (e.g., counters in two or more counter sets 246 indicate that two or more graphics kernels 114 are at the same point in the computation or graphics pipeline). Based on the fact that counters in two or more counter sets 246 indicate that two or more graphics kernels 114 have observed the same number of commands, instructions, draw calls, pipeline events, or any combination thereof indicated in the received synchronization request 265, synchronization management circuitry 242 sends synchronization indication 245 to one or more graphics kernels 114, the synchronization indication including data indicating that two or more graphics kernels 114 are synchronized. After receiving the synchronization instruction 245, the graphics kernel 114 begins to execute the next operation command 215 indicated in the graphics operation group.

[0042] According to some implementations, synchronization management circuitry 242 checks one or more counters in one or more counter sets 246 corresponding to the commands, instructions, draw calls, pipeline events, and graphics kernel 114 indicated in synchronization request 265 to determine whether one or more counters in the counters indicate a predetermined value. For example, in some implementations, after one or more synchronization commands 225 are executed by graphics kernel 114, synchronization management circuitry 242 sets one or more counters in counter set 246 associated with graphics kernel 114 to a predetermined value (e.g., 0). For example, such a predetermined value indicates that the counter has been reset. Based on the fact that one or more counters in one or more counter sets 246 are equal to the predetermined value (e.g., 0), synchronization management circuitry 242 sends a reset indication 235 to graphics kernel 114 that sent synchronization request 265. For example, reset indication 235 indicates that the counter has been reset and two or more graphics kernels 114 are synchronized (e.g., at the same point in the pipeline indicated by the command group). Based on receiving reset indication 235, graphics kernel 114 executes the next operation command 215 of command group 205.

[0043] Now for reference Figure 3According to the implementation scheme, an example operation 300 for synchronizing between graphics kernels using local counters is presented. In the implementation scheme, the example operation 300 first includes one or more graphics kernels (114-1, 114-N) receiving the same command group 205 including one or more operation commands 215 and one or more synchronization commands 225. To enable the execution of the synchronization commands 225, each graphics kernel 114 includes a corresponding synchronization circuit (240-1, 240-N) configured to maintain a corresponding set of counters included in or otherwise connected to the graphics kernels. For example, the synchronization circuit 0 240-1 of the first graphics kernel 0 114-1 is configured to maintain a first set of counters including a local counter 348-1 and a remote counter 350-1, and the synchronization circuit 1 240-2 of the second graphics kernel 1 114-N is configured to maintain a second set of counters including a local counter 348-N and a remote counter 350-N. Local counters 348, included in or otherwise connected to graphics kernel 114, include hardware-based counters, software-based counters, or both, configured to track the number of times graphics kernel 114 has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof indicated in command group 205. Remote counters 350, included in or otherwise connected to graphics kernel 114, include hardware-based counters, software-based counters, or both, configured to track the number of times one or more other graphics kernels 114 have observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof indicated in command group 205. For example, remote counters 350-1, included in or otherwise connected to graphics kernel 0 114-1, include one or more kernel N counters 352 configured to track the number of times graphics kernel N114-N has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof. Similarly, for example, a remote counter 350-N included in or otherwise connected to the graphics kernel N 114-N includes one or more kernel 0 counters 354, which are configured to track the number of times the graphics kernel 0 114-1 has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof.

[0044] According to the implementation scheme, based on the observation by the graphics kernel 114 of one or more commands, instructions, draw calls, or any combination thereof indicated by the operation command 215 of the command group 205, the synchronization circuit 240 of the graphics kernel 114 is configured to first adjust (e.g., increment, decrement) one or more corresponding local counters 348 associated with the observed commands, instructions, and draw calls. For example, based on the execution of one or more commands, instructions, draw calls, pipeline events, or any combination thereof indicated by the command group 205, the synchronization circuit 240 of the graphics kernel 114 is configured to increment one or more corresponding local counters 348. Furthermore, based on the determination by the graphics kernel 114 that one or more commands, instructions, draw calls, pipeline events, or any combination thereof indicated by the command group 205 are not associated with the command partition 120 assigned to the graphics kernel 114, the synchronization circuit 240 of the graphics kernel 114 is configured to increment one or more corresponding local counters 348. Additionally, based on the observation by graphics kernel 114 of one or more commands, instructions, draw calls, or any combination thereof indicated by operation command 215 of command group 205, the synchronization circuit 240 of graphics kernel 114 is configured to generate a count signal 255 indicating that graphics kernel 114 has observed one or more specific commands, instructions, draw calls, or any combination thereof. After generating the count signal 255, the synchronization circuit 240 provides the count signal 255 to one or more other graphics kernels 114.

[0045] For example, according to one embodiment, each graphics core 114 is connected by a data texture 330. Such a data texture 330 includes, for example, one or more memory channels, buffers, queues, etc., configured to communicatively couple each graphics core 114 to one or more other graphics cores 114, frame buffer 228, bus 132, or any combination thereof. In one embodiment, synchronization circuitry 240 of graphics core 114 is configured to provide a count signal 255 to another graphics core 114 via the data texture 330. In response to receiving the count signal 255 from another graphics core 114, synchronization circuitry 240 is configured to adjust one or more counters in a set of remote counters 350 included in or otherwise connected to the graphics core 114. For example, synchronization circuitry 240 increments one or more counters in the set of remote counters 350 that correspond to a command, instruction, draw call, pipeline event, or any combination thereof indicated in the count signal 255 and to the graphics core 114 that sent the count signal 255. As an example, in response to receiving a count signal 255 indicating the execution of a draw call from a graphics kernel N114-N, the synchronization circuit 0240-1 of graphics kernel 0114-1 increments one or more kernel N counters 352 in the remote counters 350-1 corresponding to the draw call indicated in the count signal 255. In this way, each graphics kernel 114 maintains a corresponding counter indicating the number of times each graphics kernel 114 has observed one or more specific commands, instructions, draw calls, pipeline events, or any combination thereof.

[0046] To execute the synchronization command 225 indicated in command group 205, example operation 300 first involves the synchronization circuitry 240 of graphics kernel 114 suspending the execution of command group 205, and then checking local counters 348 and remote counters 350 included in or otherwise connected to graphics kernel 114. Based on the indications from local counters 348 and remote counters 350 that two or more graphics kernels 114 have not yet observed the same number of commands, instructions, draw calls, or pipeline events indicated in synchronization command 225, the synchronization circuitry 240 of graphics kernel 114 waits and continues to check local counters 348 and remote counters 350. Based on the indications from local counters 348 and remote counters 350 that two or more graphics kernels 114 have observed the same number of commands, instructions, draw calls, pipeline events, or any combination thereof indicated in synchronization command 225, graphics kernel 114 begins execution of the next operation command 215 indicated in command group 205. In some implementations, the synchronization circuitry 240 of the graphics kernel 114 checks one or more local counters 348 to determine whether one or more of the counters indicate a predetermined value. For example, in some implementations, after one or more synchronization commands 225 are executed by the graphics kernel 114, the synchronization circuitry 240 of the graphics kernel 114 sets one or more of the local counters 348 to a predetermined value (e.g., 0). For example, such a predetermined value indicates that the local counter 348 has been reset. Based on the fact that one or more local counters 348 are equal to the predetermined value (e.g., 0), the graphics kernel 114 executes the next operation command 215 of the command group 205.

[0047] Figure 4 One or more command partitions based on command group 205 are presented. In embodiments, command group 205 includes one or more work items, each work item including a command, instruction, drawing call, or any combination thereof to be executed. According to embodiments, processing unit 128 is configured to divide the work items of command group 205 into two or more partitions 415 (e.g., command partition 120). For example, each partition 415 includes different groups of work items within command group 205. For example, each partition 415 includes one or more corresponding groups of work items within command group 205. In some embodiments, each partition 415 of command group 205 has the same size (e.g., includes the same number of work items), while in other embodiments, two or more partitions 415 include different numbers of work items. Although Figure 4 The example implementation shows work items of command group 205 divided into six partitions (415-1, 415-2, 415-3, 415-4, 415-5, 415-6), but in other implementations, work items of command group 205 can be divided into any number of partitions.

[0048] In this implementation, the processing unit 128 is configured to assign each partition 415 to a corresponding graphics kernel 114. That is, the processing unit 128 assigns one or more partitions 415 to two or more graphics kernels 114 respectively. (See reference...) Figure 4 In the example implementation shown, processing unit 128 assigns partitions 415-1 and 415-4 to graphics kernel 0 114-1, partitions 415-2 and 415-5 to graphics kernel 1 114-2, and partitions 415-3 and 415-6 to graphics kernel 2 114-3. Based on the partitions 415 assigned to graphics kernel 114, each graphics kernel 114 is configured to execute command groups 205. For example, each graphics kernel 114 executes the commands, instructions, and draw calls of command group 205 only within the work item of command group 205 assigned to the graphics kernel within the partition 415 assigned to the graphics kernel. As an example, see reference Figure 4 Graphics kernel 0 114-1 executes only the commands, instructions, and draw calls of command groups 205 within the work items of partitions 415-1 and 415-4. In this way, each graphics kernel 114 is configured to receive and concurrently execute the same command groups 205.

[0049] Now for reference Figure 5 According to some implementations, example operation 500 for concurrent processing of graphics command packets using screen partitioning is presented. According to the implementation, each graphics core 114 in a group of graphics cores is connected by a data texture 330. In the implementation, example operation 500 first includes each graphics core 114 in the graphics core group receiving one or more command packets 205 from a graphics application. For example, in the implementation, CPU 102 is configured to issue the same one or more command packets 205 from the graphics application to each graphics core 114. Based on the same command packets 205, each command processor 116 of each graphics core 114 then determines a set of draw calls 510. For example, each command processor 116 identifies a set of draw calls 210 from the command packets 205. After determining the set of draw calls 510, each command processor 116 then provides the set of draw calls 510 to the corresponding front-end circuitry 118 (e.g., front-end circuitry on the same graphics core 114). Reference Figure 5 In the example implementation shown, command processor 0 116-1 provides a set of drawing calls 510 to front-end circuit 0 118-1, command processor 1 116-2 provides a set of drawing calls 510 to front-end circuit 2 118-2, and command processor N 116-N provides a set of drawing calls 510 to front-end circuit 0 118-N.

[0050] Based on the set of draw calls 510, each front-end circuit 118 determines a set of primitives, a group of primitives (e.g., a small mesh), or both. As an example, based on the set of draw calls 510, each front-end circuit 118 performs one or more vertex shader operations, primitive assembly operations, or both to determine a set of primitives, a group of primitives, or both. For each determined primitive, sub-primitive, or both (e.g., for each primitive, sub-primitive, or both indicated by the set of draw calls 510), each front-end circuit 118 determines whether each primitive, sub-primitive, or both is at least partially within a command partition 120 (e.g., a partition of screen space) allocated to the corresponding graphics kernel 114 (e.g., the graphics kernel 114 including the front-end circuit 118). As an example, to determine whether a primitive is at least partially within a partition of screen space allocated to the corresponding graphics kernel 114, the front-end circuit performs one or more vertex shading operations, primitive assembly operations, bounding box operations, frustum operations, or any combination thereof. Once the front-end circuitry 118 has determined whether each primitive, sub-primitive, or both indicated in the set of draw calls 510 is at least partially within a partition of screen space, the front-end circuitry 118 generates a set 515 representing the surviving primitives, groups of primitives, or both within the partition of screen space allocated to the graphics kernel 114. (See reference...) Figure 5 In the example implementation, the graphics front-end circuit 0118-1 generates the surviving primitive set 515-1, the graphics front-end circuit 1118-2 generates the surviving primitive set 515-2, and the front-end circuit N118-N generates the surviving primitive set 515-N.

[0051] In the implementation, each front-end circuit 118 then provides commands, instructions, draw calls, or any combination thereof associated with the corresponding surviving primitive set 515 to one or more corresponding back-end circuit instances 122 (e.g., included in the same graphics kernel 114 or otherwise connected to the same graphics kernel). Reference Figure 5In an example implementation, graphics front-end circuitry 0 118-1 provides instructions, commands, draw calls, or any combination thereof associated with surviving primitive set 515-1 to back-end circuitry instance group 0 122-1; graphics front-end circuitry 1 118-2 provides instructions, commands, draw calls, or any combination thereof associated with surviving primitive set 515-2 to back-end circuitry instance group 1 122-2; and graphics front-end circuitry N 118-N provides instructions, commands, draw calls, or any combination thereof associated with surviving primitive set 515-N to back-end circuitry instance group N 122-N. In response to receiving instructions, commands, draw calls, or any combination thereof indicative of surviving primitive set 515, back-end circuitry instance group 122 is configured to perform one or more rasterization operations, fragment shader operations, or both, to render the primitives, primitive groups, or both indicated in the group surviving primitive set 515. The back-end circuit instance group 122 then stores the rendered primitives and primitive groups (e.g., pixel values) in the frame buffer 228.

[0052] Now for reference Figure 6 According to some embodiments, example operation 300 for processing draw calls of screen partitions within a graphics kernel is presented. According to an embodiment, example operation 300 first includes a command processor 116 of the graphics kernel 114 receiving one or more command packets 205 from a graphics application. The command processor 116 then determines a set of draw calls 510 from the command packets 205 and provides the set of draw calls 510 to front-end circuitry 118. According to an embodiment, in order to determine a primitive set from the set of draw calls 510, the front-end circuitry 118 includes one or more vertex shaders 632 and a primitive assembler 634. Such vertex shaders 632 include, for example, circuitry configured to perform one or more vertex shading operations (e.g., one or more transform operations, skinning operations, warping operations, per-vertex lighting operations, or any combination thereof, to name a few) to generate vertex data. For example, the primitive assembler 634 includes circuitry configured to generate a primitive set based on the determined vertex data. As an example, based on the set of draw calls 510, vertex shader 632 first performs one or more vertex shading operations to determine the vertex data of the primitives indicated in the set of draw calls 510. Using the vertex data, primitive assembler 334 then generates a primitive set.

[0053] After determining the primitive set, front-end circuitry 118 then determines which primitives, primitive groups, or both are at least partially located within a portion of screen space allocated to graphics kernel 114 (e.g., command partition 120). Based on the primitives, primitive groups, or both located at least partially within the partition of screen space allocated to graphics kernel 114, front-end circuitry 118 generates a surviving primitive set 515 representing the primitives, primitive groups, or both located within the partition of screen space allocated to graphics kernel 114. Front-end circuitry 118 is configured to then partition the surviving primitive set 515 based on command sub-partitions 124 (e.g., sub-partitions of screen space) allocated to each back-end circuitry instance 122 included in or otherwise connected to the graphics kernel 114. As an example, front-end circuitry 118 compares the primitives and primitive groups indicated in the surviving primitive set 515 with each command sub-partition 124 allocated to a back-end circuitry instance 122 included in or otherwise connected to the graphics kernel 114. In other words, the front-end circuitry 118 determines whether a primitive, primitive group, or both indicated in the surviving primitive set 515 is at least partially located within each command sub-partition 124 assigned to a back-end circuitry instance 122 included in or otherwise connected to the graphics kernel 114. Based on a comparison of the primitive, primitive group, or both indicated in the surviving primitive set 515 with each command sub-partition 124, the front-end circuitry 118 determines a corresponding primitive subset 625 for each back-end circuitry instance 122. For example, each primitive subset 625 indicates a primitive, primitive group, or both located at least partially within the surviving primitive set 515 in the corresponding command sub-partition 124 assigned to the corresponding instance of the back-end circuitry 122. The front-end circuitry 118 then provides one or more commands, instructions, draw calls, or any combination thereof indicating the primitive, primitive group, or both within the primitive subset 625 to the corresponding back-end circuitry instance 122.

[0054] refer to Figure 6In the example implementation presented, front-end circuitry 118 provides commands, instructions, draw calls, or any combination thereof associated with a first primitive subset 0 625-1 to a first back-end circuitry instance 122-1, commands, instructions, draw calls, or any combination thereof associated with a second primitive subset 1 625-2 to a second back-end circuitry instance 122-2, and commands, instructions, draw calls, or any combination thereof associated with a third primitive subset M 625-M to a third back-end circuitry instance 122-M. To execute the received commands, instructions, and draw calls, each back-end circuitry instance 122 includes one or more shader engines (e.g., 636-1, 636-2, 636-M). Shader engine 636 includes, for example, circuitry configured to perform one or more rasterization operations, fragment shader operations, rasterized shading operations, geometry processing, or any combination thereof to render one or more primitives. For example, based on commands, instructions, draw calls, or any combination thereof associated with the corresponding primitive subset 625, shader engine 636 performs one or more rasterization operations, fragment shader operations, or both to render the primitives, primitive groups, or both indicated in primitive subset 625. After rendering one or more primitives, primitive groups, or both, each back-end circuit instance 122 stores data representing the primitives and primitive groups (e.g., pixel values) in frame buffer 528. In this way, each graphics kernel 114 is configured to support multiple back-end circuit instances 122 and further sub-partitions of screen space.

[0055] Now for reference Figure 7 An example screen space 705 with partitions is presented. In an implementation, the example screen space 705 includes multiple sub-partitions (e.g., command sub-partition 124), each sub-partition including a first number of pixels in a first (e.g., horizontal) direction and a second number of pixels in a second (e.g., vertical) direction. Although Figure 7The example implementation presents example screen space 705 as having 25 sub-partitions (715-1, 715-2, 715-3, 715-4, 715-5, 715-6, 715-7, 715-8, 715-9, 715-10, 715-11, 715-12, 715-13, 715-14, 715-15, 715-16, 715-17, 715-18, 715-19, 715-20, 715-21, 715-22, 715-23, 715-24, 715-35), but in other implementations, example screen space 705 may have any number of sub-partitions 715. According to the implementation, each sub-partition 715 is assigned to a corresponding back-end circuit instance 122 of one or more graphics kernels 114. Additionally, in some implementations, two or more sub-partitions 715 of the example screen space 705 form a partition 725 (e.g., command partition 120) of the example screen space 705 assigned to a corresponding graphics kernel 114. For this purpose, each sub-partition 715 forming the partition 725 of the example screen space 705 is assigned to a back-end circuit instance 122, which is included in or otherwise connected to the graphics kernel 114 assigned to the partition 725.

[0056] For example, refer to Figure 7 Partition 725 is formed by sub-partitions 715-1, 715-2, 715-6, and 715-7. In some embodiments, partition 725 is assigned to the first graphics kernel 114 of the processing unit 128. Based on the assignment of partition 725 to the first graphics kernel 114, sub-partition 715-1 is assigned to a first back-end circuit instance 122, which is included in or otherwise connected to the first graphics kernel 114 (in the first graphics kernel 114). Figure 7 (Indicated as the first shading level). Furthermore, sub-partition 715-2 is assigned to a second back-end circuit instance 122 included in or otherwise connected to the first graphics kernel 114 (in... Figure 7 The second shading level is indicated as darker than the first shading level. Sub-partitions 715-7 are assigned to a third back-end circuit instance 122 that is included in or otherwise connected to the first graphics kernel 114. Figure 7 The third shading level is indicated as darker than the second shading level. Additionally, sub-partitions 715-6 are assigned to a fourth back-end circuit instance 122 included in or otherwise connected to the first graphics kernel 114 (in...). Figure 7(The fourth shading level is indicated as darker than the third shading level). Because each sub-partition 715 forming partition 725 is assigned to a corresponding back-end circuit instance 122, which is included in or otherwise connected to the graphics kernel 114 assigned to partition 725, a single graphics kernel 114 is enabled to support each partition 725 and its associated sub-partitions 715. This reduces the processing requirements of the graphics kernel and improves processing efficiency.

[0057] Now for reference Figure 8 According to an implementation, an example method 800 for concurrent processing of command groups by two or more graphics kernels is presented. In an implementation, example method 800 first includes, at block 805, processing unit 128 dividing the work items of command group 205 into two or more command partitions 120. For example, in some implementations, processing unit 128 divides the work items of command group 205 into one or more partitions 415, each partition including one or more work items of command group 205, wherein each partition 415 represents a command partition 120. In other implementations, processing unit 128 divides screen space (e.g., screen space 705) into two or more partitions 725, wherein each partition 725 represents a command partition 120. After determining one or more command partitions 120, processing unit 128 assigns each command partition 120 to a corresponding graphics kernel 114. According to some implementations, processing unit 128 is configured to divide each command partition 120 (e.g., screen space partition 725) into two or more command sub-partitions 124 (e.g., sub-partitions 715). As an example, for a command partition 120 representing a partition of screen space, each command subpartition 124 of the command partition 120 includes a different portion of the command partition 120. The processing unit 128 then assigns each command subpartition 124 to a corresponding back-end circuit instance 122, which is included in or otherwise connected to the graphics kernel 114 assigned to the command partition 120.

[0058] At block 810 of example method 800, each graphics core 114 is configured to receive the same command group 205 indicating the same set of operation commands 215 and synchronization commands 225. For example, the command processor 116 of each graphics core 114 receives the same command group 205 from a computing application, which includes the same set of commands to be executed. As another example, the command processor 116 of each graphics core 114 receives the same command group 205 from a graphics application, which includes the same set of draw calls to be executed. After receiving the command group 205, at block 815, each graphics core executes the command, instruction, draw call, or any combination thereof indicated in the command group 205. For this purpose, at block 820, the front-end circuitry 118 of each graphics core 114 first determines whether the first command, instruction, or draw call indicated in the command group 205 is a synchronization command 225. Based on the premise that the first command is not a synchronization command 225, the graphics core 114 moves to block 835. At box 835, front-end circuitry 118 determines whether a command, instruction, draw call, or any combination thereof is associated with a command partition 120 allocated to graphics kernel 114. For example, based on command group 205 originating from a computing application, front-end circuitry 118 determines whether the command, instruction, draw call, or any combination thereof is in the work item of command group 205 within partition 415 allocated to graphics kernel 114. As another example, based on command group 205 originating from a graphics application, front-end circuitry 118 determines whether the command, instruction, draw call, or any combination thereof indicates one or more primitives, primitive groups, or both, which at least partially have one or more partitions 725 of screen space allocated to graphics kernel 114.

[0059] In response to a command, instruction, draw call, or any combination thereof associated with a command partition 120 assigned to graphics kernel 114, graphics kernel 114 moves to box 840. As an example, in response to a command, instruction, draw call, or any combination thereof being in a work item of command group 205 within partition 415 assigned to graphics kernel 114, graphics kernel 114 moves to box 840. As another example, in response to a command, instruction, draw call, or any combination thereof instructing one or more primitives, primitive groups, or both to be at least partially within one or more partitions 725 of screen space assigned to graphics kernel 114, graphics kernel 114 moves to box 840. At box 840, graphics kernel 114 executes the command, instruction, draw call, or any combination thereof indicated in command group 205. For example, front-end circuitry 118 executes one or more commands, instructions, operations, or any combination thereof as indicated by a command, instruction, or draw call. As another example, front-end circuitry 118 assigns one or more commands, instructions, draw calls, or any combination thereof to one or more back-end circuitry instances 122.

[0060] Once the graphics kernel 114 has executed a command, instruction, or draw call, it adjusts (e.g., increments or decrements) one or more counters (e.g., counter set 246, local counter 348). As an example, in some embodiments, the graphics kernel 114 generates a count signal 255 indicating that it has observed a command, instruction, or draw call, and provides the count signal 255 to the synchronization management circuitry 242. The synchronization management circuitry 242 then adjusts one or more counters in the counter set 246 associated with the graphics kernel 114 to indicate compliance with the command, instruction, or draw call. As another example, the graphics kernel 114 first increments one or more local counters 348 included in or otherwise connected to the graphics kernel to indicate compliance with the command, instruction, or draw call. Furthermore, the graphics kernel 114 provides the count signal 255 to one or more other graphics kernels 114, indicating compliance with the command, instruction, or draw call. In response to receiving a count signal 255, graphics kernel 114 is configured to adjust one or more remote counters 350 included in or otherwise connected to graphics kernel 114 to indicate compliance of graphics kernel 114, which sent the count signal 255, with a command, instruction, or draw call. Referring again to box 835, in response to a command, instruction, draw call, or any combination thereof not being associated with command partition 120 assigned to graphics kernel 114, graphics kernel 114 moves to box 845 and adjusts one or more counters. As an example, in response to a command, instruction, draw call, or any combination thereof being in the work item of command group 205 but not within partition 415 assigned to graphics kernel 114, graphics kernel 114 moves to box 845. As another example, in response to a command, instruction, draw call, or any combination thereof not indicating at least partially within one or more partitions 725 of screen space assigned to graphics kernel 114, graphics kernel 114 moves to box 845.

[0061] After adjusting one or more counters, at box 850, graphics kernel 114 moves to the next command, instruction, or draw call indicated in command group 205. Referring again to box 820, in response to the command, instruction, or draw call indicated in command group 205 being a synchronization command 225, graphics kernel 114 moves to box 825. At box 825, graphics kernel 114 suspends execution of command group 205 and queries one or more counters to determine whether one or more other graphics kernels 114 have completed the same number of commands, instructions, draw calls, or any combination thereof indicated by graphics kernel 114 in synchronization command 225. That is, graphics kernel 114 determines whether one or more other graphics kernels 114 are at the same point in the pipeline (e.g., a compute pipeline, a graphics pipeline) indicated by command group 205. As an example, in some embodiments, graphics kernel 114 queries one or more local counters 348, remote counters 350, or both, included in graphics kernel 114 or otherwise connected to the graphics kernel. In other implementations, the graphics kernel 114 queries one or more sets of counters 246 in the counter group 244.

[0062] At box 830, graphics kernel 114 determines whether the queried counter indicates that one or more other graphics kernels 114 have observed the same number of commands, instructions, draw calls, or any combination thereof as indicated by graphics kernel 114 in synchronization command 225. In other words, graphics kernel 114 determines whether the counter indicates that graphics kernel 114 is synchronized with one or more other graphics kernels 114 (e.g., at the same point in the pipeline indicated by command group 205 as one or more other graphics kernels 114). Based on the counter not indicating that one or more other graphics kernels 114 have observed the same number of commands, instructions, draw calls, or any combination thereof as indicated by graphics kernel 114 in synchronization command 225, graphics kernel 114 continues to suspend execution of command group 205 and moves to box 825. Based on the counter indicating that one or more other graphics kernels 114 have observed the same number of commands, instructions, draw calls, or any combination thereof as indicated by graphics kernel 114 in synchronization command 225, graphics kernel 114 moves to the next command, instruction, or draw call indicated in command group 205 at box 850.

[0063] In some implementations, the above-described devices and techniques are used in systems including one or more integrated circuit (IC) devices (also known as integrated circuit packages or microchips) as described above. Figures 1 to 8Implemented in the described graphics kernel. Electronic Design Automation (EDA) and Computer-Aided Design (CAD) software tools can be used in the design and manufacture of these IC devices. These design tools are typically represented as one or more software programs. One or more software programs include code executable by a computer system to manipulate the computer system to operate on code representing a circuit of one or more IC devices to perform at least a portion of a process for designing or adapting a manufacturing system to manufacture the circuit. The code may include instructions, data, or a combination of instructions and data. Software instructions representing design or manufacturing tools are typically stored in a computer-readable storage medium accessible to the computing system. Similarly, code representing one or more stages of the design or manufacture of an IC device may be stored in or accessed from the same computer-readable storage medium or different computer-readable storage media.

[0064] Computer-readable storage media can include any non-transitory storage medium or a combination of non-transitory storage media that can be accessed by a computer system during use to provide instructions and / or data to the computer system. Such storage media can include, but are not limited to, optical media (e.g., optical discs (CDs), digital versatile optical discs (DVDs), Blu-ray discs), magnetic media (e.g., floppy disks, magnetic tapes, or magnetic hard disks), volatile memory (e.g., random access memory (RAM) or cache), non-volatile memory (e.g., read-only memory (ROM) or flash memory), or microelectromechanical systems (MEMS) based storage media. Computer-readable storage media can be embedded in a computing system (e.g., system RAM or ROM), fixedly attached to a computing system (e.g., a magnetic hard disk drive), removably attached to a computing system (e.g., an optical disc or a flash memory based on a universal serial bus (USB)), or coupled to a computer system via a wired or wireless network (e.g., a network accessible storage device (NAS)).

[0065] In some implementations, certain aspects of the techniques described above may be implemented by one or more processors of a processing system executing the software. The software includes one or more sets of executable instructions stored or otherwise tangibly embodied on a non-transitory computer-readable storage medium. The software may include instructions and certain data that, when executed by one or more processors, manipulate one or more processors to perform one or more aspects of the techniques described above. The non-transitory computer-readable storage medium may include, for example, disk or optical disk storage devices, solid-state storage devices such as flash memory, cache, random access memory (RAM), or one or more other non-volatile memory devices. The executable instructions stored on the non-transitory computer-readable storage medium may be source code, assembly language code, object code, or other instruction formats that are interpreted or otherwise executed by one or more processors.

[0066] It should be noted that not all activities or elements described above in the general description are essential. A particular activity or part of a device may not be essential, and one or more additional activities may be performed, or elements may be included in addition to those described. Furthermore, the order in which the activities are listed is not necessarily the order in which they are performed. Additionally, these concepts have been described with reference to specific embodiments. However, those skilled in the art will understand that various modifications and changes can be made without departing from the scope of this disclosure as set forth in the following claims. Therefore, the specification and drawings are to be considered illustrative rather than restrictive, and all such modifications are intended to be included within the scope of this disclosure.

[0067] The benefits, other advantages, and solutions to problems have been described above with respect to specific embodiments. However, the benefits, advantages, solutions to problems, and any features that may lead to or make any benefit, advantage, or solution appear or become more significant should not be construed as key, essential, or fundamental features of any or all claims. Furthermore, the specific embodiments disclosed above are merely illustrative, as the disclosed subject matter can be modified and practiced in different but equivalent ways that will be apparent to those skilled in the art who benefit from the teachings herein. No limitation is intended on the details of the constructions or designs shown herein, except as described in the following claims. Therefore, it will be apparent that the specific embodiments disclosed above can be changed or modified, and all such changes are considered to be within the scope of the disclosed subject matter. Therefore, the protection sought herein is set forth in the following claims.

Claims

1. A processing unit, the processing unit comprising: Multiple graphics kernels, each assigned to a corresponding command partition, wherein each of the multiple graphics kernels is configured as follows: Receive a command packet indicating one or more instructions, wherein the command packet is received by each of the plurality of graphics kernels; as well as In response to executing the one or more instructions based on the corresponding command partition, an indication is provided that the graphics kernel has observed the one or more instructions.

2. The processing unit according to claim 1, wherein the corresponding command partition of the graphics kernel includes one or more corresponding work items of the command group.

3. The processing unit of claim 2, wherein each graphics kernel is configured to execute the one or more instructions based on whether the one or more instructions are within a work item indicated by the corresponding command partition.

4. The processing unit according to any one of claims 1 to 3, wherein the corresponding command partition corresponding to the graphics kernel includes a corresponding partition of the screen space.

5. The processing unit of claim 4, wherein each graphics kernel is configured to execute the one or more instructions based on whether the one or more instructions instruct one or more primitives within the corresponding partition of the screen space of the corresponding command partition.

6. The processing unit according to any one of claims 1 to 5, wherein each graphics kernel is configured to provide a counting signal to one or more other graphics kernels in response to executing the one or more instructions based on the corresponding command partition.

7. The processing unit according to any one of claims 1 to 6, wherein each graphics kernel is configured to determine synchronization with the one or more other graphics kernels by querying one or more counters associated with one or more other graphics kernels.

8. A method, the method comprising: At each of the plurality of graphics kernels, a command group indicating one or more instructions is received, wherein each of the plurality of graphics kernels is assigned to a corresponding command partition; as well as In response to executing one or more instructions at one of the plurality of graphics kernels based on the corresponding command partition associated with the graphics kernel, an indication is provided that the graphics kernel has observed the one or more instructions.

9. The method of claim 8, wherein the corresponding command partition of the corresponding graphics kernel includes one or more corresponding work items of the command group.

10. The method according to claim 9, wherein the method further comprises: At each of the multiple graphics kernels, the one or more instructions are executed based on whether they are within a work item indicated by the corresponding command partition assigned to the graphics kernel.

11. The method according to any one of claims 8 to 10, wherein the corresponding command partition corresponding to the graphics kernel includes a corresponding partition of the screen space.

12. The method according to claim 11, wherein the method further comprises: At each of the multiple graphics kernels, the one or more instructions are executed based on whether the one or more instructions instruct one or more primitives within the corresponding partition of the screen space of the corresponding command partition assigned to the graphics kernel.

13. The method according to any one of claims 8 to 12, the method further comprising: At one of the plurality of graphics kernels, in response to executing one or more instructions based on the corresponding command partition associated with the graphics kernel, a counting signal is provided to one or more other graphics kernels among the plurality of graphics kernels.

14. The method according to any one of claims 8 to 13, the method further comprising: At one of the plurality of graphics kernels, synchronization with the one or more other graphics kernels is determined by querying one or more counters associated with one or more other graphics kernels among the plurality of graphics kernels.

15. A processing unit, the processing unit comprising: A graphics kernel, which is allocated to a partition of screen space and includes: Front-end circuitry; and Multiple back-end circuit instances, each of which is assigned to a corresponding sub-partition of the partition of the screen space. The front-end circuitry is configured to assign a corresponding instruction set to each of the plurality of instances based on the corresponding sub-partition assigned to the corresponding back-end circuitry instance.

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