Display panel and preparation method thereof

Abstract

The invention provides a display panel and a preparation method thereof, and belongs to the technical field of display. The preparation method of the display panel comprises the following steps: transferring a light emitting diode to a substrate; according to the position information of the light-emitting diode, determining the position information of a liner electrically connected with an electrode of the light-emitting diode, and at least generating a layout of a film layer where the liner is located; and according to the layout of the film layer where the liner is located, forming the film layer where the liner is located, and enabling the liner to be electrically connected with the electrode of the light-emitting diode. The preparation method of the display panel can improve the preparation yield of the display panel. (Figure 6)

Description

Display panel and its manufacturing method Technical Field

[0001] This disclosure relates to the field of display technology, and more specifically, to a display panel and a method for manufacturing the same. Background Technology

[0002] Light-emitting diodes (LEDs) can only be fabricated on semiconductor substrates, such as sapphire, gallium nitride, and silicon nitride substrates. Regardless of the substrate type, LEDs require some degree of transfer during the manufacturing process. For a typical display panel, this often involves the transfer of millions or even more micro-devices. Therefore, mass transfer technology is essential for manufacturing LED display panels. However, due to limitations in yield, mass transfer precision, efficiency, and cost, there is currently no mass-producible mass transfer solution.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art.

[0004] Summary of the Invention

[0005] The purpose of this disclosure is to overcome the shortcomings of the prior art and provide a display panel and its manufacturing method to improve the manufacturing yield of the display panel.

[0006] According to one aspect of this disclosure, a display panel is provided, comprising a plurality of pixels arranged in an array, each pixel including one or more sub-pixel regions; a light-emitting diode and a pad electrically connected to the electrodes of the light-emitting diode are disposed within the sub-pixel region; the display panel includes a first sub-pixel region and a second sub-pixel region located in different columns, the first sub-pixel region and the second sub-pixel region being located in different pixels, and the first sub-pixel region and the second sub-pixel region being located at the same position in the different pixels; the distance between the first sub-pixel region and the second sub-pixel region in the row direction is M times the pixel spacing in the row direction, where M is a positive integer;

[0007] The distance between the LEDs in the first sub-pixel area and the LEDs in the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the pads in the first sub-pixel area and the pads in the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction; or, the distance between the LEDs in the first sub-pixel area and the LEDs in the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the pads in the first sub-pixel area and the pads in the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction.

[0008] According to one embodiment of this disclosure, the distance in the row direction between the characteristic position of the light-emitting diode in the first sub-pixel region and the characteristic position of the pad in the first sub-pixel region is a first distance, and the distance in the row direction between the characteristic position of the light-emitting diode in the second sub-pixel region and the characteristic position of the pad in the second sub-pixel region is a second distance; the difference between the first distance and the second distance does not exceed 0.4 micrometers;

[0009] Wherein, the characteristic position of the light-emitting diode in the first sub-pixel region and the characteristic position of the light-emitting diode in the second sub-pixel region respectively correspond to the same position on the light-emitting diode; the characteristic position of the pad in the first sub-pixel region and the characteristic position of the pad in the second sub-pixel region respectively correspond to the same position on the pad.

[0010] According to one embodiment of the present disclosure, the distance between the characteristic position of the light-emitting diode in the first sub-pixel region and the first row edge of the first sub-pixel region is less than the distance between the characteristic position of the light-emitting diode in the second sub-pixel region and the first row edge of the second sub-pixel region, and the distance between the characteristic position of the pad in the first sub-pixel region and the first row edge of the first sub-pixel region is less than the distance between the characteristic position of the pad in the second sub-pixel region and the first row edge of the second sub-pixel region.

[0011] Alternatively, the distance between the feature position of the light-emitting diode in the first sub-pixel area and the first row edge of the first sub-pixel area is greater than the distance between the feature position of the light-emitting diode in the second sub-pixel area and the first row edge of the second sub-pixel area, and the distance between the feature position of the pad in the first sub-pixel area and the first row edge of the first sub-pixel area is greater than the distance between the feature position of the pad in the second sub-pixel area and the first row edge of the second sub-pixel area.

[0012] Wherein, the characteristic position of the light-emitting diode in the first sub-pixel region and the characteristic position of the light-emitting diode in the second sub-pixel region respectively correspond to the same position on the light-emitting diode; the characteristic position of the pad in the first sub-pixel region and the characteristic position of the pad in the second sub-pixel region respectively correspond to the same position on the pad.

[0013] According to one embodiment of the present disclosure, the light-emitting diode in the sub-pixel region has a characteristic edge of the light-emitting diode in the sub-pixel region corresponding to the edge of the first row, and the pad in the sub-pixel region has a characteristic edge PADE1 of the pad in the sub-pixel region corresponding to the edge of the first row.

[0014] The feature edges of the light-emitting diodes in the first sub-pixel region and the feature edges of the pads in the first sub-pixel region both form an acute angle with the first row edge of the first sub-pixel region; relative to the first row edge of the first sub-pixel region, the feature edges of the light-emitting diodes in the first sub-pixel region and the feature edges of the pads in the first sub-pixel region have the same tilt direction.

[0015] According to one embodiment of this disclosure, the display panel includes a third sub-pixel area and a fourth sub-pixel area located in different rows. The third sub-pixel area and the fourth sub-pixel area are located in different pixels, and the third sub-pixel area and the fourth sub-pixel area are located at the same position in different pixels. The distance between the third sub-pixel area and the fourth sub-pixel area in the column direction is N times the set spacing of the pixels in the column direction, where N is a positive integer.

[0016] Wherein, the distance in the column direction between the light-emitting diode in the third sub-pixel area and the light-emitting diode in the fourth sub-pixel area is less than N times the set spacing of pixels in the column direction, and the distance in the column direction between the pad in the third sub-pixel area and the pad in the fourth sub-pixel area is less than N times the set spacing of pixels in the column direction; or, the distance in the column direction between the light-emitting diode in the third sub-pixel area and the light-emitting diode in the fourth sub-pixel area is greater than N times the set spacing of pixels in the column direction, and the distance in the column direction between the pad in the third sub-pixel area and the pad in the fourth sub-pixel area is greater than N times the set spacing of pixels in the column direction.

[0017] According to one embodiment of this disclosure, the distance in the column direction between the characteristic position of the light-emitting diode in the third sub-pixel region and the characteristic position of the pad in the third sub-pixel region is a third distance, and the distance in the column direction between the characteristic position of the light-emitting diode in the fourth sub-pixel region and the characteristic position of the pad in the fourth sub-pixel region is a fourth distance; the difference between the third distance and the fourth distance does not exceed 0.4 micrometers.

[0018] According to one embodiment of the present disclosure, the light-emitting diode in the sub-pixel region has a characteristic edge of the light-emitting diode in the sub-pixel region corresponding to the edge of the first row, and the pad in the sub-pixel region has a characteristic edge PADE1 of the pad in the sub-pixel region corresponding to the edge of the first row.

[0019] The display panel further includes a fifth sub-pixel area; the characteristic edges of the light-emitting diodes in the fifth sub-pixel area and the characteristic edges of the pads in the fifth sub-pixel area PADE1 are both at acute angles to the first row edge of the fifth sub-pixel area; relative to the first row edge of the fifth sub-pixel area, the characteristic edges of the light-emitting diodes in the fifth sub-pixel area and the characteristic edges of the pads in the fifth sub-pixel area PADE1 have the same tilt direction.

[0020] According to one embodiment of this disclosure, the included angle between the feature edge of the light-emitting diode in the fifth sub-pixel region and the feature edge PADE1 of the pad in the fifth sub-pixel region does not exceed 10°.

[0021] According to one embodiment of the present disclosure, the display panel includes a driving substrate, a light-emitting diode layer, and a common electrode layer stacked sequentially.

[0022] The driving substrate is provided with the pad and driving traces electrically connected to the pad;

[0023] The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode on the side close to the driving substrate and a second electrode on the side away from the driving substrate;

[0024] In the sub-pixel region, the first electrode is bonded to the pad, and the second electrode is electrically connected to the common electrode layer.

[0025] According to one embodiment of this disclosure, the sub-pixel regions are arranged into multiple sub-pixel region rows and multiple sub-pixel region columns; the sub-pixel region rows include multiple sub-pixel regions arranged sequentially along the row direction, and the sub-pixel region columns include multiple sub-pixel regions arranged sequentially along the column direction.

[0026] The display panel includes a driving substrate, a light-emitting diode layer, and an opposing substrate stacked sequentially.

[0027] The driving substrate has a first pad in the sub-pixel area and column driving traces corresponding one-to-one with each column of the sub-pixel area; the first pad in the column of the sub-pixel area is electrically connected to the corresponding column driving trace.

[0028] The opposing substrate has a second pad in the sub-pixel area and a row driving trace corresponding to each row of the sub-pixel area; the second pad in the row of the sub-pixel area is electrically connected to the corresponding row driving trace.

[0029] The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode on the side close to the driving substrate and a second electrode on the side away from the driving substrate;

[0030] In the sub-pixel region, the first electrode is bonded to the first pad, and the second electrode is bonded to the second pad.

[0031] According to one embodiment of the present disclosure, the display panel includes a driving substrate, a light-emitting diode layer, and a common electrode layer stacked sequentially.

[0032] The driving substrate includes the pad, a pixel driving circuit for driving the light-emitting diode, and multiple driving traces electrically connected to the pixel driving circuit; the output terminal of the pixel driving circuit is electrically connected to the pad.

[0033] The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode on the side close to the driving substrate and a second electrode on the side away from the driving substrate;

[0034] In the sub-pixel region, the first electrode is bonded to the pad, and the second electrode is electrically connected to the common electrode layer.

[0035] According to one embodiment of the present disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer and a pad layer stacked sequentially.

[0036] The pixel driving circuit and driving traces are disposed on the driving layer, and the pad layer has the pads; the insulating layer has at least a portion of the output terminal of the pixel driving circuit and vias corresponding to the pads one by one, and the pads are electrically connected to the output terminal of the pixel driving circuit through the corresponding vias.

[0037] The distance between the LEDs in the first sub-pixel area and the LEDs in the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the vias corresponding to the first sub-pixel area and the vias corresponding to the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction; or, the distance between the LEDs in the first sub-pixel area and the LEDs in the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the vias corresponding to the first sub-pixel area and the vias corresponding to the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction.

[0038] According to one embodiment of the present disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer and a pad layer stacked sequentially.

[0039] The pixel driving circuit and driving traces are disposed on the driving layer. The pad layer has the pads and adapter lines corresponding to the pads one by one. The insulating layer has at least a portion of the output terminal of the pixel driving circuit and vias corresponding to the pads one by one. One end of the adapter line is electrically connected to the corresponding pad, and the other end is electrically connected to the output terminal of the pixel driving circuit through the via corresponding to the pad. The distance between the vias corresponding to the first sub-pixel area and the vias corresponding to the second sub-pixel area in the row direction is M times the pixel spacing in the row direction.

[0040] The length of the adapter line corresponding to the first sub-pixel area is different from the length of the adapter line corresponding to the second sub-pixel area.

[0041] According to one embodiment of the present disclosure, the display panel includes a driving substrate and a light-emitting diode layer stacked sequentially; the driving substrate has a padding layer, and the padding layer has a first padding and a second padding disposed in the sub-pixel region;

[0042] The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode and a second electrode near the side of the driving substrate;

[0043] In the sub-pixel region, the first electrode is bonded to the first pad, and the second electrode is bonded to the second pad.

[0044] According to one embodiment of this disclosure, the sub-pixel regions are arranged into multiple sub-pixel region rows and multiple sub-pixel region columns; the sub-pixel region rows include multiple sub-pixel regions arranged sequentially along the row direction, and the sub-pixel region columns include multiple sub-pixel regions arranged sequentially along the column direction.

[0045] The driving substrate is provided with column driving lines corresponding to each of the sub-pixel area columns and row driving lines corresponding to each of the sub-pixel area rows; the first pad in the sub-pixel area column is electrically connected to the corresponding column driving line; the second pad in the sub-pixel area row is electrically connected to the corresponding row driving line.

[0046] According to one embodiment of this disclosure, at least a portion of the column drive traces are located in the padding layer, or at least a portion of the row drive traces are located in the padding layer.

[0047] According to one embodiment of the present disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer and a pad layer stacked sequentially.

[0048] The driving layer is provided with a pixel driving circuit for driving the light-emitting diode and a plurality of driving traces electrically connected to the pixel driving circuit; the output terminal of the pixel driving circuit is electrically connected to the first pad; at least one of the driving layer and the pad layer is also provided with a power trace electrically connected to the second pad.

[0049] According to one embodiment of the present disclosure, the insulating layer has at least a portion of a region exposing the output terminal of the pixel driving circuit and a first via corresponding to the first pad; the first pad is electrically connected to the output terminal of the pixel driving circuit through the first via;

[0050] The distance between the LEDs in the first sub-pixel area and the LEDs in the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction; or, the distance between the LEDs in the first sub-pixel area and the LEDs in the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction.

[0051] According to one embodiment of this disclosure, the pad layer further has a first adapter line corresponding to each of the first pads; the insulating layer has at least a portion of the area exposing the output terminal of the pixel driving circuit and a first via corresponding to each of the first pads; one end of the first adapter line is electrically connected to the corresponding first pad, and the other end is electrically connected to the output terminal of the pixel driving circuit through the first via corresponding to the first pad; the distance in the row direction between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area is M times the pixel spacing in the row direction;

[0052] The length of the first adapter line corresponding to the first sub-pixel area is different from the length of the first adapter line corresponding to the second sub-pixel area.

[0053] According to one embodiment of the present disclosure, the display panel includes a substrate, a driving layer, a light-emitting diode layer, an insulating layer, and a pad layer stacked sequentially; the driving layer has a first conductive structure and a second conductive structure.

[0054] The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode and a second electrode on the side away from the substrate.

[0055] The insulating layer has a first via exposing the first electrode, a second via exposing the second electrode, a third via exposing the first conductive structure, and a fourth via exposing the second conductive structure.

[0056] The pad layer has a first pad and a second pad corresponding to the sub-pixel area; the first pad is electrically connected to the first electrode through the first via and to the first conductive structure through the third via, and the second pad is electrically connected to the second electrode through the second via and to the second conductive structure through the fourth via.

[0057] According to one embodiment of this disclosure, the sub-pixel regions are arranged into multiple sub-pixel region rows and multiple sub-pixel region columns; the sub-pixel region rows include multiple sub-pixel regions arranged sequentially along the row direction, and the sub-pixel region columns include multiple sub-pixel regions arranged sequentially along the column direction.

[0058] The first conductive structure is a column driving trace that corresponds one-to-one with each of the sub-pixel area columns and extends along the column direction; the second conductive structure is a row driving trace that corresponds one-to-one with each of the sub-pixel area rows and extends along the row direction.

[0059] The first pad corresponding to the column of the sub-pixel region is electrically connected to the corresponding column drive line; the second pad corresponding to the row of the sub-pixel region is electrically connected to the corresponding row drive line.

[0060] According to one embodiment of this disclosure, the driving layer is provided with a pixel driving circuit for driving the light-emitting diode, a plurality of driving traces electrically connected to the pixel driving circuit, and a power trace as a second conductive structure; the output terminal of the pixel driving circuit is electrically connected to the first pad as a first conductive structure.

[0061] According to one embodiment of this disclosure, the distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel area and the second via corresponding to the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction; or, the distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel area and the second via corresponding to the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction.

[0062] According to one embodiment of the present disclosure, the display panel includes a cover plate, a light-emitting diode layer, an insulating layer and a driving substrate stacked sequentially.

[0063] The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode and a second electrode facing the side of the driving substrate;

[0064] The insulating layer has a first via exposing the first electrode and a second via exposing the second electrode;

[0065] The driving substrate has a first pad and a second pad located in the sub-pixel region. The first pad is electrically connected to the first electrode through the first via, and the second pad is electrically connected to the second electrode through the second via. At least a portion of the first pad is recessed in the first via, and at least a portion of the second pad is recessed in the second via.

[0066] According to one embodiment of this disclosure, the distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel area and the second via corresponding to the second sub-pixel area in the row direction is less than M times the set spacing of pixels in the row direction; or, the distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel area and the second via corresponding to the second sub-pixel area in the row direction is greater than M times the set spacing of pixels in the row direction.

[0067] According to one embodiment of this disclosure, the sub-pixel regions are arranged into multiple sub-pixel region rows and multiple sub-pixel region columns; the sub-pixel region rows include multiple sub-pixel regions arranged sequentially along the row direction, and the sub-pixel region columns include multiple sub-pixel regions arranged sequentially along the column direction.

[0068] The light-emitting diode is provided with a first electrode and a second electrode, and the sub-pixel area is provided with a first pad corresponding to and electrically connected to the first electrode and a second pad corresponding to and electrically connected to the second electrode;

[0069] The display panel is provided with column driving lines that correspond one-to-one with each of the sub-pixel columns; the first pad in the sub-pixel column is electrically connected to the corresponding column driving line.

[0070] The display panel is provided with row driving traces that correspond one-to-one with each of the sub-pixel area rows; the second pad in the sub-pixel area row is electrically connected to the corresponding row driving trace.

[0071] The distance between the column driving traces corresponding to the first sub-pixel area and the column driving traces corresponding to the second sub-pixel area in the row direction is M times the set spacing of the pixels in the row direction.

[0072] According to one embodiment of the present disclosure, the display panel includes a third sub-pixel area and a fourth sub-pixel area located in different rows, the third sub-pixel area and the fourth sub-pixel area being located in different pixels, and the third sub-pixel area and the fourth sub-pixel area being located at the same position in different pixels;

[0073] The distance between the third sub-pixel area and the fourth sub-pixel area in the column direction is N times the set spacing of pixels in the column direction, where N is a positive integer; wherein, the distance between the light-emitting diodes in the third sub-pixel area and the light-emitting diodes in the fourth sub-pixel area in the column direction is less than N times the set spacing of pixels in the column direction, and the distance between the pads in the third sub-pixel area and the pads in the fourth sub-pixel area in the column direction is less than N times the set spacing of pixels in the column direction; or, the distance between the light-emitting diodes in the third sub-pixel area and the light-emitting diodes in the fourth sub-pixel area in the column direction is greater than N times the set spacing of pixels in the column direction, and the distance between the pads in the third sub-pixel area and the pads in the fourth sub-pixel area in the column direction is greater than N times the set spacing of pixels in the column direction;

[0074] The distance between the row driving traces corresponding to the third sub-pixel area and the row driving traces corresponding to the fourth sub-pixel area in the column direction is N times the set spacing of the pixels in the column direction.

[0075] According to one embodiment of the present disclosure, the display panel has a pixel driving circuit corresponding one-to-one with the sub-pixel area, the output terminal of the pixel driving circuit corresponding to the sub-pixel area is electrically connected to a first pad in the sub-pixel area, and the first electrode of the light-emitting diode in the sub-pixel area is electrically connected to the first pad in the sub-pixel area.

[0076] The distance between the pixel driving circuit corresponding to the first sub-pixel area and the pixel driving circuit corresponding to the second sub-pixel area in the row direction is M times the set spacing of the pixels in the row direction.

[0077] According to one embodiment of the present disclosure, the display panel includes a third sub-pixel area and a fourth sub-pixel area located in different rows, the third sub-pixel area and the fourth sub-pixel area being located in different pixels, and the third sub-pixel area and the fourth sub-pixel area being located at the same position in different pixels;

[0078] The distance between the third sub-pixel area and the fourth sub-pixel area in the column direction is N times the set spacing of pixels in the column direction, where N is a positive integer; wherein, the distance between the light-emitting diodes in the third sub-pixel area and the light-emitting diodes in the fourth sub-pixel area in the column direction is less than N times the set spacing of pixels in the column direction, and the distance between the pads in the third sub-pixel area and the pads in the fourth sub-pixel area in the column direction is less than N times the set spacing of pixels in the column direction; or, the distance between the light-emitting diodes in the third sub-pixel area and the light-emitting diodes in the fourth sub-pixel area in the column direction is greater than N times the set spacing of pixels in the column direction, and the distance between the pads in the third sub-pixel area and the pads in the fourth sub-pixel area in the column direction is greater than N times the set spacing of pixels in the column direction;

[0079] The distance between the pixel driving circuit corresponding to the third sub-pixel area and the pixel driving circuit corresponding to the fourth sub-pixel area in the column direction is N times the set spacing of the pixels in the column direction.

[0080] According to a second aspect of this disclosure, a method for manufacturing a display panel is provided, comprising:

[0081] Transfer the light-emitting diodes onto the substrate;

[0082] Detect the position information of each of the light-emitting diodes;

[0083] Based on the position information of the light-emitting diode, determine the position information of the pad that is electrically connected to the electrode of the light-emitting diode;

[0084] Based on the position information of each of the gaskets, at least a layout of the film layer in which the gaskets are located is generated;

[0085] The film layer containing the pad is formed according to the layout of the film layer containing the pad, and the pad is electrically connected to the electrode of the light-emitting diode.

[0086] According to one embodiment of this disclosure, forming the film layer containing the liner, based on the layout of the film layer containing the liner, includes:

[0087] Based on the layout of the film layer containing the pad, the film layer containing the pad is formed using a digital exposure machine or a direct writing exposure machine.

[0088] According to one embodiment of this disclosure, the method for manufacturing the display panel further includes:

[0089] The angle information of the light-emitting diode is detected to determine the angle information of the pad that is electrically connected to the electrode of the light-emitting diode;

[0090] Based on the position and angle information of each of the gaskets, at least the layout of the film layer in which the gaskets are located is generated.

[0091] According to one embodiment of this disclosure, the method for manufacturing the display panel further includes:

[0092] Based on the location information of each of the gaskets, generate a layout of at least a portion of the driving metal layer and / or generate a layout of at least a portion of the insulating layer;

[0093] The driving metal layer is formed according to the layout of the driving metal layer; and / or, the insulating layer is formed according to the layout of the insulating layer.

[0094] According to one embodiment of the present disclosure, the light-emitting diode has a first electrode and a second electrode disposed opposite to each other;

[0095] Transferring a light-emitting diode onto a substrate includes:

[0096] The light-emitting diode is transferred onto a temporary substrate, such that the second electrode of the light-emitting diode is connected to the temporary substrate;

[0097] Detecting the position and angle information of each of the light-emitting diodes includes;

[0098] Detect the position and angle information of each light-emitting diode on the temporary substrate;

[0099] Determining the position and angle information of the pad electrically connected to the electrodes of the LED based on the position and angle information of the LED includes:

[0100] Based on the position and angle information of the light-emitting diodes, the position and angle information of the pads on the driving substrate are determined, and each pad on the driving substrate corresponds one-to-one with each light-emitting diode on the temporary substrate.

[0101] Based on the position and angle information of each of the gaskets, at least the following is generated: [The following is a description of the film layer containing the gaskets].

[0102] Based on the position and angle information of the pads on the driving substrate, a layout of the pad layer of the driving substrate is generated, wherein the pad layer has pads and driving traces electrically connected to the pads;

[0103] Forming the film layer containing the pad according to the layout of the film layer containing the pad, and electrically connecting the pad to the electrode of the light-emitting diode, includes:

[0104] Based on the layout of the pad layer of the driving substrate, the pad layer of the driving substrate is formed using a digital exposure machine or a direct writing exposure machine.

[0105] This causes the first electrode of the pad connected to the temporary substrate to bond with the corresponding pad on the driving substrate;

[0106] Remove the temporary substrate to expose the second electrode of the light-emitting diode;

[0107] A common electrode layer is formed on the side of the light-emitting diode away from the driving substrate, and the common electrode layer is electrically connected to the second electrode of the light-emitting diode.

[0108] According to one embodiment of the present disclosure, the light-emitting diode has a first electrode and a second electrode disposed opposite to each other; the light-emitting diodes are arranged in a plurality of light-emitting diode rows and a plurality of light-emitting diode columns; the light-emitting diode rows include a plurality of light-emitting diodes arranged sequentially along the row direction, and the light-emitting diode columns include a plurality of light-emitting diodes arranged sequentially along the column direction;

[0109] Transferring a light-emitting diode onto a substrate includes:

[0110] The light-emitting diode is transferred onto a temporary substrate, such that the second electrode of the light-emitting diode is connected to the temporary substrate;

[0111] Detecting the position and angle information of each of the aforementioned light-emitting diodes includes:

[0112] Detect the position and angle information of each light-emitting diode on the temporary substrate;

[0113] Determining the position and angle information of the pad electrically connected to the electrodes of the LED based on the position and angle information of the LED includes:

[0114] Based on the position and angle information of the light-emitting diodes, the position and angle information of the first pad on the driving substrate and the position and angle information of the second pad on the opposing substrate are determined; each first pad on the driving substrate corresponds one-to-one with the first electrode of each light-emitting diode on the temporary substrate; each second pad on the opposing substrate corresponds one-to-one with the second electrode of each light-emitting diode on the temporary substrate.

[0115] Based on the position and angle information of each of the gaskets, at least the following is generated: [The following is a description of the film layer containing the gaskets].

[0116] Based on the position and angle information of the first pad on the driving substrate, a layout of the first pad layer of the driving substrate is generated. The first pad layer has column driving lines corresponding to each column of light-emitting diodes and first pads corresponding to each light-emitting diode. The first pads corresponding to each light-emitting diode in the column of light-emitting diodes are electrically connected to the column driving lines corresponding to the column of light-emitting diodes.

[0117] Based on the position and angle information of the second pad on the opposing substrate, a layout of the second pad layer of the opposing substrate is generated. The second pad layer has row driving lines corresponding to each row of light-emitting diodes and second pads corresponding to each light-emitting diode. The second pads corresponding to each light-emitting diode in the row of light-emitting diodes are electrically connected to the row driving lines corresponding to the row of light-emitting diodes.

[0118] Forming the film layer containing the pad according to the layout of the film layer containing the pad, and electrically connecting the pad to the electrode of the light-emitting diode, includes:

[0119] Based on the layout of the first pad layer of the driving substrate, the first pad layer of the driving substrate is formed using a digital exposure machine or a direct writing exposure machine.

[0120] Based on the layout of the second pad layer of the opposing substrate, the second pad layer of the opposing substrate is formed using a digital exposure machine or a direct writing exposure machine;

[0121] This causes the first electrode of the pad connected to the temporary substrate to bond with the corresponding first pad on the driving substrate;

[0122] Remove the temporary substrate to expose the second electrode of the light-emitting diode;

[0123] This causes the second electrode of the light-emitting diode connected to the driving substrate to bond with the corresponding second pad on the opposing substrate.

[0124] According to one embodiment of the present disclosure, the light-emitting diode has a first electrode and a second electrode disposed opposite to each other;

[0125] Transferring a light-emitting diode onto a substrate includes:

[0126] The light-emitting diode is transferred onto a temporary substrate, such that the second electrode of the light-emitting diode is connected to the temporary substrate;

[0127] Detecting the position and angle information of each of the aforementioned light-emitting diodes includes:

[0128] Detect the position and angle information of each light-emitting diode on the temporary substrate;

[0129] Determining the position and angle information of the pad electrically connected to the electrodes of the LED based on the position and angle information of the LED includes:

[0130] Based on the position and angle information of the light-emitting diodes, the position and angle information of the pads on the driving substrate are determined, and each pad on the driving substrate corresponds one-to-one with the first electrode of each light-emitting diode on the temporary substrate.

[0131] Based on the position and angle information of each of the gaskets, at least the following is generated: [The following is a description of the film layer containing the gaskets].

[0132] Based on the position and angle information of the pads on the driving substrate, a layout of the pad layer of the driving substrate is generated; the driving substrate is provided with the pads, a pixel driving circuit for driving the light-emitting diode, and multiple driving traces electrically connected to the pixel driving circuit; the output terminal of the pixel driving circuit is electrically connected to the pads.

[0133] Forming the film layer containing the pad according to the layout of the film layer containing the pad, and electrically connecting the pad to the electrode of the light-emitting diode, includes:

[0134] Based on the layout of the pad layer of the driving substrate, the pad layer of the driving substrate is formed using a digital exposure machine or a direct writing exposure machine.

[0135] This causes the first electrode of the pad connected to the temporary substrate to bond with the corresponding pad on the driving substrate;

[0136] Remove the temporary substrate to expose the second electrode of the light-emitting diode;

[0137] A common electrode layer is formed on the side of the light-emitting diode away from the driving substrate, and the common electrode layer is electrically connected to the second electrode of the light-emitting diode.

[0138] According to one embodiment of the present disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer, and a pad layer stacked sequentially; the pixel driving circuit and driving traces are disposed on the driving layer, and the pad layer has the pads; the insulating layer has at least a portion of the output terminal of the pixel driving circuit and vias corresponding to the pads, and the pads are electrically connected to the output terminal of the pixel driving circuit through the corresponding vias;

[0139] The method for manufacturing the display panel further includes:

[0140] Based on the position and angle information of the light-emitting diode, the position of each via in the insulating layer of the driving substrate is determined;

[0141] The layout of the insulating layer of the driving substrate is generated based on the position of each via on the insulating layer of the driving substrate.

[0142] Before forming the pad layer of the driving substrate, the insulating layer of the driving substrate is formed using a digital exposure machine or a direct-write exposure machine according to the layout of the insulating layer of the driving substrate.

[0143] According to one embodiment of this disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer, and a pad layer stacked sequentially; the pixel driving circuit and driving traces are disposed on the driving layer; the pad layer has pads and adapter lines corresponding to the pads; the insulating layer has at least a portion of the area exposing the output terminal of the pixel driving circuit and vias corresponding to the pads; one end of the adapter line is electrically connected to the corresponding pad, and the other end is electrically connected to the output terminal of the pixel driving circuit through the vias corresponding to the pads;

[0144] The method for manufacturing the display panel further includes:

[0145] Based on the position and angle information of each of the gaskets, and based on the position of the vias of the drive substrate, a layout of the gasket layer of the drive substrate is generated. The layout of the gasket layer of the drive substrate includes the layout of the gaskets and the layout of the adapter lines.

[0146] According to one embodiment of the present disclosure, the light-emitting diode has an electrode side and a light-emitting side disposed opposite to each other; the electrode side has a first electrode and a second electrode; the driving substrate has a pad layer, the pad layer is provided with a first pad connected to the first electrode of each light-emitting diode and a second pad connected to the second electrode of each light-emitting diode.

[0147] Transferring a light-emitting diode onto a substrate includes:

[0148] The light-emitting diode is transferred onto a temporary substrate, such that the light-emitting side of the light-emitting diode is connected to the temporary substrate;

[0149] Detecting the position and angle information of each of the aforementioned light-emitting diodes includes:

[0150] Detect the position and angle information of each light-emitting diode on the temporary substrate;

[0151] Determining the position and angle information of the pad electrically connected to the electrodes of the LED based on the position and angle information of the LED includes:

[0152] Based on the position and angle information of the light-emitting diode, the position and angle information of each first pad on the driving substrate are determined, and the position and angle information of each second pad on the driving substrate are also determined.

[0153] Based on the position and angle information of each of the gaskets, at least the following is generated: [The following is a description of the film layer containing the gaskets].

[0154] The layout of the pad layer of the driving substrate is generated based on the position and angle information of the first pad and the position and angle information of the second pad on the driving substrate.

[0155] Forming the film layer containing the pad according to the layout of the film layer containing the pad, and electrically connecting the pad to the electrode of the light-emitting diode, includes:

[0156] Based on the layout of the pad layer of the driving substrate, the pad layer of the driving substrate is formed using a digital exposure machine or a direct writing exposure machine.

[0157] The first electrode of the pad connected to the temporary substrate is bonded to the corresponding first pad on the driving substrate, and the second electrode of the pad connected to the temporary substrate is bonded to the corresponding second pad on the driving substrate.

[0158] Remove the temporary substrate.

[0159] According to one embodiment of the present disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer and a pad layer stacked sequentially.

[0160] The pixel driving circuit and driving traces are disposed on the driving layer. The insulating layer has at least a portion of the area exposing the output terminal of the pixel driving circuit and a first via corresponding to the first pad. The first pad is electrically connected to the output terminal of the pixel driving circuit through the corresponding first via. At least one of the driving layer and the pad layer is provided with a power trace, which is electrically connected to the second pad.

[0161] The method for manufacturing the display panel further includes:

[0162] Based on the position and angle information of the light-emitting diode, the positions of each first via in the insulating layer of the driving substrate are determined;

[0163] The layout of the insulating layer of the driving substrate is generated based on the position of each first via on the insulating layer of the driving substrate.

[0164] Before forming the pad layer of the driving substrate, the insulating layer of the driving substrate is formed using a digital exposure machine or a direct-write exposure machine according to the layout of the insulating layer of the driving substrate.

[0165] According to one embodiment of the present disclosure, the driving substrate includes a substrate, a driving layer, an insulating layer and a pad layer stacked sequentially.

[0166] The pixel driving circuit and driving traces are disposed on the driving layer. The insulating layer has at least a portion of the area exposing the output terminal of the pixel driving circuit and a first via corresponding to the first pad. The first pad is electrically connected to the output terminal of the pixel driving circuit through the corresponding first via. At least one of the driving layer and the pad layer is provided with a power trace, which is electrically connected to the second pad.

[0167] The method for manufacturing the display panel further includes:

[0168] Based on the position and angle information of each of the first pads, and based on the position of the first via of the drive substrate, a layout of the pad layer of the drive substrate is generated, wherein the layout of the pad layer of the drive substrate includes the layout of the first adapter line.

[0169] According to one embodiment of this disclosure, the display panel includes a substrate, a driving layer, a light-emitting diode layer, an insulating layer, and a pad layer stacked sequentially; the driving layer has a first conductive structure and a second conductive structure; the light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode and a second electrode on a side away from the substrate; the insulating layer has a first via exposing the first electrode, a second via exposing the second electrode, a third via exposing the first conductive structure, and a fourth via exposing the second conductive structure; the pad layer has a first pad and a second pad corresponding to a sub-pixel area; the first pad is electrically connected to the first electrode through the first via and to the first conductive structure through the third via; the second pad is electrically connected to the second electrode through the second via and to the second conductive structure through the fourth via.

[0170] Transferring a light-emitting diode onto a substrate includes:

[0171] The light-emitting diode is transferred onto a driving substrate; the driving substrate has a substrate and a driving layer stacked together, the driving layer having a first conductive structure and a second conductive structure; the light-emitting diode is located on the side of the driving layer away from the substrate; the first electrode and the second electrode are located on the side of the light-emitting diode away from the substrate;

[0172] Detecting the position and angle information of each of the aforementioned light-emitting diodes includes:

[0173] Detect the position and angle information of each light-emitting diode on the driving substrate;

[0174] Determining the position and angle information of the pad electrically connected to the electrodes of the LED based on the position and angle information of the LED includes:

[0175] Based on the position and angle information of the light-emitting diodes, determine the position and angle information of each first pad and second pad;

[0176] Based on the position and angle information of each of the gaskets, at least the following is generated: [The following is a description of the film layer containing the gaskets].

[0177] The layout of the pad layer is determined based on the position and angle information of the first and second pads;

[0178] The method for manufacturing the display panel further includes:

[0179] Based on the position and angle information of the light-emitting diode and the position information of the first conductive structure and the second conductive structure, the position information of the first via, the third via, the second via and the fourth via of the insulating layer are determined;

[0180] The layout of the insulating layer is determined based on the location information of the first, third, second, and fourth vias in the insulating layer.

[0181] An insulating material layer is formed covering the driving layer and the light-emitting diode;

[0182] Based on the layout of the insulating layer, the insulating material layer is patterned using a digital exposure machine or a direct writing exposure machine to form the first via, the third via, the second via, and the fourth via.

[0183] Forming the film layer containing the pad according to the layout of the film layer containing the pad, and electrically connecting the pad to the electrode of the light-emitting diode, includes:

[0184] Based on the layout of the padding layer, the padding layer of the driving substrate is formed on the side of the insulating layer away from the substrate using a digital exposure machine or a direct-write exposure machine.

[0185] According to one embodiment of this disclosure, the display panel includes a cover plate, a light-emitting diode layer, an insulating layer, and a driving substrate stacked sequentially; the light-emitting diode layer is provided with light-emitting diodes, and the light-emitting diodes have a first electrode and a second electrode facing the driving substrate; the insulating layer has a first via exposing the first electrode and a second via exposing the second electrode; the driving substrate has a first pad and a second pad located in the sub-pixel region, the first pad being electrically connected to the first electrode through the first via, and the second pad being electrically connected to the second electrode through the second via; at least a portion of the first pad is recessed in the first via, and at least a portion of the second pad is recessed in the second via;

[0186] Transferring a light-emitting diode onto a substrate includes:

[0187] The light-emitting diode is transferred to the cover plate such that the first electrode and the second electrode of the light-emitting diode are located on the side away from the cover plate;

[0188] Detecting the position and angle information of each of the aforementioned light-emitting diodes includes:

[0189] Detect the position and angle information of each light-emitting diode on the cover plate;

[0190] Determining the position and angle information of the pad electrically connected to the electrodes of the LED based on the position and angle information of the LED includes:

[0191] Based on the position and angle information of the light-emitting diodes, the position and angle information of each first pad on the pad layer are determined, as well as the position and angle information of each second pad on the pad layer are determined.

[0192] Based on the position and angle information of each of the gaskets, at least the following is generated: [The following is a description of the film layer containing the gaskets].

[0193] The layout of the padding layer is generated based on the position and angle information of the first padding and the position and angle information of the second padding.

[0194] The method for manufacturing the display panel further includes:

[0195] Based on the position and angle information of the light-emitting diode, determine the position information of the first via and the second via;

[0196] The layout of the insulating layer is determined based on the location information of the first and second vias in the insulating layer.

[0197] An insulating material layer is formed covering the cover plate and the light-emitting diode;

[0198] Based on the layout of the insulating layer, the insulating material layer is patterned using a digital exposure machine or a direct writing exposure machine to form the first via and the second via;

[0199] Forming the film layer containing the pad according to the layout of the film layer containing the pad, and electrically connecting the pad to the electrode of the light-emitting diode, includes:

[0200] Based on the layout of the padding layer, the padding layer of the driving substrate is formed on the side of the insulating layer away from the substrate using a digital exposure machine or a direct-write exposure machine.

[0201] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0202] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0203] Figure 1 is a schematic diagram of the structure of a light-emitting diode obtained by cutting from a wafer in one embodiment of the present disclosure.

[0204] Figure 2 is a schematic diagram of the structure in the related technology where a mass transfer process is used to transfer a light-emitting diode onto a first substrate.

[0205] Figure 3 is a schematic diagram of the distribution of pads on the second substrate in the related technology.

[0206] Figure 4 is a schematic diagram of the planar structure after the electrodes of the light-emitting diode on the first substrate and the pads on the second substrate are bonded together in the related technology.

[0207] Figure 5 is a cross-sectional view of the structure after the electrodes of the light-emitting diode on the first substrate and the pads on the second substrate are bonded together in the related technology.

[0208] Figure 6 is a schematic flowchart of a method for preparing a display panel according to one embodiment of this disclosure.

[0209] Figure 7 is a schematic diagram of a structure in which a light-emitting diode is transferred onto a substrate using a mass transfer process in one embodiment of this disclosure.

[0210] Figure 8 is a schematic diagram of the layout of each pad determined according to the position and angle information of the light-emitting diodes on the substrate in one embodiment of the present disclosure.

[0211] Figure 9 is a schematic diagram of the planar structure after the pad and the light-emitting diode are combined in one embodiment of this disclosure.

[0212] Figure 10 is a cross-sectional view of the structure after the pad and the light-emitting diode are combined in one embodiment of the present disclosure.

[0213] Figure 11 is a cross-sectional view of the display panel in one embodiment of this disclosure.

[0214] Figure 12 is a cross-sectional view of the display panel in another embodiment of this disclosure.

[0215] Figure 13 is a cross-sectional view of the display panel in another embodiment of this disclosure.

[0216] Figure 14 is a schematic diagram of the planar structure of the display panel in another embodiment of this disclosure.

[0217] Figure 15 is a schematic diagram of the structure of the sub-pixel region and the light-emitting diode in the sub-pixel region in another embodiment of the present disclosure.

[0218] Figure 16 is a schematic diagram of the structure of the sub-pixel region, the light-emitting diode in the sub-pixel region, and the pad in the sub-pixel region in another embodiment of the present disclosure.

[0219] Figure 17 is a partial structural diagram of the display panel in another embodiment of this disclosure.

[0220] Figure 18 is a partial structural diagram of the display panel in another embodiment of this disclosure.

[0221] Figure 19 is a cross-sectional view of an example of a first-type embodiment of the present disclosure, showing the transfer of a light-emitting diode onto a temporary substrate.

[0222] Figure 20 is a top view of an example of a first-type embodiment of the present disclosure, showing the structure in which a light-emitting diode is transferred onto a temporary substrate.

[0223] Figure 21 is a top view of the driving substrate in one example of a first type of embodiment of this disclosure.

[0224] Figure 22 is a schematic diagram of a structure in which a light-emitting diode on a temporary substrate is bonded to a pad on a driving substrate, according to an example of a first-type embodiment of the present disclosure.

[0225] Figure 23 is a cross-sectional view of the temporary substrate removed in one example of a first-type embodiment of the present disclosure.

[0226] Figure 24 is a cross-sectional view of the filling layer in an example of a first-type embodiment of the present disclosure.

[0227] Figure 25 is a cross-sectional view of a common electrode layer in an example of a first-type embodiment of the present disclosure.

[0228] Figure 26 is a top view of the driving substrate in another example of the first type of embodiment of this disclosure.

[0229] Figure 27 is a top view of an example of a second type of embodiment of the present disclosure, showing the structure in which the light-emitting diode is transferred onto a temporary substrate.

[0230] Figure 28 is a top view of the driving substrate in one example of a second type of embodiment of this disclosure.

[0231] Figure 29 is a top view of the opposing substrate in one example of a second type of embodiment of this disclosure.

[0232] Figure 30 is a cross-sectional view of an example of a second type of embodiment of the present disclosure, in which a light-emitting diode on a temporary substrate is bonded to a first pad on a driving substrate.

[0233] Figure 31 is a cross-sectional view of the temporary substrate removed in an example of a second type of embodiment of this disclosure.

[0234] Figure 32 is a cross-sectional view of an example of a second type of embodiment of the present disclosure, in which a light-emitting diode on a driving substrate is bonded to a second pad on a counter substrate.

[0235] Figure 33 is a top view of the driving substrate in one example of a third type of embodiment of this disclosure.

[0236] Figure 34 is a cross-sectional view of the driving substrate in one example of a third type of embodiment of this disclosure.

[0237] Figure 35 is a partial structural schematic diagram of the driving substrate in one example of a third type of embodiment of this disclosure.

[0238] Figure 36 is a partial structural schematic diagram of the driving substrate in another example of the third type of embodiment of this disclosure.

[0239] Figure 37 is a top view of an example of a fourth type of embodiment of this disclosure, showing the structure in which the light-emitting diode is transferred onto a temporary substrate.

[0240] Figure 38 is a top view of the driving substrate in one example of a fourth type of embodiment of this disclosure.

[0241] Figure 39 is a partial cross-sectional view of the driving substrate in one example of a fourth type of embodiment of this disclosure.

[0242] Figure 40 is a partial cross-sectional view of the driving substrate in another example of the fourth type of embodiment of this disclosure.

[0243] Figure 41 is a top view of the driving substrate in another example of the fourth type of embodiment of this disclosure.

[0244] Figure 42 is a cross-sectional view of the driving substrate in one example of a fifth type of embodiment of this disclosure.

[0245] Figure 43 is a cross-sectional view of an example of a fifth type of embodiment of this disclosure, showing the transfer of a light-emitting diode onto a driving substrate.

[0246] Figure 44 is a cross-sectional view of an example of a fifth type of embodiment of this disclosure, showing the formation of an insulating material layer covering a light-emitting diode.

[0247] Figure 45 is a schematic cross-sectional view of a patterned insulating material layer in one example of a fifth type of embodiment of this disclosure.

[0248] Figure 46 is a cross-sectional view of the liner layer in one example of a fifth type of embodiment of this disclosure.

[0249] Figure 47 is a top view of the driving substrate in one example of a fifth type of embodiment of this disclosure.

[0250] Figure 48 is a top view of an example of a fifth type of embodiment of this disclosure, showing the structure in which the light-emitting diode is transferred onto the driving substrate.

[0251] Figure 49 is a schematic diagram showing the location of vias formed on the insulating layer in one example of a fifth type of embodiment of this disclosure.

[0252] Figure 50 is a top view of a pad layer formed on a driving substrate in one example of a fifth type of embodiment of this disclosure.

[0253] Figure 51 is a top view of the arrangement of the pads, drive lines and light-emitting diodes in a display panel, according to an example of a fifth type of embodiment of this disclosure.

[0254] Figure 52 is a top view of the driving substrate in another example of the fifth type of embodiment of this disclosure.

[0255] Figure 53 is a top view of another example of the fifth type of embodiment of this disclosure, showing the structure in which the light-emitting diode is transferred onto the driving substrate.

[0256] Figure 54 is a schematic diagram showing the location of vias formed on the insulating layer in another example of the fifth type of embodiment of this disclosure.

[0257] Figure 55 is a top view of a pad layer formed on a driving substrate in another example of the fifth type of embodiment of this disclosure.

[0258] Figure 56 is a top view of the arrangement of the pads, drive lines and light-emitting diodes in the display panel in another example of the fifth type of implementation of this disclosure.

[0259] Figure 57 is a cross-sectional view of an example of a sixth type of embodiment of this disclosure, showing the transfer of a light-emitting diode onto a cover plate substrate.

[0260] Figure 58 is a top view of an example of a sixth type of embodiment of this disclosure, showing the structure in which the light-emitting diode is transferred onto the cover plate substrate.

[0261] Figure 59 is a cross-sectional view of an example of a sixth type of embodiment of this disclosure, showing the formation of an insulating material layer covering a light-emitting diode.

[0262] Figure 60 is a schematic diagram showing the location of vias formed on the insulating layer in one example of a sixth type of embodiment of this disclosure.

[0263] Figure 61 is a schematic cross-sectional view of a patterned insulating material layer in one example of a sixth type of embodiment of this disclosure.

[0264] Figure 62 is a schematic diagram of the layout of the padding layer in one example of a sixth type of embodiment of this disclosure.

[0265] Figure 63 is a cross-sectional view of the liner layer in one example of a sixth embodiment of this disclosure.

[0266] Figure 64 is a top view of a structure forming a liner layer in one example of a sixth type of embodiment of this disclosure.

[0267] Figure 65 is a top view of the arrangement of the pads, drive lines and light-emitting diodes in a display panel, according to an example of a sixth type of embodiment of this disclosure. Detailed Implementation

[0268] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore detailed descriptions of them will be omitted. Furthermore, the drawings are merely illustrative of this disclosure and are not necessarily drawn to scale.

[0269] Although relative terms such as "up" and "down" are used in this specification to describe the relative relationship of one component of an icon to another, these terms are used only for convenience, such as according to the orientation of the examples shown in the accompanying drawings. It is understood that if the device of the icon is flipped upside down, the component described as "up" will become the component described as "down." When a structure is "up" of another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" mounted on the other structure, or that the structure is "indirectly" mounted on the other structure through another structure.

[0270] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first,” “second,” and “third,” etc., are used only as markers and are not a limitation on the number of objects.

[0271] Light-emitting diodes (LEDs) can only be fabricated on semiconductor substrates, such as sapphire, gallium nitride, and silicon nitride substrates. Regardless of the substrate type, LEDs require some degree of transfer during the manufacturing process. For a typical display panel, this often involves the transfer of millions or even more micro-devices. Therefore, mass transfer technology is essential for manufacturing LED display panels. However, due to limitations in yield, mass transfer precision, efficiency, and cost, there is currently no mass-producible mass transfer solution.

[0272] Figures 1 to 5 are schematic diagrams illustrating the process of fabricating a display panel PNL using mass transfer technology in a related art. Referring to Figure 1, light-emitting diodes (LEDs) can be fabricated on a wafer BPX. Referring to Figure 2, the LEDs on the wafer BPX need to be transferred to a first substrate BP01 using a mass transfer process, with at least one electrode of the LED located on the side of the LED away from the first substrate BP01. Referring to Figures 4 and 5, the first substrate BP01 with the LEDs is then aligned and connected to a pre-fabricated second substrate BP02 (see Figure 3); the surface of the second substrate BP02 has pads (PADs) corresponding one-to-one with the electrodes of the LEDs; during this alignment and connection process, the electrodes of the LEDs are bonded to the corresponding pads (PADs).

[0273] In this related technology, the position of each pad is determined according to the design position and angle of the light-emitting diode (LED). When the LED is transferred to the first substrate BP01 and is exactly in the design position and at the design angle, the electrode of the LED can be perfectly aligned with the corresponding pad. However, if there is a positional or angular deviation when the LED is attached to the first substrate BP01, the electrode of the LED will be misaligned with the corresponding pad.

[0274] As shown in Figure 2, the third LED in the third row deviates from its designed position after mass transfer. However, the corresponding pad PAD is still arranged according to the designed position (see Figure 3). When the first substrate BP01 and the second substrate BP02 are combined, the electrode of the third LED in the third row cannot be bonded to the corresponding pad PAD, which causes the LED to be unable to be connected to the electrical circuit through the pad PAD and thus cannot emit light.

[0275] This disclosure discloses a method for preparing a display panel PNL, as shown in Figure 6. The preparation method includes:

[0276] Step S110, see 7, transfer the light-emitting diode (LED) onto the substrate BP; specifically, the process of transferring the LED onto the substrate BP can be a mass transfer process;

[0277] Step S120: Detect the position information of each of the light-emitting diodes (LEDs);

[0278] Step S130, referring to Figure 8, determine the position information of the pad PAD that is electrically connected to the electrode of the LED based on the position information of the LED;

[0279] Step S140: Based on the position information of each of the pads PADs, generate at least the layout of the film layer where the pads PADs are located;

[0280] Step S150, referring to Figures 9 and 10, the film layer containing the pad PAD is formed according to the layout of the film layer containing the pad PAD, and the pad PAD is electrically connected to the electrode of the light-emitting diode LED.

[0281] In this embodiment, after the light-emitting diodes (LEDs) are transferred onto the substrate using a mass transfer process, as shown in FIG. 7, deviations generated by the mass transfer process can cause some LEDs to be out of position. In this embodiment, the position information of each LED can be detected, and the position information of the pads electrically connected to the electrodes of each LED can be determined based on the LED position information. By fabricating the pads according to the determined pad position information, this embodiment ensures that the pads and the electrodes of the LEDs are not misaligned due to LED positional offsets, thus avoiding defects caused by inaccurate LED positions during the mass transfer process and significantly improving the yield of the display panel PNL. In other words, this embodiment allows the pad position to shift with the LED offset (see FIG. 9), thereby avoiding connection defects caused by LED positional offsets during the mass transfer process, reducing the precision and accuracy requirements of the mass transfer process, and enabling better mass production capabilities.

[0282] Optionally, the mass transfer process can use one of the following technologies: van der Waals force transfer, electrostatic force transfer, magnetic force transfer, laser transfer, fluid self-assembly, roll-to-roll transfer.

[0283] In one example, when using laser transfer technology for mass transfer, a laser close-packing process can be used to screen LEDs during the laser transfer process, eliminating unqualified LEDs and thus improving the uniformity of LEDs on the display panel.

[0284] In a further embodiment of this disclosure, in step S120, the angle information of the light-emitting diode (LED) can also be detected; then, the angle information of the pad PAD electrically connected to the electrode of the LED is determined based on the angle information of the LED. In step S140, at least the layout of the film layer where the pad PAD is located can be generated based on the position and angle information of each pad PAD (see Figure 8). Thus, this further embodiment can detect the deflection of the LED and make the pad PAD electrically connected to the LED deflect along with the deflection of the LED, thereby ensuring that the LED and the pad PAD will not have poor electrical connection due to mismatched setting angles, and in particular, it can maintain the optimal connection state between the LED and the pad PAD; this further reduces the precision and accuracy requirements of the mass transfer process, making the mass transfer process have better mass production capabilities.

[0285] In one example, the generated layout is a GDS layout.

[0286] In one embodiment of this disclosure, when forming the film layer containing the pad PADs according to the pattern of the film layer containing the pad PADs, a digital exposure machine or a direct-write exposure machine can be used to form the film layer containing the pad PADs, especially a digital exposure machine. For example, a display panel PNL has a pad layer PADL (see FIG8) which has pad PADs for electrical connection with light-emitting diodes (LEDs). The pad layer PADL can be fabricated using a digital exposure machine or a direct-write exposure machine, especially for defining the pattern of the pad layer PADL. For example, the pad layer PADL can be fabricated using a photolithography process, in which exposure is performed using a digital exposure machine or a direct-write exposure machine.

[0287] In one example, a full-surface pad material layer can be formed first, for example, by a deposition process; then a photoresist layer covering the pad material layer is formed; the photoresist is then exposed using a digital exposure machine or a direct-write exposure machine, thereby transferring the pattern of the pad layer PADL to the photoresist layer; after development, etching is performed to pattern the pad material layer and obtain the pad layer PADL; and finally, residual photoresist is removed.

[0288] In one embodiment of this disclosure, the light-emitting diode (LED) is a micro LED, the size of which may not exceed 500 micrometers × 500 micrometers, and particularly may not exceed 200 micrometers × 200 micrometers. In one example, the size of the LED is not greater than 80 micrometers × 80 micrometers.

[0289] In this embodiment of the disclosure, referring to Figures 11-13, the light-emitting diode (LED) has a first electrode PE1 and a second electrode PE2, one of which serves as the anode and the other as the cathode. Correspondingly, the pads (PADs) electrically connected to the LEDs include a first pad PAD1 electrically connected to the first electrode PE1 and a second pad PAD2 electrically connected to the second electrode PE2. It is understood that in some cases, the display panel PNL may use other conductive structures instead of the first pad PAD1 or the second pad PAD2, allowing the display panel PNL to include only the first pad PAD1 or the second pad PAD2. For example, in the display panel PNL exemplified in Figure 11, the display panel PNL has a first pad PAD1 corresponding to each LED and a common electrode layer COML; the first electrode PE1 of each LED is electrically connected to the corresponding first pad PAD1, and the second electrode PE2 of each LED is electrically connected to the common electrode layer COML.

[0290] In this embodiment of the disclosure, depending on the location of the pad PAD, the display panel PNL may have only one pad PADL or multiple pad PADLs (e.g., two pad PADLs).

[0291] In one example, referring to Figure 13, the light-emitting diode (LED) is a flip-chip LED, where the first electrode PE1 and the second electrode PE2 are located on the same side of the LED's light-emitting layer. In other words, the flip-chip LED has a light-emitting side and an electrode side that are oppositely disposed, with both the first electrode PE1 and the second electrode PE2 located on the electrode side of the LED. The display panel PNL may have only one pad layer PADL, which has a first pad PAD1 and a second pad PAD2. The first pad PAD1 is electrically connected to the first electrode PE1, and the second pad PAD2 is electrically connected to the second electrode PE2.

[0292] It is understood that the exemplary solutions in this disclosure that can be applied to flip-chip LEDs can also be applied to conventional LEDs with appropriate modifications.

[0293] In another example, referring to Figure 11, the light-emitting diode (LED) is a vertical LED, with its first electrode PE1 and second electrode PE2 located on opposite sides of the LED's light-emitting layer. The display panel PNL may have only one pad layer PADL, which has a first pad PAD1 corresponding to the first electrode PE1, and the first electrode PE1 is electrically connected to the first pad PAD1. The display panel PNL is provided with a common electrode layer COML, and the second electrode PE2 of each LED is electrically connected to the common electrode layer COML.

[0294] In another example, referring to Figure 12, the light-emitting diode (LED) is a vertical LED, with the first electrode PE1 and the second electrode PE2 located on opposite sides of the LED's light-emitting layer. The display panel PNL can have two pad layers PADL, namely a first pad layer PADL1 and a second pad layer PADL2; the first pad layer PADL1 has a first pad PAD1 corresponding to the first electrode PE1, and the first electrode PE1 is electrically connected to the first pad PAD1; the second pad layer PADL2 has a second pad PAD2 corresponding to the second electrode PE2, and the second electrode PE2 is electrically connected to the second pad PAD2.

[0295] In this embodiment, the pad PAD can be disc-shaped (e.g., rectangular) or part of other conductive structures. When the pad PAD is part of other conductive structures of the display panel PNL, the portion of the conductive structure directly connected to the electrode of the light-emitting diode (LED) can be used as the pad PAD connected to the electrode of the LED. For example, when the display panel PNL has drive traces and the electrode of the LED directly overlaps with the drive traces, the portion of the drive traces that contacts the electrode of the LED can be used as the pad PAD electrically connected to the electrode of the LED.

[0296] In some embodiments of this disclosure, after obtaining the pads for electrical connection with the electrodes of the light-emitting diode (LED), a bonding method can be used to electrically connect the electrodes of the LED to the corresponding pads. Of course, other methods can also be used to achieve the electrical connection between the LED and the pads, such as reflow soldering. In other words, in this embodiment, a substrate having an LED and a substrate having a pad can be fabricated separately, and then the two substrates are mated, during which the electrodes of the LED are electrically connected to the corresponding pads.

[0297] In other embodiments of this disclosure, a pad layer PADL can be fabricated on the substrate after obtaining a substrate having a light-emitting diode (LED). For example, after fixing the light-emitting side of the LED to a substrate, two electrodes PE are exposed on the electrode side of the LED; then, a pad material layer is formed and patterned on the side of the LED away from the substrate, such that the patterned first pad PAD1 and second pad PAD2 are electrically connected to the first electrode PE1 and the second electrode PE2, respectively. Further, after obtaining the substrate having the LED, an insulating material layer can be used to cover the exposed surface of the LED, and then the insulating material layer can be patterned (forming an insulating layer) to expose the first electrode PE1 and the second electrode PE2 of the LED; then, a pad material layer is formed and patterned on the surface of the insulating layer.

[0298] In one embodiment of this disclosure, the method for preparing the display panel PNL further includes:

[0299] Based on the position information of each of the aforementioned pads (PADs), a layout of at least a portion of the driving metal layer (referred to as the associated driving metal layer in this example) is generated; the driving metal layer is then formed based on the layout of the driving metal layer. Specifically, when at least a portion of the driving metal layer needs to adjust the position of a portion of its structure to follow the offset / rotation of the light-emitting diode (LED), or when it needs to adjust the position of a portion of its structure to follow the offset / rotation of the pad (PAD), the layout of the associated driving metal layer needs to be designed based on relevant information of the LED (at least one of position information and angle information) or relevant information of the pad (at least one of position information and angle information), and the associated driving metal layer is then fabricated based on the designed layout. It is understood that in some examples, the structure of the driving metal layer can be kept fixed rather than adjusted to follow the adjustment of the LED or pad (PAD) to improve the production capacity of the display panel PNL and reduce costs.

[0300] In one embodiment of this disclosure, the method for preparing the display panel PNL further includes:

[0301] Based on the position information of each of the pads (PADs), a layout of at least a portion of the insulating layer (referred to as the relevant insulating layer in this example) is generated; the relevant insulating layer is then formed based on the layout of the relevant insulating layer. Specifically, when the position of at least a portion of the vias on the at least a portion of the insulating layer needs to be adjusted to follow the offset / rotation of the LED, or when the position of at least a portion of the vias needs to be adjusted to follow the offset / rotation of the pads (PADs), the layout of the relevant insulating layer needs to be designed based on the relevant information of the LED (at least one of position information and angle information) or the relevant information of the pads (at least one of position information and angle information), and the relevant insulating layer is then fabricated based on the designed layout of the relevant insulating layer. It is understood that in some examples, the structure of the insulating layer can be kept fixed rather than adjusted to follow the adjustment of the LED or the pads (PADs) to improve the production capacity of the insulating layer and reduce costs.

[0302] In this embodiment of the disclosure, referring to FIG14, the display panel PNL may include an array of pixels PXP, each pixel PXP may have one or more light-emitting diodes (LEDs), and each LED may be displayed independently.

[0303] In one example, each pixel PXP has a light-emitting diode (LED), such as one of a red, green, or blue LED, or each pixel PXP is a white LED (e.g., the white LED emits light by passing blue light through phosphors and being converted into white light). Thus, the display panel PNL is a monochrome display panel.

[0304] In another example, a pixel PXP can include multiple light-emitting diodes (LEDs) of different colors. By mixing the light from these different LEDs, the pixel PXP can achieve color display, and the display panel PNL is a color display panel. Optionally, the individual LEDs within a pixel PXP can be of different colors. For example, a pixel PXP may include a first LED1, a second LED2, and a third LED3, and these LEDs may be of different colors. In one example, the first LED1 is a red LED; the second LED2 is a green LED; and the third LED3 is a blue LED. Of course, if necessary, a pixel PXP can also contain two or more LEDs of the same color, which can be controlled independently or synchronously.

[0305] In one example, the arrangement of LEDs of different colors within a pixel PXP can be the same, for example, arranged in a straight line along the row direction DH in the order of red LEDs, green LEDs, and blue LEDs. Of course, the arrangement order of LEDs of different colors within different pixel PXPs can also be different when needed. In this embodiment, when describing two LEDs as having the same position within their respective pixel PXPs, it refers to the sequential position of the LEDs within their respective pixel PXPs, for example, the first LED from left to right or the second LED from left to right.

[0306] In one example, the area of ​​each pixel PXP on the display panel is equal.

[0307] In one example, when a pixel PXP includes two or more light-emitting diodes of different colors, the sub-pixel areas corresponding to two light-emitting diodes of the same color located in different pixels PXP are the same.

[0308] In one example, when a pixel PXP comprises multiple sub-pixel areas, two sub-pixel areas located in different pixel PXPs but with the same relative position within the pixel PXP have the same area. As an example, a display panel PNL comprises an array of pixel PXPs, each pixel PXP arranged into multiple pixel rows (HPXPs) and multiple pixel columns (VPXPs); a pixel row (HPXP) comprises multiple pixel PXPs arranged sequentially along the row direction (DH), and a pixel column (VPXP) comprises multiple pixel PXPs arranged sequentially along the column direction (DV). Optionally, the same pixel PXP comprises multiple light-emitting diodes (LEDs) arranged sequentially along the row direction (DH), or comprises multiple light-emitting diodes (LEDs) arranged sequentially along the column direction (DV). When a pixel PXP comprises multiple LEDs arranged along the row direction (DH), LEDs at the same position in two pixel PXPs located in the same pixel column (VPXP) are located in the same LED column (VLED). When a pixel PXP comprises multiple LEDs arranged along the column direction (DV), LEDs at the same position in two pixel PXPs located in the same pixel row (HPXP) are located in the same LED row (HLED).

[0309] In one example, two sub-pixel regions located in the same sub-pixel region column have the same area.

[0310] In this embodiment, the display panel PNL may have an array of sub-pixel areas LA; ideally, each sub-pixel area LA corresponds one-to-one with each light-emitting diode (LED). In other words, without missing any LEDs, each LED is correspondingly located within its respective sub-pixel area LA. It is understood that when the LED positions are severely misaligned or other defects occur, the display panel PNL may be partially repaired or processed. This may result in some sub-pixel areas LA being missing LEDs or some LEDs extending beyond the boundaries of the sub-pixel areas LA.

[0311] In this embodiment of the disclosure, a film layer other than the light-emitting diode layer LEDL formed by the light-emitting diode LED can be used to define the sub-pixel region LA. The boundary of the defined sub-pixel region LA can be the edge of the structure of the relevant film layer, or a virtual edge defined according to the structure of the relevant film layer.

[0312] In one example, the design center of each sub-pixel region (LA) can be determined by utilizing the structure of other film layers besides the LEDL layer, such as the structure of each driving trace in the metal layer that sets the driving traces. Then, based on this design center, a rectangular region is determined as the design area of ​​that sub-pixel region (LA), and the edges of this rectangular region are taken as the edges of that sub-pixel region (LA). It is understandable that due to process variations during fabrication, there can be reasonable deviations between the design area and the actual area of ​​the sub-pixel region (LA).

[0313] Taking the display panel PNL illustrated in Figure 14 as an example, the display panel PNL is provided with column driving traces VSL that correspond one-to-one with each column of light-emitting diodes (VLEDs) and extend along the column direction DV. The column driving traces VSL are arranged sequentially along the row direction DH (especially, they can be arranged at equal intervals). The display panel PNL is also provided with row driving traces HSL that correspond one-to-one with each row of light-emitting diodes (HLEDs) and extend along the row direction DH. The row driving traces HSL are arranged sequentially along the column direction DV (especially, they can be arranged at equal intervals). In this example, a sub-pixel area LA can be defined by the column driving traces VSL and the row driving traces HSL. For example, the geometric center CP of the sub-pixel region LA can be located on the first row direction DH1 side of the column driving line VSL and the distance between it and the edge of the column driving line VSL (the distance between the orthographic projection of the geometric center CP of the sub-pixel region LA onto the display panel PNL on the plane and the distance between the edge of the column driving line VSL onto the display panel PNL on the plane) can be xA, and the geometric center CP of the sub-pixel region LA can be located on the first column direction DV1 side of the row driving line HSL and the distance between it and the edge of the row driving line HSL (the distance between the orthographic projection of the geometric center CP of the sub-pixel region LA onto the display panel PNL on the plane and the distance between the edge of the row driving line HSL onto the display panel PNL on the plane) can be yA. Referring to Figure 15, the sub-pixel region LA is rectangular, and has a first row edge LAH1 and a second row edge LAH2 that extend along the row direction DH and are positioned opposite each other. The second row edge LAH2 is located on the first column direction DV1 side of the first row edge LAH1. The sub-pixel region LA also has a first column edge LAV1 and a second column edge LAV2 that extend along the column direction DV and are positioned opposite each other. The second column edge LAV2 is located on the first row direction DH1 side of the first column edge LAV1. The first row edge LAH1 and the second row edge LAH2 have the same length and are both xB, and the first column edge LAV1 and the second column edge LAV2 have the same length and are both yB.

[0314] In this example, if xB / 2 equals xA, then the first column edge LAV1 is exactly flush with the edge of the corresponding column drive trace VSL (the edge on the first row direction DH1 side); if xB / 2 is greater than xA, then the first column edge LAV1 overlaps with the corresponding column drive trace VSL or extends beyond the column drive trace VSL in the opposite direction of the first row direction DH1; if xB / 2 is less than xA, then the first column edge LAV1 is located on the first row direction DH1 side of the column drive trace VSL. Similarly, in this example, if yB / 2 equals yA, then the first row edge LAH1 is exactly flush with the edge of the corresponding row drive trace HSL (the edge on the first column direction DV1 side); if yB / 2 is greater than yA, then the first row edge LAH1 overlaps with the corresponding row drive trace HSL or extends beyond the row drive trace HSL in the opposite direction of the first column direction DV1; if yB / 2 is less than yA, then the first row edge LAH1 is located on the first column direction DV1 side of the row drive trace HSL.

[0315] In one example, adjacent edges of two adjacent sub-pixel areas LA can be made to coincide. For instance, in two adjacent sub-pixel areas LA in the same row, the first column edge LAV1 of one sub-pixel area LA coincides with the second column edge LAV2 of the other sub-pixel area LA; in two adjacent sub-pixel areas LA in the same column, the first row edge LAH1 of one sub-pixel area LA coincides with the second row edge LAH2 of the other sub-pixel area LA. Thus, the display panel PNL includes an array of sub-pixel areas LA in the display area, with no gaps between the sub-pixel areas LA. Therefore, the row-direction spacing XPH and column-direction spacing XPV of the sub-pixels can be determined by detecting each driving trace SL on the display panel PNL. The dimensions of the first column edge LAV1 and the second column edge LAV2 of the sub-pixel area LA are the column-direction spacing XPV, and the dimensions of the first row edge LAH1 and the second row edge LAH2 of the sub-pixel area LA are the row-direction spacing XPH. In one example, the column-direction setting spacing (XPV) of the subpixels of the display panel PNL can be determined by detecting the spacing between two adjacent row drive traces (HSL) used to load the same signal; the row-direction setting spacing (XPH) of the subpixels of the display panel PNL can be determined by detecting the spacing between two adjacent column drive traces (VSL) used to load the same signal.

[0316] In one example, when pixel PXP includes Y1 adjacent sub-pixels in the same row, the pixel's spacing PH in the row direction is XPH * Y1, where Y1 is a positive integer. For instance, when pixel PXP includes only one sub-pixel, the pixel's spacing PH in the row direction is equal to the sub-pixel's spacing XPH in the row direction. As another example, when pixel PXP includes three adjacent sub-pixels in the same row, the pixel's spacing PH in the row direction is three times the sub-pixel's spacing XPH in the row direction.

[0317] In one example, when pixel PXP comprises Y2 adjacent sub-pixels in the same column, the pixel's column spacing PV is XPV * Y2, where Y2 is a positive integer. For instance, when pixel PXP comprises only one sub-pixel, the pixel's column spacing PV is equal to the sub-pixel's column spacing XPV. As another example, when pixel PXP comprises three adjacent sub-pixels in the same column, the pixel's column spacing PV is three times the sub-pixel's column spacing XPV.

[0318] In one example, the design center of each sub-pixel region (LA) can be determined statistically. For instance, the relative positions of LEDs in P×Q sub-pixel regions (LA) (P rows, Q columns, where P and Q are positive integers) can be detected. The relative positions of the LEDs in the sub-pixel regions LA include the row-wise relative distance of the LEDs (the distance between the feature position of the LED and the column drive trace VSL corresponding to the sub-pixel region LA) and the column-wise relative distance of the LEDs (the distance between the feature position of the LED and the row drive trace HSL corresponding to the sub-pixel region LA). Then, the relative positions of the LEDs in the P×Q sub-pixel regions LA are statistically analyzed. Specifically, the arithmetic mean of the row-direction relative distances of the LEDs in each sub-pixel region LA is calculated as distance xA (the distance between the geometric center CP of the sub-pixel region LA and the edge of the column driving line VSL, located on the first row direction DH1 side). The arithmetic mean of the column-direction relative distances of the LEDs in each sub-pixel region LA is calculated as distance yA (the distance between the geometric center CP of the sub-pixel region LA and the edge of the row driving line HSL, located on the first column direction DV1 side). Furthermore, both P and Q are greater than 10.

[0319] In this embodiment, the row direction and the column direction are two intersecting but non-parallel directions. The concepts of row direction and column direction are relative, and in some cases, the concepts of row direction and column direction can be interchanged.

[0320] In the example above, the geometric center CP of the sub-pixel region LA is used as the feature location of the sub-pixel. Based on this feature location, the extent of the sub-pixel region can be determined, or the relative positions of other structures (such as LEDs, pads, drive traces, etc.) to the sub-pixel region can be clarified. It is understood that the feature location of the sub-pixel LA is not limited to its geometric center CP; it can also be its apex corner, or a reference position inside or outside the LA. For example, the intersection point of the column drive trace VSL and the row drive trace HSL driving the LEDs within the LA (e.g., the intersection point of the edge of the column drive trace VSL on the first row direction DH1 side and the edge of the row drive trace HSL on the first column direction DV1 side) can be used as the feature location of the sub-pixel region LA. This intersection point can be within the sub-pixel region LA, within the sub-pixel region LA, or even precisely at one of the apex corners of the sub-pixel region LA. Regardless of whether the extent of the sub-pixel region LA can be definitively determined, the relative positions of other structures to the sub-pixel region LA can be clarified using this intersection point as a feature location. In other words, when determining the relative position between other structures and the sub-pixel region LA, such as determining the distance between other structures and a certain edge of the sub-pixel region, or determining the relative spatial position of a certain structure in the sub-pixel region, the relative position can be transformed into the relative position between the intersection point of the structure and the corresponding sub-pixel.

[0321] In this embodiment of the disclosure, during the fabrication stage of the display panel PNL, light-emitting diodes (LEDs) can be transferred onto the substrate first; then, the position information of each LED can be detected. In one example, the position information of the LEDs can be absolute coordinate information, which may include row coordinate values ​​and column coordinate values. For example, the row coordinate value can be the distance between the characteristic position of the LED and the column edge of the substrate or the distance between the LED and the column alignment mark; the column coordinate value can be the distance between the characteristic position of the LED and the row edge of the substrate or the distance between the LED and the row alignment mark. In other examples, the position information of the LEDs can also refer to the relative position of the LEDs in the sub-pixel area LA, such as the offset of the characteristic position of the LED in the sub-pixel area LA from the characteristic position of the sub-pixel area LA in the row direction and the offset of the characteristic position of the LED in the sub-pixel area LA from the characteristic position of the sub-pixel area LA in the column direction.

[0322] In embodiments of this disclosure, the characteristic position of the light-emitting diode (LED) can be one of its apex corners (e.g., the upper left corner or the lower right corner), its geometric center LEDC, its center of gravity, or other clearly identifiable specific positions on the LED.

[0323] In this embodiment of the disclosure, unless otherwise specified, the characteristic positions of each light-emitting diode (LED) correspond to the same position on a single LED; for example, the characteristic position of each LED is the upper left corner of that LED. For instance, the characteristic positions of the LEDs in the first sub-pixel region LA1 and the second sub-pixel region LA2 each correspond to the same position on the single LED.

[0324] In one example, when the position information of the light-emitting diodes (LEDs) is absolute coordinate information, the relative position of the LEDs in the sub-pixel region LA can be determined based on the position information of each LED and the characteristic position of each sub-pixel region LA. In the design state, the geometric center of the sub-pixel region LA can coincide with the geometric center of the LEDs in the sub-pixel region LA. However, during the fabrication process, the geometric center of the LEDs in the sub-pixel region LA may deviate from the geometric center of the sub-pixel region LA, meaning the position of the LEDs shifts relative to the designed position. In related technologies, the pads in the sub-pixel region LA are pre-designed according to the designed position of the LEDs. The position of the pads in the sub-pixel region LA cannot shift with the offset of the LEDs in the sub-pixel region LA, which may lead to a risk of open circuit in the electrical connection between the LEDs in the sub-pixel region LA and the pads in the sub-pixel region LA. In step S130 of this disclosure, referring to Figure 16, the position information of the pads electrically connected to the electrodes of the LEDs can be determined based on the position information of the LEDs. In one example, the position information of the pad PAD electrically connected to the LED can also be absolute coordinate information, which may include row coordinate values ​​and column coordinate values. For example, the row coordinate value can be the distance between the feature position of the pad PAD and the column edge of the substrate, or the distance between the pad PAD and the column alignment mark; the column coordinate value can be the distance between the feature position of the pad PAD and the row edge of the substrate, or the distance between the pad PAD and the row alignment mark. The offset between the feature position of the LED in the sub-pixel area LA and the feature position of the pad PAD in the sub-pixel area LA is a predetermined design parameter. In this way, it can be ensured that the pad PAD in the sub-pixel area LA offsets with the LED in the sub-pixel area LA, thereby enabling the LED in the sub-pixel area LA to be electrically connected to the pad PAD in the sub-pixel area LA. In other examples, the position information of the pad PAD electrically connected to the light-emitting diode (LED) can also refer to the relative position of the pad PAD in the sub-pixel region LA, such as the offset of the characteristic position of the pad PAD in the sub-pixel region LA from the characteristic position of the sub-pixel region LA in the row direction and the offset of the characteristic position of the pad PAD in the sub-pixel region LA from the characteristic position of the sub-pixel region LA in the column direction.

[0325] In embodiments of this disclosure, the characteristic location of the pad PAD may be one of its apex corners (e.g., the upper left or lower right corner), its geometric center, its center of gravity, or other clearly identifiable specific locations on the pad PAD.

[0326] In this embodiment of the disclosure, unless otherwise specified, the characteristic position of each pad PAD corresponds to the same position on a single pad PAD; for example, the characteristic position of each pad PAD is the upper left corner of that pad PAD. For instance, the characteristic position of the light-emitting diode (LED) in the first sub-pixel region LA1 and the characteristic position of the light-emitting diode (LED) in the second sub-pixel region LA2 each correspond to the same position on the aforementioned LED.

[0327] In the example of Figure 16, the padding PAD includes a first padding PAD1 and a second padding PAD2. The first padding PAD1 and the second padding PAD2 need to be designed independently based on the position information of the light-emitting diodes (LEDs) in the sub-pixel area LA, and therefore each has a geometric center. In one example, when determining the position information of the padding PADs, the first padding PAD1 and the second padding PAD2 can be treated as a single padding PAD to determine its characteristic position, and then the position information of the padding PAD can be determined based on its characteristic position. In another example, the position information of the first padding PAD1 and the position information of the second padding PAD2 can be determined. For example, the position information of the first pad PAD1 is the relative position between the feature position of the first pad PAD1 and the feature position of the sub-pixel region LA (e.g., a vector pointing from the geometric center of the sub-pixel region LA to the geometric center PAD1C of the first pad PAD1); the position information of the second pad PAD2 is the relative position between the feature position of the second pad PAD2 and the feature position of the sub-pixel region LA (e.g., a vector pointing from the geometric center CP of the sub-pixel region LA to the geometric center PAD2C of the second pad PAD2).

[0328] In some embodiments of this disclosure, the display panel PNL can drive each light-emitting diode (LED) using a passive driving method. As an example, the display panel PNL can be provided with driving traces SL and first pads PAD1 corresponding one-to-one with the first electrodes PE1 of each LED. Of the corresponding first electrodes PE1, driving traces SL, and first pads PAD1, the first electrode PE1 is electrically connected to the first pad PAD1, and the first pad PAD1 is electrically connected to the driving trace SL. The second electrodes PE2 of each LED can be interconnected, for example, all electrically connected to a common electrode layer COML. Thus, a driving voltage can be applied to the first electrode PE1 of the LED through the driving trace SL, thereby driving each LED to emit light.

[0329] As another example, LEDs can be arrayed to form LED columns (VLEDs) and LED rows (HLEDs). Each LED column (VLED) includes multiple LEDs arranged sequentially along the column direction (DV). Each LED row (HLED) includes multiple LEDs arranged sequentially along the row direction (DH). The display panel (PNL) can be provided with row drive lines (HSLs) extending along the row direction (DH) and column drive lines (VSLs) extending along the column direction (DV). Each row drive line (HSL) corresponds one-to-one with each LED row (HLED), and each column drive line (VSL) corresponds one-to-one with each LED column (VLED). The first pad (PAD1) electrically connected to the first electrode (PE1) of each LED in the LED column (VLED) is electrically connected to the corresponding column drive line (VSL). The second pad (PAD2) electrically connected to the second electrode (PE2) of each LED in the LED row (HLED) is electrically connected to the corresponding row drive line (HSL). Thus, the row drive line HSL and column drive line VSL define the addresses of the LEDs, allowing control of each LED. When the row drive line HSL and column drive line VSL electrically connected to an LED are respectively loaded with the required voltage (e.g., one loaded with an anode voltage and the other loaded with a cathode voltage), the LED can emit light.

[0330] As another example, LEDs can be arrayed to form LED columns (VLEDs) and LED rows (HLEDs). Each LED column (VLED) includes multiple LEDs arranged sequentially along the column direction (DV). Each LED row (HLED) includes multiple LEDs arranged sequentially along the row direction (DH). The display panel (PNL) can be provided with row drive lines (HSL) extending along the row direction (DH) and column drive lines (VSL) extending along the column direction (DV). Each row drive line (HSL) corresponds one-to-one with each LED row (HLED), and each column drive line (VSL) corresponds one-to-one with each LED column (VLED). The display panel (PNL) also includes switching elements corresponding one-to-one with each LED. The control terminal of the switching element is electrically connected to the row drive line (HSL) corresponding to the LED row (HLED), the input terminal of the switching element is electrically connected to the column drive line (VSL) corresponding to the LED column (VLED), and the output terminal of the switching element is electrically connected to the first pad (PAD1) electrically connected to the first electrode (PE1) of the LED. The driving trace SL also includes a power trace SL2 or a common electrode layer COML. The second pads PAD2, to which the second electrodes PE2 of each LED are electrically connected, are all electrically connected to either the power trace SL2 or the common electrode layer COML. Thus, when a conduction signal is applied to the row driving trace HSL, the switching elements electrically connected to the row driving trace HSL can be turned on, thereby allowing the driving voltage applied to the column driving trace VSL to be applied to the LEDs. In this example, the display panel PNL can achieve row-by-row scanning illumination.

[0331] In other embodiments of this disclosure, the display panel PNL can also use an active driving method to control each light-emitting diode (LED). For example, the display panel PNL can be provided with a pixel driving circuit (PDC) corresponding to each LED, which drives the corresponding LED. In one example, the output terminal of the pixel driving circuit PDC is electrically connected to a first pad PAD1, and the first pad PAD1 is electrically connected to the first electrode PE1 of the LED; the second electrode PE2 of the LED is used to apply a common voltage, for example, the second electrode PE2 of the LED is electrically connected to the common electrode layer COML, or the second electrode PE2 of the LED is connected to a power supply trace SL2 for applying the common voltage through the second pad PAD2. In this example, the display panel PNL also needs to provide the driving trace SL required by the pixel driving circuit PDC to apply signals to the pixel driving circuit PDC. In one example, the driving trace SL required to drive the pixel driving circuit PDC may include, but is not limited to, a driving voltage trace for applying a driving voltage, a driving power supply voltage trace for applying a driving power supply voltage, and a scan signal trace for applying a scan signal.

[0332] In some embodiments of this disclosure, in addition to the padding PAD, the padding layer PADL of the display panel PNL may also have a driving trace SL or a portion of the driving trace SL electrically connected to the padding PAD. This allows the driving trace SL or a portion of the driving trace SL to be disposed in the same layer as the padding PAD, thereby reducing the number of film layers and manufacturing processes in the display panel PNL, and consequently lowering the cost of the display panel PNL.

[0333] In other embodiments of this disclosure, the output terminal of the drive trace SL or the pixel drive circuit PDC electrically connected to the pad PAD can also be disposed on a different film layer from the pad PAD. For example, the two film layers can be isolated by an insulating layer and a via is provided on the insulating layer. The pad PAD can be electrically connected to the output terminal of the drive trace SL or the pixel drive circuit PDC through the via.

[0334] In some examples, the positions of the vias in the insulating layer can remain constant. When the LED shifts, causing the pads to shift, the layout of the pad layer (PADL) can be designed so that the pads extend to the via locations or the leads connected to the pads extend to the via locations. This eliminates the need to design the insulating layer layout based on the LED position and deflection information, thus eliminating the need for digital exposure machines or direct-write exposure machines to fabricate the insulating layer. This can increase the throughput of the display panel PNL and reduce its cost.

[0335] In other examples, the position of at least some of the vias in the insulating layer can be offset to follow the offset of the LED. In particular, when the LED is covered with an insulating material layer PVXL, the position of the first via HA11 exposing the first electrode PE1 and the position of the second via HA21 exposing the second electrode PE2 need to be determined based on the positions of the first electrode PE1 and the second electrode PE2 of the LED.

[0336] In one embodiment of this disclosure, the pads of the display panel PNL prepared using the method provided in this disclosure can shift along with the shift of the light-emitting diodes (LEDs). When the LEDs in two sub-pixel regions LA located in different sub-pixel region columns VLA shift during the transfer stage, the pads in the two sub-pixel regions LA will also shift along with the LEDs in their respective sub-pixel regions LA. For example, referring to FIG17, the display panel PNL includes a plurality of pixels PXP arranged in an array, each pixel PXP including one or more sub-pixel regions LA; each sub-pixel region LA is provided with an LED and a pad electrically connected to the electrode of the LED; the display panel PNL has at least one first sub-pixel region pair LASH, the first sub-pixel region pair LASH including a first sub-pixel region LA1 and a second sub-pixel region LA2 located in different columns, the first sub-pixel region LA1 and the second sub-pixel region LA2 are respectively located in different pixel PXPs, and the first sub-pixel region LA1 and the second sub-pixel region LA2 are respectively located at the same position in different pixel PXPs. For example, the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 are both the first LED in the pixel PXP, or both are the second LED and the third LED in the pixel PXP. In other words, the relative spatial position of the first sub-pixel area LA1 in its pixel is the same as the relative spatial position of the second sub-pixel area LA2 in its pixel. As an example, a pixel includes three sub-pixels: a red sub-pixel, a green sub-pixel, and a blue sub-pixel, each corresponding to a sub-pixel area. In each pixel, the relative spatial position of the red sub-pixel remains unchanged, for example, it is always the first sub-pixel in that pixel; therefore, the relative spatial position of the sub-pixel area corresponding to the red sub-pixel remains unchanged in that pixel, it is also the first sub-pixel area in that pixel. When determining the first sub-pixel area pair LASH, it is possible to make the first sub-pixel area LA1 and the second sub-pixel area LA2 in the first sub-pixel area pair LASH both the sub-pixel area corresponding to the red sub-pixel.

[0337] The distance between the first sub-pixel region LA1 and the second sub-pixel region LA2 in the row direction DH is M times the pixel spacing PH in the row direction, where M is a positive integer. In other words, there is an interval of M-1 pixel columns VPXP between the pixel column VPXP containing the LED in the first sub-pixel region LA1 and the pixel column VPXP containing the LED in the second sub-pixel region LA2. In this example, the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, and the distance between the pad PAD in the first sub-pixel area LA1 and the pad PAD in the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction; or, the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, and the distance between the pad PAD in the first sub-pixel area LA1 and the pad PAD in the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction.

[0338] In this embodiment, when the distance between the light-emitting diode (LED) in the first sub-pixel area LA1 and the light-emitting diode (LED) in the second sub-pixel area LA2 in the row direction DH deviates from the set spacing PH of the pixels in the row direction by M times due to the LED in the first sub-pixel area LA1 or the LED in the second sub-pixel area LA2 deviating from its designed position, the pad PAD in the first sub-pixel area LA1 can follow the offset of the LED in the first sub-pixel area LA1 or the pad PAD in the second sub-pixel area LA2 can follow the offset of the LED in the second sub-pixel area LA2, thereby causing the distance between the pad PAD in the first sub-pixel area LA1 and the pad PAD in the second sub-pixel area LA2 in the row direction DH to deviate from the set spacing PH of the pixels in the row direction by M times.

[0339] In this example, at least one of the LEDs in the first sub-pixel region LA1 and the LEDs in the second sub-pixel region LA2 is offset from its designed position in the row direction DH. For example, the geometric center LEDC of the LED in the first sub-pixel region LA1 does not coincide with the geometric center CP of the first sub-pixel region LA1, while the geometric center LEDC of the LED in the second sub-pixel region LA2 coincides with the geometric center CP of the second sub-pixel region LA2; or, the geometric center of the LED in the first sub-pixel region LA1 coincides with the geometric center CP of the first sub-pixel region LA1, while the geometric center of the LED in the second sub-pixel region LA2 does not coincide with the geometric center CP of the second sub-pixel region LA2; or, the geometric center of the LED in the first sub-pixel region LA1 does not coincide with the geometric center CP of the first sub-pixel region LA1, and the geometric center of the LED in the second sub-pixel region LA2 does not coincide with the geometric center CP of the second sub-pixel region LA2.

[0340] Understandably, a display panel PNL can contain multiple first subpixel area pairs LASH, each pair comprising two subpixel areas LA, one designated as the first subpixel area LA1 and the other as the second subpixel area LA2. Within each first subpixel area pair LASH, at least one light-emitting diode (LED) in the subpixel area LA is offset in the row direction DH.

[0341] In one example of this disclosure, for a sub-pixel region in one pixel column and a sub-pixel region in another pixel column, if these two sub-pixel regions are each located at the same position of their respective pixels, then these two sub-pixel regions can form a sub-pixel region pair. For any sub-pixel region pair, if the distance between the light-emitting diodes (LEDs) in one sub-pixel region and the light-emitting diodes (LEDs) in another sub-pixel region in the row direction DH is less than M times the pixel spacing PH in the row direction, then the distance between the pads (PADs) in one sub-pixel region and the pads (PADs) in another sub-pixel region in the row direction DH is less than M times the pixel spacing PH in the row direction. For any sub-pixel region pair, if the distance between the light-emitting diodes (LEDs) in one sub-pixel region and the light-emitting diodes (LEDs) in another sub-pixel region in the row direction DH is greater than M times the pixel spacing PH in the row direction, then the distance between the pads (PADs) in one sub-pixel region and the pads (PADs) in another sub-pixel region in the row direction DH is greater than M times the pixel spacing PH in the row direction. For any pair of sub-pixel regions, if the distance between the LEDs in one sub-pixel region and the LEDs in another sub-pixel region along the row direction DH is equal to M times the pixel spacing PH along the row direction, then the distance between the pads in one sub-pixel region and the pads in another sub-pixel region along the row direction DH is approximately equal to M times the pixel spacing PH along the row direction, for example, the difference from M times the pixel spacing PH is no more than 0.2 micrometers.

[0342] In one example, in at least one first sub-pixel region pair LASH, the distance between the characteristic position of the LED in the first sub-pixel region LA1 and the characteristic position of the pad PAD in the first sub-pixel region LA1 in the row direction DH is a first distance D1, and the distance between the characteristic position of the LED in the second sub-pixel region LA2 and the characteristic position of the pad PAD in the second sub-pixel region LA2 in the row direction DH is a second distance D2; the difference between the first distance D1 and the second distance D2 does not exceed 0.4 micrometers. In other words, the pad PAD in the first sub-pixel region LA1 can follow the LED in the first sub-pixel region LA1 in the row direction DH offset, and the following deviation does not exceed 0.2 micrometers; the pad PAD in the second sub-pixel region LA2 can follow the LED in the second sub-pixel region LA2 in the row direction DH offset, and the following deviation does not exceed 0.2 micrometers. It is understandable that when both the pads (PADs) and LEDs in sub-pixel area LA are located at their designed positions, the geometric center PADC of the pads (PADs) and the geometric center LEDC of the LEDs (LEDs) in sub-pixel area LA may or may not coincide (for example, in the example of Figure 16, the geometric centers of the first pad PAD1 and the second pad PAD2 in sub-pixel area LA do not coincide with the geometric center LEDC of the LEDs). However, the distance between the characteristic positions of the pads (PADs) and the LEDs in sub-pixel area LA is the designed value. Therefore, if a pad (PAD) in sub-pixel area LA shifts in the row direction DH following the offset of the LEDs in sub-pixel area LA, the distance between the characteristic positions of the LEDs and the pads (PADs) in sub-pixel area LA in the row direction DH remains approximately constant. In other words, without considering process deviations, the distance in the row direction DH between the characteristic position of the LED in the first sub-pixel region LA1 and the characteristic position of the pad PAD in the first sub-pixel region LA1, and the distance in the row direction DH between the characteristic position of the LED in the second sub-pixel region LA2 and the characteristic position of the pad PAD in the second sub-pixel region LA2, are equal. However, in this embodiment, process deviations may exist in the fabrication of the pad PAD in the sub-pixel region LA, which may cause the first distance D1 and the second distance D2 detected on the display panel PNL to differ. In this embodiment, a digital exposure machine or a direct-write exposure machine can be used to fabricate the pad PAD in the sub-pixel region LA; digital exposure machines or direct-write exposure machines have very high precision, for example, the dimensional deviation of the formed pattern does not exceed 0.2 micrometers, which makes the deviation between the first distance D1 and the second distance D2 very small.When using photomasks in related technologies to fabricate pads, the dimensional accuracy of the pads is often at the micrometer level.

[0343] Furthermore, the distance between the characteristic position of the LED in the first sub-pixel area LA1 and the characteristic position of the pad PAD in the first sub-pixel area LA1 in the row direction DH is a first distance D1, and the distance between the characteristic position of the LED in the second sub-pixel area LA2 and the characteristic position of the pad PAD in the second sub-pixel area LA2 in the row direction DH is a second distance D2; the difference between the first distance D1 and the second distance D2 does not exceed 0.2 micrometers. In this embodiment, the accuracy of the digital exposure machine or the direct-write exposure machine is as high as 0.1 micrometers (the deviation between the size of the formed pattern and the design size does not exceed 0.1 micrometers).

[0344] In one embodiment of this disclosure, in at least one first sub-pixel region pair LASH, at least one of the LED in the first sub-pixel region LA1 and the light-emitting diode LED in the second sub-pixel region LA2 may also be offset in the column direction DV, and the degree of offset of the LED in the first sub-pixel region LA1 and the light-emitting diode LED in the second sub-pixel region LA2 in the column direction DV is different. At this time, the distance between the characteristic position of the LED in the first sub-pixel area LA1 and the first row edge LAH1 of the first sub-pixel area LA1 is less than the distance between the LED in the second sub-pixel area LA2 and the first row edge LAH1 of the second sub-pixel area LA2, and the distance between the pad PAD in the first sub-pixel area LA1 and the first row edge LAH1 of the first sub-pixel area LA1 is less than the distance between the pad PAD in the second sub-pixel area LA2 and the first row edge LAH1 of the second sub-pixel area LA2; or, the distance between the characteristic position of the LED in the first sub-pixel area LA1 and the first row edge LAH1 of the first sub-pixel area LA1 is greater than the distance between the LED in the second sub-pixel area LA2 and the first row edge LAH1 of the second sub-pixel area LA2, and the distance between the pad PAD in the first sub-pixel area LA1 and the first row edge LAH1 of the first sub-pixel area LA1 is greater than the distance between the pad PAD in the second sub-pixel area LA2 and the first row edge LAH1 of the second sub-pixel area LA2.

[0345] In one example, the distance between the characteristic position of the LED in the first sub-pixel region LA1 and the first row edge LAH1 of the first sub-pixel region LA1 is the same as the distance between the characteristic position of the LED in the first sub-pixel region LA1 and the first row edge LAH1 of the first sub-pixel region LA1. Similarly, the distance between the pad PAD in the first sub-pixel region LA1 and the first row edge LAH1 of the first sub-pixel region LA1 is the same as the distance between the characteristic position of the pad PAD in the first sub-pixel region LA1 and the first row edge LAH1 of the first sub-pixel region LA1. Likewise, the distance between the pad PAD in the second sub-pixel region LA2 and the first row edge LAH1 of the second sub-pixel region LA2 is the same as the distance between the characteristic position of the pad PAD in the second sub-pixel region LA2 and the first row edge LAH1 of the second sub-pixel region LA2.

[0346] Compared to the relative position of the LED in the second sub-pixel area LA2 within the second sub-pixel area LA2, when the relative position of the LED in the first sub-pixel area LA1 shifts along the first column direction DV1, the distance between the characteristic position of the LED in the first sub-pixel area LA1 and the first row edge LAH1 of the first sub-pixel area LA1 is greater than the distance between the LED in the second sub-pixel area LA2 and the first row edge LAH1 of the second sub-pixel area LA2. At this time, the pad PAD in the first sub-pixel area LA1 follows the shift of the LED in the first sub-pixel area LA1 along the column direction DV, and the pad PAD in the second sub-pixel area LA2 follows the shift of the LED in the second sub-pixel area LA2 along the column direction DV. Therefore, compared to the relative position of the pad PAD in the second sub-pixel region LA2, the relative position of the pad PAD in the first sub-pixel region LA1 is offset along the first column direction DV1. This makes the distance between the pad PAD in the first sub-pixel region LA1 and the first row edge LAH1 of the first sub-pixel region LA1 greater than the distance between the pad PAD in the second sub-pixel region LA2 and the first row edge LAH1 of the second sub-pixel region LA2.

[0347] Compared to the relative position of the LED in the second sub-pixel area LA2 within the second sub-pixel area LA2, when the relative position of the LED in the first sub-pixel area LA1 shifts in the opposite direction of the first column direction DV1, the distance between the characteristic position of the LED in the first sub-pixel area LA1 and the first row edge LAH1 of the first sub-pixel area LA1 is smaller than the distance between the LED in the second sub-pixel area LA2 and the first row edge LAH1 of the second sub-pixel area LA2. At this time, the pad PAD in the first sub-pixel area LA1 follows the shift of the LED in the first sub-pixel area LA1 in the column direction DV, and the pad PAD in the second sub-pixel area LA2 follows the shift of the LED in the second sub-pixel area LA2 in the column direction DV. Therefore, compared to the relative position of the pad PAD in the second sub-pixel region LA2, the relative position of the pad PAD in the first sub-pixel region LA1 is offset in the opposite direction of the first column direction DV1. This makes the distance between the pad PAD in the first sub-pixel region LA1 and the first row edge LAH1 of the first sub-pixel region LA1 smaller than the distance between the pad PAD in the second sub-pixel region LA2 and the first row edge LAH1 of the second sub-pixel region LA2.

[0348] In some embodiments of this disclosure, at least one light-emitting diode (LED) in a sub-pixel region LA undergoes angular rotation, meaning the actual angle of the LED in the sub-pixel region LA deviates from its designed angle. In this embodiment, the padding PAD in the sub-pixel region LA can rotate angularly following the angular rotation of the LED in the sub-pixel region LA. This ensures that the angles between the LED and the padding PAD in the sub-pixel region LA are consistent, guaranteeing an effective connection between them. In embodiments of this disclosure, various methods can be used to determine the angle information of the LED and the padding PAD in the sub-pixel region LA. In one example, the LED in the sub-pixel region LA has a characteristic edge LEDE1 corresponding to the first row edge LAH1, and the padding PAD in the sub-pixel region LA has a characteristic edge PADE1 corresponding to the first row edge LAH1. In the design state, the characteristic edge LEDE1 of the LED in the sub-pixel region LA and the characteristic edge PADE1 of the pad PAD in the sub-pixel region LA can be parallel to the first row edge LAH1. When the LED in the sub-pixel region LA deflects, the characteristic edge LEDE1 of the LED in the sub-pixel region LA forms an acute angle with respect to the first row edge LAH1; at this time, the tilt direction of the characteristic edge LEDE1 of the LED in the sub-pixel region LA relative to the first row edge LAH1 can be determined, i.e., whether it rotates clockwise or counterclockwise. The pad PAD in the sub-pixel region LA deflects along with the LED in the sub-pixel region LA, so that the characteristic edge PADE1 of the pad PAD in the sub-pixel region LA forms an acute angle with respect to the first row edge LAH1; the tilt direction of the characteristic edge PADE1 of the pad PAD in the sub-pixel region LA relative to the first row edge LAH1 can be the same as the tilt direction of the characteristic edge LEDE1 of the LED in the sub-pixel region LA relative to the first row edge LAH1. For example, the feature edge LEDE1 of the light-emitting diode (LED) in the sub-pixel region LA and the feature edge PADE1 of the pad (PAD) in the sub-pixel region LA are both rotated clockwise or counterclockwise relative to the first row edge LAH1. For instance, in the example of Figure 16, the feature edge LEDE1 is rotated clockwise relative to the first row edge LAH1, and the feature edges of the first pad (PAD1) and the second pad (PAD2) are rotated clockwise relative to the first row edge LAH1.

[0349] In this embodiment of the disclosure, the characteristic edge LEDE1 of the light-emitting diode (LED) can be a straight line, and the characteristic edge PADE1 of the pad PAD can be a straight line; within the same sub-pixel area, the angle between the characteristic edge LEDE1 of the LED and the characteristic edge PADE1 of the pad PAD is: the angle between the straight line where the orthographic projection of the characteristic edge LEDE1 of the LED is located on the plane of the display panel and the straight line where the orthographic projection of the characteristic edge PADE1 of the pad PAD is located on the plane of the display panel, and the angle is acute.

[0350] In one example, the display panel PNL further includes a fifth sub-pixel region LA5; the characteristic edge LEDE1 of the light-emitting diode (LED) in the fifth sub-pixel region LA5 and the characteristic edge PADE1 of the pad (PAD) in the fifth sub-pixel region LA5 both form an acute angle with the first row edge LAH1 of the fifth sub-pixel region LA5; relative to the first row edge LAH1 of the fifth sub-pixel region LA5, the characteristic edge LEDE1 of the LED in the fifth sub-pixel region LA5 and the characteristic edge PADE1 of the pad (PAD) in the fifth sub-pixel region LA5 have the same tilt direction. In other words, the display panel PNL has at least one fifth sub-pixel region LA5, and the pad (PAD) in the fifth sub-pixel region LA5 deflects following the deflection of the light-emitting diode (LED) in the fifth sub-pixel region LA5.

[0351] Furthermore, the included angle between the characteristic edge LEDE1 of the light-emitting diode (LED) in the fifth sub-pixel region LA5 and the characteristic edge PADE1 of the pad PAD in the fifth sub-pixel region LA5 does not exceed 10°, and especially does not exceed 2°. On one hand, the embodiments of this disclosure use equipment such as a digital exposure machine to fabricate the pad PAD, thus accurately ensuring the size and morphology of the pad PAD and minimizing fabrication deviations. On the other hand, the tilt angle of the pad PAD strictly follows the tilt angle of the corresponding light-emitting diode (LED), which helps to ensure optimal performance of the electrical connection between the pad PAD and the LED.

[0352] For example, when the characteristic edge LEDE1 of the light-emitting diode (LED) in the fifth sub-pixel region LA5 and the characteristic edge PADE1 of the padding PAD in the fifth sub-pixel region LA5 both extend along a straight line, the angle between the characteristic edge LEDE1 of the light-emitting diode (LED) in the fifth sub-pixel region LA5 and the characteristic edge PADE1 of the padding PAD in the fifth sub-pixel region LA5 not exceeding 10° can be understood as the angle between the straight line on which the projection of the characteristic edge LEDE1 of the light-emitting diode (LED) in the fifth sub-pixel region LA5 onto the reference plane and the straight line on which the projection of the characteristic edge PADE1 of the padding PAD in the fifth sub-pixel region LA5 onto the reference plane; wherein the reference plane is a plane that extends parallel to the display panel.

[0353] In one example, in at least one first sub-pixel region pair LASH, the feature edges of the light-emitting diodes (LEDs) in the first sub-pixel region LA1 and the feature edges of the pads (PADs) in the first sub-pixel region LA1 both form an acute angle with the first row edge LAH1 of the first sub-pixel region LA1; relative to the first row edge LAH1 of the first sub-pixel region LA1, the feature edges of the LEDs in the first sub-pixel region LA1 and the feature edges of the pads (PADs) in the first sub-pixel region LA1 have the same tilt direction. In other words, in at least one first sub-pixel region pair LASH, the pads (PADs) within the first sub-pixel region LA1 deflect as the LEDs deflect.

[0354] In one embodiment of this disclosure, referring to FIG18, the display panel PNL includes at least one second sub-pixel region pair LASV, which includes a third sub-pixel region LA3 and a fourth sub-pixel region LA4 located in different rows. The third sub-pixel region LA3 and the fourth sub-pixel region LA4 are located in different pixels PXP, and the third sub-pixel region LA3 and the fourth sub-pixel region LA4 are located at the same position in different pixels PXP. The distance between the third sub-pixel region LA3 and the fourth sub-pixel region LA4 in the column direction DV is N times the pixel spacing PV in the column direction, where N is a positive integer. Specifically, the distance between the LED in the third sub-pixel area LA3 and the LED in the fourth sub-pixel area LA4 in the column direction DV is less than N times the pixel spacing PV in the column direction, and the distance between the pad PAD in the third sub-pixel area LA3 and the pad PAD in the fourth sub-pixel area LA4 in the column direction DV is less than N times the pixel spacing PV in the column direction; or, the distance between the LED in the third sub-pixel area LA3 and the LED in the fourth sub-pixel area LA4 in the column direction DV is greater than N times the pixel spacing PV in the column direction, and the distance between the pad PAD in the third sub-pixel area LA3 and the pad PAD in the fourth sub-pixel area LA4 in the column direction DV is greater than N times the pixel spacing PV in the column direction.

[0355] In this embodiment, when the distance between the light-emitting diode (LED) in the third sub-pixel region LA3 and the light-emitting diode (LED) in the fourth sub-pixel region LA4 in the column direction DV deviates from the pixel spacing PV in the column direction by N times due to the LED in the third sub-pixel region LA3 or the LED in the fourth sub-pixel region LA4 deviating from its designed position, the pad PAD in the third sub-pixel region LA3 can follow the offset of the LED in the third sub-pixel region LA3 or the pad PAD in the fourth sub-pixel region LA4 can follow the offset of the LED in the fourth sub-pixel region LA4, thereby causing the distance between the pad PAD in the third sub-pixel region LA3 and the pad PAD in the fourth sub-pixel region LA4 in the column direction DV to deviate from the pixel spacing PV in the column direction by N times.

[0356] In this example, at least one of the LEDs in the third sub-pixel region LA3 and the fourth sub-pixel region LA4 is offset from its designed position in the column direction DV. For example, the geometric center of the LED in the third sub-pixel region LA3 does not coincide with the geometric center CP of the third sub-pixel region LA3, while the geometric center of the LED in the fourth sub-pixel region LA4 coincides with the geometric center CP of the fourth sub-pixel region LA4; or, the geometric center of the LED in the third sub-pixel region LA3 coincides with the geometric center CP of the third sub-pixel region LA3, while the geometric center of the LED in the fourth sub-pixel region LA4 does not coincide with the geometric center CP of the fourth sub-pixel region LA4; or, the geometric center of the LED in the third sub-pixel region LA3 does not coincide with the geometric center CP of the third sub-pixel region LA3, and the geometric center of the LED in the fourth sub-pixel region LA4 does not coincide with the geometric center CP of the fourth sub-pixel region LA4.

[0357] Understandably, a display panel PNL can contain multiple second subpixel area pairs LASV, each LASV comprising two subpixel areas LA, one of which is designated as a third subpixel area LA3 and the other as a fourth subpixel area LA4. In each second subpixel area pair LASV, at least one of the light-emitting diodes (LEDs) in the subpixel area LA is offset in the column direction DV.

[0358] In one example, in at least one second sub-pixel region pair LASV, the distance between the characteristic position of the LED in the third sub-pixel region LA3 and the characteristic position of the pad PAD in the third sub-pixel region LA3 in the column direction DV is a third distance D3, and the distance between the characteristic position of the LED in the fourth sub-pixel region LA4 and the characteristic position of the pad PAD in the fourth sub-pixel region LA4 in the column direction DV is a fourth distance D4; the difference between the third distance D3 and the fourth distance D4 does not exceed 0.4 micrometers. In other words, the pad PAD in the third sub-pixel region LA3 can follow the LED in the third sub-pixel region LA3 in the column direction DV offset, and the following deviation does not exceed 0.2 micrometers; the pad PAD in the fourth sub-pixel region LA4 can follow the LED in the fourth sub-pixel region LA4 in the column direction DV offset, and the following deviation does not exceed 0.2 micrometers. It is understandable that if the padding PAD in a sub-pixel region LA shifts in the column direction DV following the offset of the light-emitting diode (LED) in the sub-pixel region LA, the distance between the characteristic position of the LED in the sub-pixel region LA and the characteristic position of the padding PAD in the sub-pixel region LA in the column direction DV remains approximately constant. In other words, without considering process deviations, the distance between the characteristic position of the LED in the third sub-pixel region LA3 and the characteristic position of the padding PAD in the third sub-pixel region LA3 in the column direction DV is equal to the distance between the characteristic position of the LED in the fourth sub-pixel region LA4 and the characteristic position of the padding PAD in the fourth sub-pixel region LA4 in the column direction DV. However, in the embodiments of this disclosure, process deviations may exist in the fabrication of the padding PAD in the sub-pixel region LA, which may cause the third distance D3 and the fourth distance D4 detected on the display panel PNL to be different. In this embodiment, a digital exposure machine or a direct-write exposure machine can be used to fabricate the padding PAD in the sub-pixel region LA. Digital exposure machines or direct-write exposure machines have very high precision; for example, the dimensional deviation of the formed pattern does not exceed 0.2 micrometers, which makes the deviation between the third distance D3 and the fourth distance D4 very small. In contrast, when using a mask in related technologies to fabricate the padding PAD, the dimensional accuracy of the padding PAD is often at the micrometer level.

[0359] Furthermore, the distance between the characteristic position of the LED in the third sub-pixel region LA3 and the characteristic position of the pad PAD in the third sub-pixel region LA3 in the column direction DV is the third distance D3, and the distance between the characteristic position of the LED in the fourth sub-pixel region LA4 and the characteristic position of the pad PAD in the fourth sub-pixel region LA4 in the column direction DV is the fourth distance D4; the difference between the third distance D3 and the fourth distance D4 does not exceed 0.2 micrometers. In this embodiment, the accuracy of the digital exposure machine or direct-write exposure machine is as high as 0.1 micrometers (the deviation between the size of the formed pattern and the design size does not exceed 0.1 micrometers).

[0360] In one example of this disclosure, for a sub-pixel region in one pixel row and a sub-pixel region in another pixel row, if these two sub-pixel regions are each located at the same position of their respective pixels, then these two sub-pixel regions can form a sub-pixel region pair. For any sub-pixel region pair, if the distance between the light-emitting diodes (LEDs) in one sub-pixel region and the light-emitting diodes (LEDs) in another sub-pixel region in the column direction (DV) is less than N times the pixel spacing (PV) in the column direction, then the distance between the pads (PADs) in one sub-pixel region and the pads (PADs) in another sub-pixel region in the column direction (DV) is less than N times the pixel spacing (PV) in the column direction. For any sub-pixel region pair, if the distance between the light-emitting diodes (LEDs) in one sub-pixel region and the light-emitting diodes (LEDs) in another sub-pixel region in the column direction (DV) is greater than N times the pixel spacing (PV) in the column direction, then the distance between the pads (PADs) in one sub-pixel region and the pads (PADs) in another sub-pixel region in the column direction (DV) is greater than N times the pixel spacing (PV) in the column direction. For any pair of subpixel regions, if the distance between the light-emitting diodes (LEDs) in one subpixel region and the light-emitting diodes (LEDs) in another subpixel region along the column direction (DV) is equal to N times the pixel spacing (PV) along the column direction, then the distance between the pads (PADs) in one subpixel region and the pads (PADs) in another subpixel region along the column direction (DV) is approximately equal to N times the pixel spacing (PV) along the column direction, for example, the difference from N times the pixel spacing (PV) is no more than 0.2 micrometers.

[0361] The following is an exemplary description of the method for preparing a display panel PNL according to an embodiment of the present disclosure, with reference to the accompanying drawings.

[0362] In the first embodiment of this disclosure, the display panel PNL is a passively driven display panel PNL with a common electrode layer COML. The light-emitting diode (LED) is a vertically oriented LED, having a first electrode PE1 and a second electrode PE2 disposed opposite to each other. In step S110 of this first embodiment, referring to Figures 19 and 20, the LED can be transferred onto a temporary substrate BPY, such that the second electrode PE2 of the LED is connected to the temporary substrate BPY. For example, a temporary bonding adhesive OCY can be coated on the surface of the temporary substrate BPY, and then the second electrode PE2 of the LED is adhered to the temporary bonding adhesive OCY after mass transfer. Referring to Figure 20, at least some of the LEDs on the temporary substrate BPY are not in the designed position or at the designed angle.

[0363] In step S120 of this first type of embodiment, the position and angle information of each light-emitting diode (LED) on the temporary substrate BPY can be detected.

[0364] In step S130 of this first type of embodiment, the position and angle information of the pads on the driving substrate BPA are determined according to the position and angle information of the light-emitting diodes (LEDs). Each pad on the driving substrate BPA corresponds one-to-one with each light-emitting diode (LED) on the temporary substrate BPY.

[0365] In step S140 of this first type of embodiment, a layout of the pad layer PADL of the driving substrate BPA is generated based on the position information and angle information of the pad PAD on the driving substrate BPA. The pad layer PADL has pad PAD and driving trace SL electrically connected to the pad PAD.

[0366] In step S150 of this first type of embodiment, referring to FIG21, the pad layer PADL of the driving substrate BPA is formed using a digital exposure machine or a direct writing exposure machine according to the layout of the pad layer PADL of the driving substrate BPA; referring to FIG2, the first electrode PE1 connected to the pad PAD of the temporary substrate BPY is bonded to the corresponding pad PAD on the driving substrate BPA; referring to FIG23, the temporary substrate BPY is removed to expose the second electrode PE2 of the light-emitting diode LED; referring to FIG25, a common electrode layer COML is formed on the side of the light-emitting diode LED away from the driving substrate BPA, and the common electrode layer COML is electrically connected to the second electrode PE2 of the light-emitting diode LED.

[0367] Thus, the display panel PNL formed by this first embodiment includes a driving substrate BPA, a light-emitting diode layer LDL, and a common electrode layer COML stacked sequentially. The driving substrate BPA has the pad PAD and driving traces SL electrically connected to the pad PAD; the light-emitting diode layer LDL has the light-emitting diodes LED, each LED having a first electrode PE1 near the driving substrate BPA and a second electrode PE2 away from the driving substrate BPA; in the sub-pixel region LA, the first electrode PE1 is bonded to the pad PAD, and the second electrode PE2 is electrically connected to the common electrode layer COML.

[0368] Optionally, in step S150, the temporary bonding adhesive OCY can be decomposed by heating or irradiating it with light, thereby separating the second electrode PE2 of the light-emitting diode LED from the temporary substrate BPY.

[0369] Optionally, in step S150, referring to Figure 24, before forming the common electrode layer COML, a filling layer DUM can be formed first. This filling layer DUM can fill the gaps between the light-emitting diodes (LEDs) and expose the second electrode PE2. When forming the common electrode layer COML, the common electrode layer COML can cover the filling layer DUM. The filling layer DUM can be an organic material or an inorganic material.

[0370] Optionally, a cover plate may be provided on the side of the common electrode layer COML away from the driving substrate BPA.

[0371] The preparation method of this first embodiment can also be used for other types of passive driving substrates (BPAs) to obtain other types of display panels (PNLs).

[0372] In a modified example of the first type of implementation, referring to FIG26, the driving substrate BPA may include a switching element SW and a pad PAD corresponding to each light-emitting diode (LED), and column driving lines VSL corresponding to each sub-pixel column (VLA) and row driving lines HSL corresponding to each sub-pixel row (HLA). The input terminal of the switching element SW corresponding to each LED in the LED column (VLED) is electrically connected to the column driving line VSL, the control terminal of the switching element SW corresponding to each LED in the LED row (HLED) is electrically connected to the row driving line HSL, and the output terminal of the switching element SW is electrically connected to the pad PAD. In this embodiment, the pad layer PADL may only have the pad PAD, or it may have part or all of the row driving line HSL structure additionally outside the pad PAD, or part or all of the column driving line VSL structure additionally outside the pad PAD.

[0373] Thus, the display panel PNL fabricated in this modified example includes a driving substrate BPA, a light-emitting diode layer LDL, and a common electrode layer COML stacked sequentially. The driving substrate BPA may include switching elements SW and pads PAD corresponding to each light-emitting diode (LED), and column driving lines VSL corresponding to each sub-pixel column (VLA) and row driving lines HSL corresponding to each sub-pixel row (HLA). The input terminal of the switching element SW corresponding to each LED in the LED column (VLED) is electrically connected to the column driving line VSL, the control terminal of the switching element SW corresponding to each LED in the LED row (HLED) is electrically connected to the row driving line HSL, and the output terminal of the switching element SW is electrically connected to the pad PAD.

[0374] In another variation of the first type of implementation, the drive trace SL and the pad PAD may not be disposed on the same layer. For example, the drive substrate BPA may include a first substrate, a metal layer, an insulating layer, and a pad layer PADL stacked together; the pad layer PADL is provided with the pad PAD, and the metal layer is provided with the drive trace SL; the pad PAD is electrically connected to the drive trace SL through a via disposed on the insulating layer.

[0375] In the second embodiment of this disclosure, the display panel PNL is a passively driven display panel PNL with power supply traces SL2. The light-emitting diode (LED) is a vertically oriented LED, having a first electrode PE1 and a second electrode PE2 disposed opposite to each other.

[0376] In step S110 of this second type of embodiment, referring to FIG27, a light-emitting diode (LED) is transferred onto a temporary substrate BPY, such that the second electrode PE2 of the LED is connected to the temporary substrate BPY. For example, a temporary bonding adhesive OCY can be coated on the surface of the temporary substrate BPY, and then the second electrode PE2 of the LED is adhered to the temporary bonding adhesive OCY after mass transfer. Referring to FIG27, at least a portion of the LEDs on the temporary substrate BPY are not in the designed position or at the designed angle.

[0377] In step S120 of this second type of implementation, the position and angle information of each light-emitting diode (LED) on the temporary substrate BPY are detected.

[0378] In step S130 of this second type of embodiment, the position and angle information of the first pad PAD1 on the driving substrate BPA and the position and angle information of the second pad PAD2 on the opposing substrate BPB are determined based on the position and angle information of the light-emitting diodes (LEDs). Referring to FIG28, each first pad PAD1 on the driving substrate BPA corresponds one-to-one with the first electrode PE1 of each LED on the temporary substrate BPY; referring to FIG29, each second pad PAD2 on the opposing substrate BPB corresponds one-to-one with the second electrode PE2 of each LED on the temporary substrate BPY. Referring to FIGS. 28 and 29, the positions of the first pad PAD1 and the second pad PAD2 shift with the position shift of the corresponding LEDs, and the rotation angles of the first pad PAD1 and the second pad PAD2 rotate with the rotation of the corresponding LEDs.

[0379] In step S140 of this second type of embodiment, referring to FIG28, the layout of the first pad layer PADL1 of the driving substrate BPA is generated based on the position and angle information of the first pad PAD1 on the driving substrate BPA. The first pad layer PADL1 has column driving lines VSL corresponding one-to-one with each column of light-emitting diodes VLED and first pad PAD1 corresponding one-to-one with each light-emitting diode LED. The first pad PAD1 corresponding to each light-emitting diode LED of the light-emitting diode column VLED is electrically connected to the column driving line VSL corresponding to the light-emitting diode column VLED.

[0380] In step S140 of this second type of embodiment, referring to FIG29, a layout of the second pad layer PADL2 of the opposing substrate BPB is generated based on the position and angle information of the second pads PAD2 on the opposing substrate BPB. The second pad layer PADL2 has row drive lines HSL corresponding to each row of light-emitting diodes (HLEDs) and second pads PAD2 corresponding to each row of light-emitting diodes (LEDs). The second pads PAD2 corresponding to each LED in the row of light-emitting diodes (HLEDs) are electrically connected to the row drive lines HSL corresponding to the row of light-emitting diodes (HLEDs).

[0381] In step S150 of this second type of embodiment, the following preparation process can be performed sequentially:

[0382] S201. Based on the layout of the first pad layer PADL1 of the driving substrate BPA, the first pad layer PADL1 of the driving substrate BPA is formed using a digital exposure machine or a direct writing exposure machine; based on the layout of the second pad layer PADL2 of the opposing substrate BPB, the second pad layer PADL2 of the opposing substrate BPB is formed using a digital exposure machine or a direct writing exposure machine.

[0383] S202, Referring to Figure 30, the first electrode PE1 of the pad PAD connected to the temporary substrate BPY is bonded to the corresponding first pad PAD1 on the driving substrate BPA.

[0384] S203, Referring to Figure 31, remove the temporary substrate BPY to expose the second electrode PE2 of the light-emitting diode LED;

[0385] S204, referring to Figure 32, the second electrode PE2 of the light-emitting diode LED connected to the driving substrate BPA is bonded to the corresponding second pad PAD2 on the opposing substrate BPB.

[0386] The display panel PNL fabricated using the fabrication method provided in this second embodiment includes a driving substrate BPA, a light-emitting diode layer LDL, and a counter substrate BPB stacked sequentially. The driving substrate BPA has a first pad PAD1 in each sub-pixel region LA and column driving lines VSL corresponding to each sub-pixel region column VLA; the first pad PAD1 in each sub-pixel region column VLA is electrically connected to the corresponding column driving line VSL. The counter substrate BPB has a second pad PAD2 in each sub-pixel region LA and row driving lines HSL corresponding to each sub-pixel region row HLA; the second pad PAD2 in each sub-pixel region row HLA is electrically connected to the corresponding row driving line HSL. The light-emitting diode layer LDL has light-emitting diodes (LEDs) with a first electrode PE1 near the driving substrate BPA and a second electrode PE2 away from the driving substrate BPA. In the sub-pixel region LA, the first electrode PE1 is bonded to the first pad PAD1, and the second electrode PE2 is bonded to the second pad PAD2. The driving substrate BPA has a first pad layer PADL1, which includes the first pad PAD1 and column drive lines VSL; the opposing substrate BPB has a second pad layer PADL2, which includes the second pad PAD2 and row drive lines HSL. This reduces the number of film layers, thus lowering costs.

[0387] The preparation method of this second embodiment can also be used for other types of passive driving substrates (BPAs) to obtain other types of display panels (PNLs).

[0388] In a variation of the second type of implementation, the column drive line VSL and the first pad PAD1 may not be disposed on the same layer. For example, the drive substrate BPA may include a first substrate, a first metal layer, a first insulating layer, and a first pad layer PADL1 stacked together; the first pad layer PADL1 is provided with the first pad PAD1, and the first metal layer is provided with the column drive line VSL; the first pad PAD1 is electrically connected to the column drive line VSL through a via disposed on the first insulating layer.

[0389] In another variation of the second type of implementation, the row drive trace HSL and the second pad PAD2 may not be disposed on the same layer. For example, the opposing substrate BPB may include a second substrate, a second metal layer, a second insulating layer, and a second pad layer PADL2 stacked together; the second pad layer PADL2 is provided with the second pad PAD2, and the second metal layer is provided with the row drive trace HSL; the second pad PAD2 is electrically connected to the row drive trace HSL through a via disposed on the second insulating layer.

[0390] In the third embodiment of this disclosure, the display panel PNL is an actively driven display panel PNL having a common electrode layer COML. The light-emitting diode (LED) is a vertically oriented LED, having a first electrode PE1 and a second electrode PE2 disposed opposite to each other.

[0391] In step S110 of this third type of embodiment, referring to FIG27, a light-emitting diode (LED) is transferred onto a temporary substrate BPY, such that the second electrode PE2 of the LED is connected to the temporary substrate BPY. Referring to FIG27, at least a portion of the LEDs on the temporary substrate BPY are not in the designed position or at the designed angle.

[0392] In step S120 of this third type of implementation, the position and angle information of each light-emitting diode (LED) on the temporary substrate BPY are detected.

[0393] In step S130 of this third type of implementation, the position and angle information of the pads PAD on the driving substrate BPA are determined according to the position and angle information of the light-emitting diodes (LEDs). Each pad PAD on the driving substrate BPA corresponds one-to-one with the first electrode PE1 of each light-emitting diode (LED) on the temporary substrate BPY.

[0394] In step S140 of this third embodiment, a layout of the pad layer PADL of the driving substrate BPA is generated based on the position and angle information of the pad PAD on the driving substrate BPA. Referring to FIG33, the driving substrate BPA is provided with the pad PAD, a pixel driving circuit PDC for driving the light-emitting diode LED, and a plurality of driving traces SL electrically connected to the pixel driving circuit PDC; the output terminal of the pixel driving circuit PDC is electrically connected to the pad PAD.

[0395] In step S150 of this third embodiment, the pad layer PADL of the driving substrate BPA is formed using a digital exposure machine or a direct-write exposure machine according to the layout of the pad layer PADL of the driving substrate BPA; the first electrode PE1 connected to the pad PAD on the temporary substrate BPY is bonded to the corresponding pad PAD on the driving substrate BPA; the temporary substrate BPY is removed to expose the second electrode PE2 of the light-emitting diode LED; a common electrode layer COML is formed on the side of the light-emitting diode LED away from the driving substrate BPA, and the common electrode layer COML is electrically connected to the second electrode PE2 of the light-emitting diode LED.

[0396] Using the fabrication method provided in this third embodiment, the fabricated display panel PNL includes a driving substrate BPA, a light-emitting diode layer LDL, and a common electrode layer COML stacked sequentially. The driving substrate BPA includes a pad PAD, a pixel driving circuit PDC for driving the light-emitting diodes (LEDs), and multiple driving traces SL electrically connected to the pixel driving circuit PDC. The output terminal of the pixel driving circuit PDC is electrically connected to the pad PAD. The light-emitting diode layer LDL includes the light-emitting diodes (LEDs), each LED having a first electrode PE1 near the driving substrate BPA and a second electrode PE2 away from the driving substrate BPA. In the sub-pixel region LA, the first electrode PE1 is bonded to the pad PAD, and the second electrode PE2 is electrically connected to the common electrode layer COML.

[0397] Optionally, referring to Figure 33, the driving traces SL on the driving substrate BPA include at least column driving traces VSL corresponding one-to-one with the light-emitting diode columns VLEDs and extending along the column direction DV, and row driving traces HSL corresponding one-to-one with the light-emitting diode rows HLEDs and extending along the row direction DH. The pixel driving circuit PDC electrically connected to each light-emitting diode of the light-emitting diode column VLED is connected to the column driving trace VSL corresponding to the light-emitting diode column VLED, and the pixel driving circuit PDC electrically connected to each light-emitting diode of the light-emitting diode row HLED is connected to the row driving trace HSL corresponding to the light-emitting diode row HLED. In one example, the column driving trace VSL is used to apply a driving voltage to the pixel driving circuit PDC to drive the light-emitting diodes LEDs to emit light, and the row driving trace HSL is used to apply a scan signal to the pixel driving circuit PDC. The pixel driving circuit PDC can respond to the scan signal by having the driving voltage on the column driving trace VSL written into the pixel driving circuit PDC.

[0398] In one example, the pixel driver circuit (PDC) may include multiple transistors and a storage capacitor. The driving voltage can be written into the storage capacitor of the pixel driver circuit (PDC).

[0399] In one example of this third type of implementation, referring to FIG34, the driving substrate BPA includes a substrate SBT, a driving layer DRL, an insulating layer PVX, and a pad layer PADL stacked sequentially. The pixel driving circuit PDC and the driving trace SL are disposed on the driving layer DRL, and the pad layer PADL has the pad PAD; the insulating layer PVX has at least a portion of the area exposing the output terminal of the pixel driving circuit PDC and corresponding one-to-one with the pad PAD, and the pad PAD is electrically connected to the output terminal of the pixel driving circuit PDC through the corresponding via HA. ​​Optionally, the output terminal PDC0 of the pixel driving circuit can be a transition metal disposed in the driving layer DRL.

[0400] In the example of Figure 33, the pixel driving circuit PDC is located outside the sub-pixel area LA. It is understood that in other embodiments of this disclosure, when the display panel PNL is provided with the pixel driving circuit PDC, the pixel driving circuit PDC may be located within the corresponding sub-pixel area LA or partially overlap with the corresponding sub-pixel area LA, or may be completely located within the corresponding sub-pixel area LA.

[0401] Not limited to the third type of embodiment disclosed herein, when the driving substrate BPA of the display panel PNL has a pixel driving circuit PDC, the output terminal PDC0 of the pixel driving circuit can be electrically connected to the pad PAD through a via located in the insulating layer PVX. One or both of two different strategies can be adopted, such that when the position or angle of the pad PAD in the sub-pixel area LA is adjusted as the light-emitting diodes (LEDs) in the sub-pixel area LA are offset or deflected, the output terminal PDC0 of the pixel driving circuit remains electrically connected to the pad PAD.

[0402] In this first strategy, referring to Figure 35, the pad layer PADL is further provided with adapter lines TRL that are electrically connected to the pads PAD one-to-one. The insulating layer PVX has at least a portion of the area exposing the output terminal PDC0 of the pixel driving circuit and vias HA that correspond one-to-one with the pads PAD; one end of the adapter line TRL is electrically connected to the corresponding pad PAD, and the other end is electrically connected to the output terminal PDC0 of the pixel driving circuit through the via HA corresponding to the corresponding pad PAD. In this strategy, the length or shape of the adapter line TRL electrically connected to the pad PAD remains unchanged; when the light-emitting diode (LED) in the sub-pixel region LA shifts, the pad PAD in the sub-pixel region LA and the adapter line TRL connected to the pad PAD in the sub-pixel region LA can shift synchronously with the shift of the light-emitting diode (LED) in the sub-pixel region LA. When the adapter cable TRL connected to the pad PAD in the sub-pixel area LA shifts with the shift of the pad PAD in the sub-pixel area LA, the via HA can also shift synchronously with the shift of the end of the adapter cable TRL (away from the end of the pad PAD in the sub-pixel area LA); thus, the via HA shifts synchronously with the shift of the pad PAD.

[0403] When employing this strategy, if the distance between the LEDs in the first sub-pixel area LA1 and the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, then the distance between the vias HA corresponding to the first sub-pixel area LA1 and the second sub-pixel area LA2 in the row direction DH is also less than M times the pixel spacing PH in the row direction. Conversely, if the distance between the LEDs in the first sub-pixel area LA1 and the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, then the distance between the vias HA corresponding to the first sub-pixel area LA1 and the second sub-pixel area LA2 in the row direction DH is also greater than M times the pixel spacing PH in the row direction.

[0404] When employing this strategy, if the distance between the LEDs in the third sub-pixel area LA3 and the fourth sub-pixel area LA4 in the column direction (DV) is less than N times the pixel spacing (PV) in the column direction, then the distance between the vias (HA) corresponding to the third sub-pixel area LA3 and the fourth sub-pixel area LA4 in the column direction (DV) is less than N times the pixel spacing (PV) in the column direction. Conversely, if the distance between the LEDs in the third sub-pixel area LA3 and the fourth sub-pixel area LA4 in the column direction (DV) is greater than N times the pixel spacing (PV) in the column direction, then the distance between the vias (HA) corresponding to the third sub-pixel area LA3 and the fourth sub-pixel area LA4 in the column direction (DV) is greater than N times the pixel spacing (PV) in the column direction.

[0405] Optionally, when employing the first strategy, the fabrication method of the display panel PNL further includes: determining the positions of each via HA of the insulating layer PVX of the driving substrate BPA based on the position and angle information of the light-emitting diodes (LEDs); generating a layout of the insulating layer PVX of the driving substrate BPA based on the positions of each via HA on the insulating layer PVX of the driving substrate BPA; and forming the insulating layer PVX of the driving substrate BPA using a digital exposure machine or a direct-write exposure machine based on the layout of the insulating layer PVX of the driving substrate BPA before forming the pad layer PADL of the driving substrate BPA.

[0406] In this second strategy, referring to Figure 36, the pad layer PADL is further provided with adapter lines TRL that are electrically connected to the pads PAD one-to-one. The insulating layer PVX has at least a portion of the area exposing the output terminal PDC0 of the pixel driving circuit and vias HA that correspond one-to-one with the pads PAD; one end of the adapter line TRL is electrically connected to the corresponding pad PAD, and the other end is electrically connected to the output terminal PDC0 of the pixel driving circuit through the via HA corresponding to the pad PAD. The positions of each via HA are maintained at the designed positions; when the pad PAD is offset relative to the via HA, the length or angle of the adapter line TRL connected to the pad PAD is adaptively adjusted so that the pad PAD maintains an electrical connection with the output terminal PDC0 of the pixel driving circuit through the adapter line TRL, the via HA, and the via. For example, when the pad in the sub-pixel region LA is shifted towards the via HA, the length of the adapter cable TRL for the pad electrical connection in the sub-pixel region LA can be shortened; when the pad in the sub-pixel region LA is shifted away from the via HA, the length of the adapter cable TRL for the pad electrical connection in the sub-pixel region LA can be lengthened.

[0407] When this strategy is adopted, since the positions of each via HA are maintained at their designed positions or the manufacturing deviations that occur during the fabrication process are basically synchronized, the distance between the via HA corresponding to the first sub-pixel area LA1 and the via HA corresponding to the second sub-pixel area LA2 in the row direction DH is M times the pixel spacing PH in the row direction. Correspondingly, the distance between the via HA corresponding to the third sub-pixel area LA3 and the via HA corresponding to the fourth sub-pixel area LA4 in the column direction DV is N times the pixel spacing PV in the column direction. Consequently, since the offsets of the pads PAD in the first sub-pixel area LA1 and the pads PAD in the second sub-pixel area LA2 relative to their respective designed positions in the row direction DH are different, the length of the adapter TRL corresponding to the first sub-pixel area LA1 is different from the length of the adapter TRL corresponding to the second sub-pixel area LA2.

[0408] Optionally, when adopting the second strategy, the method for fabricating the display panel PNL further includes: generating a layout of the pad layer PADL of the driving substrate BPA based on the position and angle information of each of the pads PAD and the position of the vias HA of the driving substrate BPA, wherein the layout of the pad layer PADL of the driving substrate BPA includes the layout of the pads PAD and the layout of the adapter lines TRL.

[0409] In the fourth embodiment of this disclosure, the light-emitting diodes (LEDs) in the display panel PNL are flip-chip LEDs, with the first electrode PE1 and the second electrode PE2 of the LED located on the same side of the light-emitting layer. The first electrode PE1 and the second electrode PE2 of the LED are bonded to the first pad PAD1 and the second pad PAD2 on the driving substrate BPA. Specifically, the LED has an electrode side and a light-emitting side disposed opposite to each other; the electrode side has a first electrode PE1 and a second electrode PE2; the driving substrate BPA has a pad layer PADL, which is provided with a first pad PAD1 connected to the first electrode PE1 of each LED and a second pad PAD2 connected to the second electrode PE2 of each LED.

[0410] In step S110 of this fourth embodiment, referring to FIG37, a light-emitting diode (LED) is transferred onto a temporary substrate BPY, such that the light-emitting side of the LED is connected to the temporary substrate BPY. Referring to FIG37, at least a portion of the LEDs on the temporary substrate BPY are not in the designed position or at the designed angle. In one example, the light-emitting side of the LED is bonded to the temporary substrate BPY using temporary bonding adhesive OCY, and the first electrode PE1 and the second electrode PE2 of the LED are located on the side of the light-emitting layer facing away from the temporary substrate BPY.

[0411] In step S120 of this fourth type of implementation, the position and angle information of each light-emitting diode (LED) on the temporary substrate BPY are detected.

[0412] In step S130 of this fourth type of embodiment, the position and angle information of each first pad PAD1 on the driving substrate BPA are determined based on the position and angle information of the light-emitting diodes (LEDs), and the position and angle information of each second pad PAD2 on the driving substrate BPA are also determined. Specifically, the first pads PAD1 on the driving substrate BPA correspond one-to-one with the first electrodes PE1 of each LED on the temporary substrate BPY; and the second pads PAD2 on the opposing substrate BPB correspond one-to-one with the second electrodes PE2 of each LED on the temporary substrate BPY.

[0413] In step S140 of this fourth embodiment, a layout of the pad layer PADL of the driving substrate BPA is generated based on the position and angle information of the first pad PAD1 and the second pad PAD2 on the driving substrate BPA. Referring to FIG38, the first pad PAD1 on the driving substrate BPA shifts synchronously with the shift of the first electrode PE1 of the corresponding light-emitting diode LED, and the first pad PAD1 on the driving substrate BPA deflects synchronously with the deflection of the first electrode PE1 of the corresponding light-emitting diode LED. The second pad PAD2 on the driving substrate BPA shifts synchronously with the shift of the second electrode PE2 of the corresponding light-emitting diode LED, and the second pad PAD2 on the driving substrate BPA deflects synchronously with the deflection of the second electrode PE2 of the corresponding light-emitting diode LED.

[0414] In step S150 of this fourth type of embodiment, referring to FIG38, the pad layer PADL of the driving substrate BPA is formed using a digital exposure machine or a direct writing exposure machine according to the layout of the pad layer PADL of the driving substrate BPA; the first electrode PE1 connected to the pad PAD of the temporary substrate BPY is bonded to the corresponding first pad PAD1 on the driving substrate BPA, and the second electrode PE2 connected to the pad PAD of the temporary substrate BPY is bonded to the corresponding second pad PAD2 on the driving substrate BPA; the temporary substrate BPY is then removed.

[0415] Using the fabrication method provided in this fourth embodiment, the fabricated display panel PNL includes a driving substrate BPA and a light-emitting diode layer LDL stacked sequentially; the driving substrate BPA has a pad layer PADL, and the pad layer PADL has a first pad PAD1 and a second pad PAD2 disposed in the sub-pixel region LA; the light-emitting diode layer LDL is provided with the light-emitting diode LED, and the light-emitting diode LED has a first electrode PE1 and a second electrode PE2 near the driving substrate BPA; in the sub-pixel region LA, the first electrode PE1 is bonded to the first pad PAD1, and the second electrode PE2 is bonded to the second pad PAD2.

[0416] In this fourth embodiment, the first pad PAD1 and the second pad PAD2 of the driving substrate BPA can be bonded to the first electrode PE1 and the second electrode PE2 respectively, thereby enabling the driving substrate BPA to drive a light-emitting diode (LED). Optionally, the driving substrate BPA can be an active driving substrate or a passive driving substrate.

[0417] In one example of this fourth type of implementation, referring to Figure 38, the driving substrate BPA is a passive driving substrate. The driving substrate BPA is provided with column driving lines VSL (corresponding to each of the sub-pixel columns VLA) and row driving lines HSL (corresponding to each of the sub-pixel rows HLA) (corresponding to each of the sub-pixel rows HLED). The first pad PAD1 in the sub-pixel column VLA is electrically connected to the column driving line VSL corresponding to the sub-pixel column VLA; the second pad PAD2 in the sub-pixel row HLA is electrically connected to the corresponding row driving line HSL. Thus, the column driving line VSL and the row driving line HSL together determine the address of a light-emitting diode (LED).

[0418] Optionally, at least a portion of the column drive line VSL is located in the padding layer PADL, or at least a portion of the row drive line HSL is located in the padding layer PADL. This reduces the number of film layers in the drive substrate BPA, thereby lowering the fabrication cost of the drive substrate BPA. For example, referring to Figures 39 and 40, the drive substrate BPA includes a substrate SBT, an inorganic buffer layer BUF, a first conductive layer MA, an insulating layer PVX0, and a padding layer PADL, which are sequentially stacked. The row drive line HSL is located in one or both of the first conductive layer MA and the padding layer PADL; when the row drive line HSL is located in the first conductive layer MA and the padding layer PADL, the portion of the row drive line HSL located in the first conductive layer MA and the portion located in the padding layer PADL are electrically connected through vias provided in the insulating layer PVX0. The column drive trace VSL is disposed in one or both of the first conductive layer MA and the padding layer PADL; when the column drive trace VSL is disposed in the first conductive layer MA and the padding layer PADL, the portion of the column drive trace VSL located in the first conductive layer MA and the portion located in the padding layer PADL are electrically connected through a via provided on the insulating layer PVX0.

[0419] In one example, referring to Figure 39, the column drive trace VSL is disposed on the padding layer PADL; the main body of the row drive trace HSL is disposed on the padding layer PADL; at the intersection of the row drive trace HSL and the column drive trace VSL, the row drive trace HSL is transferred to the first conductive layer MA through a via located on the insulating layer PVX0 to cross the column drive trace VSL.

[0420] In another example, referring to Figure 40, the column drive trace VSL is disposed on the first conductive layer MA; the main body of the row drive trace HSL is disposed on the first conductive layer MA; at the intersection of the row drive trace HSL and the column drive trace VSL, the row drive trace HSL is transferred to the padding layer PADL through a via located on the insulating layer PVX0 to cross the column drive trace VSL.

[0421] It is understandable that the column drive trace VSL and the row drive trace HSL can also have other configurations, such as the column drive trace VSL being configured on the first conductive layer MA and the row drive trace HSL being configured on the padding layer PADL; or, for example, the row drive trace HSL being configured on the first conductive layer MA and the column drive trace VSL being configured on the padding layer PADL.

[0422] In another example of this fourth type of implementation, the driving substrate BPA is an active driving substrate. The driving substrate BPA includes a substrate SBT, a driving layer DRL, an insulating layer PVX, and a pad layer PADL stacked sequentially. The driving layer DRL is provided with a pixel driving circuit PDC for driving the light-emitting diode (LED) and a plurality of driving traces SL electrically connected to the pixel driving circuit PDC; the output terminal of the pixel driving circuit PDC is electrically connected to the first pad PAD1; at least one of the driving layer DRL and the pad layer PADL is also provided with a power trace SL2 electrically connected to the second pad PAD2. In other words, the pixel driving circuit PDC and the driving trace SL are disposed on the driving layer DRL, the insulating layer PVX has at least a portion of the output terminal of the pixel driving circuit PDC and a first via HA1 corresponding to the first pad PAD1, the first pad PAD1 is electrically connected to the output terminal of the pixel driving circuit PDC through the corresponding first via HA1; at least one of the driving layer DRL and the pad layer PADL is provided with a power trace SL2, the power trace SL2 is electrically connected to the second pad PAD2.

[0423] Optionally, referring to Figure 41, the driving traces SL on the driving substrate BPA include at least column driving traces VSL corresponding one-to-one with the light-emitting diode columns VLEDs and extending along the column direction DV, and row driving traces HSL corresponding one-to-one with the light-emitting diode rows HLEDs and extending along the row direction DH. The pixel driving circuit PDC electrically connected to each light-emitting diode of the light-emitting diode column VLED is connected to the column driving trace VSL corresponding to the light-emitting diode column VLED, and the pixel driving circuit PDC electrically connected to each light-emitting diode of the light-emitting diode row HLED is connected to the row driving trace HSL corresponding to the light-emitting diode row HLED. In one example, the column driving trace VSL is used to apply a driving voltage to the pixel driving circuit PDC to drive the light-emitting diodes LEDs to emit light, and the row driving trace HSL is used to apply a scan signal to the pixel driving circuit PDC. The pixel driving circuit PDC can respond to the scan signal by having the driving voltage on the column driving trace VSL written into the pixel driving circuit PDC.

[0424] In one example, the driving substrate BPA can employ a strategy where the first via HA1 is synchronously offset following the offset of the pad PAD in the sub-pixel region LA to ensure electrical connection between the first pad PAD1 and the output of the pixel driving circuit PDC. Specifically, the insulating layer PVX has a first via HA1 that exposes at least a portion of the output of the pixel driving circuit PDC and corresponds one-to-one with the first pad PAD1; the first pad PAD1 is electrically connected to the output of the pixel driving circuit PDC through the first via HA1. The positions of the first via HA1 and the first pad PAD1 are kept synchronized; for example, the spacing between the characteristic positions of the first pad PAD1 and the characteristic positions of the first via HA1 remains substantially consistent. When using this strategy, the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, and the distance between the first via HA1 corresponding to the first sub-pixel area LA1 and the first via HA1 corresponding to the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction; or, the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, and the distance between the first via HA1 corresponding to the first sub-pixel area LA1 and the first via HA1 corresponding to the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction.

[0425] In this example, the method for fabricating the display panel PNL further includes:

[0426] Based on the position and angle information of the light-emitting diode (LED), the positions of each first via HA1 of the insulating layer PVX of the driving substrate BPA are determined; based on the positions of each first via HA1 on the insulating layer PVX of the driving substrate BPA, the layout of the insulating layer PVX of the driving substrate BPA is generated; before forming the pad layer PADL of the driving substrate BPA, the insulating layer PVX of the driving substrate BPA is formed using a digital exposure machine or a direct-write exposure machine based on the layout of the insulating layer PVX of the driving substrate BPA.

[0427] In another example, the driving substrate BPA can employ a strategy of fixing the first via HA1 and adjusting the first adapter line TRL1 to ensure electrical connection between the first pad PAD1 and the output terminal of the pixel driving circuit PDC. Specifically, the pad layer PADL also has a first adapter line TRL1 corresponding one-to-one with the first pad PAD1; the insulating layer PVX has at least a portion of the area exposing the output terminal of the pixel driving circuit PDC and a first via HA1 corresponding one-to-one with the first pad PAD1; one end of the first adapter line TRL1 is electrically connected to the corresponding first pad PAD1, and the other end is electrically connected to the output terminal of the pixel driving circuit PDC through the first via HA1 corresponding to the first pad PAD1; wherein the position of the first via HA1 is approximately at the designed position, and it does not shift with the offset of the pad PAD in the sub-pixel region LA, nor does it deflect with the angular deflection of the pad PAD in the sub-pixel region LA. When the pad PAD in the sub-pixel area LA shifts, while the position of the first via HA1 remains unchanged, the size of the adapter wire TRL for the electrical connection of the pad PAD in the sub-pixel area LA can be changed to ensure a reliable connection between the pad PAD in the sub-pixel area LA and the output terminal PDC0 of the pixel driving circuit.

[0428] When using this strategy, the distance between the first via HA1 corresponding to the first sub-pixel area LA1 and the first via HA1 corresponding to the second sub-pixel area LA2 in the row direction DH is M times the pixel spacing PH in the row direction; the length of the first adapter TRL1 corresponding to the first sub-pixel area LA1 is different from the length of the first adapter TRL1 corresponding to the second sub-pixel area LA2.

[0429] Optionally, when using the strategy of this example, the method for fabricating the display panel PNL further includes: generating a layout of the pad layer PADL of the driving substrate BPA based on the position and angle information of each of the first pads PAD1 and the position of the first via HA1 of the driving substrate BPA, wherein the layout of the pad layer PADL of the driving substrate BPA includes the layout of the first adapter line TRL1.

[0430] In one example of this fourth type of implementation, the power trace SL2 can be disposed in a metal layer within the driving layer DRL, for example, on the same layer as the output terminal PDC0 of the pixel driving circuit. The insulating layer PVX has a second via HA2 exposing at least a portion of the power trace SL2, and the second pad PAD2 is electrically connected to the power trace SL2 through the second via HA2. In this example, the pad layer PADL also has a second adapter wire TRL2 that corresponds one-to-one with and is electrically connected to each of the second pads PAD2. One end of the second adapter wire TRL2 is electrically connected to the second pad PAD2, and the other end is electrically connected to the power trace SL2 through the second via HA2. Similarly, in one strategy, the second via HA2 can be kept in a designed position, and the length and shape of the second adapter wire TRL2 can be adjusted to ensure the electrical connection between the second pad PAD2 and the power trace SL2. In another strategy, the second adapter cable TRL2 can be offset synchronously with the offset of the second pad PAD2, and the position of the second via HA2 can be adjusted according to the position of the end of the second adapter cable TRL2 (the end away from the second pad PAD2).

[0431] In one example of this fourth type of implementation, the power line SL2 can be disposed on the padding layer PADL, and the second padding PAD2 is electrically connected to the power line SL2 through the second adapter cable TRL2.

[0432] In the fifth embodiment of this disclosure, referring to FIG46, the display panel PNL includes a substrate SBT, a driving layer DRL, a light-emitting diode layer LDL, an insulating layer PVX, and a padding layer PADL stacked sequentially; the driving layer DRL has a first conductive structure ML1 and a second conductive structure ML2; the light-emitting diode layer LDL is provided with the light-emitting diode LED, and the light-emitting diode LED has a first electrode PE1 and a second electrode PE2 on the side away from the substrate SBT; the insulating layer PVX has a first via HA11 exposing the first electrode PE1 and a second via exposing the second electrode PE2. The display panel PNL has a via HA21, a third via HA12 exposing the first conductive structure ML1, and a fourth via HA22 exposing the second conductive structure ML2. The PADL layer has a first pad PAD1 and a second pad PAD2 corresponding to the sub-pixel region LA. The first pad PAD1 is electrically connected to the first electrode PE1 through the first via HA11 and to the first conductive structure ML1 through the third via HA12. The second pad PAD2 is electrically connected to the second electrode PE2 through the second via HA21 and to the second conductive structure ML2 through the fourth via HA22. In this fifth embodiment, the light-emitting diode (LED) of the display panel PNL is a flip-chip LED, and the light-emitting side of the LED is attached to the driving substrate. In this fifth embodiment, the pad PAD is not pre-prepared and bonded to the electrode PE, but is directly formed on the surface of the electrode PE through deposition and patterning. At least a portion of the first pad PAD1 is sunk in the first through hole HA11, and at least a portion of the second pad PAD2 is sunk in the second through hole HA21.

[0433] In step S110 of this fifth embodiment, the light-emitting diode (LED) is transferred onto the driving substrate BPA. Referring to Figures 42 and 43, the driving substrate BPA has a substrate SBT and a driving layer DRL stacked together. The driving layer DRL has a first conductive structure ML1 and a second conductive structure ML2. The LED is located on the side of the driving layer DRL away from the substrate SBT. The first electrode PE1 and the second electrode PE2 are located on the side of the LED away from the substrate SBT.

[0434] In step S120 of this fifth type of embodiment, the position information and angle information of each light-emitting diode (LED) on the driving substrate BPA are detected.

[0435] In step S130 of this fifth type of implementation, the position and angle information of each first pad PAD1 and second pad PAD2 are determined based on the position and angle information of the light-emitting diode LED.

[0436] In step S140 of this fifth embodiment, the layout of the pad layer PADL is determined based on the position and angle information of the first pad PAD1 and the second pad PAD2. This ensures that the first pad PAD1 shifts with the offset of the corresponding first electrode PE1 on the driving substrate BPA, and that the first pad PAD1 deflects with the deflection of the corresponding first electrode PE1 on the driving substrate BPA; similarly, it ensures that the second pad PAD2 shifts with the offset of the corresponding second electrode PE2 on the driving substrate BPA, and that the second pad PAD2 deflects with the deflection of the corresponding second electrode PE2 on the driving substrate BPA.

[0437] In this fifth embodiment, the method for preparing the display panel PNL further includes:

[0438] Step S301: Based on the position and angle information of the light-emitting diode (LED) and the position information of the first conductive structure ML1 and the second conductive structure ML2, determine the position information of the first via HA11, the third via HA12, the second via HA21 and the fourth via HA22 of the insulating layer PVX.

[0439] Step S302: Determine the layout of the insulating layer PVX based on the position information of the first via HA11, the third via HA12, the second via HA21, and the fourth via HA22 of the insulating layer PVX.

[0440] Step S303, see Figure 44, forming an insulating material layer PVXL covering the driving layer DRL and the light-emitting diode LED;

[0441] In step S304, referring to Figure 45, based on the layout of the insulating layer PVX, the insulating material layer PVXL is patterned using a digital exposure machine or a direct-write exposure machine to form a first via HA11, a third via HA12, a second via HA21, and a fourth via HA22. Thus, the first via HA11 can be synchronously offset with the offset of the corresponding first electrode PE1, thereby ensuring that the first via HA11 exposes at least a portion of the corresponding first electrode PE1; the second via HA21 can be synchronously offset with the offset of the corresponding second electrode PE2, thereby ensuring that the second via HA21 exposes at least a portion of the corresponding second electrode PE2; simultaneously, the third via HA12 can expose at least a portion of the first conductive structure ML1, and the fourth via HA22 can expose at least a portion of the second conductive structure ML2.

[0442] In step S150 of this fifth type of embodiment, referring to FIG46, the padding layer PADL of the driving substrate BPA is formed on the side of the insulating layer PVX away from the substrate SBT using a digital exposure machine or a direct writing exposure machine, according to the layout of the padding layer PADL.

[0443] In this fifth type of embodiment, the driving substrate BPA can be a passive driving substrate or a passive driving substrate.

[0444] In the first example of this fifth type of implementation, the driving substrate BPA is a passive driving substrate. Referring to FIG47, the driving substrate BPA includes column driving lines VSL that correspond one-to-one with each of the sub-pixel region columns VLA and extend along the column direction DV, and row driving lines HSL that correspond one-to-one with each of the sub-pixel region rows HLA and extend along the row direction DH. The column driving lines VSL can directly serve as the first conductive structure ML1 of the driving substrate BPA, or the column driving lines VSL have side branches and the side branches serve as the first conductive structure ML1 of the driving substrate BPA. The row driving lines HSL can directly serve as the second conductive structure ML2 of the driving substrate BPA, or the row driving lines HSL have side branches and the side branches serve as the second conductive structure ML2 of the driving substrate BPA.

[0445] In the first example of this fifth type of implementation, referring to FIG48, after the light-emitting diode (LED) is transferred to the driving substrate BPA, the first electrode PE1 and the second electrode PE2 of the LED are located on the side of the LED away from the driving substrate BPA; wherein, at least part of the LED is deviated from the designed position or deviated from the designed angle.

[0446] In the first example of this fifth type of implementation, referring to FIG49, the positions of the first via HA11, the third via HA12, the second via HA21, and the fourth via HA22 on the insulating layer PVX can be adjusted in accordance with the offset of the first pad PAD1 and the second pad PAD2. In particular, the offset of the first via HA11 is synchronized with the offset of the first pad PAD1 and the offset of the first electrode PE1, and the offset of the second via HA21 is synchronized with the offset of the second pad PAD2 and the offset of the second electrode PE2. Thus, if the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, then the distance between the first via HA11 corresponding to the first sub-pixel area LA1 and the first via HA11 corresponding to the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, and the distance between the second via HA21 corresponding to the first sub-pixel area LA1 and the second via HA21 corresponding to the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction. If the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, then the distance between the first via HA11 corresponding to the first sub-pixel area LA1 and the first via HA11 corresponding to the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, and the distance between the second via HA21 corresponding to the first sub-pixel area LA1 and the second via HA21 corresponding to the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction.

[0447] In the first example of this fifth type of implementation, referring to Figures 50 and 51, the generated first pad PAD1 is electrically connected to the corresponding first electrode PE1 through the corresponding first via HA11, the generated first pad PAD1 is electrically connected to the corresponding column drive line VSL through the corresponding third via HA12, the generated second pad PAD2 is electrically connected to the corresponding second electrode PE2 through the corresponding second via HA21, and the generated second pad PAD2 is electrically connected to the corresponding row drive line HSL through the corresponding fourth via HA22.

[0448] Of course, in this fifth type of embodiment, the passive driving substrate used in the driving substrate BPA is not limited to the solution in the first example, and other passive driving solutions can also be used.

[0449] In the second example of this fifth type of embodiment, the driving substrate BPA is an active driving substrate. Referring to FIG52, the driving layer DRL of the driving substrate BPA is provided with a pixel driving circuit PDC for driving the light-emitting diode LED, a plurality of driving traces SL electrically connected to the pixel driving circuit PDC, and a power trace SL2 as a second conductive structure ML2; the output terminal of the pixel driving circuit PDC is used as a first conductive structure ML1 for electrical connection with the first pad PAD1. In the example of FIG52, the driving traces SL driving the pixel driving circuit PDC include row driving traces HSL extending along the row direction DH and column driving traces VSL extending along the column direction DV. The row driving traces HSL and column driving traces VSL can be loaded with different signals, such as driving voltage signals and scan signals respectively.

[0450] In the second example of this fifth type of implementation, referring to FIG53, after the light-emitting diode (LED) is transferred to the driving substrate BPA, the first electrode PE1 and the second electrode PE2 of the LED are located on the side of the LED away from the driving substrate BPA; wherein, at least part of the LED deviates from the designed position or deviates from the designed angle.

[0451] In the second example of this fifth type of embodiment, referring to FIG54, the positions of the first via HA11, the third via HA12, the second via HA21, and the fourth via HA22 on the insulating layer PVX can be adjusted in accordance with the offset of the first pad PAD1 and the second pad PAD2. In particular, the offset of the first via HA11 is synchronized with the offset of the first pad PAD1 and the offset of the first electrode PE1, and the offset of the second via HA21 is synchronized with the offset of the second pad PAD2 and the offset of the second electrode PE2. Thus, if the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, then the distance between the first via HA11 corresponding to the first sub-pixel area LA1 and the first via HA11 corresponding to the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction, and the distance between the second via HA21 corresponding to the first sub-pixel area LA1 and the second via HA21 corresponding to the second sub-pixel area LA2 in the row direction DH is less than M times the pixel spacing PH in the row direction. If the distance between the LED in the first sub-pixel area LA1 and the LED in the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, then the distance between the first via HA11 corresponding to the first sub-pixel area LA1 and the first via HA11 corresponding to the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction, and the distance between the second via HA21 corresponding to the first sub-pixel area LA1 and the second via HA21 corresponding to the second sub-pixel area LA2 in the row direction DH is greater than M times the pixel spacing PH in the row direction.

[0452] In the second example of this fifth type of implementation, referring to Figures 55 and 56, the generated first pad PAD1 is electrically connected to the corresponding first electrode PE1 through the corresponding first via HA11, the generated first pad PAD1 is electrically connected to the corresponding column drive line VSL through the corresponding third via HA12, the generated second pad PAD2 is electrically connected to the corresponding second electrode PE2 through the corresponding second via HA21, and the generated second pad PAD2 is electrically connected to the corresponding row drive line HSL through the corresponding fourth via HA22.

[0453] In the sixth embodiment of this disclosure, referring to Figures 46 and 63, the display panel PNL includes a cover plate COV, a light-emitting diode layer LDL, an insulating layer PVX, and a driving substrate BPA (only the pad layer PADL of the driving substrate BPA is shown); the light-emitting diode layer LDL is provided with light-emitting diodes LED, and the light-emitting diodes LED have a first electrode PE1 and a second electrode PE2 facing the driving substrate BPA; the insulating layer PVX has a first via HA11 exposing the first electrode PE1 and a second via HA21 exposing the second electrode PE2; the driving substrate BPA has a first pad PAD1 and a second pad PAD2 located in the sub-pixel region LA, the first pad PAD1 is electrically connected to the first electrode PE1 through the first via HA11, and the second pad PAD2 is electrically connected to the second electrode PE2 through the second via HA21; at least a portion of the first pad PAD1 is recessed in the first via HA11, and at least a portion of the second pad PAD2 is recessed in the second via HA21. In this sixth embodiment, the pads PAD are not pre-prepared and bonded to the electrode PE, but are formed directly on the surface of the electrode PE through deposition and patterning. Furthermore, the driving substrate BPA has a driving circuit or driving traces, which drive the light-emitting diode (LED) through the first pad PAD1 and the second pad PAD2.

[0454] In step S110 of this sixth embodiment, referring to Figures 57 and 58, the light-emitting diode (LED) is transferred onto the cover plate COV such that the first electrode PE1 and the second electrode PE2 of the LED are located on the side away from the cover plate COV. At least a portion of the LED is deviated from its designed position or angle.

[0455] In step S120 of this sixth type of implementation, the position and angle information of each light-emitting diode (LED) on the cover plate COV are detected.

[0456] In step S130 of this sixth embodiment, the position and angle information of each first pad PAD1 on the padding layer PADL are determined based on the position and angle information of the light-emitting diode (LED), and the position and angle information of each second pad PAD2 on the padding layer PADL are also determined. Figure 62 illustrates the determined positions and shapes of the first pads PAD1 and second pads PAD2.

[0457] In step S140 of this sixth embodiment, referring to FIG62, a layout of the padding layer PADL is generated based on the position and angle information of the first pad PAD1 and the position and angle information of the second pad PAD2 on the padding layer PADL. In this example, the first pad PAD1 shifts synchronously with the shift of the first electrode PE1 and deflects synchronously with the deflection of the first electrode PE1; the second pad PAD2 shifts synchronously with the shift of the second electrode PE2 and deflects synchronously with the deflection of the second electrode PE2.

[0458] In this sixth embodiment, the method for preparing the display panel PNL further includes;

[0459] Step S401: Determine the position information of the first via HA11 and the second via HA21 based on the position information and angle information of the light-emitting diode (LED);

[0460] Step S402: Determine the layout of the insulating layer PVX based on the position information of the first via HA11 and the second via HA21 of the insulating layer PVX.

[0461] Step S403, see Figure 59, forming an insulating material layer PVXL covering the cover plate COV and the light-emitting diode LED;

[0462] In step S404, referring to Figures 60 and 61, based on the layout of the insulating layer PVX, the insulating material layer PVXL is patterned using a digital exposure machine or a direct-write exposure machine to form the first via HA11 and the second via HA21. This allows the first via HA11 to shift synchronously with the offset of the first electrode PE1, and the second via HA21 to shift synchronously with the offset of the second electrode PE2.

[0463] In step S150 of this sixth embodiment, referring to Figures 62 and 63, the padding layer PADL of the driving substrate BPA is formed on the side of the insulating layer PVX away from the substrate SBT using a digital exposure machine or a direct-write exposure machine, according to the layout of the padding layer PADL.

[0464] In this sixth embodiment, the method for fabricating the display panel PNL further includes, referring to Figures 64 and 65, forming other film layers required for the driving substrate BPA on the side of the pad layer PADL away from the cover plate substrate CG, to form a driving circuit or driving traces. For example, in the examples of Figures 64 and 65, the driving substrate BPA is a passive driving substrate BPA. The driving layer DRL of this driving substrate BPA also has an insulating material layer and a trace layer sequentially stacked on the side of the pad layer PADL away from the cover plate substrate CG. The trace layer is provided with row driving traces HSL corresponding one-to-one with the rows of light-emitting diodes (HLEDs) and extending along the row direction DH, and column driving traces VSL corresponding one-to-one with the columns of light-emitting diodes (VLEDs) and extending along the column direction DV. The insulating material layer is provided with vias that electrically connect the first pad PAD1 to the column driving trace VSL, and the insulating material layer is provided with vias that electrically connect the second pad PAD2 to the row driving trace HSL.

[0465] It is understood that the display panel PNL and its preparation method provided in this disclosure are not limited to the examples of the first to sixth categories of embodiments described above.

[0466] Optionally, when the display panel PNL is equipped with row drive traces HSL and column drive traces VSL to achieve passive drive, at least one of the row drive traces HSL and column drive traces VSL can be set at equal intervals.

[0467] For example, the sub-pixel areas LA are arranged into multiple sub-pixel area rows HLA and multiple sub-pixel area columns VLA; the sub-pixel area rows HLA include multiple sub-pixel areas LA arranged sequentially along the row direction DH, and the sub-pixel area columns VLA include multiple sub-pixel areas LA arranged sequentially along the column direction DV. The light-emitting diode (LED) is provided with a first electrode PE1 and a second electrode PE2. A first pad PAD1 corresponding to and electrically connected to the first electrode PE1 and a second pad PAD2 corresponding to and electrically connected to the second electrode PE2 are provided within each sub-pixel area LA. The display panel PNL is provided with column drive lines VSL corresponding one-to-one with each of the sub-pixel area columns VLA; the first pad PAD1 in each sub-pixel area column VLA is electrically connected to the corresponding column drive line VSL. The display panel PNL is provided with row drive lines HSL corresponding one-to-one with each of the sub-pixel area rows HLA; the second pad PAD2 in each sub-pixel area row HLA is electrically connected to the corresponding row drive line HSL.

[0468] When the column drive traces VSL are set to be equally spaced, the distance between the column drive trace VSL corresponding to the first sub-pixel area LA1 and the column drive trace VSL corresponding to the second sub-pixel area LA2 in the row direction DH is M times the set spacing PH of the pixels in the row direction.

[0469] When the row drive traces HSL are set to be equally spaced, the distance between the row drive trace HSL corresponding to the third sub-pixel area LA3 and the row drive trace HSL corresponding to the fourth sub-pixel area LA4 in the column direction DV is N times the set spacing PV of the pixels in the column direction.

[0470] Optionally, when the display panel PNL is equipped with pixel driving circuits (PDCs) to achieve active driving, the pixel driving circuits (PDCs) can be arrayed. For example, the display panel PNL has pixel driving circuits (PDCs) that correspond one-to-one with the sub-pixel areas LA. The output terminal of the pixel driving circuit (PDC) corresponding to the sub-pixel area LA is electrically connected to the first pad (PAD1) in the sub-pixel area LA, and the first electrode (PE1) of the light-emitting diode (LED) in the sub-pixel area LA is electrically connected to the first pad (PAD1) in the sub-pixel area LA.

[0471] When the pixel driving circuits PDC are set at equal intervals along the row direction DH, the distance between the pixel driving circuit PDC corresponding to the first sub-pixel area LA1 and the pixel driving circuit PDC corresponding to the second sub-pixel area LA2 in the row direction DH is M times the pixel setting spacing PH in the row direction.

[0472] When the pixel driving circuits PDC are set at equal intervals along the column direction DV, the distance between the pixel driving circuit PDC corresponding to the third sub-pixel area LA3 and the pixel driving circuit PDC corresponding to the fourth sub-pixel area LA4 in the column direction DV is N times the pixel setting spacing PV in the column direction.

[0473] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

A display panel comprises a plurality of pixels arranged in an array, each of the pixels comprising one or more sub-pixel regions; a light-emitting diode and a pad electrically connected to an electrode of the light-emitting diode are arranged in the sub-pixel region; the display panel comprises a first sub-pixel region and a second sub-pixel region located in different columns, the first sub-pixel region and the second sub-pixel region are located in different pixels respectively, and the first sub-pixel region and the second sub-pixel region are located at the same position in the different pixels respectively; the distance between the first sub-pixel region and the second sub-pixel region in the row direction is M times the arrangement interval of the pixels in the row direction, M is a positive integer; The distance between the light-emitting diode in the first sub-pixel region and the light-emitting diode in the second sub-pixel region in the row direction is less than M times the arrangement interval of the pixels in the row direction, and the distance between the pad in the first sub-pixel region and the pad in the second sub-pixel region in the row direction is less than M times the arrangement interval of the pixels in the row direction; or, the distance between the light-emitting diode in the first sub-pixel region and the light-emitting diode in the second sub-pixel region in the row direction is greater than M times the arrangement interval of the pixels in the row direction, and the distance between the pad in the first sub-pixel region and the pad in the second sub-pixel region in the row direction is greater than M times the arrangement interval of the pixels in the row direction. The display panel of claim 1, wherein, The distance between the characteristic position of the light-emitting diode in the first sub-pixel region and the characteristic position of the pad in the first sub-pixel region in the row direction is a first distance, and the distance between the characteristic position of the light-emitting diode in the second sub-pixel region and the characteristic position of the pad in the second sub-pixel region in the row direction is a second distance; the difference between the first distance and the second distance is not more than 0.4 microns; Wherein, the characteristic position of the light-emitting diode in the first sub-pixel region and the characteristic position of the light-emitting diode in the second sub-pixel region correspond to the same position on the one light-emitting diode respectively; the characteristic position of the pad in the first sub-pixel region and the characteristic position of the pad in the second sub-pixel region correspond to the same position on the one pad respectively. The display panel of claim 1, wherein, The distance between the characteristic position of the light-emitting diode in the first sub-pixel region and the first row edge of the first sub-pixel region is less than the distance between the characteristic position of the light-emitting diode in the second sub-pixel region and the first row edge of the second sub-pixel region, and the distance between the characteristic position of the pad in the first sub-pixel region and the first row edge of the first sub-pixel region is less than the distance between the characteristic position of the pad in the second sub-pixel region and the first row edge of the second sub-pixel region; Or, the distance between the characteristic position of the light-emitting diode in the first sub-pixel region and the first row edge of the first sub-pixel region is greater than the distance between the characteristic position of the light-emitting diode in the second sub-pixel region and the first row edge of the second sub-pixel region, and the distance between the characteristic position of the pad in the first sub-pixel region and the first row edge of the first sub-pixel region is greater than the distance between the characteristic position of the pad in the second sub-pixel region and the first row edge of the second sub-pixel region; ​ The characteristic position of the light emitting diode in the first sub-pixel area corresponds to the same position on the light emitting diode, and the characteristic position of the pad in the first sub-pixel area corresponds to the same position on the pad. The display panel of claim 1, wherein, The light emitting diode in the sub-pixel area has a characteristic edge of the light emitting diode in the sub-pixel area corresponding to the first row edge, and the pad in the sub-pixel area has a characteristic edge of the pad in the sub-pixel area corresponding to the first row edge. The characteristic edge of the light emitting diode in the first sub-pixel area and the characteristic edge of the pad in the first sub-pixel area are both acute angles with the first row edge of the first sub-pixel area; and the inclination direction of the characteristic edge of the light emitting diode in the first sub-pixel area is the same as that of the characteristic edge of the pad in the first sub-pixel area relative to the first row edge of the first sub-pixel area. The display panel of claim 1, wherein, The display panel comprises third and fourth sub-pixel areas located in different rows, the third and fourth sub-pixel areas are located in different pixels respectively, and the third and fourth sub-pixel areas are located in the same position in the different pixels respectively; the distance between the third and fourth sub-pixel areas in the column direction is N times of the arrangement interval of the pixels in the column direction, N being a positive integer. The distance between the light emitting diode in the third sub-pixel area and the light emitting diode in the fourth sub-pixel area in the column direction is less than N times of the arrangement interval of the pixels in the column direction, and the distance between the pad in the third sub-pixel area and the pad in the fourth sub-pixel area in the column direction is less than N times of the arrangement interval of the pixels in the column direction; or the distance between the light emitting diode in the third sub-pixel area and the light emitting diode in the fourth sub-pixel area in the column direction is greater than N times of the arrangement interval of the pixels in the column direction, and the distance between the pad in the third sub-pixel area and the pad in the fourth sub-pixel area in the column direction is greater than N times of the arrangement interval of the pixels in the column direction. The distance between the characteristic position of the light emitting diode in the third sub-pixel area and the characteristic position of the pad in the third sub-pixel area in the column direction is a third distance, and the distance between the characteristic position of the light emitting diode in the fourth sub-pixel area and the characteristic position of the pad in the fourth sub-pixel area in the column direction is a fourth distance; the difference between the third distance and the fourth distance is not more than 0.4 microns. The display panel according to claim 5, wherein, The light emitting diode in the sub-pixel area has a characteristic edge of the light emitting diode in the sub-pixel area corresponding to the first row edge, and the pad in the sub-pixel area has a characteristic edge of the pad in the sub-pixel area corresponding to the first row edge. The display panel according to claim 1, wherein, ​ The display panel further comprises a fifth sub-pixel region; a characteristic edge of a light-emitting diode in the fifth sub-pixel region and a characteristic edge of a pad in the fifth sub-pixel region each form an acute angle with a first row edge of the fifth sub-pixel region; and the characteristic edge of the light-emitting diode in the fifth sub-pixel region and the characteristic edge of the pad in the fifth sub-pixel region have the same inclination direction relative to the first row edge of the fifth sub-pixel region. The display panel according to claim 7, wherein An included angle between the characteristic edge of the light-emitting diode in the fifth sub-pixel region and the characteristic edge of the pad in the fifth sub-pixel region is not more than 10°. The display panel according to any one of claims 1 to 8, wherein The display panel comprises a driving substrate, a light-emitting diode layer and a common electrode layer which are sequentially stacked; The driving substrate is provided with the pad and a driving trace electrically connected with the pad; The light-emitting diode layer is provided with the light-emitting diode having a first electrode close to the driving substrate and a second electrode away from the driving substrate; In the sub-pixel region, the first electrode is bonded to the pad, and the second electrode is electrically connected to the common electrode layer. The sub-pixel region is arranged in a plurality of sub-pixel region rows and a plurality of sub-pixel region columns; the sub-pixel region row comprises a plurality of sub-pixel regions arranged in sequence along a row direction, and the sub-pixel region column comprises a plurality of sub-pixel regions arranged in sequence along a column direction; The display panel according to any one of claims 1 to 8, wherein The display panel comprises a driving substrate, a light-emitting diode layer and an opposite substrate which are sequentially stacked; The driving substrate is provided with a first pad in the sub-pixel region, and is provided with a column driving trace corresponding to each of the sub-pixel region columns; the first pad in the sub-pixel region column is electrically connected to the corresponding column driving trace; The opposite substrate is provided with a second pad in the sub-pixel region, and is provided with a row driving trace corresponding to each of the sub-pixel region rows; the second pad in the sub-pixel region row is electrically connected to the corresponding row driving trace; The light-emitting diode layer is provided with the light-emitting diode having a first electrode close to the driving substrate and a second electrode away from the driving substrate; In the sub-pixel region, the first electrode is bonded to the first pad, and the second electrode is bonded to the second pad. The display panel comprises a driving substrate, a light-emitting diode layer and a common electrode layer which are sequentially stacked; The display panel according to any one of claims 1 to 8, wherein The driving substrate is provided with the pad, a pixel driving circuit for driving the light-emitting diode, and a plurality of driving traces electrically connected to the pixel driving circuit; an output end of the pixel driving circuit is electrically connected to the pad; The light-emitting diode layer is provided with the light-emitting diode having a first electrode close to the driving substrate and a second electrode away from the driving substrate; In the sub-pixel region, the first electrode is bonded to the pad, and the second electrode is electrically connected to the common electrode layer. The driving substrate comprises a substrate, a driving layer, an insulating layer and a pad layer which are sequentially stacked; The pixel driving circuit and the driving trace are arranged in the driving layer, and the pad layer has the pad; The display panel of claim 11, wherein, ​ ​ The insulating layer has a via hole corresponding to the pad and exposing at least part of an output end of the pixel driving circuit, and the pad is electrically connected to the output end of the pixel driving circuit through the corresponding via hole; The distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction, and the distance between the via hole corresponding to the first sub-pixel area and the via hole corresponding to the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction; or the distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction, and the distance between the via hole corresponding to the first sub-pixel area and the via hole corresponding to the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction. The display panel according to claim 11, wherein, The driving substrate comprises a substrate, a driving layer, an insulating layer and a pad layer which are sequentially stacked; The pixel driving circuit and the driving trace are arranged on the driving layer, and the pad layer has the pad and a switching line corresponding to the pad; The insulating layer has a via hole corresponding to the pad and exposing at least part of an output end of the pixel driving circuit, and the pad is electrically connected to the output end of the pixel driving circuit through the corresponding via hole; One end of the switching line is electrically connected to the corresponding pad, and the other end is electrically connected to the output end of the pixel driving circuit through the via hole corresponding to the pad; The distance between the via hole corresponding to the first sub-pixel area and the via hole corresponding to the second sub-pixel area in the row direction is M times of the arrangement interval of the pixels in the row direction. The length of the switching line corresponding to the first sub-pixel area is different from the length of the switching line corresponding to the second sub-pixel area. The display panel according to any one of claims 1 to 8, wherein The display panel comprises a driving substrate and a light-emitting diode layer which are sequentially stacked; the driving substrate has a pad layer, and the pad layer is provided with a first pad and a second pad in the sub-pixel area; The light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode and a second electrode close to the driving substrate; In the sub-pixel area, the first electrode is bonded to the first pad, and the second electrode is bonded to the second pad. The display panel according to claim 14, wherein, The sub-pixel area is arranged in a plurality of sub-pixel area rows and a plurality of sub-pixel area columns; the sub-pixel area row comprises a plurality of sub-pixel areas arranged in sequence in the row direction, and the sub-pixel area column comprises a plurality of sub-pixel areas arranged in sequence in the column direction. The driving substrate is provided with a column driving trace corresponding to each of the sub-pixel area columns and a row driving trace corresponding to each of the sub-pixel area rows; the first pad in the sub-pixel area column is electrically connected to the corresponding column driving trace; and the second pad in the sub-pixel area row is electrically connected to the corresponding row driving trace. The display panel according to claim 15, wherein, At least part of the column driving trace is located in the pad layer, or at least part of the row driving trace is located in the pad layer. The display panel according to claim 14, wherein, The driving substrate comprises a substrate, a driving layer, an insulating layer and a pad layer which are sequentially stacked; The driving layer is provided with a pixel driving circuit for driving the light-emitting diode, and a plurality of driving traces electrically connected with the pixel driving circuit; An output end of the pixel driving circuit is electrically connected with the first pad; at least one of the driving layer and the pad layer is further provided with a power supply trace electrically connected with the second pad. The display panel of claim 17, wherein, The insulating layer has a first via hole exposing at least part of an output end of the pixel driving circuit and corresponding to the first pad; the first pad is electrically connected with the output end of the pixel driving circuit through the first via hole; The distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction, and the distance between the first via hole corresponding to the first sub-pixel area and the first via hole corresponding to the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction; or, the distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction, and the distance between the first via hole corresponding to the first sub-pixel area and the first via hole corresponding to the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction. The display panel of claim 17, wherein The pad layer further has a first adapter line corresponding to the first pad; The insulating layer has a first via hole exposing at least part of an output end of the pixel driving circuit and corresponding to the first pad; One end of the first adapter line is electrically connected with the corresponding first pad, and the other end is electrically connected with the output end of the pixel driving circuit through the first via hole corresponding to the first pad; the distance between the first via hole corresponding to the first sub-pixel area and the first via hole corresponding to the second sub-pixel area in the row direction is M times of the arrangement interval of the pixels in the row direction; The length of the first adapter line corresponding to the first sub-pixel area is different from the length of the first adapter line corresponding to the second sub-pixel area. The display panel according to any one of claims 1 to 8, wherein The display panel comprises a substrate, a driving layer, a light-emitting diode layer, an insulating layer and a pad layer which are sequentially stacked; the driving layer has a first conductive structure and a second conductive structure; The light-emitting diode layer is provided with the light-emitting diode having a first electrode and a second electrode away from the substrate; The insulating layer has a first via hole exposing the first electrode, a second via hole exposing the second electrode, a third via hole exposing the first conductive structure, and a fourth via hole exposing the second conductive structure; The pad layer has a first pad and a second pad corresponding to the sub-pixel area; the first pad is electrically connected with the first electrode through the first via hole and electrically connected with the first conductive structure through the third via hole, and the second pad is electrically connected with the second electrode through the second via hole and electrically connected with the second conductive structure through the fourth via hole. The display panel of claim 20, wherein, The sub-pixel area is arranged in a plurality of sub-pixel area rows and a plurality of sub-pixel area columns; the sub-pixel area row comprises a plurality of sub-pixel areas arranged in sequence in the row direction, and the sub-pixel area column comprises a plurality of sub-pixel areas arranged in sequence in the column direction. The first conductive structure is a column driving trace corresponding to each of the sub-pixel area columns and extending in the column direction, and the second conductive structure is a row driving trace corresponding to each of the sub-pixel area rows and extending in the row direction. The first pad corresponding to the sub-pixel area column is electrically connected with the column driving trace corresponding thereto, and the second pad corresponding to the sub-pixel area row is electrically connected with the row driving trace corresponding thereto. The display panel according to claim 20, wherein The driving layer is provided with a pixel driving circuit for driving the light-emitting diode, a plurality of driving traces electrically connected with the pixel driving circuit, and a power supply trace as a second conductive structure. An output end of the pixel driving circuit is electrically connected with the first pad as a first conductive structure. The display panel of claim 20, wherein, The distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction, the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel area and the second via corresponding to the second sub-pixel area in the row direction is less than M times of the arrangement interval of the pixels in the row direction; or The distance between the light-emitting diode in the first sub-pixel area and the light-emitting diode in the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction, the distance between the first via corresponding to the first sub-pixel area and the first via corresponding to the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel area and the second via corresponding to the second sub-pixel area in the row direction is greater than M times of the arrangement interval of the pixels in the row direction. The display panel according to any one of claims 1 to 8, wherein The display panel comprises a cover plate, a light-emitting diode layer, an insulating layer and a driving substrate which are sequentially stacked; The light-emitting diode layer is provided with the light-emitting diode having a first electrode and a second electrode facing the driving substrate; The insulating layer has a first via exposing the first electrode and a second via exposing the second electrode; The driving substrate has a first pad and a second pad in the sub-pixel area, the first pad is electrically connected with the first electrode through the first via, and the second pad is electrically connected with the second electrode through the second via; at least part of the first pad is sunken in the first via, and at least part of the second pad is sunken in the second via. The display panel of claim 24, wherein, The distance between the light-emitting diode in the first sub-pixel region and the light-emitting diode in the second sub-pixel region in the row direction is less than M times the arrangement interval of the pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel region and the first via corresponding to the second sub-pixel region in the row direction is less than M times the arrangement interval of the pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel region and the second via corresponding to the second sub-pixel region in the row direction is less than M times the arrangement interval of the pixels in the row direction; or the distance between the light-emitting diode in the first sub-pixel region and the light-emitting diode in the second sub-pixel region in the row direction is greater than M times the arrangement interval of the pixels in the row direction, and the distance between the first via corresponding to the first sub-pixel region and the first via corresponding to the second sub-pixel region in the row direction is greater than M times the arrangement interval of the pixels in the row direction, and the distance between the second via corresponding to the first sub-pixel region and the second via corresponding to the second sub-pixel region in the row direction is greater than M times the arrangement interval of the pixels in the row direction. The sub-pixel regions are arranged in a plurality of sub-pixel region rows and a plurality of sub-pixel region columns; each sub-pixel region row comprises a plurality of sub-pixel regions arranged in sequence in the row direction; and each sub-pixel region column comprises a plurality of sub-pixel regions arranged in sequence in the column direction. The display panel according to any one of claims 1 to 8, wherein The light-emitting diode is provided with a first electrode and a second electrode, and the sub-pixel region is provided with a first pad corresponding to the first electrode and electrically connected thereto and a second pad corresponding to the second electrode and electrically connected thereto. The display panel is provided with a column driving wire corresponding to each sub-pixel region column; and the first pad in the sub-pixel region column is electrically connected to the corresponding column driving wire. The display panel is provided with a row driving wire corresponding to each sub-pixel region row; and the second pad in the sub-pixel region row is electrically connected to the corresponding row driving wire. The distance between the column driving wire corresponding to the first sub-pixel region and the column driving wire corresponding to the second sub-pixel region in the row direction is M times the arrangement interval of the pixels in the row direction. The display panel comprises third and fourth sub-pixel regions located in different rows, the third and fourth sub-pixel regions are respectively located in different pixels, and the third and fourth sub-pixel regions are respectively located at the same position in the different pixels. The display panel of claim 26, wherein, The distance between the third and fourth sub-pixel regions in the column direction is N times the arrangement interval of the pixels in the column direction, N being a positive integer; wherein the distance between the light-emitting diode in the third sub-pixel region and the light-emitting diode in the fourth sub-pixel region in the column direction is less than N times the arrangement interval of the pixels in the column direction, and the distance between the pad in the third sub-pixel region and the pad in the fourth sub-pixel region in the column direction is less than N times the arrangement interval of the pixels in the column direction; or the distance between the light-emitting diode in the third sub-pixel region and the light-emitting diode in the fourth sub-pixel region in the column direction is greater than N times the arrangement interval of the pixels in the column direction, and the distance between the pad in the third sub-pixel region and the pad in the fourth sub-pixel region in the column direction is greater than N times the arrangement interval of the pixels in the column direction. ​ ​ The distance between the row driving wire corresponding to the third sub-pixel area and the row driving wire corresponding to the fourth sub-pixel area in the column direction is N times of the arrangement interval of the pixels in the column direction. The display panel according to any one of claims 1 to 8, wherein The display panel has pixel driving circuits corresponding to the sub-pixel areas, and an output end of the pixel driving circuit corresponding to the sub-pixel area is electrically connected to a first pad in the sub-pixel area, and a first electrode of the light-emitting diode in the sub-pixel area is electrically connected to the first pad in the sub-pixel area. The distance between the pixel driving circuit corresponding to the first sub-pixel area and the pixel driving circuit corresponding to the second sub-pixel area in the row direction is M times of the arrangement interval of the pixels in the row direction. The display panel of claim 28, wherein, The display panel includes third sub-pixel areas and fourth sub-pixel areas located in different rows, and the third sub-pixel areas and the fourth sub-pixel areas are located in different pixels, respectively, and the third sub-pixel areas and the fourth sub-pixel areas are located in the same position in the different pixels, respectively. The distance between the third sub-pixel area and the fourth sub-pixel area in the column direction is N times of the arrangement interval of the pixels in the column direction, and N is a positive integer; wherein the distance between the light-emitting diode in the third sub-pixel area and the light-emitting diode in the fourth sub-pixel area in the column direction is less than N times of the arrangement interval of the pixels in the column direction, and the distance between the pad in the third sub-pixel area and the pad in the fourth sub-pixel area in the column direction is less than N times of the arrangement interval of the pixels in the column direction; or the distance between the light-emitting diode in the third sub-pixel area and the light-emitting diode in the fourth sub-pixel area in the column direction is greater than N times of the arrangement interval of the pixels in the column direction, and the distance between the pad in the third sub-pixel area and the pad in the fourth sub-pixel area in the column direction is greater than N times of the arrangement interval of the pixels in the column direction. The distance between the pixel driving circuit corresponding to the third sub-pixel area and the pixel driving circuit corresponding to the fourth sub-pixel area in the column direction is N times of the arrangement interval of the pixels in the column direction. A preparation method of a display panel, comprising: transferring a light-emitting diode to a substrate; detecting position information of each of the light-emitting diodes; determining position information of a pad electrically connected to an electrode of the light-emitting diode according to the position information of the light-emitting diode; generating a layout of at least a film layer where the pad is located according to the position information of each of the pads; forming the film layer where the pad is located according to the layout of the film layer where the pad is located, and making the pad electrically connected to the electrode of the light-emitting diode. The method of claim 30, wherein forming the film layer where the pad is located according to the layout of the film layer where the pad is located comprises: forming the film layer where the pad is located according to the layout of the film layer where the pad is located by using a digital exposure machine or a direct writing exposure machine. The method of claim 30, wherein The preparation method of the display panel further comprises: detecting angle information of the light-emitting diode, and determining angle information of a pad electrically connected to an electrode of the light-emitting diode; generating a layout of at least a film layer where the pad is located according to the position information and the angle information of each of the pads. The method of claim 30, wherein The preparation method of the display panel further comprises: generating a layout of at least a part of a driving metal layer and / or generating a layout of at least a part of an insulating layer according to the position information of each of the pads; Forming the driving metal layer according to the layout of the driving metal layer; and / or forming the insulating layer according to the layout of the insulating layer. The method of claim 32, wherein The light emitting diode has a first electrode and a second electrode arranged oppositely; Transferring the light emitting diode onto the substrate comprises: Transferring the light emitting diode onto the temporary substrate so that the second electrode of the light emitting diode is connected with the temporary substrate; Detecting the position information and the angle information of each light emitting diode comprises: Detecting the position information and the angle information of each light emitting diode on the temporary substrate; According to the position information and the angle information of the light emitting diode, determining the position information and the angle information of the pad electrically connected with the electrode of the light emitting diode comprises: According to the position information and the angle information of the light emitting diode, determining the position information and the angle information of the pad on the driving substrate, each pad on the driving substrate corresponding to each light emitting diode on the temporary substrate; According to the position information and the angle information of each pad, generating at least the layout of the film layer where the pad is located comprises: According to the position information and the angle information of the pad on the driving substrate, generating the layout of the pad layer of the driving substrate, the pad layer having a pad and a driving trace electrically connected with the pad; According to the layout of the film layer where the pad is located, forming the film layer where the pad is located and making the pad electrically connected with the electrode of the light emitting diode comprises: According to the layout of the pad layer of the driving substrate, forming the pad layer of the driving substrate by using a digital exposure machine or a direct writing exposure machine; Making the first electrode of the pad connected with the temporary substrate bonded with the corresponding pad on the driving substrate; Removing the temporary substrate to expose the second electrode of the light emitting diode; Forming a common electrode layer on the side of the light emitting diode away from the driving substrate, the common electrode layer being electrically connected with the second electrode of the light emitting diode. The method of claim 32, wherein The light emitting diode has a first electrode and a second electrode arranged oppositely; the light emitting diode is arranged into a plurality of light emitting diode rows and a plurality of light emitting diode columns; the light emitting diode row comprises a plurality of light emitting diodes arranged in sequence along a row direction, and the light emitting diode column comprises a plurality of light emitting diodes arranged in sequence along a column direction; Transferring the light emitting diode onto the substrate comprises: Transferring the light emitting diode onto the temporary substrate so that the second electrode of the light emitting diode is connected with the temporary substrate; Detecting the position information and the angle information of each light emitting diode comprises: Detecting the position information and the angle information of each light emitting diode on the temporary substrate; According to the position information and the angle information of the light emitting diode, determining the position information and the angle information of the pad electrically connected with the electrode of the light emitting diode comprises: According to the position information and the angle information of the light emitting diode, determining the position information and the angle information of the first pad on the driving substrate and determining the position information and the angle information of the second pad on the opposite substrate; each first pad on the driving substrate corresponding to the first electrode of each light emitting diode on the temporary substrate; each second pad on the opposite substrate corresponding to the second electrode of each light emitting diode on the temporary substrate; According to the position information and the angle information of each of the pads, at least a layout of a film layer in which the pads are located is generated, and the film layer in which the pads are located is formed according to the layout of the film layer in which the pads are located, and the pads are electrically connected to the electrodes of the light emitting diodes. According to the position information and the angle information of the first pads on the driving substrate, a layout of a first pad layer of the driving substrate is generated, the first pad layer having column driving wires corresponding to each of the light emitting diode columns and first pads corresponding to each of the light emitting diodes, the first pad corresponding to each of the light emitting diodes of the light emitting diode column being electrically connected to the column driving wire corresponding to the light emitting diode column; According to the position information and the angle information of the second pads on the opposite substrate, a layout of a second pad layer of the opposite substrate is generated, the second pad layer having row driving wires corresponding to each of the light emitting diode rows and second pads corresponding to each of the light emitting diodes, the second pad corresponding to each of the light emitting diodes of the light emitting diode row being electrically connected to the row driving wire corresponding to the light emitting diode row; According to the layout of the film layer in which the pads are located, the film layer in which the pads are located is formed, and the pads are electrically connected to the electrodes of the light emitting diodes, including: According to the layout of the first pad layer of the driving substrate, a digital exposure machine or a direct writing exposure machine is used to form the first pad layer of the driving substrate; According to the layout of the second pad layer of the opposite substrate, a digital exposure machine or a direct writing exposure machine is used to form the second pad layer of the opposite substrate; The first electrode connected to the pad of the temporary substrate is bonded to the corresponding first pad on the driving substrate; The temporary substrate is removed to expose the second electrode of the light emitting diode; The second electrode of the light emitting diode connected to the driving substrate is bonded to the corresponding second pad on the opposite substrate. The method of claim 32, wherein The light emitting diode has oppositely arranged first and second electrodes; Transferring the light emitting diode to the substrate includes: The light emitting diode is transferred to the temporary substrate, so that the second electrode of the light emitting diode is connected to the temporary substrate; Detecting the position information and the angle information of each of the light emitting diodes includes: Detecting the position information and the angle information of each of the light emitting diodes on the temporary substrate; According to the position information and the angle information of the light emitting diode, the position information and the angle information of the pad electrically connected to the electrode of the light emitting diode are determined, including: According to the position information and the angle information of the light emitting diode, the position information and the angle information of the pad on the driving substrate are determined, each of the pads on the driving substrate corresponding to the first electrode of each of the light emitting diodes on the temporary substrate; According to the position information and the angle information of each of the pads, at least a layout of a film layer in which the pads are located is generated, and the film layer in which the pads are located is formed according to the layout of the film layer in which the pads are located, and the pads are electrically connected to the electrodes of the light emitting diodes. According to the position information and the angle information of the pad on the driving substrate, a layout of a pad layer of the driving substrate is generated; the driving substrate is provided with the pad, a pixel driving circuit for driving the light emitting diode, and a plurality of driving wires electrically connected to the pixel driving circuit; the output end of the pixel driving circuit is electrically connected to the pad; According to the layout of the film layer in which the pads are located, the film layer in which the pads are located is formed, and the pads are electrically connected to the electrodes of the light emitting diodes, including: According to the layout of the pad layer of the driving substrate, a digital exposure machine or a direct writing exposure machine is used to form the pad layer of the driving substrate; ​ The first electrode of the pad connected to the temporary substrate is bonded with the corresponding pad on the driving substrate; The temporary substrate is removed to expose the second electrode of the light emitting diode; A common electrode layer is formed on the side of the light emitting diode away from the driving substrate, and the common electrode layer is electrically connected with the second electrode of the light emitting diode. The method for manufacturing a display panel according to claim 36, wherein The driving substrate comprises a substrate, a driving layer, an insulating layer and a pad layer which are sequentially stacked; The pixel driving circuit and the driving trace are arranged on the driving layer, and the pad layer has the pads and the transfer lines corresponding to the pads one by one; The insulating layer has at least a partial region exposing the output end of the pixel driving circuit and the via holes corresponding to the pads one by one, and the pads are electrically connected with the output end of the pixel driving circuit through the corresponding via holes; The preparation method of the display panel further comprises: According to the position information and the angle information of the light emitting diodes, the positions of the via holes of the insulating layer of the driving substrate are determined; According to the positions of the via holes on the insulating layer of the driving substrate, the layout of the insulating layer of the driving substrate is generated; Before forming the pad layer of the driving substrate, the insulating layer of the driving substrate is formed according to the layout of the insulating layer of the driving substrate by using a digital exposure machine or a direct writing exposure machine. The method for manufacturing a display panel according to claim 36, wherein The driving substrate comprises a substrate, a driving layer, an insulating layer and a pad layer which are sequentially stacked; The pixel driving circuit and the driving trace are arranged on the driving layer, and the pad layer has the pads and the transfer lines corresponding to the pads one by one; The insulating layer has at least a partial region exposing the output end of the pixel driving circuit and the via holes corresponding to the pads one by one; One end of the transfer line is electrically connected with the corresponding pad, and the other end is electrically connected with the output end of the pixel driving circuit through the via hole corresponding to the corresponding pad. The preparation method of the display panel further comprises: According to the position information and the angle information of each pad and according to the positions of the via holes of the driving substrate, the layout of the pad layer of the driving substrate is generated, and the layout of the pad layer of the driving substrate comprises the layout of the pads and the layout of the transfer lines. The light emitting diode has an electrode side and a light emitting side arranged oppositely; the electrode side has a first electrode and a second electrode; The method of claim 32, wherein The driving substrate has a pad layer, and the pad layer is provided with first pads corresponding to the first electrodes of the light emitting diodes one by one and second pads corresponding to the second electrodes of the light emitting diodes one by one; Transferring the light emitting diodes to the substrate comprises: Transferring the light emitting diodes to a temporary substrate so that the light emitting side of the light emitting diode is connected with the temporary substrate; Detecting the position information and the angle information of each light emitting diode comprises: Detecting the position information and the angle information of each light emitting diode on the temporary substrate; According to the position information and the angle information of the light emitting diodes, the position information and the angle information of the pads electrically connected with the electrodes of the light emitting diodes are determined, which comprises: According to the position information and the angle information of the light emitting diodes, the position information and the angle information of each first pad on the driving substrate are determined, and the position information and the angle information of each second pad on the driving substrate are determined. ​ According to the position information and angle information of each of the pads, at least a layout of a film layer where the pads are located is generated, and the layout includes: According to the position information and angle information of the first pad and the position information and angle information of the second pad on the driving substrate, a layout of a pad layer of the driving substrate is generated; According to the layout of the film layer where the pads are located, the film layer where the pads are located is formed, and the pads are electrically connected to the electrodes of the light-emitting diodes, and the layout includes: According to the layout of the pad layer of the driving substrate, a digital exposure machine or a direct writing exposure machine is used to form the pad layer of the driving substrate; The first electrode connected to the pad of the temporary substrate is bonded to the corresponding first pad on the driving substrate, and the second electrode connected to the pad of the temporary substrate is bonded to the corresponding second pad on the driving substrate; The temporary substrate is removed. The driving substrate includes a substrate, a driving layer, an insulating layer, and a pad layer which are sequentially stacked; The method of claim 39, wherein The pixel driving circuit and the driving trace are arranged on the driving layer, the insulating layer has a first via hole corresponding to the first pad and exposing at least part of the output end of the pixel driving circuit, and the first pad is electrically connected to the output end of the pixel driving circuit through the corresponding first via hole; at least one of the driving layer and the pad layer is provided with a power supply trace which is electrically connected to the second pad; The preparation method of the display panel further includes: According to the position information and angle information of the light-emitting diodes, the positions of each first via hole of the insulating layer of the driving substrate are determined; According to the positions of each first via hole on the insulating layer of the driving substrate, a layout of the insulating layer of the driving substrate is generated; Before forming the pad layer of the driving substrate, a digital exposure machine or a direct writing exposure machine is used to form the insulating layer of the driving substrate according to the layout of the insulating layer of the driving substrate. The driving substrate includes a substrate, a driving layer, an insulating layer, and a pad layer which are sequentially stacked; The method of claim 39, wherein, The pixel driving circuit and the driving trace are arranged on the driving layer, the insulating layer has a first via hole corresponding to the first pad and exposing at least part of the output end of the pixel driving circuit, and the first pad is electrically connected to the output end of the pixel driving circuit through the corresponding first via hole; at least one of the driving layer and the pad layer is provided with a power supply trace which is electrically connected to the second pad; The preparation method of the display panel further includes: According to the position information and angle information of each of the first pads and according to the positions of the first via holes of the driving substrate, a layout of the pad layer of the driving substrate is generated, and the layout of the pad layer of the driving substrate includes a layout of the first adapter line. The display panel includes a substrate, a driving layer, a light-emitting diode layer, an insulating layer, and a pad layer which are sequentially stacked; the driving layer has a first conductive structure and a second conductive structure, the light-emitting diode layer is provided with the light-emitting diode, and the light-emitting diode has a first electrode and a second electrode away from the substrate; ​ ​ The method for manufacturing a display panel according to claim 32, wherein ​ The insulating layer has a first via hole exposing the first electrode, a second via hole exposing the second electrode, a third via hole exposing the first conductive structure, and a fourth via hole exposing the second conductive structure; The pad layer has first pads and second pads corresponding to the sub-pixel regions; the first pads are electrically connected to the first electrodes through the first via holes and electrically connected to the first conductive structures through the third via holes, and the second pads are electrically connected to the second electrodes through the second via holes and electrically connected to the second conductive structures through the fourth via holes; Transferring the light-emitting diodes to the substrate includes: Transferring the light-emitting diodes to a driving substrate; the driving substrate has a substrate substrate and a driving layer stacked; the driving layer has first conductive structures and second conductive structures; the light-emitting diodes are located on a side of the driving layer away from the substrate substrate; the first electrodes and the second electrodes are located on a side of the light-emitting diodes away from the substrate substrate; Detecting position information and angle information of each of the light-emitting diodes includes: Detecting position information and angle information of each of the light-emitting diodes on the driving substrate; According to the position information and the angle information of the light-emitting diodes, determining position information and angle information of pads electrically connected to electrodes of the light-emitting diodes includes: According to the position information and the angle information of the light-emitting diodes, determining position information and angle information of each of the first pads and the second pads; According to the position information and the angle information of each of the pads, generating at least a layout of a film layer where the pads are located includes: According to the position information and the angle information of the first pads and the second pads, determining a layout of a pad layer; The method for manufacturing the display panel further includes: According to the position information and the angle information of the light-emitting diodes and the position information of the first conductive structures and the second conductive structures, determining position information of first via holes, third via holes, second via holes and fourth via holes of an insulating layer; According to the position information of the first via holes, the third via holes, the second via holes and the fourth via holes of the insulating layer, determining a layout of the insulating layer; forming an insulating material layer covering the driving layer and the light-emitting diodes; According to the layout of the insulating layer, using a digital exposure machine or a direct writing exposure machine to patternize the insulating material layer to form the first via holes, the third via holes, the second via holes and the fourth via holes; According to the layout of the film layer where the pads are located, forming a film layer where the pads are located, and making the pads electrically connected to electrodes of the light-emitting diodes includes: According to the layout of the pad layer, using a digital exposure machine or a direct writing exposure machine to form the pad layer of the driving substrate on a side of the insulating layer away from the substrate substrate. The display panel includes a cover plate, a light-emitting diode layer, an insulating layer and a driving substrate stacked in sequence; the light-emitting diode layer is provided with the light-emitting diodes, and the light-emitting diodes have first electrodes and second electrodes facing a side of the driving substrate; The method for manufacturing a display panel according to claim 32, wherein The insulating layer has first via holes exposing the first electrodes and second via holes exposing the second electrodes; ​ The driving substrate has a first pad and a second pad in the sub-pixel region, the first pad is electrically connected with the first electrode through the first via, and the second pad is electrically connected with the second electrode through the second via; at least part of the first pad is sunken in the first via, and at least part of the second pad is sunken in the second via; Transferring the light emitting diode to the substrate comprises: Transferring the light emitting diode to the cover plate so that the first electrode and the second electrode of the light emitting diode are located on the side away from the cover plate; Detecting the position information and the angle information of each light emitting diode comprises: Detecting the position information and the angle information of each light emitting diode on the cover plate; According to the position information and the angle information of the light emitting diode, determining the position information and the angle information of the pad electrically connected with the electrode of the light emitting diode comprises: According to the position information and the angle information of the light emitting diode, determining the position information and the angle information of each first pad on the pad layer and determining the position information and the angle information of each second pad on the pad layer; According to the position information and the angle information of each pad, generating at least the layout of the film layer where the pad is located comprises: According to the position information and the angle information of the first pad and the position information and the angle information of the second pad on the pad layer, generating the layout of the pad layer; The preparation method of the display panel further comprises: According to the position information and the angle information of the light emitting diode, determining the position information of the first via and the second via; According to the position information of the first via and the second via of the insulating layer, determining the layout of the insulating layer; Forming an insulating material layer covering the cover plate and the light emitting diode; According to the layout of the insulating layer, using a digital exposure machine or a direct writing exposure machine to patternize the insulating material layer to form the first via and the second via; According to the layout of the film layer where the pad is located, forming the film layer where the pad is located, and making the pad electrically connected with the electrode of the light emitting diode comprises: According to the layout of the pad layer, using a digital exposure machine or a direct writing exposure machine to form the pad layer of the driving substrate on the side of the insulating layer away from the substrate. ​

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