Control method, switching power supply and electronic equipment

By reducing the power consumption of the target hardware and using emergency capacitors to supply power after receiving a power failure warning signal, the processor solves the problem of power failure caused by unstable power supply, and improves the operating stability of the device and the user experience in unstable environments.

CN121934697APending Publication Date: 2026-04-28LENOVO (BEIJING) LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
LENOVO (BEIJING) LTD
Filing Date
2025-12-19
Publication Date
2026-04-28

AI Technical Summary

Technical Problem

In environments with unstable power supply voltage, hardware devices are prone to power loss, resulting in poor operational stability and a poor user experience.

Method used

By receiving a power failure warning signal from the switching power supply, the processor identifies the target hardware and reduces its power consumption to extend the power supply duration of the emergency capacitor, which provides temporary power to the target hardware after the switching power supply fails.

Benefits of technology

It improves the operational stability of electronic devices in environments with unstable power supply, reduces the risk of device shutdown due to power outages, and enhances the user experience.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a control method, a switching power supply and electronic equipment. The method comprises the following steps: receiving a power failure early warning signal sent by a switching power supply; determining target hardware based on the power failure early warning signal, and reducing the power consumption of the target hardware so as to improve the power supply duration of the emergency capacitor; the switching power supply supplies power to the processor; the target hardware refers to hardware with the performance reduction degree of the electronic equipment smaller than a target threshold value after power consumption reduction in the electronic equipment; wherein the emergency capacitor is used for temporarily supplying power to the target hardware of which the power consumption is reduced after the switching power supply is powered down.
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Description

Technical Field

[0001] This application relates to the field of automatic control technology, and more particularly to a control method, a switching power supply, and an electronic device. Background Technology

[0002] Currently, many hardware devices rely primarily on switching power supplies for power. These power supplies draw power from the mains grid, converting AC to DC before supplying power to the hardware. However, using hardware in environments with unstable power supply voltages often results in power outages, leading to poor operational stability and a negative user experience. Summary of the Invention

[0003] This application provides a control method, a switching power supply, an electronic device, a computer-readable storage medium, and a computer program product.

[0004] The technical solution of this application embodiment is implemented as follows: In a first aspect, embodiments of this application provide a control method applied to a processor, the method comprising: Receive power failure warning signals sent by the switching power supply; In response to a power failure warning signal, the target hardware is identified, and its power consumption is reduced to extend the power supply duration of the emergency capacitor. The switching power supply is used to power the processor. The target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power reduction. Emergency capacitors are used to provide temporary power to the target hardware after the power supply has been lost due to reduced power consumption.

[0005] Secondly, embodiments of this application provide a control method applied to a switching power supply, the method comprising: If the switching power supply loses power, a power failure warning signal will be generated; Send a power failure warning signal to the processor powered by the switching power supply; The processor is used to respond to the power failure warning signal, identify the target hardware, and reduce the power consumption of the target hardware to increase the power supply duration of the emergency capacitor. The target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power reduction. The emergency capacitor is used to provide temporary power to the target hardware with reduced power consumption after the switching power supply fails.

[0006] Thirdly, embodiments of this application provide a switching power supply, which includes a rectifier bridge, a power factor corrector, a resonant converter, an emergency capacitor, and a control chip; the rectifier bridge is connected to the input terminal of the power factor corrector and is used to convert the input AC power into DC power; The input of the power factor corrector is connected to the output of the rectifier bridge; the output of the power factor corrector is connected to the input of the resonant converter to boost the DC voltage to the standard operating voltage of the resonant converter; the resonant converter supplies power to the hardware; the emergency capacitor is connected in parallel with the input of the resonant converter; the control chip is connected to the positive output of the rectifier bridge; among these, The control chip is used to generate a power failure warning signal when the switching power supply fails; and to send the power failure warning signal to the processor powered by the switching power supply; the processor is used to respond to the power failure warning signal, identify the target hardware, and reduce the power consumption of the target hardware to extend the power supply time of the emergency capacitor; the target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power reduction. Emergency capacitors are used to provide temporary power to target hardware whose power consumption has decreased after the switching power supply fails.

[0007] Fourthly, embodiments of this application provide an electronic device, including: the electronic device includes a switching power supply and a processor; the switching power supply is used to power the processor; The switching power supply is also used to generate a power failure warning signal if the switching power supply fails, and to send a power failure warning signal to the processor. The processor is used to respond to the power failure warning signal sent by the control chip, identify the target hardware, and reduce the power consumption of the target hardware to increase the power supply duration of the emergency capacitor. The target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power reduction. The emergency capacitor is used to provide temporary power to the target hardware with reduced power consumption after the switching power supply fails.

[0008] Fifthly, embodiments of this application provide a computer-readable storage medium storing a computer program or computer-executable instructions for implementing the control method provided in embodiments of this application when executed by a processor.

[0009] Sixthly, embodiments of this application provide a computer program product, including a computer program or computer-executable instructions, which, when executed by a processor, implement the control method provided in embodiments of this application. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application; Figure 2 This is a flowchart illustrating the interaction of a control method provided in an embodiment of this application; Figure 3 This is a flowchart illustrating a control method provided in an embodiment of this application; Figure 4This is a schematic diagram of a power-down timing provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a switching power supply provided in an embodiment of this application; Figure 6 This is a schematic diagram of the control between a switching power supply and a processor provided in an embodiment of this application; Figure 7 This is a schematic diagram of the hardware entity of an electronic device provided in an embodiment of this application. Detailed Implementation

[0011] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0012] Most current switching power supplies rely on AC power from the mains grid for real-time power supply. When the AC power from the grid disappears, due to the extremely fast transmission speed of electrical signals, the moment the switching power supply stops supplying power and the equipment stops operating is almost the same as the moment the AC power disappears. This situation can lead to a series of problems. For example, if the AC power supplied by the mains grid is unstable, it will cause the equipment to frequently shut down automatically, which will easily shorten the lifespan of the equipment hardware. Frequent automatic shutdowns will also cause the loss of data stored in the device's cache, and may even prevent the user from achieving their intended purpose, causing great inconvenience to the user.

[0013] To address the aforementioned problems, embodiments of this application provide an electronic device. Figure 1 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Figure 1 In the process, electronic device 100 includes a switching power supply 101 and a processor 102; the switching power supply 101 is used to power the processor 102. The switching power supply 101 is also used to generate a power failure warning signal if the switching power supply 101 fails to power, and to send the power failure warning signal to the processor 102. The processor 102 is used to respond to the power failure warning signal sent by the switching power supply 101, identify the target hardware, and reduce the power consumption of the target hardware to increase the power supply duration of the emergency capacitor 1011; the target hardware refers to the hardware in the electronic device 100 whose performance degradation after power reduction is less than a target threshold; the emergency capacitor 1011 is used to provide temporary power to the target hardware after power reduction when the switching power supply 101 fails.

[0014] In the embodiments of this application, a switching power supply (PSU) is a type of power supply that converts electrical energy (different from battery-powered power supplies). It is responsible for converting standard alternating current (AC) into low-voltage, stable direct current (DC) for use by other components within the electronic device. The electronic device can be a smart terminal, a personal computer, a server, or a network device, etc., and the processor within the electronic device can be powered by the switching power supply. Taking a computer as an example, the switching power supply can convert 220V AC mains power into 12V DC to supply the computer motherboard, thus enabling the computer to operate normally. If the switching power supply 101 loses power, the emergency capacitor 1011 can take over and continue supplying power for a short period. During the power supply time of the emergency capacitor 1011, the processor 102 can receive a power failure warning signal generated by the switching power supply, identify the target hardware within the electronic device, and reduce the power consumption of the target hardware, thereby appropriately extending the power supply time of the emergency capacitor 1011. The target hardware can refer to the hardware in the electronic device 100 whose performance degradation after power reduction is less than a target threshold; the specific value of the target threshold can be preset by the developer, and its range is (0,1).

[0015] In some embodiments, the processor is further configured to determine the task type of the current task; and based on the task type of the current task, determine the target hardware to be controlled; wherein the task type of the task performed by the target hardware is different from the task type of the current task.

[0016] In some embodiments, the processor is further configured to determine the occupancy information of a plurality of non-system processes based on the processor's operating information; the non-system processes are the remaining task processes other than the system processes that maintain the operation of the electronic device; the occupancy information represents the proportion of processor operating resources occupied by the non-system processes; determine the hardware identifier of the target non-system process whose occupancy information is greater than the occupancy threshold among the plurality of non-system processes; and determine the target hardware to which the target non-system process belongs based on the hardware identifier.

[0017] In some embodiments, the processor is further configured to determine a resource allocation strategy corresponding to the target hardware based on the type of the target hardware; and reduce the power consumption of the target hardware based on the resource allocation strategy.

[0018] In some embodiments, the processor is further configured to, if the target hardware is a processor, reduce the execution frequency of the remaining task processes in the processor other than the system processes that maintain the operation of the electronic device, so as to reduce the power consumption of the processor; and if the target hardware is other loads communicating with the processor, reduce the number of signals sent by the processor to other loads, so as to reduce the power consumption of other loads.

[0019] In some embodiments, the switching power supply is further configured to: determine the voltage signal period and zero-crossing duration based on the input voltage of the switching power supply; determine a target duration based on the voltage signal period and zero-crossing duration, wherein the target duration is greater than the zero-crossing duration; calculate the moving average voltage of the switching power supply within the target duration; and determine that the switching power supply is powered down if the moving average voltage is less than or equal to a preset voltage value.

[0020] In some embodiments, the switching power supply is further configured to generate a power-on recovery signal if the switching power supply is restored to power; and send the power-on recovery signal to the processor; wherein the processor is configured to cancel the reduction of power consumption of the target hardware in response to the power-on recovery signal.

[0021] The control methods provided in the embodiments of this application are all applied to the electronic devices described above, or the switching power supplies / processors therein.

[0022] Figure 2 This is a flowchart illustrating the interaction of a control method provided in an embodiment of this application, as shown below. Figure 2 As shown, this method can be implemented through steps S101 to S103: Step S101: If the switching power supply fails, the switching power supply generates a power failure warning signal.

[0023] In the embodiments of this application, a switching power supply is used to supply power to electronic devices. A switching power supply is a high-frequency power conversion device that regulates current and voltage by controlling the on / off state of switching elements to achieve efficient power conversion. The input of a switching power supply is typically 220V or 110V AC mains power. After rectification, filtering, and transformation processes, it can ultimately supply power to electronic devices at its rated output power.

[0024] For example, such as Figure 6 As shown, the switching power supply includes a rectifier bridge diode (BD) 61, a power factor correction (PFC) 62, a resonant converter (LLC) 63, and an emergency capacitor 64. The emergency capacitor 64 is in a charged state when the switching power supply is working normally. When the switching power supply is powered off, the emergency capacitor 64 begins to discharge, providing power output to the resonant converter 63. The resonant converter 63 powers the processor, thus enabling the processor to continue working for a period of time after the switching power supply is powered off.

[0025] In the embodiments of this application, the processor is mounted in an electronic device and is used to control the operation of the electronic device to achieve specific functions. The electronic device can be a computer, CNC machine tool, monitor, or other hardware device that requires real-time power supply.

[0026] In the embodiments of this application, the switching power supply may include a control chip or other power supply detection device for detecting the input power supply. The control chip or other power supply detection device can detect the input power supply through rectified signals or live wire detection. When the effective value of the input power supply fluctuates, the switching power supply cannot provide normal power to the electronic device within the fluctuation range. At this time, the control chip or other power supply detection device can generate a power failure warning signal and send it to the processor. The switching power supply may contain a control chip. When the effective value of the input AC power is 0, the rectifier bridge has no voltage output, and the control chip cannot receive the voltage signal output by the rectifier bridge. At this time, the control chip can generate a power failure warning signal.

[0027] In step S102, the switching power supply sends a power failure warning signal to the processor.

[0028] In the embodiments of this application, in addition to supplying power to the processor, the switching power supply can also perform unidirectional communication with the processor. After a power failure, the switching power supply can send a power failure warning signal generated by the switching power supply to the processor. This power failure warning signal can be divided into at least two types: hardware level signals and communication signals. The first type is a high / low level signal generated by an independently powered control chip when power fails, which is transmitted to the processor via hardwired connections. The second type is a communication signal generated by the communication module in the control chip, which is transmitted to the processor through the communication module.

[0029] In step S103, the processor responds to the power failure warning signal, identifies the target hardware, and reduces the power consumption of the target hardware to increase the power supply duration of the emergency capacitor; the switching power supply is used to supply power to the processor; the target hardware refers to the hardware in the electronic device whose performance degradation is less than the target threshold after power reduction; wherein, the emergency capacitor is used to temporarily supply power to the target hardware with reduced power consumption after the switching power supply fails.

[0030] In embodiments of this application, in addition to the basic integrated circuit hardware and processor that maintain device operation, the electronic device may also include hardware for implementing other functions, such as graphics cards, fans, electrical control devices, and lighting. For energy-saving purposes, these devices are typically in standby or hibernation mode when not in use to reduce power consumption. If the processor receives a power-down warning signal during normal operation of the electronic device, it can trigger energy-saving operations, the specific steps of which are as follows: 1) After receiving a power failure warning signal, the processor searches for hardware in electronic devices that can actively reduce power consumption; In some embodiments, hardware that can actively reduce power consumption typically meets the following conditions: (1) it is directly controlled by the processor; (2) it is directly powered by a switching power supply; and (3) it is used to perform a specific function. For example, hardware such as graphics cards, electrical devices, signal lights, and fans can actively reduce power consumption; hardware such as optocouplers, operational amplifiers, transistors, and integrated circuit chips cannot actively reduce power consumption. Based on the above conditions, after receiving a power failure warning signal, hardware that can actively reduce power consumption can be found in the electronic device.

[0031] 2) Based on the actual power consumption of each piece of hardware after power reduction, the processor determines the degree of power consumption reduction in the electronic device caused by the power reduction of each piece of hardware. In some embodiments, each piece of hardware has its corresponding power reduction method. For example, a graphics card reduces power consumption by reducing or pausing the rendering process, electrical devices reduce power consumption by slowing down their operating frequency, signal lights reduce power consumption by reducing brightness or turning off, and fans reduce power consumption by slowing down their speed or stopping. The actual power consumption of each piece of hardware after power reduction can be calculated. For example, if a graphics card pauses the rendering process, its power consumption is determined only by the control instructions that are currently maintaining the rendering progress; after an electrical device slows down its operating frequency, its power consumption is calculated based on the average energy consumption of performing a single action; after power reduction, the actual power consumption of signal lights and fans is calculated based on the ratio of their current brightness to maximum brightness, and the ratio of their current speed to maximum speed. Therefore, based on the actual power consumption of these pieces of hardware after power reduction, the degree of power consumption reduction in the electronic device caused by each piece of hardware can be calculated.

[0032] 3) The processor uses the degree of power consumption reduction as the degree of performance degradation of the electronic device. With the condition that the performance degradation of the electronic device is lower than the target threshold, the processor selects the target hardware from multiple hardware devices and reduces the power consumption of the target hardware.

[0033] In some embodiments, the degree of power consumption reduction can be used as the degree of performance degradation of the electronic device. Target hardware is selected from among these hardware components based on the condition that the performance degradation of the electronic device is lower than a target threshold. For example, if the total power consumption of an electronic device is 500W, and the fan reduces power consumption by 5W, the signal light by 10W, the electrical device by 45W, and the graphics card by 60W, and the target threshold is 10%, then the electrical device and the fan can be selected as target hardware. If multiple hardware combinations exist, the combination that makes the performance degradation of the electronic device closest to the target threshold is used as the selection criterion. In this way, after the target hardware reduces power consumption, the performance degradation of the electronic device will be less than the target threshold. After the target hardware is selected, the power consumption of these target hardware components is reduced according to a predetermined power consumption reduction standard.

[0034] It is understandable that the discharge capacity of a capacitor is directly proportional to the power consumption of the electronic device and the power supply duration of the capacitor, while power consumption is inversely proportional to the power supply duration. Since the discharge capacity of an emergency capacitor is fixed, reducing the power consumption of the target hardware can increase the power supply duration of the emergency capacitor. The relevant implementation details of the emergency capacitor can be found in the embodiment of step S101, and will not be repeated here.

[0035] Based on the above embodiments disclosed in this application, after the electronic device loses power, a power failure warning signal sent by the switching power supply can be received. Based on the power failure warning signal, a target hardware that can reduce power consumption and reduce the performance degradation of the electronic device to less than a target threshold can be identified. Then, the power consumption of the target hardware can be reduced, thereby increasing the power supply duration of the emergency capacitor that temporarily supplies power to the target hardware. This can reduce the risk of power failure of the electronic device caused by unstable power supply voltage leading to power failure of the switching power supply. As a result, the electronic device will not lose power or crash due to the instability of the AC power grid, thereby improving the stability of the electronic device in an environment with unstable power supply and improving the user experience.

[0036] In some embodiments, "determining the target hardware" in step S103 can be achieved through steps S131 and S132: Step S131: Determine the task type of the current task.

[0037] In the embodiments of this application, the current task can refer to a task that the electronic device is performing to achieve a certain function, such as controlling an electrical device to perform a certain operation, causing a signal light to turn on and off at a preset frequency, or displaying an image on a display. The task type can be divided according to the data type processed by the task. For example, all tasks that display images belong to the display type, and the data type they process is images; all tasks that control electrical devices belong to the operation type, and the data type they process is linear control signals; all tasks that control signal lights belong to the indication type, and the data type they process is Boolean indication signals.

[0038] Step S132: Based on the task type of the current task, determine the target hardware to be controlled; the task type of the task executed by the target hardware is different from the task type of the current task.

[0039] In the embodiments of this application, hardware with a different task type than the current task can be identified as the target hardware to be controlled, based on the task type of the current task. Continuing with the above example, if the task type of the current task is a display-related task, the target hardware is hardware other than the monitor and graphics card; if the task type of the current task is an operation-related task, the target hardware is hardware other than electrical devices; if the task type of the current task is an indication-related task, the target hardware is hardware other than traffic lights. In this way, by reducing the power consumption of the target hardware, the risk of interference with the normal execution of the current task can be reduced.

[0040] Based on the above embodiments disclosed in this application, other hardware that is different from the execution hardware of the current task can be determined according to the task type of the current task, and the other hardware can be used as the target hardware. In this way, after reducing the power consumption of the target hardware, the emergency capacitor power supply duration can be increased while reducing the risk of interference with the normal execution of the current task. This ensures that the electronic device will not pause or be interrupted when executing the current task, thereby further improving the stability of the electronic device in the scenario of unstable power supply and further improving the user experience.

[0041] In some embodiments, "determining the target hardware" in step S103 can be achieved through steps S133 to S135: Step S133: Based on the processor's operating information, determine the occupancy information of multiple non-system processes; non-system processes are the remaining task processes other than the system processes that maintain the operation of electronic devices; occupancy information represents the proportion of processor operating resources occupied by non-system processes.

[0042] In the embodiments of this application, the running information can characterize the running status of each process running in the processor, including whether each process is executed, the process identifier of each process, the proportion of processor resources occupied by each process during runtime, and the process group bound to each process.

[0043] In the embodiments of this application, when a processor controls the operation of an electronic device, the processes running internally can be divided into two categories: system processes that maintain the operation of the electronic device, and non-system processes other than the system processes that maintain the operation of the electronic device. Non-system processes are typically used to enable the electronic device to perform specific functions. For example, if the electronic device is a computer, system processes may include system interrupts, system idle processes, "svchost.exe", "dllhost.exe", "smss.exe", "explorer.exe", etc. Non-system processes may be processes corresponding to the names of specific applications such as "nvvsvc.exe", "nvsvc32.exe", etc.

[0044] In the embodiments of this application, the process identifier of each process is determined based on the processor's operating information. Then, based on the process identifier, it can be determined which processes are system processes and which are non-system processes. This allows for the identification of non-system processes currently running on the processor, and further determination of their resource usage information. This resource usage information characterizes the proportion of processor resources occupied by non-system processes. For example, if a game software's "exe" file is run, the process formed by that "exe" file will continuously occupy a significant amount of processor resources. Furthermore, if the "exe" file contains code that calls the graphics card for display, graphics card processes such as "nvvsvc.exe" and "nvsvc32.exe" will also be active. Although the graphics card processes are primarily executed and processed by the graphics card, the processor still needs to manage the dynamic changes of these processes, such as performing instruction scheduling and control. This causes graphics card processes such as "nvvsvc.exe" and "nvsvc32.exe" to also occupy a portion of the processor's operating resources. The resource usage of each process can be represented as a percentage in the processor's management system.

[0045] Step S134: Determine the hardware identifier of the target non-system process whose occupied information is greater than the occupied threshold among multiple non-system processes.

[0046] In the embodiments of this application, if the occupancy information of a non-system process running on the processor is greater than the occupancy threshold, then the non-system process can be identified as a target non-system process. After traversing all non-system processes, all target non-system processes that meet the conditions can be obtained. Then, based on the process attributes of the target non-system process, the hardware identifier of the target non-system process can be obtained. Here, the process attribute refers to the order in which the hardware is triggered in the source code of the process. For example, when controlling an electrical device in an electronic device, the control process of the electrical device will first go through the processor for instruction scheduling and control, and then the instructions will be issued to the specific electrical device to complete the specific control process. The order in which the hardware is triggered is "processor, electrical device"; if other background processes are bundled in the above control process, the background processes can only trigger the processor's instruction control, and the order in which the hardware is triggered is "processor, electrical device, and processor". In the source code, hardware identifiers are used to refer to specific hardware (for example, the hardware identifier of a PS / 2 standard keyboard is PNP0303; the hardware identifier of an integrated graphics card is VEN_8086&DEV_0102&SUBSYS_77881462&REV_09). Therefore, by obtaining the order in which each target non-system process triggers the hardware, the hardware identifier of the target non-system process can be obtained.

[0047] Step S135: Based on the hardware identifier, determine the target hardware to which the target non-system process belongs.

[0048] In embodiments of this application, the hardware identifier can point to the hardware to which the target non-system process belongs. After obtaining the hardware identifier of the target non-system process, the target hardware to which the target non-system process belongs can be determined based on the hardware identifier. For example, if the target non-system process is a control process of an electrical device, the target hardware can be a processor and an electrical device; if the target non-system process is a display process, the target hardware can be a processor and a graphics card.

[0049] Based on the embodiments disclosed in this application, non-system processes can be filtered according to the occupancy information of non-system processes in the processor to obtain target non-system processes. Then, the target hardware to which the target non-system process belongs can be obtained according to the hardware identifier of the target non-system process. All hardware corresponding to non-system processes that are not necessary to execute in the processor can be obtained. In this way, by determining the target non-system process through the occupancy information of non-system processes, the target non-system processes that occupy a large amount of processor resources can be accurately identified. By determining the target hardware to which the target non-system process belongs through the hardware identifier of the target non-system process, the power consumption reduction target in the electronic device can be accurately determined. Thus, power consumption reduction operation of the electronic device can be achieved without affecting the normal operation of the electronic device, thereby improving the stability of the electronic device operation.

[0050] In some embodiments, "reducing the power consumption of the target hardware" in step S103 can be achieved through steps S136 to S137: Step S136: Determine the resource allocation strategy corresponding to the target hardware based on the type of the target hardware.

[0051] In the embodiments of this application, the resource allocation strategy can characterize the computing resources allocated by the processor to the target hardware. Different target hardware typically have different resource allocation strategies. For example, for a graphics card, the computing resources allocated by the processor are resources related to instruction scheduling and control, rather than specific image rendering tasks; for an electrical device, the resources allocated by the processor are resources related to instruction scheduling and control, receiving feedback signals from the electrical device, and determining the control status and progress of the electrical device. Therefore, the resource allocation strategy corresponding to each target hardware can be determined based on its type. The type of target hardware can correspond to the task type of the tasks that the hardware can execute.

[0052] Step S137: Based on the resource allocation strategy, reduce the power consumption of the target hardware.

[0053] In the embodiments of this application, the power consumption of each target hardware can be reduced according to the resource allocation strategy corresponding to each target hardware. The methods for reducing power consumption can include frequency reduction and load reduction. Power consumption can be reduced to the maximum extent achievable by each hardware component, or it can be reduced according to a preset target load reduction rate. For example, if the target hardware is a graphics card, its resource allocation strategy involves resources related to instruction scheduling and control. Therefore, the frequency at which the processor sends tasks to the graphics card can be reduced, thereby reducing the power consumption of the graphics card. If the target hardware is an electrical device, its resource allocation strategy involves resources related to instruction scheduling and control, receiving feedback signals from the electrical device, and determining the control status and progress of the electrical device. Therefore, the frequency at which the processor sends control instructions to the electrical device can be reduced, thereby reducing the power consumption of the electrical device.

[0054] Understandably, the goal of reducing power consumption here is to reduce the electrical energy consumed by each target hardware unit per unit time in a short period of time, that is, to reduce its actual operating power, while each target hardware unit still continues to operate. Taking an electrical device as an example, after reducing the frequency of issuing control commands to the electrical device, the distance the electrical device moves per unit time will decrease, but it will still continue to operate. Therefore, its electrical energy consumption per unit time will also decrease, thereby achieving the purpose of reducing actual operating power.

[0055] Based on the embodiments disclosed in this application, a resource allocation strategy can be determined according to the type of target hardware, and the power consumption of the target hardware can be further reduced according to the resource allocation strategy. In this way, the power consumption of each target hardware per unit time is reduced, but each target hardware still continues to operate. Therefore, the power consumption of the target hardware can be reduced while maintaining its function, which can improve the operational stability of electronic devices in scenarios with unstable power supply to a certain extent.

[0056] In some embodiments, step S137 may include at least one of the following steps: S171 and S172: Step S171: If the target hardware is a processor, reduce the execution frequency of the remaining task processes in the processor, excluding the system processes that maintain the operation of the electronic device, in order to reduce the power consumption of the processor.

[0057] In the embodiments of this application, if the target hardware is a processor, the remaining task processes in the processor, excluding the system processes that maintain the operation of the electronic device, can be determined first. Then, the execution frequency of the remaining task processes in the processor can be reduced to reduce the processor's power consumption. Since the remaining task processes are all non-system processes, the implementation details for determining the remaining task processes can be found in the embodiment of step S123, and will not be repeated here.

[0058] In the embodiments of this application, the specific method for reducing the execution frequency of remaining task processes in the processor can be to reduce the processor's clock speed through the motherboard's BIOS system, or to use dedicated control software to modify the processor's maximum frequency in real time. Alternatively, the processor's Turbo Boost can be temporarily disabled to prevent special tasks from forcibly increasing the processor's real-time frequency.

[0059] Step S172: If the target hardware is another load that communicates with the processor, reduce the number of signals sent by the processor to the other load to reduce the power consumption of the other load.

[0060] In embodiments of this application, if the target hardware is another load communicating with the processor, the number of signals sent by the processor to the other load can be reduced to lower the power consumption of the other load. Considering that the discharge time of the emergency capacitor is very short, and that power is often restored before the emergency capacitor is fully discharged when electronic devices are in a power supply unstable scenario, the reduction referred to here can mean reducing the number of signals sent per unit time. This reduces the number of signals received by the other load in a short period, allowing the other load to process fewer signals in a shorter time, thereby reducing its power consumption.

[0061] Based on the embodiments disclosed in this application, different methods can be adopted to reduce the power consumption of the processor and other loads respectively when the target hardware is a processor and other loads, which can improve the accuracy and reliability of the power reduction of the target hardware to a certain extent.

[0062] Based on the above embodiments, the method may further include steps S104 to S106: Step S104: If the switching power supply is restored to power, the switching power supply generates a power-on recovery signal.

[0063] In the embodiments of this application, if the switching power supply is restored after a power outage, the switching power supply can generate a power-on recovery signal. Similar to the power outage warning signal, the re-existing voltage signal can be regarded as the power-on recovery signal. Alternatively, the control chip inside the switching power supply can detect the DC voltage after the rectifier bridge. If the DC voltage is not zero, it is determined that the switching power supply has been restored, and the control chip generates the power-on recovery signal.

[0064] In step S105, the switching power supply sends a power-on recovery signal to the processor.

[0065] In the embodiments of this application, after generating a power-on recovery signal, the switching power supply can send the power-on recovery signal to the processor. Similar to the power-off warning signal, the power-on recovery signal can also be divided into at least two types: hardware level signals and communication signals. The first type is a high / low level signal generated by an independently powered control chip and transmitted to the processor via hardwired connections. The second type is a communication signal generated by the communication module in the control chip and transmitted to the processor via the communication module.

[0066] In step S106, the processor responds to the power-on recovery signal by canceling the reduction of power consumption of the target hardware.

[0067] In the embodiments of this application, after receiving the power-on recovery signal, the processor can cancel the reduction of power consumption of the target hardware so that the target hardware can resume normal operation. For example, if the target hardware is a processor, the processor's clock speed can be restored to the maximum level and the turbo boost switch can be turned on; if the target hardware is other loads, the number of signals sent by the processor to other loads can be restored.

[0068] Based on the above embodiments disclosed in this application, a power-on recovery signal can be sent to the processor when the switching power supply resumes power supply, thereby enabling the processor to cancel the reduction of power consumption of the target hardware, reducing the number of times the electronic device is in a low-power working state for a long time, and improving the operating performance of the electronic device to a certain extent.

[0069] Figure 3 This is a flowchart illustrating a control method provided in an embodiment of this application, applied to a switching power supply, such as... Figure 3 As shown, the method can also be implemented through steps S301 to S304: Step S301: Determine the voltage signal period and zero-crossing duration based on the input voltage of the switching power supply.

[0070] In the embodiments of this application, the input voltage of the switching power supply is alternating current (AC). Therefore, the voltage signal period and zero-crossing duration can be determined based on the voltage signal corresponding to the input voltage. For example, for 220V AC, "220V" is the effective value of the voltage, and the maximum value of the corresponding voltage signal is... V. Its period is the duration between two adjacent maximum voltage values. For 220V AC, its frequency is typically 50Hz. Ideally, the zero-crossing time of AC is 0, but in practical applications, there is a detectable equivalent zero-crossing time. For example, if an optocoupler is used for detection, the equivalent zero-crossing time is less than or equal to 1.5 milliseconds; while when a comparator or operational amplifier is used for detection, its equivalent zero-crossing time is typically less than or equal to 7.5 microseconds.

[0071] Step S302: Determine the target duration based on the voltage signal period and the zero-crossing duration. The target duration is greater than the zero-crossing duration.

[0072] In the embodiments of this application, the target duration for power failure detection can be determined based on the voltage signal period and the zero-crossing duration. The target duration should be greater than the zero-crossing duration to avoid mistakenly identifying a normal zero-crossing as a power failure. Furthermore, considering that half-wave loss is the most frequent occurrence in unstable power supply environments, the target duration should not exceed the half-wave duration. For example, if the frequency of the supply voltage is 50Hz, the half-wave duration is 10 milliseconds. The target duration can be any duration between 7.5 microseconds and 10 milliseconds. However, in practical applications, the target duration needs to be controlled within a quarter of a cycle, i.e., the target duration should be less than or equal to 5 milliseconds, to avoid rendering the power reduction operation meaningless.

[0073] Step S303: Calculate the moving average voltage of the switching power supply over the target duration.

[0074] In the embodiments of this application, the moving average voltage refers to the smoothed voltage value obtained by calculating the arithmetic average of voltage sample values ​​over a continuous time window. Its core function is to filter out instantaneous voltage fluctuations and noise, reflecting the trend of voltage changes. The moving average voltage of the switching power supply over the target duration can be calculated according to Formula 1, as follows: (Formula 1) in, It is the first Voltage sample value at time 10:00 This is the length of the moving window (the number of sampling points).

[0075] Step S304: If the moving average voltage is less than or equal to the preset voltage value, determine that the switching power supply is powered off.

[0076] In the embodiments of this application, if the calculated moving average voltage is less than or equal to a preset voltage value, it can be determined that the switching power supply has lost power. The preset voltage value can be any voltage value close to or greater than 0, such as 1V, 2V, etc. Since the voltage after rectification by the rectifier bridge is always greater than or equal to 0, there is no need to consider the possibility that the moving average voltage value may be negative.

[0077] For example, such as Figure 4As shown, after bridge rectification, a sinusoidal AC signal can be rectified into a fully positive voltage signal. Within one cycle of the input voltage, if the power grid experiences a power outage at point 401 with a target duration of 4 milliseconds (ms) during the voltage drop, the calculated moving average voltage within those 4 ms will be 0. After 4 ms, the switching power supply can generate a warning signal at point 402 and send it to the processor. If power is restored at point 403 within half a cycle after point 401, the electronic equipment will not interrupt operation. The input voltage recovery point is the point one-quarter of the cycle after receiving the input voltage signal.

[0078] Step S305: If the switching power supply fails, a power failure warning signal is generated.

[0079] In the embodiments of this application, if the switching power supply fails, a power failure warning signal is generated by the switching power supply. Other implementation details of this step can be found in the embodiment of step S101, and will not be repeated here.

[0080] Step S306: Send a power failure warning signal to the processor powered by the switching power supply; wherein, the processor is used to respond to the power failure warning signal, identify the target hardware, and reduce the power consumption of the target hardware to increase the power supply duration of the emergency capacitor; the target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power reduction; the emergency capacitor is used to provide temporary power to the target hardware with reduced power consumption after the switching power supply fails.

[0081] In the embodiments of this application, after generating a power failure warning signal, the switching power supply can send the power failure warning signal to the processor. The implementation details of sending the power failure warning signal and the implementation details of the processor receiving the power failure warning signal can be found in the embodiments of steps S102 and S103, and will not be repeated here.

[0082] Based on the above embodiments disclosed in this application, the target duration for moving average voltage detection can be determined according to the voltage signal period and zero-crossing duration of the input voltage. After calculating the moving average voltage, it can be determined whether the switching power supply has lost power based on the magnitude of the moving average voltage and the preset voltage value. This can significantly reduce the risk of misjudging a normal zero-crossing voltage as a power failure and improve the accuracy of power failure determination for the switching power supply.

[0083] Figure 5 This application provides a schematic diagram of the structure of a switching power supply according to an embodiment of the present application. Figure 5 As shown, Figure 5In the diagram, 51 is a rectifier bridge, 52 is a power factor corrector, 53 is a resonant converter, and 54 is an emergency capacitor. The switching power supply also includes a control chip (not shown in the figure). A rectifier bridge 51 is connected to the input of a power factor corrector 52 to convert the input AC power to DC power. The input of the power factor corrector 52 is connected to the output of the rectifier bridge 51. The output of the power factor corrector 52 is connected to the input of a resonant converter 53 to boost the DC voltage to the standard operating voltage of the resonant converter 53. The resonant converter 53 supplies power to the hardware. An emergency capacitor 54 is connected in parallel with the input of the resonant converter 53. The control chip is connected to the positive output of the rectifier bridge 51. The control chip can generate a power failure warning signal and send it to the processor powered by the switching power supply when the switching power supply fails. The processor can respond to the power failure warning signal, identify the target hardware, and reduce its power consumption to extend the power supply duration of the emergency capacitor 54. The target hardware refers to the electronic device whose performance degradation after power reduction is less than a target threshold. The emergency capacitor 54 can temporarily supply power to the target hardware after power failure.

[0084] The above description of the switching power supply embodiments is similar to the description of the control method embodiments applied to the switching power supply described above, and has similar beneficial effects to the method embodiments. In some embodiments, the functions or modules included in the switching power supply provided in this application can be used to perform the methods described in the above method embodiments. For technical details not disclosed in the switching power supply embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0085] The following describes the application of the control method provided in the embodiments of this application in a real-world scenario.

[0086] A switching power supply is a core power conversion device that converts AC input to the DC output required by a device. Switching power supplies can be applied to all devices powered by alternating current-direct current (AC-DC) switching power supplies, such as desktop computers, workstations, and servers. The AC input voltage Vin of the switching power supply is rectified into DC voltage by rectifier bridge 51, then boosted to a 380V DC bus voltage Vbus by power factor correction unit 52. Resonant converter 53 then chops and steps down the 380V DC bus voltage to the low-voltage DC voltage Vout required by the system, such as 12V or 20V. The minimum Vbus operating voltage that resonant converter 53 can accept is approximately 300V. When the input voltage (the input voltage at the very beginning of the switching power supply, i.e., the input voltage of power factor correction unit 52, which is AC / mains power, shown as Vin in the diagram) experiences a momentary abnormal power loss (input voltage loss), the power supply needs to maintain normal output to ensure the normal operation of the system. Generally, the power supply output should maintain normal operation when the input voltage drop time is <= 10ms (EMC regulation voltage dip test). This time period is called... (Holdup time)

[0087] When the input voltage is lost, the system is powered by the energy stored in the large capacitor C1 to maintain normal power output (the resonant converter works normally). The relationship between the capacitor's energy, capacitance value, and output voltage is shown in Equation 2: (Formula 2); in, The electrical energy of the capacitor, This is the capacitance value of the capacitor. This is the output voltage.

[0088] As mentioned earlier, when the power factor correction device 52 is working normally, the voltage across C1 is 380V. When the input voltage is lost, the power factor correction device 52 stops working, the voltage across C1 drops below 300V, the resonant converter 53 stops working, and the power supply has no output. Therefore, the capacitance value of C1 can be calculated, and the calculation formula is shown in Formula 3: (Formula 3); Where P is the output power of the power supply, which is the system power consumption.

[0089] As you can see, If the requirements remain constant, the higher the power consumption of the P-system, the larger the capacitor C1 needs to store more energy to maintain normal power output when the input voltage is lost. C1 is directly proportional to P. For high-power systems, the C1 of the power supply needs to be very large, resulting in increased size and cost. In hardware design, it is generally expected that the power supply of high-power systems can maintain... Without changing C1, decrease C1, or without changing C1, increase C1. The existing solution involves increasing the output voltage of the power factor corrector 52 during normal operation from 380V to a higher level. Considering the voltage withstand requirements of the semiconductor components in the power factor corrector 52 and resonant converter 53, as well as the large capacitor C1, this output voltage can only be increased to a maximum of 390V. Further improvements could be made by increasing the energy storage capacity of C1 or adding... It doesn't help much (the C1 capacitance value can be reduced by 11%).

[0090] This patented solution utilizes the existing input voltage Vin detection circuit of the power factor correction (PFCC) control chip (the PFCC chip's function includes real-time input voltage detection) to add an input voltage loss judgment and early warning mechanism. When the control chip (Integrated Circuit Chip, IC) detects an input voltage loss (the input voltage remains at 0V for a period of time), the control chip issues a power-down warning signal. (If a communication module is available, the power-down warning signal can be transmitted to the motherboard processor via communication methods (such as cable communication, PMBus communication, Power Delivery (PD) communication, etc.); if no communication module is available, the motherboard controller can be notified via hardware level signals). After receiving this signal, the system can trigger processor throttling and graphics card power braking within a few microseconds (µs). Taking the graphics card as an example, after the graphics card power braking is triggered, the power can be reduced to about 50% of the rated power. When the system is unloaded, the energy stored in C1 can sustain operation for a longer period. .

[0091] Specific implementation method: like Figure 4 As shown, the AC input waveform is a sine wave ( Figure 4 The curve on the left (the curve on the right) is rectified by a rectifier bridge to obtain a fully positive sine wave. The time between the power failure point and the warning signal issuance point is the input voltage loss determination time.

[0092] The power factor correction (PFCD) control IC in the power supply is used for power factor correction and AC-DC rectification control, so the control chip inherently monitors the input voltage value in real time. For this solution, a moving average calculation function for the input voltage can be added to the control chip. When the input voltage is consistently 0V for a period of time, it indicates that an input voltage loss has occurred. Considering the accuracy of input voltage detection and the normal zero-crossing time of each cycle of a sine wave, adding the moving average calculation means that if the input voltage is 0 for 4ms, it indicates that an input voltage loss has occurred. At this time, the PFCD control IC will issue a power-down warning signal (e.g., falling edge (HW) or PMBus warning (FW)). This signal is sent to the motherboard, connected to the CPU and graphics card, which will trigger the CPU and graphics card to reduce their frequency and load.

[0093] Figure 6 A control diagram between a switching power supply and a processor is provided as an embodiment of this application, such as... Figure 6 As shown, Figure 6 In this circuit, the power factor correction controller chip is the switching power supply control chip 601. The input voltage of the control chip 601 is the input voltage detection terminal after rectification by the rectifier bridge. If the moving average voltage is 0 within 4ms, it is determined that an input voltage loss has occurred. The control chip 601 generates a power failure warning signal and sends this signal to the processor 602 and the graphics card 603 to trigger frequency and load reduction. In addition, the frequency and load reduction of the graphics card 603 can also be controlled by the processor 602.

[0094] Taking a 500W power supply as an example, if the system does not reduce load when the input voltage is lost (P=500W, T_holdup=10ms), the required capacitance value for C1 is 184uF. Applying this solution, the system is triggered to reduce load 4ms after the input voltage loss, taking a 50% reduction as an example. C1 energy storage needs to guarantee 500W / 4ms + 250W / 6ms (the system is at full load for 500ms before receiving the power failure warning signal; after receiving the warning signal, it triggers load reduction to 50%, which is 250W. In reality, it may be able to reduce it even lower. The lower the reduction, the less energy is consumed, and the longer the power supply can operate continuously). The calculated capacitance value for C1 is 129uF. It can be seen that by applying this solution, the capacitance value of C1 can be reduced by 30%, resulting in a corresponding reduction in cost and size. From another perspective, if the capacitance of C1 remains unchanged, and the system is triggered to reduce load after a 4ms input voltage loss, it can be calculated that the energy of C1 can still be maintained for 12ms after the load reduction. The total T_holdup = 4 + 12 = 16ms, which is 60% longer than the initial 10ms. Therefore, it can be seen that by applying this solution, the system reliability is improved in the scenario of input voltage loss.

[0095] The relationship between capacitance and power supply duration is expressed as follows:

[0096] in, This refers to the capacitance value of the emergency capacitor. This represents the maximum DC voltage of the switching power supply after rectification. This refers to the DC voltage at which the switching power supply maintains minimum output power after rectification. Maximum DC voltage The output power of the switching power supply is below. To determine the output power of the switching power supply after load derating according to the target derating rate. For power outage warning detection duration, To achieve the target load reduction rate, To reduce power consumption and extend the operating time of electronic devices, This indicates the minimum power-down operating time of an electronic device during its design, where... There exists a minimum value, that is, when the system is... Reduced load ,and The capacitance value at that time. Therefore, in this embodiment of the application, the capacitance value of the emergency capacitor can be greater than the capacitance value at that time. The minimum value is used to extend the operating time of electronic devices by reducing power consumption. Furthermore, there is no upper limit to the capacitance value of the emergency capacitor; its value can be greater than [a certain value]. Any value that is the minimum value. Typically, to reduce hardware costs, the capacitance value of the emergency capacitor can be made equal to... The minimum values ​​are on the same order of magnitude.

[0097] The data examples are shown in Tables 1 to 4 below: Table 1

[0098] Table 2

[0099] Table 3

[0100] Table 4

[0101] In Table 1, taking a 500W power supply as an example, if the system does not reduce load when the input voltage is lost (P=500W, T_holdup10ms), the required capacitance value of C1 is calculated to be 184uF. If 10ms is considered the standard operating time of the electronic device after a power outage, and 500W is considered the standard rated power of the electronic device without reducing power consumption, then the standard capacitance value can be determined based on the standard operating time of the electronic device after a power outage and the standard rated power of the electronic device. In this example, the standard capacitance value is 184uF. Therefore, if the emergency capacitor's capacitance value is the standard capacitance value, the power-down operating time of the electronic device after power reduction will definitely be greater than the standard operating time of the electronic device after a power outage.

[0102] In Table 2, the power control IC needs 4ms to generate a power failure warning signal. During this 4ms period, the system remains at full load (500W) and will not reduce the load. The power control IC needs 4ms to generate a power failure warning signal; after 4ms, it issues the warning and triggers the system to reduce the load to 250W. If T_holdup = 10ms remains constant, then the time to maintain 250W is... =10-4=6ms, at which point the capacitance value of C1 can be calculated to be 129uF. If 10ms is considered as the standard operating time of the electronic device after power failure, and 500W is considered as the standard rated power of the electronic device without reducing power consumption, then when the power failure operating time of the electronic device after power consumption reduction is the standard operating time, the capacitance value of the emergency capacitor must be less than the above standard capacitance value.

[0103] In Table 3, taking a 500W power supply as an example, the system does not reduce load when the input voltage is lost. P=500W, C1=184uF, and the calculated T_holdup is 10ms.

[0104] In Table 4, if the capacitance of C1 remains unchanged, because the system is triggered to reduce its load to 250W after receiving a power failure warning signal, the energy stored in C1 can ensure stable power output to the system for a longer period. The energy is still... . The time can be calculated to be 12ms, all. The time is 4 + 12 = 16 ms.

[0105] It should be noted that, in the embodiments of this application, if the above-described control method is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this application, or the part that contributes to the related technology, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this application are not limited to any specific hardware, software, or firmware, or any combination of hardware, software, and firmware.

[0106] This application provides another electronic device, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the program, it implements some or all of the steps in the above-described method.

[0107] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements some or all of the steps in the above-described method. The computer-readable storage medium can be transient or non-transient.

[0108] This application provides a computer program including computer-readable code. When the computer-readable code runs in an electronic device, the processor in the electronic device executes some or all of the steps in the above-described method.

[0109] This application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above-described method. This computer program product can be implemented specifically through hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium; in other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.

[0110] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between them, while their similarities or commonalities can be referred to interchangeably. The descriptions of the above embodiments of the device, storage medium, computer program, and computer program product are similar to the descriptions of the above method embodiments and have similar beneficial effects. For technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0111] Figure 7 This is a hardware entity diagram of an electronic device provided in an embodiment of this application, such as... Figure 7 As shown, the hardware entity of the electronic device 700 includes a processor 701 and a memory 702, wherein the memory 702 stores a computer program that can run on the processor 701, and the processor 701 executes the program to implement the steps in the method of any of the above embodiments.

[0112] The memory 702 stores computer programs that can run on the processor. The memory 702 is configured to store instructions and applications that can be executed by the processor 701. It can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data and video communication data) in the processor 701 and various modules in the electronic device 700. It can be implemented by flash memory or random access memory (RAM).

[0113] The processor 701 executes the program to implement the control method steps described above. The processor 701 typically controls the overall operation of the electronic device 700.

[0114] This application provides a computer-readable storage medium storing one or more programs that can be executed by one or more processors to implement the steps of the control method as described in any of the above embodiments.

[0115] It should be noted that the descriptions of the storage medium and device embodiments above are similar to those of the method embodiments above, and have similar beneficial effects. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0116] The aforementioned processor can be at least one of the following: Application Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), Central Processing Unit (CPU), Controller, Microcontroller, and Microprocessor. It is understood that other electronic devices can also implement the functions of the aforementioned processor, and this application does not specifically limit the specific implementation.

[0117] The aforementioned computer storage media / memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc, or compact disc read-only memory (CD-ROM), etc.; or it can be various terminals that include one or any combination of the above-mentioned memories, such as mobile phones, computers, tablet devices, personal digital assistants, etc.

[0118] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above steps / processes do not imply a sequential order of execution; the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above embodiments of this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0119] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0120] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0121] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0122] Furthermore, in the various embodiments of this application, all functional units can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0123] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.

[0124] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A control method applied to a processor, the method comprising: Receive power failure warning signals sent by the switching power supply; In response to the power failure warning signal, the target hardware is identified, and the power consumption of the target hardware is reduced to increase the power supply duration of the emergency capacitor. The switching power supply is used to supply power to the processor; the target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power consumption reduction; The emergency capacitor is used to provide temporary power to the target hardware after the power supply has been de-energized.

2. The method according to claim 1, wherein determining the target hardware includes: Determine the task type for the current task; Based on the task type of the current task, determine the target hardware to be controlled; The task type performed by the target hardware is different from the task type of the current task.

3. The method according to claim 1, wherein determining the target hardware includes: Based on the processor's operating information, the occupancy information of multiple non-system processes is determined; The non-system processes refer to the remaining task processes other than the system processes that maintain the operation of electronic devices; The occupancy information represents the proportion of processor resources occupied by the non-system processes; Determine the hardware identifier of the target non-system process whose occupied information is greater than the occupied threshold among the plurality of non-system processes; Based on the hardware identifier, the target hardware to which the target non-system process belongs is determined.

4. The method according to claim 1, wherein reducing the power consumption of the target hardware comprises: Based on the type of the target hardware, determine the resource allocation strategy corresponding to the target hardware; Based on the resource allocation strategy, the power consumption of the target hardware is reduced.

5. The method according to claim 4, wherein reducing the power consumption of the target hardware based on the resource allocation strategy includes at least one of the following: if the target hardware is the processor, reducing the execution frequency of the remaining task processes in the processor other than the system processes that maintain the operation of the electronic device, so as to reduce the power consumption of the processor; If the target hardware is another load that communicates with the processor, reduce the number of signals sent by the processor to the other load to reduce the power consumption of the other load.

6. A control method applied to a switching power supply; the method comprising: If the switching power supply loses power, a power failure warning signal is generated; Send the power failure warning signal to the processor powered by the switching power supply; The processor is configured to respond to the power failure warning signal, identify the target hardware, and reduce the power consumption of the target hardware to increase the power supply duration of the emergency capacitor. The target hardware refers to the hardware in the electronic device whose performance degradation is less than a target threshold after power consumption reduction; the emergency capacitor is used to provide temporary power to the target hardware after power consumption reduction after the switching power supply fails.

7. The method according to claim 6, further comprising: Based on the input voltage of the switching power supply, determine the voltage signal period and zero-crossing duration; Based on the voltage signal period and the zero-crossing duration, a target duration is determined, wherein the target duration is greater than the zero-crossing duration; Calculate the moving average voltage of the switching power supply over the target duration; If the moving average voltage is less than or equal to a preset voltage value, the switching power supply is determined to be powered off.

8. The method according to any one of claims 6 or 7, further comprising: If the switching power supply is restored to power, a power-on recovery signal is generated; Send the power-on recovery signal to the processor; The processor is configured to cancel the reduction of power consumption of the target hardware in response to the power-on recovery signal.

9. A switching power supply, the switching power supply comprising a rectifier bridge, a power factor corrector, a resonant converter, an emergency capacitor, and a control chip; the rectifier bridge is connected to the input terminal of the power factor corrector for converting input AC power into DC power; The input terminal of the power factor corrector is connected to the output terminal of the rectifier bridge; the output terminal of the power factor corrector is connected to the input terminal of the resonant converter, used to boost the DC voltage to the standard operating voltage of the resonant converter; the resonant converter is used to power the hardware; the emergency capacitor is connected in parallel with the input terminal of the resonant converter; the control chip is connected to the positive output terminal of the rectifier bridge; wherein, The control chip is used to generate a power failure warning signal when the switching power supply fails; and to send the power failure warning signal to the processor powered by the switching power supply. The processor is configured to respond to the power failure warning signal, identify the target hardware, and reduce the power consumption of the target hardware to extend the power supply duration of the emergency capacitor. The target hardware refers to the hardware in an electronic device whose performance degradation is less than a target threshold after power consumption reduction; The emergency capacitor is used to provide temporary power to the target hardware after the power consumption has decreased following a power failure of the switching power supply.

10. An electronic device, the electronic device comprising a switching power supply and a processor; the switching power supply being used to power the processor; The switching power supply is further configured to generate a power failure warning signal if the switching power supply fails, and to send the power failure warning signal to the processor. The processor is configured to respond to a power failure warning signal sent by the switching power supply, identify target hardware, and reduce the power consumption of the target hardware to increase the power supply duration of the emergency capacitor; the target hardware refers to hardware in the electronic device whose performance degradation is less than a target threshold after power reduction; the emergency capacitor is configured to provide temporary power to the target hardware after power reduction when the switching power supply fails.