Four adjacent element packing real-time phase calculation method and device

Abstract

The application provides a four-adjacent-element packaging real-time phase calculation method, belongs to the field of phased array antenna beam control and beamforming chips, and calculates the sine value and cosine value of the pitch angle and the azimuth angle; four adjacent elements are divided into element groups, element indexes are split into element group indexes and group indexes, each element in the element group is traversed in the ascending group index, the element groups are traversed in the ascending element group index, and the coordinates of each element in each element group are sequentially output; the phases of each element in each element group are calculated in real time; the compensated phases of each element in the element group are obtained; the compensated phases of each element in the element group are mapped and corresponded with the phase table of the beamforming chip, the phase command is issued, and the traversal of the element groups is completed; and the device is also provided; the phase calculation and issuing throughput are improved, and the whole frame update delay is reduced.

Description

Technical Field

[0001] This invention relates to the field of phased array antenna beam control and beamforming chip technology, and in particular to a method and apparatus for real-time phase calculation of four adjacent array elements. Background Technology

[0002] Phased array antennas achieve beamforming by applying different phases to each array element, enabling beam pointing adjustment in a short time. They are widely used in satellite communications, phased array radar, and high-speed link tracking.

[0003] As the array size increases, the phase of the array elements needs to be calculated in real time and sent to the beamforming chip at high speed. The traditional sequential calculation and channel-by-channel sending method can easily lead to increased frame update delay, making it difficult to meet the requirements of fast beam control.

[0004] In the prior art, Chinese invention patent application CN120567256A, entitled "A Method, Device, and Storage Medium for Multi-Channel Partitioned Beam Control of a Large-Scale Phased Array Based on FPGA," divides the phased array antenna elements into multiple regions according to the element position coordinates and processes the beam control code of each element quickly through parallel computing. This method divides the array into Q blocks, each containing multiple beamforming chips, and then performs parallel computing across the Q blocks, significantly reducing time compared to full-string computing. However, it still requires aligning the beam control code of each element with the corresponding element, and cannot solve the latency problem caused by the mismatch between traditional row / column traversal computing and the four-channel chip hardware architecture, making it difficult to meet the requirements of fast beam control. Summary of the Invention

[0005] The technical problem to be solved by this invention is: how to solve the latency problem caused by the mismatch between row / column traversal calculation and the hardware architecture of a four-channel chip.

[0006] This invention solves the above-mentioned technical problems through the following technical solution: a real-time phase calculation method for four adjacent array elements, comprising:

[0007] Receive the pitch angle and azimuth angle, and calculate the sine and cosine values ​​of the pitch angle and azimuth angle;

[0008] The elements of the two-dimensional planar phased array are divided into groups of four adjacent elements. indivual Array element group, indexing the array elements Split into array tuple index and intra-group indexes Among them, the array element index The lower 2 bits represent the group index. Array element index of high Bit representation array element index , First, use an incremental intra-group index. Traversal Each element within a set of elements is then indexed by an increasing set of elements. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group;

[0009] Based on the sine and cosine values ​​of pitch and azimuth angles, and The coordinates of each element within the array element group and the system operating frequency are calculated in real time using a pipelined approach. The phase of each element within the array element group;

[0010] With the current Read the four corresponding compensation symbols in groups of four, and then combine the four compensation symbols with the current array elements. The phases of each element within the array element group are superimposed to obtain... The phase of each element within the array element group after compensation;

[0011] Will The compensated phase of each element in the array element group is mapped to the phase table of the beamforming chip, and the phase command is issued according to the configuration protocol of the beamforming chip until the entire array is traversed. indivual Array element group.

[0012] The four-adjacent array element packing real-time phase calculation method proposed in this invention, compared with the traditional array element traversal calculation, aligns the phase calculation with the downlink phase and the four array element control unit of the beamforming chip, which can significantly reduce the difficulty of channel mapping and loading timing alignment, improve the phase calculation and downlink throughput and reduce the whole frame update latency.

[0013] Preferred, intra-group index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a column-first, row-second manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

[0014] Preferred, intra-group index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a row-first, column-later manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

[0015] Preferably, traverse in column-first, then row-first order. indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

[0016] Preferably, traverse in a row-first, column-last order. indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

[0017] This invention is based on array element index Perform row and column decoding to obtain variables. and Then based on the variables and Perform array element base address location to find the current Starting position within the array element group By locating each The starting position of the array element group can be directly determined. The coordinates of the four array elements within the array element group.

[0018] Preferably, a pipelined approach is used to calculate each... When calculating the phase of each element within an array element group, the phase of each element is calculated. The radian values ​​of each element in the array element group are modified by taking the remainder to obtain the normalized radian value, and then the normalized radian value is converted into a phase value.

[0019] Preferably, the writing and reading order of the compensation symbols is consistent with the traversal order of the array elements. This ensures that the four compensation symbols of the same 2×2 array element group are arranged consecutively in storage, thus aligning with the array element group control interface of the phased array chip without additional rearrangement, improving the efficiency and adaptability of compensation loading and real-time updates.

[0020] Preferably, the CORDIC algorithm is used to calculate the sine and cosine values ​​of the elevation and azimuth angles. Using CORDIC for real-time trigonometric function calculation combined with pipelined phase calculation can reduce hardware resource overhead while ensuring accuracy, making it suitable for rapid pointing update scenarios for large-scale phased array antennas.

[0021] The present invention also provides a real-time phase calculation device for four adjacent array elements, comprising:

[0022] The trigonometric function calculation module is used to receive the pitch angle and azimuth angle, and calculate the sine and cosine values ​​of the pitch angle and azimuth angle;

[0023] The array element grouping and index generation module is used to divide the array elements of a two-dimensional planar phased array into groups of four adjacent elements. indivual Array element group, indexing the array elements Split into array tuple index and group index, where the element index The lower 2 bits represent the group index, array element index. of high Bit representation array element index , First, traverse using the incrementing index within the group. Each element within a set of elements is then indexed by an increasing set of elements. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group;

[0024] The wave control phase calculation module is used to calculate the sine and cosine values ​​based on the elevation and azimuth angles. The coordinates of each element within the array element group and the system operating frequency are calculated in real time using a pipelined approach. The phase of each element within the array element group;

[0025] The compensation module is used to compensate for the current Read the four corresponding compensation symbols in groups of four, and then combine the four compensation symbols with the current array elements. The phases of each element within the array element group are superimposed to obtain... The phase of each element within the array element group after compensation;

[0026] Output interface module, used to... The compensated phase of each element in the array element group is mapped to the phase table of the beamforming chip, and the phase command is issued according to the configuration protocol of the beamforming chip until the entire array is traversed. indivual Array element group.

[0027] Preferred, intra-group index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a column-first, row-second manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates . Attached Figure Description

[0028] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0029] Figure 1 This is a schematic diagram showing the arrangement of beamforming chips in a two-dimensional planar phased array in the prior art.

[0030] Figure 2 This is a flowchart of the real-time phase calculation method for packing four adjacent array elements provided in Embodiment 1 of the present invention;

[0031] Figure 3 The array element index in the real-time phase calculation method for packing four adjacent array elements provided in Embodiment 1 of the present invention. Schematic diagram of the splitting principle;

[0032] Figure 4 This is a schematic diagram of the real-time phase calculation device for packaging four adjacent array elements provided in Embodiment 2 of the present invention;

[0033] Figure 5 This is a schematic diagram of the working principle of the array element group division and index generation module in the four adjacent array element packing real-time phase calculation device provided in Embodiment 2 of the present invention;

[0034] Figure 6 This is a simulation diagram of the array element group division and index generation module in the four adjacent array element packing real-time phase calculation device provided in Embodiment 2 of the present invention;

[0035] Figure 7This is a simulation diagram of the wave-controlled phase calculation module in the four adjacent array element packing real-time phase calculation device provided in Embodiment 2 of the present invention;

[0036] Figure 8 The image shows the phase comparison diagram of the array element group obtained by the real-time phase calculation method for packing four adjacent array elements provided in Embodiment 1 of the present invention.

[0037] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below in conjunction with specific embodiments and with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0039] Example 1

[0040] See Figure 3 With the formation as Taking a two-dimensional planar phased array as an example, the array surface has a total of 256 array elements. Figure 3 Each small square in the array represents an element. Figure 1 The diagram illustrates the arrangement of beamforming chips in a two-dimensional planar phased array: a single beamforming chip 5 can independently control the phase of its four surrounding antenna elements, thereby achieving phase adjustment and beam pointing control. Figure 1 In the diagram, 1, 2, 3, and 4 represent antenna elements. Large-scale phased array phase calculations typically involve calculating the phase element by element, traversing the array rows / columns, and then mapping it to the actual beam control hardware. For example, in... Figure 3In the process, the beamforming chip first iterates through each element in the first row from left to right. After completing the first row, it iterates through each element in the second row from left to right, and so on, until all elements have been traversed. Alternatively, it can traverse by column: first, iterate through each element in the first column from top to bottom. After completing the first column, it iterates through each element in the second column from top to bottom, and so on, until all elements have been traversed. However, beamforming chips actually use four adjacent elements as basic control units. Traversing row by row or column by column can lead to a mismatch between phase calculation and the chip's control of antenna mapping and loading timing, resulting in low transmission efficiency and increased frame update latency. Row-by-row / column-by-column traversal generates phase data sequentially for each element, which breaks down the four element data points corresponding to a single chip. This necessitates the introduction of an additional caching mechanism in the software. Specifically, the software needs to first cache the calculated element phase data in memory or registers until the element phase calculation is complete. Then, an additional address mapping controller is required to extract, align, and stitch these four discrete data points back together. In contrast, this application plans the beamforming code calculation order based on the geometric position of the beamforming chip, eliminating the need for an address mapping controller. This avoids the overhead of system address reassembly, saves FPGA storage resources, and eliminates data reassembly latency.

[0041] To address this, this invention aligns phase calculation, transmission, and the four-element control unit of the beamforming chip, enabling real-time phase generation and transmission of four adjacent elements. This eliminates the alignment process, thereby reducing phase update latency and improving beam control efficiency. The specific solution is described below:

[0042] See Figure 2 This embodiment provides a method for real-time phase calculation of four adjacent array elements, including the following steps:

[0043] Step 1: Receive the target pointing angle input from the outside. The target pointing angle includes the pitch angle and the azimuth angle. Use the CORDIC (Coordinate Rotation Digital Computer) algorithm to calculate the sine and cosine values ​​of the pitch angle and the azimuth angle. The sine and cosine values ​​of the pitch angle and the azimuth angle will be used as the direction parameters for wave control phase calculation.

[0044] Step 2: Divide the array elements of the two-dimensional planar phased array into groups of four adjacent elements. indivual Array element group, indexing the array elements Split into array tuple index and intra-group indexes Among them, the array element index The lower 2 bits represent the group index. Array element index of high Bit representation array element index , First, use an incremental intra-group index. Traversal Each element within a set of elements is then indexed by an increasing set of elements. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group.

[0045] This embodiment uses the array surface as... Taking a two-dimensional planar phased array as an example, see Figure 3 Of the 256 array elements, each element has an index. The numbers are as follows: 0000000000, 000000001, 0000000010, 0000000011, 0000000100, 0000000101, 0000000110, 0000000111, ..., 0011111100, 0011111101, 0011111110, 0011111111.

[0046] The elements of the two-dimensional planar phased array are divided into groups of four adjacent elements. indivual For example, a formation element group with 256 elements. 64 array elements according to Array arrangement. Element index. of high Bit representation array element index ,at this time That is: array element index The array element indices are: 00000000, 00000001, 00000010, ..., 00111111. The value ranges from 0 to And it increments by 1 at a constant rate, i.e., the array element index. The values ​​are: 0, 1, 2, ..., 63.

[0047] Each The four array elements within a group have the same intra-group index, which is 00, 01, 10, and 11. The value can be 0, 1, 2, or 3, and it is the group index. It also increments by 1 in a constant manner.

[0048] This invention first uses an incremental intra-group index. Traversal Each element within a set of elements is then indexed by an increasing set of elements. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group. It can be seen that this invention uses an incremental index. Perform a traversal and output the element coordinates in the order of intra-group first, then inter-group. The following section combines... Figure 3 The array shown illustrates the traversal method of this invention: if traversed in a column-first, row-later manner... Each element within the array group is traversed in a row-first, column-last order of 64 elements. The array element groups are traversed as follows: first, traverse the four array elements in the first array element group: 0, 1, 2, 3, then traverse the four array elements in the second array element group: 4, 5, 6, 7. Prioritize traversing the eight array element groups in the first column, that is, traverse the four array elements in the eighth array element group: 28, 29, 30, 31, then traverse the eight array element groups in the second column, and so on, until all 64 array element groups have been traversed, completing the traversal of 256 array elements.

[0049] Similarly, if we traverse in the order of column first, then row... Each element in the array group is traversed in a column-first, row-second manner, for a total of 64 elements. The array element groups are traversed as follows: First, traverse the four array elements in the first array element group: 0, 1, 2, 3. Then, traverse the four array elements in the second array element group: 32, 33, 34, 35. Prioritize traversing the eight array element groups in the first row, that is, traverse the four array elements in the eighth array element group: 224, 225, 226, 227. Then, traverse the eight array element groups in the second row, and so on, until all 64 array element groups have been traversed, completing the traversal of 256 array elements.

[0050] This invention replaces the traditional sequential calculation of each array element with group calculation and packaged distribution in 2×2 array element units, reducing the pointer update latency and enhancing the compatibility with beamforming chips.

[0051] Intragroup Index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a column-first, row-second manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

[0052] Intragroup Index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a row-first, column-later manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

[0053] Traverse in column-first, row-second order. indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

[0054] Traverse in row-first-column order indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions. Therefore, , Only even-numbered coordinates are considered. For each The starting position of the array element group is determined by locating each element. The starting position of the array element group can be directly determined. The coordinates of the four array elements within the array element group.

[0055] Step 3: Based on the sine and cosine values ​​of the pitch and azimuth angles, and The coordinates of each element within the array element group and the system operating frequency are calculated in real time using a pipelined approach. The phase of each element within the array element group; each element is calculated in real time using a pipelined approach. When calculating the phase of each element within an array element group, the phase of each element is calculated. The radian values ​​of each element within the array element group are moduloed to convert the phase values ​​to [a specific value]. The normalized radians are obtained, and then the normalized radians are converted into phase values. The range of the converted phase values ​​is 0 degrees to 360 degrees to meet the requirements of subsequent phase table mapping.

[0056] Step 4, with the current Read the four corresponding compensation symbols in groups of four, and then combine the four compensation symbols with the current array elements. The phases of each element within the array element group are superimposed to obtain... The phase of each element within the array element group is compensated, thereby completing the phase compensation control of the array elements. In this invention, the writing and reading order of the compensation code elements is strictly consistent with the traversal order of the array element group division and index generation module. The compensation module uses the array element group index as the block address to store the compensation code elements in groups, so that the four compensation code elements of the same 2×2 array element group are arranged continuously in storage. Therefore, it can be aligned with the array element group control interface of the phased array chip without additional rearrangement, improving the efficiency and adaptability of compensation loading and real-time updates.

[0057] Step 5, The compensated phase of each element in the array element group is mapped to the phase table of the beamforming chip, and the phase command is issued according to the configuration protocol of the beamforming chip until the entire array is traversed. indivual Array element group. The beam pointing of the phased array is rapidly and precisely adjusted using a beamforming chip.

[0058] Steps 1 to 5 enable continuous output of array element coordinates, which are then aligned with the timing of the subsequent "packaging and distribution of four adjacent array elements," thereby improving the loading efficiency of the beamforming chip and reducing the overall frame update latency.

[0059] The four-adjacent array element packing real-time phase calculation method proposed in this invention, compared with the traditional array element traversal calculation, aligns the phase calculation with the downlink phase and the four array element control unit of the beamforming chip. This significantly reduces the difficulty of channel mapping and loading timing alignment, improves the phase calculation and downlink throughput, and reduces the overall frame update latency. At the same time, by using CORDIC real-time trigonometric function solving combined with pipelined phase calculation, hardware resource overhead can be reduced while ensuring accuracy, making it suitable for rapid pointing update scenarios of large-scale phased array antennas.

[0060] Example 2

[0061] This embodiment provides a real-time phase calculation device for packing four adjacent array elements, including:

[0062] The trigonometric function calculation module is used to receive the pitch angle and azimuth angle, and calculate the sine and cosine values ​​of the pitch angle and azimuth angle; the CORDIC algorithm is used to calculate the sine and cosine values ​​of the pitch angle and azimuth angle.

[0063] The array element grouping and index generation module is used to divide the array elements of a two-dimensional planar phased array into groups of four adjacent elements. indivual Array element group, indexing the array elements Split into array tuple index and group index, where the element index The lower 2 bits represent the group index, array element index. of high Bit representation array element index , First, traverse using the incrementing index within the group. Each element within a set of elements is then indexed by an increasing set of elements. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group;

[0064] Among them, the group index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a column-first, row-second manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

[0065] Intragroup Index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a row-first, column-later manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

[0066] Traverse in column-first, row-second order. indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

[0067] Traverse in row-first-column order indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

[0068] This invention is based on array element index Perform row and column decoding to obtain variables. and Then based on the variables and Perform array element base address location to find the current Starting position within the array element group By locating each The starting position of the array element group can be directly determined. The coordinates of the four array elements within the array element group are as follows: , , , Or: , , , .

[0069] The wave control phase calculation module is used to calculate the sine and cosine values ​​based on the elevation and azimuth angles. The coordinates of each element within the array element group and the system operating frequency are calculated in real time using a pipelined approach. The phase of each element within the array element group; each element is calculated in real time using a pipelined approach. When calculating the phase of each element within an array element group, the phase of each element is calculated. The radian values ​​of each element in the array element group are modified by taking the remainder to obtain the normalized radian value, and then the normalized radian value is converted into a phase value.

[0070] The compensation module is used to compensate for the current Read the four corresponding compensation symbols in groups of four, and then combine the four compensation symbols with the current array elements. The phases of each element within the array element group are superimposed to obtain... The phase of each element in the array element group after compensation; the writing and reading order of the compensation code elements is consistent with the traversal order of the array elements.

[0071] Output interface module, used to... The compensated phase of each element in the array element group is mapped to the phase table of the beamforming chip, and the phase command is issued according to the configuration protocol of the beamforming chip until the entire array is traversed. indivual Array element group.

[0072] Figure 6 Simulation diagrams of the array element partitioning and index generation module are presented, which generates the indices within the array elements based on base_m0 and base_n0. Figure 6 In this context, idx is the index of the currently traversed array element, and (m0, n0) are the actual coordinates of the currently calculated array element. base_m[8:0] and base_n[8:0] are the coordinates of the top left corner (baseline) of the current 2×2 array element. Figure 7 Simulation diagrams of phase calculation are provided. Figure 7 Except for the last row, which represents the calculated phase value, the rest are intermediate variables in the pipeline calculation. In this simulation, the dx and dy values ​​are the same. To meet the requirements of large-scale phased arrays for rapid beam pointing, the system adopts a pipelined architecture to calculate the phase, breaking down the original multiply-accumulate operation into several calculation modules, with each stage working in parallel. Figure 8 Simulation results of the array element output are presented. Figure 8 In the diagram, idx represents the current element index being traversed, (m, n) represents the actual element coordinates, and deg represents the output phase value. Simulation results demonstrate that this method can output coordinates and corresponding phase values ​​according to the expected traversal rules.

[0073] This invention replaces the traditional sequential calculation of each array element with group calculation and packaged distribution in 2×2 array element groups. While meeting the real-time update requirements, it improves output throughput, reduces pointer update latency, and enhances compatibility with beamforming chips.

[0074] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for real-time phase calculation of four adjacent array elements, characterized in that: include: Receive the pitch angle and azimuth angle, and calculate the sine and cosine values ​​of the pitch angle and azimuth angle; The elements of the two-dimensional planar phased array are divided into groups of four adjacent elements. indivual Array element group, indexing the array elements Split into array tuple index and intra-group indexes Among them, the array element index The lower 2 bits represent the group index. Array element index of high Bit representation array element index , First, use an incremental intra-group index. Traversal Each element within a set of array elements is then indexed by an increasing array element set index. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group; Based on the sine and cosine values ​​of pitch and azimuth angles, and The coordinates of each element within the array element group and the system operating frequency are calculated in real time using a pipelined approach. The phase of each element within the array element group; With the current Read the four corresponding compensation symbols in groups of four, and then combine the four compensation symbols with the current array elements. The phases of each element within the array element group are superimposed to obtain... The phase of each element within the array element group after compensation; Will The compensated phase of each element in the array element group is mapped to the phase table of the beamforming chip, and the phase command is issued according to the configuration protocol of the beamforming chip until the entire array is traversed. indivual Array element group.

2. The method for real-time phase calculation of four adjacent array elements according to claim 1, characterized in that: Intragroup Index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a column-first, row-second manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

3. The method for real-time phase calculation of four adjacent array elements according to claim 1, characterized in that: Intragroup Index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a row-first, column-later manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

4. The method for real-time phase calculation of four adjacent array elements according to claim 2, characterized in that: Traverse in column-first, row-second order. indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

5. The method for real-time phase calculation of four adjacent array elements according to claim 3, characterized in that: Traverse in row-first-column order indivual Array element group, , ,in, , , Indicator array element index The lower 3 bits, Indicator array element index The 4th to 6th positions.

6. The method for real-time phase calculation of four adjacent array elements according to claim 1, characterized in that: Real-time calculation of each using a pipeline approach When calculating the phase of each element within an array element group, the phase of each element is calculated. The radian values ​​of each element in the array element group are modified by taking the remainder to obtain the normalized radian value, and then the normalized radian value is converted into a phase value.

7. The method for real-time phase calculation of four adjacent array elements according to claim 1, characterized in that: The order in which compensation symbols are written and read is consistent with the order in which array elements are traversed.

8. The method for real-time phase calculation of four adjacent array elements according to claim 1, characterized in that: The CORDIC algorithm was used to calculate the sine and cosine values ​​of the pitch and azimuth angles.

9. A real-time phase calculation device for four adjacent array elements, characterized in that: include: The trigonometric function calculation module is used to receive the pitch angle and azimuth angle, and calculate the sine and cosine values ​​of the pitch angle and azimuth angle; The array element grouping and index generation module is used to divide the array elements of a two-dimensional planar phased array into groups of four adjacent elements. indivual Array element group, indexing the array elements Split into array tuple index and group index, where the element index The lower 2 bits represent the group index, array element index. of high Bit representation array element index , First, traverse using the incrementing index within the group. Each element within a set of array elements is then indexed by an increasing array element set index. Traversal indivual Array element group, output each one in sequence The coordinates of each element within the array element group; The wave control phase calculation module is used to calculate the sine and cosine values ​​based on the elevation and azimuth angles. The coordinates of each element within the array element group and the system operating frequency are calculated in real time using a pipelined approach. The phase of each element within the array element group; The compensation module is used to compensate for the current Read the four corresponding compensation symbols in groups of four, and then combine the four compensation symbols with the current array elements. The phases of each element within the array element group are superimposed to obtain... The phase of each element within the array element group after compensation; Output interface module, used to... The compensated phase of each element in the array element group is mapped to the phase table of the beamforming chip, and the phase command is issued according to the configuration protocol of the beamforming chip until the entire array is traversed. indivual Array element group.

10. The real-time phase calculation device for four adjacent array elements according to claim 9, characterized in that: Intragroup Index The numbers are 00, 01, 10, and 11 in sequence, and are traversed in a column-first, row-second manner. Each element within an array element group has an index within that group. When the value is 00, output coordinates. Intra-group index When the coordinate is 0 or 1, output coordinates Intra-group index When the value is 10, output coordinates Intra-group index When the value is 11, output coordinates .

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