Viewing angle switchable display device including image data dividing section

Abstract

A view angle switchable display apparatus includes: a timing control unit that generates shared image data, private image data, a data control signal, and a gate control signal from interface signals corresponding to mixed image data, a data enable signal, a shared data enable signal, and a private data enable signal received from an image processing unit; a data driving unit configured to generate a shared data signal and a private data signal using the shared image data, the private image data, and the data control signal; a gate driving unit configured to generate a gate signal using the gate control signal; and a display panel including a shared sub-pixel and a privacy sub-pixel, and configured to display an image using the shared data signal, the privacy data signal, and the gate signal.

Description

A view-switching display device including an image data segmentation section.

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0152236, filed on October 31, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device, and more specifically, to a view-switching display device including an image data segmentation unit that segments mixed image data received from an image processing unit into shared image data and private image data. Background Technology

[0004] Recently, with the emergence of an information-oriented society, there has been an increased interest in information displays for processing and displaying large amounts of information, as well as a growing demand for portable information media. Furthermore, with the increasing demand for portable information media, various thin and light flat panel display devices have been developed and are attracting attention.

[0005] Among various flat panel display devices, organic light-emitting diode (OLED) displays are light-emitting devices, excluding the backlight unit used in non-light-emitting devices (such as liquid crystal display (LCD) devices). Therefore, OLED displays offer advantages in viewing angle, contrast ratio, and power consumption, making them suitable for various applications.

[0006] Specifically, OLED displays are already being used in vehicle dashboards. In the automotive sector, research and development are underway on viewable display devices that allow drivers and passengers to selectively view images.

[0007] In OLED displays with switchable viewing angles, films or lenses are used to display shared images with a wide viewing angle or private images with a narrow viewing angle.

[0008] Therefore, shared image data and private image data are transmitted from the image processing unit to the display device. As the amount of image data and the speed of the clock signal increase, the characteristics of electromagnetic interference deteriorate, and noise is generated during transmission. Consequently, the display quality of the image decreases. Summary of the Invention

[0009] Therefore, this disclosure relates to a display device that substantially eliminates one or more problems caused by the limitations and disadvantages of the prior art.

[0010] More specifically, this disclosure provides a view-switching display device that improves the display quality of an image by segmenting mixed image data into shared image data and private image data.

[0011] Additional features and advantages of this disclosure will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practice of this disclosure. These and other advantages of this disclosure will be realized and obtained through the structures specifically pointed out in the specification, claims, and drawings of this disclosure.

[0012] To achieve these and other advantages and in accordance with the purposes of this disclosure, as specifically implemented and generally described herein, a view-switching display device includes: a timing control unit configured to generate shared image data, private image data, a data control signal, and a gate control signal from interface signals corresponding to mixed image data, a data enable signal, a shared data enable signal, and a privacy data enable signal received from an image processing unit; a data driving unit configured to generate the shared data signal and the privacy data signal using the shared image data, the privacy image data, and the data control signal; a gate driving unit configured to generate a gate signal using the gate control signal; and a display panel including shared subpixels and privacy subpixels, and configured to display an image using the shared data signal, the privacy data signal, and the gate signal.

[0013] It should be understood that the foregoing general description and the following detailed description are illustrative and intended to provide a further explanation of the claimed disclosure. Attached Figure Description

[0014] This disclosure includes accompanying drawings to provide a further understanding of the disclosure. The drawings are incorporated in and form a part of this specification and illustrate embodiments of the disclosure, and together with the description serve to explain the principles of the disclosure.

[0015] In the attached diagram:

[0016] Figure 1 is a view illustrating a view-switching display device according to an embodiment of the present disclosure;

[0017] Figure 2 is a circuit diagram of the shared sub-pixels and privacy sub-pixels of a view-switching display device according to an embodiment of the present disclosure.

[0018] Figure 3 is a view showing an image processing unit connected to a view-switching display device according to an embodiment of the present disclosure;

[0019] Figure 4 is a view illustrating a timing control unit of a view-switching display device according to an embodiment of the present disclosure;

[0020] Figure 5 is a view illustrating multiple signals of a view-switchable display device according to an embodiment of the present disclosure;

[0021] Figure 6A is a view illustrating the mixed image, shared data enable signal, and privacy data enable signal of a view-switching display device according to an embodiment of the present disclosure;

[0022] Figure 6B is a view illustrating a shared image of a view-switching display device according to an embodiment of the present disclosure; and

[0023] Figure 6C is a view showing a privacy image of a view-switching display device according to an embodiment of the present disclosure. Detailed Implementation

[0024] The advantages and features of this disclosure and its implementation methods will be illustrated by the following exemplary aspects described with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the exemplary aspects set forth herein. Rather, these exemplary aspects are provided so that this disclosure is thorough and complete enough to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0025] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings to describe various exemplary aspects of this disclosure are given by way of example only. Therefore, this disclosure is not limited to the illustrations in the drawings. Unless otherwise stated, the same reference numerals refer to the same elements throughout the specification.

[0026] In the following description, where a detailed description of a known function or configuration may unnecessarily obscure a feature or aspect of this disclosure, such a detailed description may be omitted, or a brief description may be provided.

[0027] When using terms such as “including,” “having,” or “comprising,” one or more additional elements may be added, unless a term such as “only” is used. Elements described in the singular are intended to include multiple elements, or vice versa, unless the context clearly indicates otherwise.

[0028] When interpreting a component, it will be interpreted as including a range of errors or tolerances, even if no explicit description of such range of errors or tolerances is provided.

[0029] When describing positional relationships, such as when using terms like "above," "over," "below," "beside," "next," etc., to describe the positional relationship between two parts, one or more other parts may be located between the two parts, unless more restrictive terms such as "immediately adjacent," "directly," or "near." For example, when an element or layer is placed "above" another element or layer, a third layer or element may be inserted therebetween.

[0030] While the terms “first,” “second,” “A,” “B,” “(a),” “(b),” etc., may be used herein to refer to various elements, these elements should not be construed as being limited by these terms, as they are not used to define a particular order or priority. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0031] The term "at least one" should be understood to include all combinations of one or more related elements. For example, the term "at least one of the first element, the second element, and the third element" can include all combinations of two or more of the first element, the second element, and the third element, as well as the first element, the second element, or the third element.

[0032] The term "display device" can include display devices in the narrow sense, such as liquid crystal modules (LCMs), organic light-emitting diode (OLED) modules, and quantum dot (QD) modules, including display panels and driving units for driving the display panels. Furthermore, the term "display device" can include complete products (or end products) comprising LCMs, OLED modules, and QD modules, such as notebook computers, televisions, computer monitors, equipment display devices including automotive display devices or those in shapes other than vehicles, and integrated electronic devices or integrated devices (or integrated equipment) of mobile electronic devices such as smartphones or electronic boards.

[0033] Therefore, the display devices disclosed herein may include application products or integrated devices of end-user devices, including LCMs, OLED modules and QD modules, as well as display devices in the narrow sense, such as LCMs, OLED modules and QD modules.

[0034] Depending on the context, LCM, OLED, and QD modules having display panels and driving units can be described as "display devices," and electronic devices comprising complete products including LCM, OLED, and QD modules can be described as "integrated devices." For example, a display device in the narrow sense can include a liquid crystal display panel, organic light-emitting diodes and quantum dots, and a source printed circuit board (PCB) for a control unit to drive the display panel, and an integrated device can also include an integrated PCB electrically connected to an integrated control unit for controlling the source PCB of the entire integrated device.

[0035] The display panel disclosed herein may include various display panels, such as liquid crystal display panels, organic light-emitting diode (OLED) display panels, quantum dot display panels, and electroluminescent display panels. The display panel disclosed herein is not limited to a specific display panel having a flexible substrate for an OLED display panel and a curved frame for a lower backplate support. The shape or size of the display panel of the display device disclosed herein is not limited thereto.

[0036] For example, when the display panel is an organic light-emitting diode (OLED) display panel, the display panel may include multiple gate lines, multiple data lines, and sub-pixels located in the intersection regions of the multiple gate lines and multiple data lines. The display panel may include an array of thin-film transistors having elements for selectively applying voltage to each sub-pixel, a light-emitting element layer on the array, and a packaging substrate or package covering the light-emitting element layer. The package can protect the thin-film transistors and the light-emitting element layer from external impacts and can prevent or at least reduce the penetration of moisture or oxygen into the light-emitting element layer. Furthermore, the light-emitting element layer on the array may include an inorganic light-emitting layer, such as a nanoscale material layer or quantum dots.

[0037] The thin-film transistors disclosed herein may include one of oxide thin-film transistors, amorphous silicon thin-film transistors, and low-temperature polycrystalline silicon thin-film transistors.

[0038] The features of the various embodiments of this disclosure may be combined or integrated with each other, either partially or entirely. As will be fully appreciated by those skilled in the art, they may be technically associated and operable in various ways. These aspects may be performed independently or in conjunction with each other in various combinations.

[0039] In the following, a display device according to various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings, wherein the effect on the oxide semiconductor layer of the thin-film transistor in the driving element portion is reduced by blocking light emitted and transmitted from the sub-pixels and / or light input from the outside.

[0040] Figure 1 is a view illustrating a view-switchable display device according to an embodiment of the present disclosure. While the display device may be an organic light-emitting diode (OLED) display device, it is not limited thereto. For example, the display device may be a quantum dot display device, a micro-light-emitting diode (LED) display device, or a miniature light-emitting diode (LED) display device.

[0041] In FIG1, the view-switching display device 110 according to an embodiment of the present disclosure includes a timing control unit 120 (e.g., a circuit), a data driving unit 125 (e.g., a circuit), a first gate driving unit 130 and a second gate driving unit 135 (e.g., a circuit) and a display panel 140.

[0042] The timing control unit 120 is connected to the image processing unit 115 of an external system, such as a graphics card or a television system. The image processing unit 115 uses image signals to generate mixed image data RGBm and multiple timing signals (e.g., data enable signal DE, shared data enable signal DEs, privacy data enable signal DEp, and clock signal CLK), and transmits the mixed image data RGBm and multiple timing signals (e.g., data enable signal DE, shared data enable signal DEs, privacy data enable signal DEp, and clock signal CLK) to the timing control unit 120.

[0043] For example, the image processing unit 115 can transmit mixed image data RGBm and multiple timing signals to the timing control unit 120 via interface signals such as Low Voltage Differential Signaling (LVDS) and Embedded Display Port (EDP).

[0044] Although the external system includes an image processing unit 115 in the embodiment of FIG1, in another embodiment the view-switching display device 110 may include an image processing unit 115.

[0045] The timing control unit 120 uses the mixed image data RGBm received from the image processing unit 115 and multiple timing signals including the data enable signal DE, the shared data enable signal DEs, the privacy data enable signal DEp, and the clock signal CLK to generate shared image data RGBs, privacy image data RGBp, data control signal DCS, and gate control signal GCS.

[0046] The timing control unit 120 transmits shared image data RGBs, private image data RGBp, and data control signal DCS to the data driving unit 125, and transmits the gate control signal GCS to the first gate driving unit 130 and the second gate driving unit 135.

[0047] The data driving unit 125 uses the shared image data RGBs, the private image data RGBp, and the data control signal DCS transmitted from the timing control unit 120 to generate a shared data signal (shared data voltage) Vdas (Figure 2) and a private data signal (private data voltage) Vdap (Figure 2), and applies the shared data signal Vdas and the private data signal Vdap to the data line DL of the display panel 140.

[0048] The first gate driving unit 130 and the second gate driving unit 135 use the gate control signal GCS transmitted from the timing control unit 120 to generate (FIG. 2) gate signals (gate voltages) Sc1, SC2 and Em, and apply the gate signals Sc1, Sc2 and Em to the gate line GL of the display panel 140.

[0049] The first gate driving unit 130 and the second gate driving unit 135 may have a gate in panel (GIP) type formed in the non-display area NDA of the substrate of the display panel 140 having gate lines GL, data lines DL and pixels P.

[0050] Although in the embodiment of FIG1, the first gate driving unit 130 and the second gate driving unit 135 are disposed on two sides of the display panel 140, in another embodiment, a gate driving unit may be disposed on one side of the display panel 140.

[0051] Display panel 140 includes a display area DA located at its center and a non-display area NDA surrounding the display area DA. Display panel 140 uses gate signals Sc1, Sc2, and Em, a shared data signal Vdas, and a privacy data signal Vdap to display images. For displaying images, display panel 140 includes multiple sub-pixels SP, multiple gate lines GL, and multiple data lines DL within the display area DA.

[0052] Each of the plurality of sub-pixels SP includes shared sub-pixels SPs for displaying shared images IMs with a wide viewing angle (Figure 6B) and privacy sub-pixels SPp for displaying privacy images IMp with a narrow viewing angle (Figure 6C), and gate line GL and data line DL intersect each other to define the shared sub-pixels SPs and privacy sub-pixels SPp. Each of the shared sub-pixels SPs and privacy sub-pixels SPp is connected to gate line GL and data line DL.

[0053] For example, a semi-cylindrical lens is provided on the display panel 140 corresponding to the shared sub-pixels SPs, which focuses light along the vertical direction forward and does not focus light along the horizontal direction, and a hemispherical lens is provided on the display panel 140 corresponding to the privacy sub-pixels SPp, which focuses light along the vertical and horizontal directions forward.

[0054] In a plurality of sub-pixels SP, some sub-pixels that make up white constitute a pixel.

[0055] For example, the first, second, and third sub-pixels corresponding to red, green, and blue in a plurality of sub-pixels SP can constitute a pixel, or the first, second, third, and fourth sub-pixels corresponding to red, green, blue, and white in a plurality of sub-pixels can constitute a pixel.

[0056] Each of the shared subpixels SPs and the privacy subpixels SPp may include multiple transistors, such as switching transistors, driving transistors and sensing transistors, storage capacitors and light-emitting diodes.

[0057] In the view-angle switchable display device 110, the display area DA of the display panel 140 is classified into a shared area SA (FIG. 6A) and a privacy area PA (FIG. 6A). The shared data signal Vdas (FIG. 2) corresponding to the RGB image data (FIG. 5) is applied to the shared sub-pixels SPs of the shared area SA, and the privacy data signal Vdap (FIG. 2) corresponding to the grayscale level is applied to the privacy sub-pixels SPp of the shared area SA. Furthermore, the shared data signal Vdas (FIG. 5) corresponding to the grayscale level is applied to the shared sub-pixels SPs of the privacy area PA, and the privacy data signal Vdap (FIG. 5) corresponding to the privacy image data RGBp is applied to the privacy sub-pixels SPp of the privacy area PA.

[0058] Therefore, the display panel 140 of the view-angle switchable display device 110 can display wide-viewing-angle shared images IMs corresponding to the shared image data RGBs through the shared area SA of the display area DA. At the same time, the display panel 140 of the view-angle switchable display device 110 can display narrow-viewing-angle privacy images IMp corresponding to the privacy image data RGBp through the privacy area PA of the display area DA.

[0059] Figure 2 is a circuit diagram illustrating the shared sub-pixels and privacy sub-pixels of a view-switching display device according to an embodiment of the present disclosure.

[0060] In Figure 2, each of the shared sub-pixels SPs and privacy sub-pixels SPp of the display panel 140 of the view-switching display device 110 according to an embodiment of the present disclosure includes a first transistor T1 to a sixth transistor T6, a storage capacitor Cs, and a light-emitting diode De.

[0061] For example, the first transistor T1 to the sixth transistor T6 can be P-type transistors.

[0062] The first transistor T1, acting as the driving transistor, switches according to the voltage of the first capacitor electrode of the storage capacitor Cs. The gate of the first transistor T1 is connected to the first node N1, the source of the first transistor T1 is connected to the high-level signal (high-level voltage) Vdd, and the drain of the first transistor T1 is connected to the second node N2.

[0063] For example, the first transistor T1 can be a dual-gate type transistor with two gates.

[0064] The second transistor T2, which acts as a light-emitting transistor, switches according to the light-emitting signal Em. The gate of the second transistor T2 is connected to the light-emitting signal Em, the source of the second transistor T2 is connected to the second node N2, and the drain of the second transistor T2 is connected to the fourth node N4.

[0065] The third transistor T3 is switched according to the second scan signal Sc2. The gate of the third transistor T3 is connected to the second scan signal Sc2, the source of the third transistor T3 is connected to the second node N2, and the drain of the third transistor T3 is connected to the first node N1.

[0066] The fourth transistor T4 is switched according to the second scan signal Sc2. The gate of the fourth transistor T4 is connected to the second scan signal Sc2, the source of the fourth transistor T4 is connected to the fourth node N4, and the drain of the fourth transistor T4 is connected to the reference signal Vrf.

[0067] The fifth transistor T5 switches according to the light emission signal Em. The gate of the fifth transistor T5 is connected to the light emission signal Em, the source of the fifth transistor T5 is connected to the third node N3, and the drain of the fifth transistor T5 is connected to the reference signal Vrf.

[0068] The sixth transistor T6 is switched according to the first scan signal Sc1. The gate of the sixth transistor T6 is connected to the first scan signal Sc1, the source of the sixth transistor T6 is connected to the third node N3, and the drain of the sixth transistor T6 is connected to either the shared data signal Vdas or the private data signal Vdap.

[0069] The storage capacitor Cs stores either the shared data signal Vdas or the private data signal Vdap, as well as the threshold voltage Vth of the first transistor T1. The first capacitor electrode of the storage capacitor Cs is connected to the first node N1, and the second capacitor electrode of the storage capacitor Cs is connected to the third node N3.

[0070] The light-emitting diode De is connected between the second transistor T2 and the fourth transistor T4, and emits light with a brightness proportional to the current of the first transistor T1. The anode of the light-emitting diode De is connected to the fourth node N4, and the cathode of the light-emitting diode De is connected to the low-level signal (low-level voltage) Vss.

[0071] Although not shown, a semi-cylindrical lens is provided on the light-emitting diode De of the shared sub-pixel SPs to focus light in the vertical direction forward and to propagate light in the horizontal direction, thereby obtaining a wide viewing angle mode in the horizontal direction, and a hemispherical lens is provided on the light-emitting diode De of the privacy sub-pixel SPp to focus light in the vertical and horizontal directions forward, thereby obtaining a narrow viewing angle mode in the horizontal direction.

[0072] The gate of the first transistor T1, the first capacitor electrode of the storage capacitor Cs, and the drain of the third transistor T3 constitute the first node N1, and the drain of the first transistor T1, the source of the second transistor T2, and the source of the third transistor T3 constitute the second node N2. The second capacitor electrode of the storage capacitor Cs, the source of the fifth transistor T5, and the source of the sixth transistor constitute the third node, and the drain of the second transistor T2, the source of the fourth transistor T4, and the anode of the light-emitting diode De constitute the fourth node N4.

[0073] The LEDs De of the shared sub-pixels SPs and the LEDs De of the privacy sub-pixels SPp can be driven independently to emit light with brightness corresponding to the shared data signal Vdas with a wide viewing angle and the privacy data signal Vdap with a narrow viewing angle, respectively.

[0074] Each of the shared subpixels SPs and the privacy subpixels SPp is driven by an initialization period, a sampling period, a hold period, and an emission period.

[0075] During the initialization period, transistors T2, T3, T4, and T5 are turned on by the logic-low second scan signal Sc2 and the light-emitting signal Em, while transistor T6 is turned off by the logic-high first scan signal Sc1. Since the reference signal Vrf is applied to the first node N1 and the third node N3, the first and second capacitor electrodes of the storage capacitor Cs and the gate of the first transistor T1 are initialized by the reference signal Vrf.

[0076] During the sampling period, transistors T3, T4, and T6 are turned on by the logic low-level first scan signal Sc1 and second scan signal Sc2, while transistors T2 and T5 are turned on by the logic high-level light emission signal Em. A shared data signal Vdas or a private data signal Vdap is applied to the third node N3, a high-level signal Vdd is applied to the first node N1, and a reference signal Vrf is applied to the fourth node N4. Therefore, the second capacitor electrode of the storage capacitor Cs has the shared data signal Vdas or the private data signal Vdap, and the first capacitor electrode of the storage capacitor Cs has the sum of the difference between the shared data signal Vdas or the private data signal Vdap and the reference signal Vrf and the threshold voltage Vth (Vdas-Vrf+Vth or Vdap-Vrf+Vth). Therefore, the threshold voltage Vth is stored in the storage capacitor Cs.

[0077] During the hold period, transistors T2, T3, T4, T5, and T6 are turned off due to the logic high levels of the first scan signal Sc1, the second scan signal Sc2, and the light emission signal Em. Therefore, the second capacitor electrode of the storage capacitor Cs is held at either the shared data signal Vdas or the privacy data signal Vdap, and the first capacitor electrode of the storage capacitor Cs is held at the sum of the difference between the shared data signal Vdas or the privacy data signal Vdap and the reference signal Vrf and the threshold voltage Vth (Vdas - Vrf + Vth or Vdap - Vrf + Vth).

[0078] During the light-emitting period, the second transistor T2 and the fifth transistor T5 are turned on due to the logic low-level light-emitting signal Em, while the third transistor T3, the fourth transistor T4, and the sixth transistor T6 are turned off due to the logic high-level first scan signal Sc1 and the second scan signal Sc2. The reference signal Vrf is applied to the third node N3. Therefore, a current proportional to the square of the value obtained by subtracting the threshold voltage Vth from the gate-source voltage Vgs ((Vdas-Vrf+Vth-Vdd)-Vth=Vdas-Vrf-Vdd or (Vdap-Vrf+Vth-Vdd)-Vth=Vdap-Vrf-Vdd) flows through the first transistor T1, and the light-emitting diode De emits light with a brightness corresponding to the current flowing through the first transistor T1.

[0079] While each of the shared subpixels SPs and privacy subpixels SPp in the embodiment of FIG2 has a 6T1C structure comprising six transistors and a storage capacitor, in another embodiment, each of the shared subpixels SPs and privacy subpixels SPp may have one of a 3T1C structure comprising three transistors and a storage capacitor, a 7T1C structure comprising seven transistors and a storage capacitor, and an 8T1C structure comprising eight transistors and a storage capacitor.

[0080] In the view-switching display device 110, mixed image data RGBm, data enable signal DE, shared data enable signal DEs, and privacy data enable signal DEp are sent from the image processing unit 115 to the timing control unit 120.

[0081] Figure 3 is a view showing an image processing unit connected to a view-switching display device according to an embodiment of the present disclosure; Figure 4 is a view showing a timing control unit of a view-switching display device according to an embodiment of the present disclosure; and Figure 5 is a view showing a plurality of signals of a view-switching display device according to an embodiment of the present disclosure.

[0082] In Figures 3 and 5, the image processing unit 115 connected to the view-switching display device 110 according to an embodiment of the present disclosure includes a shared image data generation unit 150, a privacy image data generation unit 152, an image data mixing unit 154, a data enable signal generation unit 156, a conversion unit 158, and a transmission unit 160.

[0083] The shared image data generation unit 150 generates shared image data RGBs corresponding to the shared images IMs (Fig. 6B) with a wide viewing angle along the left and right direction, which are displayed by the shared sub-pixels SPs of the shared area SA of the display panel 140 (Fig. 6A), and transmits the shared image data RGBs to the image data mixing unit 154 and the data enable signal generation unit 156.

[0084] For example, shared image data RGBs can have a full HD (FHD) resolution of 1920*3*1080, which corresponds to the number of shared sub-pixels SPs for red, green, and blue in the horizontal pixel rows of the display panel 140, as well as the number of shared sub-pixels SPs in the vertical pixel rows.

[0085] The shared image data RGBs corresponding to the shared sub-pixels SPs of the shared region SA (Figure 5) in the first time period TP1 and the third time period TP3 can have the grayscale data S of the shared image IMs with a wide viewing angle (Figure 5), and the shared image data RGBs corresponding to the privacy sub-pixels SPp of the shared region SA (Figure 5) in the second time period TP2 and the fourth time period TP4 can have the black grayscale data 0 (Figure 5).

[0086] The privacy image data generation unit 152 generates privacy image data RGBp corresponding to the privacy image IMp (Fig. 6C) with a narrow viewing angle along the left and right direction, which is displayed by the privacy sub-pixels SPp of the privacy area PA of the display panel 140 (Fig. 6A), and transmits the privacy image data RGBp to the image data mixing unit 154 and the data enable signal generation unit 156.

[0087] For example, the privacy image data RGBp can have a full HD (FHD) resolution of 1920*3*1080, which corresponds to the number of privacy subpixels SPp in the red, green and blue of the horizontal pixel rows of the display panel 140, as well as the number of privacy subpixels SPp in the vertical pixel rows.

[0088] The shared image data RGBs of the first time period TP1 and the third time period TP3 corresponding to the shared sub-pixels SPs of the privacy region PA can have black grayscale data 0, and the privacy image data RGBp of the second time period TP2 and the fourth time period TP4 corresponding to the privacy sub-pixels SPp of the privacy region PA can have grayscale data P of the privacy image IMp with a narrow field of view (Figure 5).

[0089] The image data mixing unit 154 generates mixed image data RGBm by mixing the shared image data RGBs transmitted from the shared image data generation unit 150 with the privacy image data RGBp transmitted from the privacy image data generation unit 152, and then transmits the mixed image data RGBm to the conversion unit 158.

[0090] For example, the mixed image data RGBm can have a full HD (FHD) resolution of 1920*3*1080, which corresponds to the number of shared subpixels SPs or privacy subpixels SPp of red, green and blue in the horizontal pixel rows of the display panel 140, and the number of shared subpixels SPs or privacy subpixels SPp in the vertical pixel rows.

[0091] The mixed image data RGBm of the first time period TP1 and the third time period TP3 corresponding to the shared sub-pixels SPs of the shared region SA can have grayscale data S of the shared image IMs with a wide field of view, and the mixed image data RGBm of the second time period TP2 and the fourth time period TP4 corresponding to the privacy sub-pixels SPp of the privacy region PA can have grayscale data P of the privacy image IMp with a narrow field of view.

[0092] The data enable signal generation unit 156 generates a data enable signal DE based on the start and end points of the effective time periods of the shared image data RGBs transmitted from the shared image data generation unit 150 and the privacy image data RGBp transmitted from the privacy image data generation unit 152, and transmits the data enable signal DE to the conversion unit 158.

[0093] For example, the data enable signal DE can have a logic high level Vh (Figure 5) during the first time period TP1 to the fourth time period TP4 between the start and end of the valid data, and can have a logic low level V1 (Figure 5) during other time periods.

[0094] Furthermore, the data enable signal generation unit 156 generates a shared data enable signal DEs corresponding to the shared area SA and a privacy data enable signal DEp corresponding to the privacy area PA from the data enable signal DE, and transmits the shared data enable signal DEs and the privacy data enable signal DEp to the conversion unit 158.

[0095] For example, the shared data enable signal DEs can have a logic high level Vh during the first time period TP1 and the third time period TP3 corresponding to the shared region SA, and a logic low level Vl during the second time period TP2 and the fourth time period TP4 corresponding to the privacy region PA. The privacy data enable signal DEp can have a logic high level Vh during the second time period TP2 and the fourth time period TP4 corresponding to the privacy region PA, and a logic low level V1 during the first time period TP1 and the third time period TP3 corresponding to the shared region SA.

[0096] The conversion unit 158 ​​converts the mixed image data RGBm received from the image data mixing unit 154, the data enable signal DE received from the data enable signal generation unit 156, the shared data enable signal DEs, and the privacy data enable signal DEp into serial data, and sends the serial data to the transmission unit 160.

[0097] The transmitting unit 160 converts the serial data transmitted from the conversion unit 158 ​​into an interface signal and sends the interface signal to the timing control unit 120.

[0098] For example, the interface signal of the transmitting unit 160 may be a low-voltage differential signal (LVDS) transmission signal or an embedded display port (EDP) transmission signal.

[0099] Although not shown, the image processing unit 115 may also include a clock signal generation unit that generates a clock signal CLK using shared image data RGBs and private image data RGBp, and transmits the clock signal CLK to the conversion unit 158.

[0100] In the view-switching display device 110 according to an embodiment of the present disclosure, the image processing unit 115 does not transmit shared image data RGBs with a first resolution (e.g., 1920*3*1080) and private image data RGBp with a first resolution (e.g., 1920*3*1080) to the timing control unit 120. Instead, the image processing unit 115 transmits mixed image data RGBm with a first resolution (e.g., 1920*3*1080) to the timing control unit 120. This reduces the amount of image data and the speed of the clock signal, thus improving electromagnetic interference characteristics. Furthermore, it reduces noise, thereby improving image display quality.

[0101] In Figures 4 and 5, the timing control unit 120 of the view-switching display device 110 according to an embodiment of the present disclosure includes a receiving unit 170, an image data recovery unit 172, a data enable signal recovery unit 174, an image data segmentation unit 176, and a control signal generation unit 178.

[0102] The receiving unit 170 converts the interface signal received from the image processing unit 115 into serial data and transmits the serial data to the image data recovery unit 172 and the data enable signal recovery unit 174.

[0103] The image data recovery unit 172 recovers the mixed image data RGBm based on the serial data transmitted from the receiving unit 170, and transmits the mixed image data RGBm to the image data segmentation unit 176.

[0104] The data enable signal recovery unit 174 recovers the data enable signal DE, the shared data enable signal DEs, and the privacy data enable signal DEp based on the serial data transmitted from the receiving unit 170. The data enable signal recovery unit 174 transmits the shared data enable signal DEs and the privacy data enable signal DEp to the image data segmentation unit 176, and transmits the data enable signal DE to the control signal generation unit 178.

[0105] The image data segmentation unit 176 segments shared image data RGBs from the mixed image data RGBm received from the image data recovery unit 172 based on the shared data enable signal DEs transmitted from the data enable signal recovery unit 174, and segments private image data RGBp from the mixed image data RGBm received from the image data recovery unit 172 based on the privacy data enable signal DEp transmitted from the data enable signal recovery unit 174. The image data segmentation unit 176 transmits the shared image data RGBs and the private image data RGBp to the data driving unit 125.

[0106] The control signal generation unit 178 generates a data control signal DCS and a gate control signal GCS based on the data enable signal DE transmitted from the data enable signal recovery unit 174. The control signal generation unit 178 transmits the data control signal DCS to the data drive unit 125, and transmits the gate control signal GCS to the first gate drive unit 130 and the second gate drive unit 135.

[0107] Although not shown, the timing control unit 120 may also include a clock signal recovery unit that recovers the clock signal CLK based on the serial data transmitted from the receiving unit 170 and transmits the clock signal CLK to the control signal generation unit 178.

[0108] The wide-view shared image and narrow-view privacy image of the view-switching display device 110 will be described with reference to the accompanying drawings.

[0109] Figure 6A is a view showing the mixed image, shared data enable signal, and privacy data enable signal of a view-switching display device according to an embodiment of the present disclosure. Figures 6B and 6C are views showing the shared image and privacy image of the view-switching display device according to an embodiment of the present disclosure, respectively.

[0110] In Figures 6A, 6B, and 6C, the mixed image IMm of the view-switching display device 110 according to an embodiment of the present disclosure includes a shared image IMs displayed in a predetermined shared area SA with a relatively wide viewing angle and a privacy image IMp displayed in a predetermined privacy area PA with a relatively narrow viewing angle.

[0111] Shared images IMs are displayed as black in the privacy area PA, and privacy images IMp are displayed as black in the shared area SA.

[0112] Because the shared images IMs of the shared area SA are displayed with a wide viewing angle, all multiple users can view the shared images IMs of the shared area SA. Because the privacy images IMp of the privacy area PA (excluding the shared area SA) are displayed with a narrow viewing angle, only the user in front of the privacy area PA can view the privacy images IMp among multiple users.

[0113] For the first horizontal line HL1 and the fourth horizontal line HL4 that only overlap with the shared region SA, the shared data enable signal DEs has a logic high level Vh during all time periods, and the privacy data enable signal DEp has a logic low level V1 during all time periods.

[0114] For the second horizontal line HL2 and the third horizontal line HL3 that overlap with the shared region SA and the privacy region PA, the shared data enable signal DEs has a logic high level Vh during the period overlapping with the shared region SA and a logic low level Vl during the period overlapping with the privacy region PA. The privacy data enable signal DEp has a logic high level Vh during the period overlapping with the privacy region PA and a logic low level Vl during the period overlapping with the shared region SA.

[0115] Therefore, in the view-switching display device 110, since the image processing unit 115 transmits mixed image data RGBm, which has the same amount of data as each of the shared image data RGBs and the private image data RGBp, to the timing control unit 120 instead of transmitting the shared image data RGBs and the private image data RGBp, the amount of image data is reduced and the speed of the clock signal is lowered, and the characteristics of electromagnetic interference are improved. Furthermore, noise is reduced and the display quality of the image is improved. Additionally, low-power operation is achieved.

[0116] It will be apparent to those skilled in the art that various modifications and variations can be made to this disclosure without departing from its scope. Therefore, this disclosure is intended to cover modifications and variations thereof, provided they fall within the scope of the appended claims and their equivalents.

Claims

1. A view-switching display device, comprising: The timing control unit is configured to generate shared image data, private image data, data control signals, and gate control signals from interface signals corresponding to mixed image data, data enable signals, shared data enable signals, and privacy data enable signals received from the image processing unit; the data driving unit is configured to use the shared image data, the private image data, and the data control signals to generate shared data signals and privacy data signals. A gate driving unit is configured to generate a gate signal using the gate control signal; and a display panel, including shared sub-pixels and privacy sub-pixels, is configured to display an image using the shared data signal, the privacy data signal, and the gate signal.

2. The view-switching display device according to claim 1, wherein, The image processing unit includes: a shared image data generation unit configured to generate the shared image data; a privacy image data generation unit configured to generate the privacy image data; an image data mixing unit configured to generate mixed image data by mixing the shared image data and the privacy image data; a data enable signal generation unit configured to generate the data enable signal based on the start and end points of the effective time periods of the shared image data and the privacy image data, and to generate the shared data enable signal and the privacy data enable signal from the data enable signal; a conversion unit configured to convert the mixed image data, the shared data enable signal, and the privacy data enable signal into serial data; and a transmission unit configured to convert the serial data into the interface signal and transmit the interface signal to the timing control unit.

3. The view-switching display device according to claim 1, wherein, The timing control unit includes: a receiving unit configured to convert the interface signal received from the image processing unit into serial data; an image data recovery unit configured to recover the mixed image data from the serial data; a data enable signal recovery unit configured to recover the data enable signal, the shared data enable signal, and the privacy data enable signal from the serial data; an image data segmentation unit configured to segment the shared image data from the mixed image data based on the shared data enable signal, and to segment the privacy image data from the mixed image data based on the privacy data image signal; and a control signal generation unit configured to generate the data control signal and the gate control signal from the data enable signal.

4. The view-switching display device according to claim 1, wherein, The resolution of the hybrid image data is the same as the resolution of each of the shared image data and the private image data.

5. The view-switching display device according to claim 1, wherein, The mixed image corresponding to the mixed image data includes a shared image that corresponds to the shared image data and is displayed with a wide viewing angle in the shared area, and a privacy image that corresponds to the privacy image data and is displayed with a narrow viewing angle in the privacy area, wherein the shared image is displayed as black in the privacy area, and wherein the privacy image is displayed as black in the shared area.

6. The view-switching display device according to claim 5, wherein, The shared image data in a first time period corresponding to the shared sub-pixels of the shared region and the shared sub-pixels of the privacy region has grayscale data of the shared image, wherein the shared image data in a second time period corresponding to the privacy sub-pixels of the shared region and the privacy sub-pixels of the privacy region has black grayscale data, wherein the privacy image data in the first time period has black grayscale data, and wherein the privacy image data in the second time period has grayscale data of the privacy image.

7. The view-switching display device according to claim 6, wherein, The mixed image data in the first time period has grayscale data of the shared image, and the mixed image data in the second time period has grayscale data of the privacy image.

8. The view-switching display device according to claim 7, wherein, The data enable signal has a logic high level during the first time period and the second time period, wherein the shared data enable signal has a logic high level during the first time period and a logic low level during the second time period, and wherein the privacy data enable signal has a logic low level during the first time period and a logic high level during the second time period.

9. The view-switching display device according to claim 1, wherein, Each of the shared sub-pixel and the privacy sub-pixel includes: a first transistor connected to a high-level signal; a second transistor switched according to a light emission signal and connected to the first transistor; a third transistor switched according to a second scan signal and connected to the first transistor; a fourth transistor switched according to the second scan signal and connected to the second transistor; a fifth transistor switched according to the light emission signal and connected to a reference signal; and a sixth transistor switched according to the first scan signal and connected to one of the shared data signal and the privacy data signal.

10. The view-switching display device according to claim 9, wherein, Each of the shared sub-pixel and the privacy sub-pixel further includes: a storage capacitor connected between the first transistor, the third transistor, and the sixth transistor; and a light-emitting diode connected between the second transistor and the fourth transistor and a low-level signal.

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