Voltage regulating circuit and inverter system

Abstract

The invention discloses a voltage regulating circuit and an inverter system, the voltage regulating circuit comprises a first capacitor C1, a voltage dividing branch and a voltage stabilizer D which are connected in parallel between a first node and a second node, a second capacitor C2 and a resistor R0 are connected in parallel between the second node and a third node, and the voltage between the first node and the third node is the total voltage Vs; partial voltage of the total voltage Vs at the first node and the third node is used as driving voltage of the switching tube; a voltage dividing point of the voltage dividing branch is connected to the voltage stabilizer D, and the voltage stabilizer D adjusts the voltage drop of the resistor R0 based on the voltage V2 of the voltage dividing point; the voltage monitoring module is used for monitoring the bus voltage of the inverter system, and when the bus voltage is smaller than a voltage threshold value, the partial voltage of the first node serves as the first driving voltage Vout1; when the bus voltage is larger than the voltage threshold value, the partial voltage of the first node serves as the second driving voltage Vout2, and the first driving voltage Vout1 is larger than the second driving voltage Vout2.

Description

A voltage regulating circuit and inverter system Technical Field

[0001] This invention relates to the field of energy storage inverter technology, and in particular to a voltage regulation circuit and inverter system. Background Technology

[0002] The H6 bridge inverter topology is an improved H-bridge inverter structure that adds two reverse-connected series freewheeling switches at both ends of the traditional H-bridge arm to achieve electrical isolation between the grid and photovoltaic cells during the freewheeling phase. However, with the increase in the power level of photovoltaic grid-connected systems, and due to limitations in actual wiring space and the continuous increase in switching frequency, the resonance effect between the parasitic inductance of the line and the junction capacitance of the switching transistors becomes increasingly apparent during the commutation process, resulting in high voltage spikes when the switching transistors are turned off.

[0003] Especially when the inverter system is operating at a non-unity power factor, that is, when the grid current and voltage are out of phase, the freewheeling path changes, which will cause the voltage stress on the two freewheeling diodes to increase sharply at the moment of disconnection, which is not conducive to the safe operation of power devices and the system.

[0004] In some related technologies, adding a resistor-capacitor snubber circuit in parallel across the switching transistor can reduce the voltage stress on the freewheeling diode to some extent. However, this inevitably leads to a decrease in the overall transmission efficiency of the inverter due to the introduction of additional power consumption. In other related technologies, two Zener diodes are used to achieve rapid switching of the drive voltage to reduce the voltage drawdown of the freewheeling diode. However, the parameters of the Zener diodes are easily affected by temperature drift, resulting in lower stability and reliability. Summary of the Invention

[0005] One object of the present invention is to provide a voltage regulating circuit that can change the driving voltage of the switching transistor, thereby regulating the switching speed of the switching transistor, and has high stability and reliability.

[0006] Another object of the present invention is to provide an inverter system having the above-described voltage regulation circuit.

[0007] To achieve at least one of the above objectives, the technical solution adopted by the present invention is as follows: a voltage regulating circuit, comprising a first capacitor C1, a second capacitor C2, a voltage divider branch, a voltage regulator D, a resistor R0, and a voltage monitoring module; the first capacitor C1, the voltage divider branch, and the voltage regulator D are connected in parallel between a first node and a second node; the second capacitor C2 and the resistor R0 are connected in parallel between a second node and a third node; the voltage between the first node and the third node is the total voltage V. s The total voltage V s The voltage division at the first node and the total voltage V sThe voltage divider at the third node serves as the drive voltage for the switching transistors of the inverter system. The voltage divider point of the voltage divider branch is connected to the voltage regulator D, which adjusts the voltage drop across the resistor R0 based on the voltage V2 at the voltage divider point to keep the drive voltage output by the voltage regulation circuit stable. The voltage monitoring module monitors the bus voltage of the inverter system. When the bus voltage is less than a voltage threshold, the voltage divider branch operates in a first state, and the voltage divider at the first node serves as the first drive voltage V. out1 When the bus voltage is greater than the voltage threshold, the voltage divider branch operates in the second state, and the voltage division at the first node serves as the second driving voltage V. out2 Wherein, the first driving voltage V out1 Greater than the second driving voltage V out2 .

[0008] As a preferred embodiment, the voltage regulator D includes an amplifier and an NPN transistor, the amplifier being used to compare the voltage V2 at the voltage divider point with a reference voltage V. ref The amplifier's output is connected to the base of the NPN transistor; the collector and emitter of the NPN transistor are connected between the first node and the second node; when the voltage V2 at the voltage divider point is less than the reference voltage V... ref When the amplifier output decreases, the voltage drop across resistor R0 is reduced via the NPN transistor; when the voltage V2 at the voltage divider point is greater than the reference voltage V... ref When this occurs, the amplifier's output increases, thereby increasing the voltage drop across the resistor R0 via the NPN transistor.

[0009] As a preferred embodiment, the voltage divider branch includes resistors R1, R2, and R3, and switch S1. Resistor R1 is connected in series between the fourth node and resistor R3, and resistor R3 is connected in series between resistor R1 and the fifth node. The connection point of resistors R1 and R3 forms the voltage divider point. Resistor R2 and switch S1 are connected in series and then in parallel with resistor R1. The fourth node is connected to the first node, and the fifth node is connected to the second node. The total voltage V... s The voltage division at the first node relative to the third node is a positive voltage; or, the fourth node is connected to the second node, and the fifth node is connected to the first node, and the total voltage V s The voltage division at the first node relative to the third node is negative; when the switch S1 is open, the voltage divider branch operates in the first state; when the switch S1 is closed, the voltage divider branch operates in the second state.

[0010] As a preferred embodiment, when the switch S1 is open, the first driving voltage V out1 =Vref *[1+(R1 / R3)]+I ref *R1; When switch S1 is closed, the second driving voltage V out2 =V ref *{1+{[(R1*R2) / (R1+R2)] / R3}}+I ref *[(R1*R2) / (R1+R2)]; where V ref As the reference voltage, I ref This is the bias current.

[0011] As a preferred embodiment, the resistance values ​​of resistors R1, R2, R3, and R0 satisfy the following condition: R1 = R2 > R3 > R0.

[0012] As a preferred embodiment, the voltage divider branch includes resistors R1, R2, and R3, and switch S1. Resistor R1 is connected in series between the fourth node and resistor R3, and resistor R3 is connected in series between resistor R1 and the fifth node. The connection point of resistors R1 and R3 forms the voltage divider point. Resistor R2 and switch S1 are connected in series and then in parallel with resistor R3. The fourth node is connected to the first node, and the fifth node is connected to the second node. The total voltage V... s The voltage division at the first node relative to the third node is a positive voltage; or, the fourth node is connected to the second node, and the fifth node is connected to the first node, and the total voltage V s The voltage division at the first node relative to the third node is negative; when the switch S1 is closed, the voltage divider branch operates in the first state; when the switch S1 is open, the voltage divider branch operates in the second state.

[0013] As a preferred embodiment, when the switch S1 is open, the second driving voltage V out2 =V ref *[1+(R1 / R3)]+I ref *R1; When the switch S1 is closed, the first driving voltage V out1 =V ref *{1+{R1 / [(R2*R3) / (R2+R3)]}}+I ref *R1; where V ref As the reference voltage, I ref This is the bias current.

[0014] As a preferred embodiment, the resistance values ​​of resistors R1, R2, R3, and R0 satisfy the following condition: R1 > R2 = R3 > R0.

[0015] As a preferred embodiment, the switch S1 is any one of an optocoupler, a relay, a metal-oxide-semiconductor field-effect transistor, or an insulated-gate bipolar transistor.

[0016] To achieve at least one of the above objectives, the technical solution adopted by the present invention is as follows: an inverter system, comprising an inverter for modulating direct current into alternating current, the inverter having a plurality of switching transistors; a voltage regulating circuit as described above, wherein the first node and the third node of the voltage regulating circuit are connected to the switching transistors, and the switching speed of the switching transistors is adjusted by adjusting the driving voltage output by the voltage regulating circuit.

[0017] Compared with the prior art, the beneficial effects of the present invention are as follows: (1) The bus voltage of the inverter system can be monitored through the voltage monitoring module, thereby switching the working state of the voltage divider branch according to the bus voltage to output different drive voltages. When the bus voltage is less than the voltage threshold, the voltage regulation circuit can provide a higher first drive voltage V to the switching transistor of the inverter system. out1 This accelerates the switching speed of the switching transistors, thereby reducing losses and improving the transmission efficiency of the inverter system. When the bus voltage exceeds the voltage threshold, the voltage regulation circuit can provide a lower second drive voltage V to the switching transistors. out2 This slows down the disconnection speed of the switching transistor, thereby reducing the voltage spike at the moment the switching transistor disconnects, reducing the voltage stress on the shunt tubes of the inverter system, and helping to ensure the safe operation of the system.

[0018] (2) The voltage drop across resistor R0 can be adjusted by voltage regulator D, which helps to make the driving voltage output by the voltage regulation circuit more stable and improves the reliability of the voltage regulation circuit under complex working conditions. Attached Figure Description

[0019] Figure 1 is a schematic diagram of the H6 bridge inverter in the positive half-cycle operating mode in the prior art.

[0020] Figure 2 is a schematic diagram of the H6 bridge inverter in the positive half-cycle freewheeling mode in the prior art.

[0021] Figure 3 is a schematic diagram of the converter circuit of the H6 bridge inverter in the prior art.

[0022] Figure 4 is a voltage-current-power relationship curve of photovoltaic cells in the prior art.

[0023] Figure 5 is a schematic diagram of a voltage regulating circuit according to some embodiments of this application, in which the fourth node is connected to the first node and the fifth node is connected to the second node.

[0024] Figure 6 is a schematic diagram of a voltage regulator D according to some embodiments of this application.

[0025] Figure 7 is a schematic diagram of a voltage regulating circuit according to some embodiments of this application, in which the fourth node and the second node are connected, and the fifth node and the first node are connected.

[0026] Figure 8 is a schematic diagram of a voltage regulating circuit according to some other embodiments of the present application, in which the fourth node is connected to the first node and the fifth node is connected to the second node.

[0027] Figure 9 is a schematic diagram of the connection between the fourth node and the second node, and the connection between the fifth node and the first node to the voltage regulation circuit according to some other embodiments of this application. Detailed Implementation

[0028] The present invention will now be further described in conjunction with specific embodiments. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0029] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0030] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0031] Figure 1-3 shows an H6 bridge inverter topology, which is used to convert the input DC voltage PV + and PV - The current is modulated into alternating current and output to the grid Ugrid. Specifically, the H6 bridge inverter topology includes switching transistors T1~T6 and diodes D1~D6 connected in reverse parallel to switching transistors T1~T6 respectively. Among them, switching transistors T5 and T6 form two reverse series shunt transistors.

[0032] It should be understood that a complete power frequency cycle of the H6 bridge inverter is divided into a positive half-cycle and a negative half-cycle, and each half-cycle is further divided into operating mode and freewheeling mode. Taking the positive half-cycle as an example, in the positive half-cycle operating mode, as shown in Figure 1, switches T1, T4, and T5 are closed, while switches T2, T3, and T6 are open. At this time, the current path is PV. + →Switch T1→Filter Inductor L1→Grid Ugrid→Filter Inductor L2→Switch T4→PV -In other words, the DC side of the H6 bridge inverter is connected to the grid Ugrid via switches T1 and T4, thereby supplying positive half-cycle energy to the grid Ugrid. Furthermore, in the positive half-cycle freewheeling mode, as shown in Figure 2, switches T5 and T6 are closed, and switches T1~T4 are open. At this time, the current path is: grid Ugrid → filter inductor L2 → switch T6 → switch T5 → filter inductor L1 → grid Ugrid.

[0033] During the transition from the positive half-cycle freewheeling mode to the positive half-cycle operating mode, a commutation circuit as shown in Figure 3 is formed. At this time, the reverse-parallel diode D6 of switch T6 exhibits reverse recovery. Therefore, when switches T1 and T4 are closed, the reverse recovery current of diode D6 is superimposed, resulting in a negative di / dt current. Switches T1 and T4 need to withstand the bus voltage V. oc And the induced voltage V generated by the parasitic inductances ESL1, ESL4, ESL5 and ESL6 ESL1 V ESL4 V ESL5 and V ESL6 Switches T5 and T6 need to withstand the bus voltage V. oc And the induced voltage V generated by the parasitic inductances ESL1~ESL6 ESL1 ~V ESL6 In other words, switching transistors T5 and T6 are subject to significant voltage stress.

[0034] Figure 4 shows the voltage-current-power relationship curve of a photovoltaic cell. As can be seen from Figure 4, the voltage of the photovoltaic cell is not a stable value. In the actual operation of a photovoltaic grid-connected system, a maximum power point tracking (MPPT) control strategy is usually adopted to keep the output voltage of the photovoltaic cell at U. m Nearby; while the photovoltaic grid-connected system operates at an open-circuit voltage U oc Such situations are relatively rare, generally occurring only during start-up, shutdown, and power derating. However, during the inverter system design phase, to ensure the stability and reliability of the photovoltaic grid-connected system under extreme conditions, it is necessary to use the open-circuit voltage U... oc The driving parameters of switching transistors T1 to T6 are determined based on the conditions. In related technologies, in order to reduce the voltage stress of switching transistors T5 and T6, the turn-on resistance values ​​of switching transistors T1 to T4 are usually set to be large to slow down the turn-on and turn-off speed of switching transistors T1 to T4. However, this will lead to increased losses of switching transistors T1 to T4 under normal operating conditions, ultimately affecting the overall transmission efficiency of the inverter system.

[0035] Based on the above, in order to adjust the switching speed of switching transistors T1-T4 while keeping the total driving voltage of T1-T4 constant, this application provides a voltage regulating circuit, as shown in Figures 5-9, including a first capacitor C1, a second capacitor C2, a voltage divider branch, a voltage regulator D, a resistor R0, and a voltage monitoring module. Specifically, the first capacitor C1, the voltage divider branch, and the voltage regulator D are connected in parallel between the first node A and the second node B, and the second capacitor C2 and the resistor R0 are connected in parallel between the second node B and the third node C. The voltage between the first node A and the third node C is the total voltage V. s Total voltage V s Voltage division and total voltage V at first node A s The voltage divider at the third node C serves as the drive voltage for the inverter system's switching transistors. Furthermore, the voltage divider point is connected to regulator D, allowing regulator D to adjust the voltage drop across resistor R0 based on the voltage V2 at the voltage divider point, thus stabilizing the drive voltage output by the voltage regulation circuit. Even further, a voltage monitoring module monitors the inverter system's bus voltage. When the bus voltage is below a voltage threshold, the voltage divider branch operates in its first state, with the voltage divider at the first node A serving as the first drive voltage V. out1 When the bus voltage is greater than the voltage threshold, the voltage divider branch operates in the second state, and the voltage division at the first node A serves as the second driving voltage V. out2 Wherein, the first driving voltage V out1 Greater than the second driving voltage V out2 .

[0036] It can be understood that the voltage monitoring module monitors the bus voltage of the inverter system, and then switches the operating state of the voltage divider branch according to the bus voltage to output different drive voltages. Specifically, when the bus voltage is lower than the voltage threshold, the voltage regulation circuit can provide a higher first drive voltage V to the switching transistors of the inverter system. out1 This accelerates the switching speed of the switching transistors, thereby reducing losses and improving the transmission efficiency of the inverter system. When the bus voltage exceeds the voltage threshold, the voltage regulation circuit can provide a lower second drive voltage V to the switching transistors. out2 This slows down the switching speed of the transistor, thereby reducing the voltage spike at the moment of switching off and lowering the voltage stress on the shunt tubes of the inverter system, which helps ensure safe system operation. Furthermore, the voltage drop across resistor R0 can be adjusted through regulator D, which helps to make the drive voltage output by the voltage regulation circuit more stable and improves the reliability of the voltage regulation circuit under complex operating conditions.

[0037] In some embodiments, as shown in FIG6, the voltage regulator D includes an amplifier and an NPN transistor, the amplifier being used to compare the voltage V2 at the voltage divider point with the reference voltage V. refSpecifically, one of the amplifier's input terminals is connected to the voltage divider point, where the voltage V2 = V. out *[R1 / (R1+R3)]+I ref *R1, where V out For the voltage divider of the first node A, in other words, when the voltage divider branch is operating in the first state, V out Equal to the first driving voltage V out1 When the voltage divider branch is operating in the second state, V out Equal to the second driving voltage V out2 ;I ref This is used to provide bias current to the reference voltage source and the amplifier. Another input terminal of the amplifier is used to input the reference voltage V. ref Reference voltage V ref =2.495V≈2.5V. The amplifier is related to voltage V2 and reference voltage V. ref When comparing, the voltage V2 at the voltage divider point is less than the reference voltage V. ref When the voltage V2 at the voltage divider point is greater than the reference voltage V, the amplifier output decreases; when the voltage V2 at the voltage divider point is greater than the reference voltage V, the amplifier output decreases. ref When this happens, the amplifier's output increases.

[0038] Furthermore, the amplifier's output is connected to the base of the NPN transistor, and the collector and emitter of the NPN transistor are connected between the first node A and the second node B. When the amplifier's output decreases, the impedance between the collector and emitter of the NPN transistor increases, the shunt capability of the NPN transistor weakens, and the current I... k This reduces the voltage drop across resistor R0 via the NPN transistor, thereby reducing the voltage drop across the first node A, V. out As the amplifier output increases, the impedance between the collector and emitter of the NPN transistor decreases, enhancing the shunt capability of the NPN transistor and increasing the current I. k The voltage drop across resistor R0 increases, thereby increasing the voltage drop across the first node A via the NPN transistor, which in turn increases the voltage drop across the first node A. out decline.

[0039] It should be understood that, through the synergistic effect of the amplifier and NPN transistor in regulator D, the voltage V at the first node A is reduced. out Maintaining stability provides a stable drive current to the switching transistors of the inverter system, which helps to avoid drive current fluctuations caused by temperature drift and improves the stability and reliability of the voltage regulation circuit.

[0040] In some embodiments, as shown in Figures 5 and 7, the voltage divider branch includes resistors R1, R2, R3 and switch S1. Resistor R1 is connected in series between the fourth node E and resistor R3, and resistor R3 is connected in series between resistor R1 and the fifth node F. The connection between resistors R1 and R3 forms a voltage divider point. Resistor R2 and switch S1 are connected in series and then in parallel with resistor R1.

[0041] Furthermore, in one specific embodiment, as shown in Figure 5, the fourth node E is connected to the first node A, the fifth node F is connected to the second node B, and the total voltage V... s The voltage divider at the first node A relative to the third node C is positive. At this time, when switch S1 is open, the voltage divider branch operates in the first state, and the first node A outputs the first driving voltage V. out1 As the driving positive voltage, the third driving voltage V output by the third node C out3 As the driving negative voltage; when switch S1 is closed, the voltage divider branch operates in the second state, and the first node A outputs the second driving voltage V. out2 As the driving positive voltage, the fourth driving voltage V output by the third node C out4 As the driving negative pressure. Wherein, V out1 +V out3 =V out2 +V out4 =V s .

[0042] In another specific embodiment, as shown in Figure 7, the fourth node E is connected to the second node B, the fifth node F is connected to the first node A, and the total voltage V s The voltage divider at the first node A relative to the third node C is negative. At this time, when switch S1 is open, the voltage divider branch operates in the first state, and the first node A outputs the first driving voltage V. out1 As the driving negative voltage, the third driving voltage V output by the third node C out3 As the driving positive voltage; when switch S1 is closed, the voltage divider branch operates in the second state, and the first node A outputs the second driving voltage V. out2 As the driving negative voltage, the fourth driving voltage V output by the third node C out4 As the driving positive pressure. Wherein, V out1 +V out3 =V out2 +V out4 =V s .

[0043] In some embodiments, as shown in Figures 5 and 7, when switch S1 is open, the first driving voltage V out1 =V ref *[1+(R1 / R3)]+I ref *R1; When switch S1 is closed, the second driving voltage Vout2 =V ref *{1+{[(R1*R2) / (R1+R2)] / R3}}+I ref *[(R1*R2) / (R1+R2)]; where V ref As the reference voltage, I ref This is the bias current.

[0044] It should be understood that when switch S1 is open, the voltage divider relationship between resistors R1 and R3 enables the voltage regulating circuit to output a higher first driving voltage V. out1 This improves the switching speed of the switching transistor, thereby reducing losses and increasing the transmission efficiency of the inverter system. When switch S1 is closed, the voltage division relationship between resistors R1 and R2 (connected in parallel) and resistor R3 allows the voltage regulation circuit to output a lower second drive voltage V. out2 This slows down the switching speed of the transistor, thereby reducing the voltage spike at the moment of switching transistor disconnection and reducing the voltage stress on the shunt tubes of the inverter system.

[0045] Furthermore, the resistance values ​​of resistors R1, R2, R3, and R0 satisfy the following condition: R1 = R2 > R3 > R0. It should be understood that this arrangement improves the rationality of the voltage division ratio and helps ensure the bias current I. ref Voltage division V at the first node A out The fine-tuning effect makes the first driving voltage V of the voltage-regulated current output... out1 Second driving voltage V out2 It can meet the driving conditions of the switching transistor and make the first driving voltage V out1 Second driving voltage V out2 The transitions between them are more gradual.

[0046] In a specific example, as shown in Figure 5, the fourth node E is connected to the first node A, the fifth node F is connected to the second node B, and the total voltage V... s The voltage division at node A relative to node C is a positive voltage. Furthermore, V s =25V, R1=R2=130kΩ, R3=24kΩ, R0=2kΩ, I ref =2uA. When switch S1 is open, the first driving voltage V out1 =2.5V*[1+(130kΩ / 4kΩ)]+2uA*130kΩ=16.302V; When switch S1 is closed, the second driving voltage V out2=2.5V*{1+{[(130kΩ*130kΩ) / (130kΩ+130kΩ)] / 24kΩ}}+2uA*[(130kΩ*130kΩ) / (130kΩ+130kΩ)]=9.401V. In other words, closing switch S1 switches the positive drive voltage from 16.302V to 9.401V, thereby slowing down the disconnection speed of switching transistors T1~T4 and reducing the voltage stress on switching transistors T4 and T5.

[0047] In some embodiments, as shown in Figures 8 and 9, the voltage divider branch includes resistors R1, R2, R3 and switch S1. Resistor R1 is connected in series between the fourth node E and resistor R3, and resistor R3 is connected in series between resistor R1 and the fifth node F. The connection between resistors R1 and R3 forms a voltage divider point. Resistor R2 and switch S1 are connected in series and then in parallel with resistor R3.

[0048] Furthermore, in a specific example, as shown in Figure 8, the fourth node E is connected to the first node A, the fifth node F is connected to the second node B, and the total voltage V s The voltage division at the first node A relative to the third node B is a positive voltage. At this time, when switch S1 is closed, the voltage divider branch operates in the first state, and the first node A outputs the first driving voltage V. out1 As the driving positive voltage, the third driving voltage V output by the third node C out3 As the driving negative voltage; when switch S1 is open, the voltage divider branch operates in the second state, and the first node A outputs the second driving voltage V. out2 As the driving positive voltage, the fourth driving voltage V output by the third node C out4 As the driving negative pressure. Wherein, V out1 +V out3 =V out2 +V out4 =V s .

[0049] In another specific embodiment, as shown in Figure 9, the fourth node E is connected to the second node B, the fifth node F is connected to the first node A, and the total voltage V s The voltage divider at the first node A relative to the third node C is negative. At this time, when switch S1 is closed, the voltage divider branch operates in the first state, and the first node A outputs the first driving voltage V. out1 As the driving negative voltage, the third driving voltage V output by the third node C out3 As the driving positive voltage; when switch S1 is open, the voltage divider branch operates in the second state, and the first node A outputs the second driving voltage V. out2 As the driving negative voltage, the fourth driving voltage V output by the third node C out4 As the driving positive pressure. Wherein, V out1 +Vout3 =V out2 +V out4 =V s .

[0050] In some embodiments, as shown in Figures 8 and 9, when switch S1 is closed, the first driving voltage V out1 =V ref *{1+{R1 / [(R2*R3) / (R2+R3)]}}+I ref *R1; When switch S1 is open, the second driving voltage V out2 =V ref *[1+(R1 / R3)]+I ref *R1; where V ref As the reference voltage, I ref This is the bias current. It should be understood that when switch S1 is open, the voltage divider relationship between resistors R1 and R3 allows the voltage regulation circuit to output a lower second drive voltage V. out2 This slows down the switching speed of the transistor, reducing the voltage spike at the moment of switching off and lowering the voltage stress on the shunt transistors of the inverter system. When switch S1 is closed, the voltage division relationship between resistors R2 and R3 (connected in parallel) and resistor R1 allows the voltage regulation circuit to output a higher first drive voltage V. out1 This increases the switching speed of the switching transistors, thereby reducing losses and improving the transmission efficiency of the inverter system.

[0051] Furthermore, the resistance values ​​of resistors R1, R2, R3, and R0 satisfy the following condition: R1 > R2 = R3 > R0. It should be understood that this arrangement improves the rationality of the voltage division ratio and helps ensure the bias current I. ref Voltage division V at the first node A out The fine-tuning effect makes the first driving voltage V of the voltage-regulated current output... out1 Second driving voltage V out2 It can meet the driving conditions of the switching transistor and make the first driving voltage V out1 Second driving voltage V out2 The transitions between them are more gradual.

[0052] In one specific embodiment, as shown in Figure 8, the fourth node E is connected to the first node A, the fifth node F is connected to the second node B, and the total voltage V s The voltage division at node A relative to node B is a positive voltage. Furthermore, V s =25V, R1=130kΩ, R2=R3=51kΩ, R0=2kΩ, I ref =2uA. When switch S1 is closed, the first driving voltage V out1=2.5V*{1+{130kΩ / [(51kΩ*51kΩ) / (51kΩ+51kΩ)]}}+2uA*130kΩ=15.505V; When switch S1 is open, the second driving voltage V out2 =2.5V*[1+(130kΩ / 51kΩ)]+2uA*130kΩ=9.133V. That is to say, by opening switch S1, the driving positive voltage can be switched from 15.505V to 9.133V, thereby slowing down the disconnection speed of switching transistors T1~T4, so as to reduce the voltage stress on switching transistors T4 and T5.

[0053] It is worth mentioning that the switch S1 in the voltage divider branch can be implemented as any of the following: optocoupler, relay, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or IGBT (Insulated Gate Bipolar Transistor). This application does not impose any specific restrictions on this.

[0054] In some embodiments, as shown in FIG5 and FIG7-9, the voltage regulating circuit further includes a parallel capacitor C0 connected between the first node and the third node, wherein the parallel capacitor C0 provides the total voltage V. s In other words, a stable operating voltage is provided to the voltage regulator D and the voltage divider branch through the parallel capacitor C0, thereby ensuring the first drive voltage V. out1 Second driving voltage V out2 The output accuracy.

[0055] This application also provides an inverter system, including an inverter and the aforementioned voltage regulation circuit. The inverter is used to modulate direct current into alternating current, and the inverter has several switching transistors. Further, the first and third nodes of the voltage regulation circuit are connected to the switching transistors, and the switching speed of the switching transistors is adjusted by regulating the drive voltage output of the voltage regulation circuit.

[0056] In at least one embodiment, the inverter is implemented as an H6 bridge inverter, including switching transistors T1-T4 forming the bridge arms, and shunt transistors T5 and T6 connected in reverse series at both ends of the bridge arms. Four voltage regulating circuits are respectively connected to the switching transistors T1-T4, so as to output drive voltages to the switching transistors T1-T4 respectively to regulate the switching speed of the switching transistors. Specifically, when the inverter system is first started, due to the open circuit voltage U of the photovoltaic cells... oc When the voltage monitoring module detects that the bus voltage is higher than the voltage threshold, the voltage divider branches of each voltage regulation circuit switch to the second state to output a lower second drive voltage V to the switching transistors T1~T4 respectively. out2This slows down the turn-off speed of switching transistors T1-T4, reducing the voltage spike at the moment of turn-off and lowering the voltage stress on shunt transistors T5 and T6. Furthermore, when the photovoltaic cell operates at its maximum power point, the output voltage stabilizes at U... m When the voltage monitoring module detects that the bus voltage is lower than the voltage threshold, the voltage divider branches of each voltage regulation circuit switch to the first state to output a lower first drive voltage V to the switching transistors T1~T4 respectively. out1 This accelerates the switching speed of transistors T1 to T4, thereby reducing losses and improving the transmission efficiency of the inverter system.

[0057] The basic principles, main features, and advantages of this invention have been described above. Those skilled in the art should understand that this invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely principles of the invention. Various changes and modifications can be made without departing from the spirit and scope of the invention, and all such changes and modifications fall within the scope of the invention as claimed. The scope of protection claimed by this invention is defined by the appended claims and their equivalents.

Claims

1. A voltage regulating circuit, characterized in that, include: The system comprises a first capacitor C1, a second capacitor C2, a voltage divider branch, a voltage regulator D, a resistor R0, and a voltage monitoring module. The first capacitor C1, the voltage divider branch, and the voltage regulator D are connected in parallel between the first and second nodes. The second capacitor C2 and the resistor R0 are connected in parallel between the second and third nodes. The voltage between the first and third nodes is the total voltage V. s The total voltage V s The voltage division at the first node and the total voltage V s The voltage divider at the third node serves as the drive voltage for the switching transistors of the inverter system. The voltage divider point of the voltage divider branch is connected to the voltage regulator D, which adjusts the voltage drop across the resistor R0 based on the voltage V2 at the voltage divider point to keep the drive voltage output by the voltage regulation circuit stable. The voltage monitoring module monitors the bus voltage of the inverter system. When the bus voltage is less than a voltage threshold, the voltage divider branch operates in a first state, and the voltage divider at the first node serves as the first drive voltage V. out1 When the bus voltage is greater than the voltage threshold, the voltage divider branch operates in the second state, and the voltage division at the first node serves as the second driving voltage V. out2 Among them, the first driving voltage V out1 Greater than the second driving voltage V out2 .

2. The voltage regulating circuit according to claim 1, characterized in that, The voltage regulator D includes an amplifier and an NPN transistor. The amplifier is used to compare the voltage V2 at the voltage divider point with a reference voltage V. ref The amplifier's output is connected to the base of the NPN transistor; the collector and emitter of the NPN transistor are connected between the first node and the second node; when the voltage V2 at the voltage divider point is less than the reference voltage V... ref When the amplifier output decreases, the voltage drop across resistor R0 is reduced via the NPN transistor; when the voltage V2 at the voltage divider point is greater than the reference voltage V... ref When this occurs, the amplifier's output increases, thereby increasing the voltage drop across the resistor R0 via the NPN transistor.

3. The voltage regulating circuit according to claim 1, characterized in that, The voltage divider branch includes resistors R1, R2, and R3, and switch S1. Resistor R1 is connected in series between the fourth node and resistor R3. Resistor R3 is connected in series between resistor R1 and the fifth node. The connection point of resistors R1 and R3 forms the voltage divider point. Resistor R2 and switch S1 are connected in series and then in parallel with resistor R1. The fourth node is connected to the first node, and the fifth node is connected to the second node. The total voltage V... s The voltage division at the first node relative to the third node is a positive voltage; or, the fourth node is connected to the second node, and the fifth node is connected to the first node, and the total voltage V s The voltage division at the first node relative to the third node is negative; when the switch S1 is open, the voltage divider branch operates in the first state; when the switch S1 is closed, the voltage divider branch operates in the second state.

4. The voltage regulating circuit according to claim 3, characterized in that, When the switch S1 is closed, the second driving voltage V out2 =V ref *{1+{[(R1*R2) / (R1+R2)] / R3}}+I ref *[(R1*R2) / (R1+R2)]; When the switch S1 is open, the first driving voltage V out1 =V ref *[1+(R1 / R3)]+I ref *R1; Among them, V ref As the reference voltage, I ref This is the bias current.

5. The voltage regulating circuit according to claim 3, characterized in that, The resistance values ​​of resistors R1, R2, R3, and R0 satisfy the following condition: R1 = R2 > R3 > R0.

6. The voltage regulating circuit according to claim 1, characterized in that, The voltage divider branch includes resistors R1, R2, and R3, and switch S1. Resistor R1 is connected in series between the fourth node and resistor R3, and resistor R3 is connected in series between resistor R1 and the fifth node. The connection point of resistors R1 and R3 forms the voltage divider point. Resistor R2 and switch S1 are connected in series and then in parallel with resistor R3. The fourth node is connected to the first node, and the fifth node is connected to the second node. The total voltage V... s The voltage division at the first node relative to the third node is a positive voltage; or, the fourth node is connected to the second node, and the fifth node is connected to the first node, and the total voltage V s The voltage division at the first node relative to the third node is negative; when the switch S1 is closed, the voltage divider branch operates in the first state; when the switch S1 is open, the voltage divider branch operates in the second state.

7. The voltage regulating circuit according to claim 6, characterized in that, When the switch S1 is closed, the first driving voltage V out1 =V ref *{1+{R1 / [(R2*R3) / (R2+R3)]}}+I ref *R1; When switch S1 is open, the second driving voltage V out2 =V ref *[1+(R1 / R3)]+I ref *R1; Among them, V ref As the reference voltage, I ref This is the bias current.

8. The voltage regulating circuit according to claim 6, characterized in that, The resistance values ​​of resistors R1, R2, R3, and R0 satisfy the following condition: R1 > R2 = R3 > R0.

9. The voltage regulating circuit according to claim 3 or 6, characterized in that, The switch S1 is any one of an optocoupler, a relay, a metal-oxide-semiconductor field-effect transistor, or an insulated-gate bipolar transistor.

10. An inverter system, characterized in that, include: An inverter for modulating direct current into alternating current, the inverter having a plurality of switching transistors; a voltage regulating circuit as described in any one of claims 1-8, wherein a first node and a third node of the voltage regulating circuit are connected to the switching transistors, and the switching speed of the switching transistors is adjusted by adjusting the driving voltage output by the voltage regulating circuit.

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