EF type radio frequency power amplifier circuit

Abstract

The invention discloses an EF type radio frequency power amplifier circuit which comprises a transistor, an EF type matching network is connected between a drain electrode of the transistor and an output matching network, the EF type matching network comprises an E type matching network and multiple F type matching networks, and the multiple F type matching networks are used for controlling second harmonic impedance and third harmonic impedance. The multiple F-type matching network comprises a first parallel inductor, a second parallel capacitor and a series resonance network composed of the second parallel inductor and a third parallel capacitor, and the second parallel capacitor is connected with the series resonance network composed of the second parallel inductor and the third parallel capacitor in parallel and then connected with the first parallel inductor in series. A novel EF-type circuit is formed by innovatively combining an E-type matching network with multiple F-type matching networks. The high drain electrode efficiency can be achieved while the peak voltage swing at the two ends of the device is effectively controlled, the risk that the device is broken down is reduced, and meanwhile harmonic waves can be effectively restrained.

Description

Technical Field

[0001] This invention relates to a radio frequency power amplifier circuit, and more specifically to an EF class radio frequency power amplifier circuit. Background Technology

[0002] The primary function of a radio frequency (RF) power amplifier is to amplify and regulate RF signals, transforming low-power RF signals into high-power signals to meet the requirements for signal transmission distance and quality in fields such as communications and broadcasting, as well as the energy requirements for RF signals in industrial, medical, and scientific fields. RF power devices are widely used in mobile phones, televisions, radio, radar, satellite communications, radio frequency identification, industrial heating, plasma excitation, nuclear magnetic resonance, particle accelerators, and other fields.

[0003] In semiconductor equipment, radio frequency (RF) power amplifiers are used for plasma excitation. Due to the changing state of the plasma, the amplitude and phase of the RF power amplifier's load are constantly changing, resulting in a mismatch. This can cause the RF power amplifier to potentially enter inefficient or high-voltage swing regions, while also facing significant reflected signals. These reflected signals superimpose with the output signal, further amplifying the voltage swing across the RF power transistor, a core component of the RF power amplifier. If this voltage exceeds the avalanche breakdown voltage of the RF power transistor, it can easily break down and burn out. Therefore, controlling the voltage swing across the RF power transistor and improving the efficiency of the RF power amplifier is crucial.

[0004] Currently, the RF power amplifiers used in traditional semiconductor RF power supplies are mostly Class E amplifiers, such as... Figure 1 As shown, Class E amplifiers are characterized by their high efficiency. Because there is no further circuitry to shape the signal waveform, these amplifiers place very high demands on the device's breakdown voltage. This is because Class E amplifiers operate with a very high maximum voltage swing at the output, reaching up to 3.6 times the operating voltage at a 180-degree conduction angle. Under mismatched load conditions, the peak voltage swing at the drain will be even higher due to the added echo. Therefore, reducing the peak voltage swing and enhancing the device's breakdown voltage are particularly important in this field.

[0005] On the other hand, semiconductor systems also have high requirements for the harmonics of RF power amplifiers. The harmonic characteristics of Class E amplifiers are typically not good enough, necessitating further harmonic suppression. Summary of the Invention

[0006] To address the aforementioned technical problems, the present invention aims to provide an EF-class RF power amplifier circuit, innovatively employing an E-class matching network combined with a novel multiple F-class matching network to form a new type of EF-class circuit. This achieves high drain efficiency while effectively controlling the peak voltage swing across the device, reducing the risk of device breakdown and improving system reliability. Furthermore, the introduction of multiple F-class matching networks effectively suppresses harmonics from entering the load, improving the system's spectral cleanliness.

[0007] To address these problems in the prior art, the technical solution provided by this invention is as follows:

[0008] An EF-class RF power amplifier circuit includes a transistor. An EF-class matching network is connected between the drain of the transistor and the output matching network. The EF-class matching network includes an E-class matching network and multiple F-class matching networks. The multiple F-class matching networks are used to control the second harmonic impedance and the third harmonic impedance. The multiple F-class matching networks include a first parallel inductor, a second parallel capacitor, and a series resonant network composed of the second parallel inductor and a third parallel capacitor. The second parallel capacitor is connected in parallel with the series resonant network composed of the second parallel inductor and the third parallel capacitor, and then connected in series with the first parallel inductor.

[0009] In a preferred embodiment, the Class E matching network includes a first parallel capacitor and a third series inductor. The first parallel capacitor is disposed between the drain of the transistor and the multiple Class F matching network. One end of the third series inductor is connected to the drain of the transistor, and the other end is connected to the output matching network.

[0010] In the preferred embodiment, the multiple F-type matching network forms two resonant circuits, and the resonant frequencies of the two resonant circuits are obtained by the following formula:

[0011]

[0012] Where f1 is the first resonant frequency, L2 is the second parallel inductor, and C3 is the third parallel capacitor; f2 is the second resonant frequency, L1 is the first parallel inductor, and C... e It is the equivalent capacitance formed by the second parallel capacitor and the series resonant network consisting of the second parallel inductor and the third parallel capacitor.

[0013] In a preferred embodiment, the first parallel capacitor and the drain-source parasitic capacitance of the transistor together form the parallel capacitor of the Class E amplifier.

[0014] In a preferred embodiment, the output matching network includes a series capacitor, which resonates with a third series inductor at the fundamental frequency.

[0015] In a preferred embodiment, one end of the first parallel inductor in the multiple Class F matching network is connected to the drain of the transistor, the other end of the first parallel inductor is connected to one end of the second parallel capacitor, the other end of the second parallel capacitor is grounded, the other end of the first parallel inductor is simultaneously connected to one end of the second parallel inductor, the other end of the second parallel inductor is connected to one end of the third parallel capacitor, and the other end of the third parallel capacitor is grounded.

[0016] In a preferred embodiment, the gate of the transistor is connected to a gate power supply circuit. One end of the resistor in the gate power supply circuit is connected to the gate of the transistor, and the other end is sequentially connected to a first RF decoupling capacitor, a first power supply filter capacitor, and the gate voltage.

[0017] In a preferred embodiment, the drain of the transistor is connected to a drain power supply circuit, one end of the fourth inductor of the drain power supply circuit is connected to the drain of the transistor, and the other end is sequentially connected to a second RF decoupling capacitor, a second power supply filter capacitor, and a drain voltage.

[0018] Compared with existing solutions, the advantages of this invention are:

[0019] 1. This circuit employs a Class E matching network combined with multiple Class F matching networks to form a novel Class EF circuit. It allows for flexible design that combines the advantages of Class E, Class F, and inverse Class F amplifiers. This means it can more flexibly and effectively shape the signal waveform. Therefore, it can achieve high drain efficiency while effectively controlling the peak voltage swing across the device. This reduces the risk of device breakdown and improves system reliability.

[0020] 2. Furthermore, the introduction of multiple Class F matching networks allows for more flexible and effective suppression of second and third harmonics. This significantly reduces the risk of harmonics entering the load, thus improving the system's spectral cleanliness. Attached Figure Description

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0022] Figure 1 This is a schematic diagram of an existing Class E RF power amplifier circuit;

[0023] Figure 2 This is a schematic diagram of an EF class RF power amplifier circuit according to this embodiment;

[0024] Figure 3 The simulation results of the output power and efficiency of an existing Class E RF power amplifier circuit are shown in the figure.

[0025] Figure 4 The figure shows the simulation results of the fundamental and harmonic power of an existing Class E RF power amplifier circuit.

[0026] Figure 5 The figure shows the simulation results of the drain voltage of existing Class E RF power amplifier circuit devices;

[0027] Figure 6 The following is a simulation result diagram of the output power and efficiency of the EF class RF power amplifier circuit in this embodiment;

[0028] Figure 7 The figure shows the simulation results of the fundamental and harmonic power of the EF class RF power amplifier circuit in this embodiment.

[0029] Figure 8 The diagram shows the simulation results of the drain voltage of the EF class RF power amplifier circuit in this embodiment. Detailed Implementation

[0030] The above-described solution will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. The implementation conditions used in the embodiments may be further adjusted according to the conditions of specific manufacturers, and the implementation conditions not specified are generally those in routine experiments.

[0031] Example:

[0032] like Figure 2 As shown, an EF-class RF power amplifier circuit includes a transistor T1, an EF-class matching network EFNN, an input matching network IMN, an output matching network OMN, a gate power supply circuit VgBN, and a drain power supply circuit VdBN. The EF-class matching network EFNN connects the drain D of transistor T1 to the output matching network OMN. The EF-class matching network EFNN includes an E-class matching network and multiple F-class matching networks FNN. The multiple F-class matching networks FNN include a first parallel inductor L1, a second parallel capacitor C2 connected in parallel to ground, and a series resonant network composed of the second parallel inductor L2 and a third parallel capacitor C3. The second parallel capacitor C2 is connected in parallel with the series resonant network composed of the second parallel inductor L2 and the third parallel capacitor C3, and then connected in series with the first parallel inductor L1.

[0033] The Class E matching network includes a first parallel capacitor C1 and a third series inductor L3. The first parallel capacitor C1 is located between the drain D of transistor T1 and the multiple Class F matching network FNN. One end of the third series inductor L3 is connected to the drain D of transistor T1, and the other end is connected to the output matching network OMN.

[0034] Specifically, the signal input terminal RFin is connected to one end of the input matching network IMN, and the other end of the input matching network IMN is connected to the gate G of transistor T1. The function of the input matching network IMN is to match the input impedance of transistor T1 to the impedance of the signal input terminal RFin, which is typically 50 Ohms. This reduces reflected power and feeds the signal into the gate G of transistor T1 as efficiently as possible.

[0035] The gate G of transistor T1 is connected to resistor R1 in the gate power supply circuit VgBN. The other end of resistor R1 is connected in sequence to RF decoupling capacitor C4 and power supply filter capacitor C5. The gate voltage Vgs is applied to the gate G of transistor T1 through the gate power supply circuit VgBN, providing the gate bias voltage for transistor T1.

[0036] The drain D of transistor T1 is connected to inductor L4 in the drain power supply circuit VdBN. The other end of inductor L4 is connected in sequence to RF decoupling capacitor C6 and power supply filter capacitor C7. The drain voltage Vds is applied to the drain D of transistor T1 through the drain power supply circuit VdBN, providing the drain power supply voltage for transistor T1.

[0037] The drain D of transistor T1 is connected to one end of the first parallel capacitor C1 in the EF-class matching network EFNN. The other end of the first parallel capacitor C1 is grounded. The function of the first parallel capacitor C1 is as a compensation capacitor. It, together with the drain-source parasitic capacitance of transistor T1, forms the parallel capacitor in the Class E amplifier.

[0038] Class E amplifiers employ parallel capacitors to ensure proper energy transfer during switching. In switching mode, Class E amplifiers can efficiently convert DC signals into RF signals for the load.

[0039] The drain D of transistor T1 is connected to one end of the first parallel inductor L1 in the multiple class-F matched network FNN. The other end of the first parallel inductor L1 is connected to one end of the second parallel capacitor C2. The other end of the second parallel capacitor C2 is grounded. The other end of the first parallel inductor L1 is also connected to one end of the second parallel inductor L2. The other end of the second parallel inductor L2 is connected to one end of the third parallel capacitor C3, and the other end of the third parallel capacitor C3 is grounded.

[0040] The two resonant points in a multi-F-class matching network (FNN) are calculated using the following formula:

[0041]

[0042] Where f1 is the first resonant frequency, L2 is the second parallel inductor, and C3 is the third parallel capacitor; f2 is the second resonant frequency, L1 is the first parallel inductor, and C... eIt is the equivalent capacitance formed by the second parallel capacitor and the series resonant network consisting of the second parallel inductor L2 and the third parallel capacitor C3.

[0043] The drain D of transistor T1 is simultaneously connected to one end of the third series inductor L3 in the EF-type matching network EFNN. The other end of the third series inductor L3 is connected to one end of the output matching network OMN. The other end of the output matching network OMN is connected to the signal output terminal RFout.

[0044] The function of the output matching network (OMN) is to match the impedance of the device to the impedance of the signal output terminal RFout, typically 50 Ohms. Generally, the OMN contains a series capacitor to block DC, and this capacitor, along with the third series inductor L3 in the EFNN, forms a series resonance at the fundamental frequency, passing the fundamental frequency while filtering harmonics. Therefore, multiple Class F matching networks (FNNs) can effectively control the second and third harmonic impedances. Combined with the characteristics of Class E amplifiers, this allows for effective control of the voltage waveform, forming various Class EF circuits. These circuits effectively control the peak voltage swing across the device while achieving high drain efficiency, reducing the risk of device breakdown and improving system reliability. They also provide more flexible and effective suppression of second and third harmonics. For example, in Class EF2, the second harmonic impedance is controlled to be low and the third harmonic impedance to be high; in Class EF3, the third harmonic impedance is controlled to be low and the second harmonic impedance to be high. This allows for control of the voltage across the device and the amplitude of harmonic components according to the specific application.

[0045] Figure 3 and Figure 6 The figures shown are simulation results of the output power and efficiency of an existing Class E RF power amplifier circuit and the simulation results of the Class EF RF power amplifier circuit in this embodiment. It can be seen that the output power and efficiency of both are almost identical.

[0046] Figure 4 and Figure 7 The figures show the simulation results of the fundamental and harmonic power of the existing Class E RF power amplifier circuit and the simulation results of the fundamental and harmonic power of the Class EF RF power amplifier circuit in this embodiment. It can be seen that the Class EF RF power amplifier circuit in this embodiment optimizes the second harmonic suppression by approximately 30 dBc and the third harmonic suppression by approximately 20 dBc.

[0047] Figure 5 and Figure 8 The figures show the simulation results of the drain voltage of the existing Class E RF power amplifier circuit and the Class EF RF power amplifier circuit of this embodiment. It can be seen that the drain voltage of the Class EF RF power amplifier circuit of this embodiment is optimized by 43V.

[0048] It should be understood that the specific embodiments described above are merely illustrative or explanatory of the principles of the invention and do not constitute a limitation thereof. Therefore, any modifications, equivalent substitutions, improvements, etc., made without departing from the spirit and scope of the invention should be included within the protection scope of the invention. Furthermore, the appended claims are intended to cover all variations and modifications falling within the scope and boundaries of the appended claims, or equivalent forms of such scope and boundaries.

Claims

1. An EF class RF power amplifier circuit, comprising transistors, characterized in that, An EF-class matching network is connected between the drain of the transistor and the output matching network. The EF-class matching network includes an E-class matching network and multiple F-class matching networks. The multiple F-class matching networks are used to control the second harmonic impedance and the third harmonic impedance. The multiple F-class matching networks include a first parallel inductor, a second parallel capacitor, and a series resonant network composed of the second parallel inductor and the third parallel capacitor. The second parallel capacitor is connected in parallel with the series resonant network composed of the second parallel inductor and the third parallel capacitor, and then connected in series with the first parallel inductor.

2. The EF class RF power amplifier circuit according to claim 1, characterized in that, The Class E matching network includes a first parallel capacitor and a third series inductor. The first parallel capacitor is disposed between the drain of the transistor and the multiple Class F matching network. One end of the third series inductor is connected to the drain of the transistor, and the other end is connected to the output matching network.

3. The EF class RF power amplifier circuit according to claim 1, characterized in that, The multiple F-type matching network forms two resonant circuits, and the resonant frequencies of the two resonant circuits are obtained by the following formula: Where f1 is the first resonant frequency, L2 is the second parallel inductor, and C3 is the third parallel capacitor; f2 is the second resonant frequency, L1 is the first parallel inductor, and C... e It is the equivalent capacitance formed by the second parallel capacitor and the series resonant network consisting of the second parallel inductor and the third parallel capacitor.

4. The EF class RF power amplifier circuit according to claim 2, characterized in that, The first parallel capacitor and the drain-source parasitic capacitance of the transistor together form the parallel capacitor of the Class E amplifier.

5. The EF class RF power amplifier circuit according to claim 2, characterized in that, The output matching network includes a series capacitor that resonates with a third series inductor at the fundamental frequency.

6. The EF class RF power amplifier circuit according to claim 1, characterized in that, In the multiple Class F matching network, one end of the first parallel inductor is connected to the drain of the transistor, the other end of the first parallel inductor is connected to one end of the second parallel capacitor, the other end of the second parallel capacitor is grounded, the other end of the first parallel inductor is simultaneously connected to one end of the second parallel inductor, the other end of the second parallel inductor is connected to one end of the third parallel capacitor, and the other end of the third parallel capacitor is grounded.

7. The EF class RF power amplifier circuit according to claim 1, characterized in that, The gate of the transistor is connected to the gate power supply circuit. One end of the resistor in the gate power supply circuit is connected to the gate of the transistor, and the other end is connected in sequence to the first RF decoupling capacitor, the first power supply filter capacitor, and the gate voltage.

8. The EF class RF power amplifier circuit according to claim 1, characterized in that, The drain of the transistor is connected to the drain power supply circuit. One end of the fourth inductor of the drain power supply circuit is connected to the drain of the transistor, and the other end is connected in sequence to the second RF decoupling capacitor, the second power supply filter capacitor and the drain voltage.

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