Low-side driving circuit

Abstract

The invention discloses a low-side driving circuit, and the circuit is characterized in that a control module is used for controlling a first interface to output a first enabling control signal according to an input control signal and the actual voltage of a driving output end, and controlling the first interface to be switched to an input state after controlling the first interface to output the first enabling control signal; the control module is also used for controlling the drive control output end to output a drive control signal; the logical operation module is used for outputting a second enable control signal according to the first enable control signal and a feedback signal provided by the signal detection module; the driving output module is used for outputting a low-side driving signal according to the second enabling control signal and the driving control signal; and the signal detection module is used for outputting a feedback signal to the feedback input end of the logic operation module according to the detection voltage of the detection end of the driving output module, so that electronic devices of the driving output module can be prevented from being damaged due to overcurrent or overvoltage, the reliability of the low-side driving circuit can be improved, and the service life of the low-side driving circuit can be prolonged.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, and in particular to a low-side driving circuit. Background Technology

[0002] A low-side drive circuit is a circuit design used to provide long high-level signals, long low-level signals, or PWM (Pulse Width Modulation) signals to other controllers. Figure 1 This is a schematic diagram of a typical low-side drive circuit in the prior art, such as... Figure 1 As shown, R01 is a pull-down resistor, which is pulled low by default before driving; C01 is an input filter capacitor; R02 and C02 form a filter circuit; R03 is a current-limiting resistor; R04 is a pull-down voltage divider resistor; R03 and R04 form a voltage divider diagnostic circuit; R05 is a current-limiting resistor; C2 is a filter capacitor for the diagnostic circuit; R05 and C02 form a filter circuit; D01 is a bidirectional ESD (Electro-Static Discharge) diode; C03 is an ESD capacitor; D01 and C03 are used to protect the low-side switch from damage during ESD impacts. Q01 is a low-side switch; R06 is a voltage divider resistor; R07 is a filter resistor; C04 is a filter capacitor; R07 and C04 form a filter circuit; Q02 is a current-limiting transistor. In addition, IN′ is the control input signal of the circuit. The MCU judges whether there is a fault by sampling the voltage state of DiagOut; Rload is the pull-up resistor of the load end, which is connected to the Output end of the low-side drive circuit so that the low-side drive circuit provides the voltage state to the load end.

[0003] Currently, the main fault types of low-side drive circuits are SCB (short circuit to power supply), SCG (short circuit to ground), and OL (open circuit). When the low-side drive circuit is working normally, Q01 has two states: on and off. When the low-side switch Q01 is on, due to the large load resistance in the path (generally 2KΩ), the conduction current of Q01 is small, so the voltage across R08 is lower than the turn-on voltage of Q02, and Q02 remains off. At this time, Q01 is controlled by the control input signal In, and the low-side drive circuit maintains normal operation. When an SCB fault occurs at the output of the low-side drive circuit, the conduction current of Q01 is large, and the voltage formed on R08 is higher than the turn-on voltage of Q02. The conduction of Q02 will pull down the control terminal of Q01, causing Q01 to turn off. At this time, the voltage of R08 will drop again, and after it falls below the turn-on voltage of Q02, Q02 turns off, and Q01 is turned on again. As long as the SCB fault in the low-side drive circuit is still present, this adjustment process will repeat until a balance is reached. The current flowing through Q01 is approximately Vth / R8. When the SCB fault in the low-side drive circuit disappears, the voltage across R08 returns to below the turn-on voltage of Q02, turning it off. This does not affect the control of Q01 by the input signal In, and the low-side drive circuit continues to operate normally.

[0004] As can be seen from the above working process, when an SCB fault occurs, after the current limiting transistor Q02 is turned on, the low-side switch Q01 is turned off. At this time, R08 and the current limiting transistor Q2 cannot continue to detect the circuit fault. Furthermore, in the presence of an SCB fault, Q01 will be turned on repeatedly, increasing the possibility of damage to Q01 and Q02 in the drive circuit, thereby reducing the reliability of the low-side drive circuit and shortening its service life.

[0005] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0006] This invention provides a low-side driving circuit to improve the reliability of the low-side driving circuit and extend its service life.

[0007] According to one aspect of the present invention, a low-side driving circuit is provided, comprising: a control module, a logic operation module, a drive output module, and a signal detection module;

[0008] The control module receives an input control signal at its signal input terminal, and its detection input terminal is electrically connected to the drive output terminal of the low-side drive circuit. The control module's first interface is electrically connected to the control terminal of the logic operation module, and its drive control output terminal is electrically connected to the drive terminal of the drive output module. The control module is used to control the first interface to output a first enable control signal based on the input control signal and the actual voltage of the drive output terminal, and after controlling the first interface to output the first enable control signal, to switch the first interface to an input state. The control module is also used to control the drive control output terminal to output a drive control signal.

[0009] The control terminal of the logic operation module is electrically connected to the first interface, the feedback input terminal of the logic operation module is electrically connected to the output terminal of the signal detection module, the output terminal of the logic operation module is electrically connected to the enable terminal of the drive output module, and the input terminal of the signal detection module is electrically connected to the detection terminal of the drive output module; the logic operation module is used to output a second enable control signal according to the first enable control signal and the feedback signal provided by the signal detection module.

[0010] The output terminal of the drive output module is electrically connected to the drive output terminal of the low-side drive circuit; the drive output module is used to output a low-side drive signal according to the second enable control signal and the drive control signal.

[0011] The signal detection module is used to output the feedback signal to the feedback input terminal of the logic operation module based on the detection voltage of the detection terminal of the drive output module.

[0012] Optionally, the logic operation module includes a first diode, a second diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor;

[0013] The cathode of the first diode is electrically connected to the output terminal of the signal detection module, and the anode of the first diode is electrically connected to the first interface of the control module, the anode of the second diode, and the first terminal of the first resistor.

[0014] The control electrode of the first transistor is electrically connected to the cathode of the second diode through the second resistor; the first electrode of the first transistor is electrically connected to the first terminal of the third resistor and the control electrode of the second transistor; and the second electrode of the first transistor is electrically connected to the ground terminal.

[0015] The first terminal of the second transistor and the second terminal of the third resistor are both electrically connected to the first voltage terminal, and the second terminal of the second transistor, the second terminal of the first resistor, and the enable terminal of the drive output module are electrically connected to the first node;

[0016] The fourth resistor and the fifth resistor are connected in series between the first node and the grounding terminal.

[0017] Optionally, the logic operation module further includes a third diode;

[0018] The anode of the third diode is electrically connected to the first node, and the cathode of the third diode is electrically connected to the cathode of the first diode.

[0019] Optionally, the logic operation circuit further includes a fourth diode;

[0020] The anode of the fourth diode is electrically connected to the first node, the cathode of the fourth diode is electrically connected to the anode of the first diode, and the cathode of the fourth diode is electrically connected to the ground terminal through the fifth resistor.

[0021] Optionally, the drive output module includes a pre-drive chip, a third transistor, a fifth diode, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;

[0022] The driving terminal of the pre-drive chip is electrically connected to the driving control output terminal of the control module, the enabling terminal of the pre-drive chip is electrically connected to the output terminal of the logic operation module, and the output terminal of the pre-drive chip is electrically connected to the control electrode of the third transistor through the fifth resistor.

[0023] The first terminal of the third transistor is electrically connected to the anode of the fifth diode and the drive output terminal, and the cathode of the fifth diode is electrically connected to the second voltage terminal; the second terminal of the third transistor is electrically connected to the first terminal of the sixth resistor and the input terminal of the signal detection module, and the second terminal of the sixth resistor is electrically connected to the ground terminal.

[0024] The seventh resistor is electrically connected between the first voltage terminal and the drive output terminal; the eighth resistor is electrically connected between the drive output terminal and the ground terminal.

[0025] Optionally, the low-side drive circuit further includes a ninth resistor;

[0026] The ninth resistor is electrically connected between the drive output terminal and the detection input terminal of the control module.

[0027] Optionally, the signal detection circuit includes a tenth resistor, an eleventh resistor, a twelfth resistor, and a fourth transistor;

[0028] The first end of the tenth resistor is electrically connected to the detection end of the drive output module, the second end of the tenth resistor is electrically connected to the first end of the eleventh resistor and the control electrode of the fourth transistor, and the second end of the eleventh resistor is electrically connected to the ground end.

[0029] The first terminal of the fourth transistor is electrically connected to the first terminal of the twelfth resistor and the feedback input terminal of the logic operation module, the second terminal of the twelfth resistor is electrically connected to the first voltage terminal, and the second terminal of the fourth transistor is electrically connected to the ground terminal.

[0030] Optionally, the low-side drive circuit further includes a thirteenth resistor;

[0031] The thirteenth resistor is electrically connected between the first interface and the control terminal of the logic operation module.

[0032] Optionally, the control module is further configured to detect the fault condition of the drive output terminal based on the actual voltage of the drive output terminal, and when it is determined that there is a short-circuit to ground fault or an open-circuit fault at the drive output terminal, control the first interface to output a first enable control signal at an enable level.

[0033] Optionally, the control module is further configured to detect a short-circuit to power supply fault at the drive output terminal based on the signal received by the first interface, and when it is determined that the short-circuit to power supply fault exists at the drive output terminal, control the first interface to output a first enable control signal at an enable level.

[0034] In this embodiment of the invention, the control module acquires the input control signal and the actual voltage of the drive output terminal. This allows the control module to detect short-circuit to ground faults and open-circuit faults at the drive output terminal based on the actual voltage. Upon determining a short-circuit to ground fault or an open-circuit fault at the drive output terminal, the control module sets the first enable control signal output from the first interface to a disabled level and stops outputting the drive control signal. By setting the logic operation module to enable the second enable control signal when the first enable control signal is enabled and the feedback signal indicates that there is no short-circuit to power fault at the drive output terminal, the drive output is then enabled. The module outputs a low-side drive signal based on the drive control signal and the second enable control signal. It also collects the detection voltage of the drive output module through the signal acquisition module and outputs a feedback signal to the feedback input terminal of the logic operation module based on the detection voltage. When there is a short circuit to ground, short circuit to power supply, or open circuit fault at the drive output terminal of the low-side drive circuit, the drive output module is always kept in an disabled state and will not repeatedly switch between enabled and disabled states. This can prevent the electronic components of the drive output module from being damaged due to overcurrent or overvoltage, improve the reliability of the low-side drive circuit, and extend the service life of the low-side drive circuit.

[0035] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of a typical low-side drive circuit in the prior art;

[0038] Figure 2 This is a schematic diagram of a low-side driving circuit provided in an embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of another low-side driving circuit provided in an embodiment of the present invention;

[0040] Figure 4 This is a schematic diagram of another low-side driving circuit provided in an embodiment of the present invention. Detailed Implementation

[0041] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0042] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0043] Figure 2 This is a schematic diagram of a low-side driving circuit provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the low-side drive circuit includes a control module 10, a logic operation module 20, a drive output module 30, and a signal detection module 40. The signal input terminal IN of the control module 10 receives the input control signal Vin. The detection input terminal Din of the control module 10 is electrically connected to the drive output terminal Vout of the low-side drive circuit. The first interface P1 of the control module 10 is electrically connected to the control terminal of the logic operation module 20. The drive control output terminal VCO of the control module 10 is electrically connected to the drive terminal of the drive output module 30. The control module 140 is used to control the first interface P1 to output a first enable control signal according to the input control signal and the voltage signal of the drive output terminal Vout, and after controlling the first interface P1 to output the first enable control signal, controls the first interface P1 to switch to the input state. The control module 10 is also used to control the drive control output terminal VCO to output... The logic operation module 20 outputs a drive control signal; its control terminal is electrically connected to the first interface P1, its feedback input terminal is electrically connected to the output terminal of the signal detection module 40, its output terminal is electrically connected to the enable terminal of the drive output module 30, and its input terminal is electrically connected to the detection terminal of the drive output module 30; the logic operation module 20 outputs a second enable control signal based on the first enable control signal and the feedback signal provided by the signal detection module 40; the output terminal of the drive output module 30 is electrically connected to the drive output terminal Vout of the low-side drive circuit; the drive output module 30 outputs a low-side drive signal based on the second enable control signal and the drive control signal; the signal detection module 40 outputs a feedback signal to the feedback input terminal of the logic operation module 20 based on the detection of the detection terminal of the drive output module 40.

[0044] Specifically, the input control signal Vin can be a control signal provided by the user or a signal generated by the controller based on the drive requirements of the load. This embodiment of the invention does not impose specific limitations on this. When the input control signal Vin is at an enable level, the control module 10 can control the first enable control signal output by the first interface P1 to be at an enable level, thereby controlling the second enable control signal output by the logic operation module 20 to be at an enable level, thus controlling the drive output module 30 to be in an enabled state. Simultaneously, the control module 10 also controls the drive control output terminal VCO to output a corresponding drive control signal according to the enable level of the input control signal Vin. The drive control signal can be a fixed voltage signal, a PWM signal, or a digital signal containing information such as frequency, amplitude, and duty cycle, so that the drive output module 30 outputs a corresponding low-side drive signal according to the drive control signal in the enabled state. When the input control signal Vin is at a disabled level, the control module 10 can control the first enable control signal output by the first interface P1 to be at a disabled level, thereby controlling the second enable control signal output by the logic operation module 20 to be at a disabled level. Simultaneously, the control module 10 can also control the drive control output terminal VCO to stop outputting the drive control signal when the input control signal Vin is at a disabled level, causing the drive output module 30 to stop outputting the low-side drive signal in the disabled state. The detection input terminal DIN of the control module 20 can be electrically connected to the drive output terminal Vout to obtain the actual voltage of the drive output terminal Vout. During the process of controlling the first interface P1 to output the first enable control signal and controlling the drive control output terminal VCO to output the drive control signal, the control module 10 can also control the state of the first enable control signal based on the actual voltage of the drive output terminal Vout.

[0045] For example, the control module 10 is also used to detect the fault condition of the drive output terminal Vout based on the actual voltage of the drive output terminal Vout, and when it is determined that there is a short circuit to ground fault or an open circuit fault at the drive output terminal Vout, control the first interface P1 to output a first enable control signal with an in enable level.

[0046] Specifically, when the control module 10 determines that there is an SCG fault or an OL fault at the drive output terminal Vout based on the actual voltage of the drive output terminal Vout, it controls the first enable control signal to be at an enable level, so that the second enable control signal output by the logic operation module 20 is also at an enable level. This causes the drive control module 30 to switch to an enable state and stop outputting the low-side drive signal, or output a low-side drive signal with a voltage of zero or close to zero. When the control module 10 determines that there is no SCG fault or OL fault at the drive output terminal Vout based on the voltage detection signal, it controls the first interface P1 to remain unchanged in its current state, so that the second enable control signal output by the logic operation module 20 remains in its current state. This, in turn, causes the low-side drive signal output by the drive output module 30 to remain in its current state, thereby achieving low-side drive of the load.

[0047] Specifically, the first interface P1, used to output the first enable control signal, is configured to switch to an input state after outputting the enable or disable level of the first enable control signal. In other words, after the control module 10 controls the first interface P1 to output the enable or disable level of the first enable control signal, it controls the first interface P1 to switch from an output state to an input state. After the first interface P1 switches to an input state, the control module 10 can detect the signal at the control terminal of the logic operation module 20. Since the signal at the control terminal of the logic operation module 20 is affected by the feedback signal, the control module 20 can detect the feedback signal based on the signal at the control terminal of the logic operation module 20, thereby enabling the detection of SCB faults at the drive output terminal Vout. For example, the first interface P1 can be one of the following: a general-purpose digital interface (e.g., GPIO (General Purpose Input Output) interface), a dedicated timing interface (e.g., a hardware pulse width modulation signal output interface, a timer compare output interface), a programmable logic interface (e.g., a complex programmable gate device interface, a field-programmable gate array input / output interface), a serial communication interface (e.g., a serial peripheral interface, an integrated circuit bus interface, a control module local area network bus interface), or a combination of several of these interfaces. This embodiment of the invention does not specifically limit this.

[0048] The control terminal of the logic operation module 20 is electrically connected to the first interface P1 of the control module 10 to receive the first enable control signal provided by the control module 10. The feedback input terminal of the logic operation module 20 is electrically connected to the current detection output terminal of the signal detection module 40 to receive the current detection signal provided by the signal detection module 40. The logic operation module 20 can be an AND gate logic operation circuit composed of electronic devices. When the first enable control signal is at an enable level and the feedback signal is at a level indicating that the drive output terminal Vout of the drive output module 30 does not have an SCB fault, the second enable control signal output by the logic operation module 20 is at an enable level. Conversely, when the first enable control signal is at a disabled level, and / or the feedback signal is at a level indicating that the drive output terminal Vout has an SCB fault (i.e., at least one of the first enable control signal being at a disabled level and the drive output terminal Vout having an SCB fault exists), the second enable control signal output by the logic operation module 20 is at a disabled level.

[0049] For example, the control module 10 is further configured to detect a short-circuit to power failure at the drive output terminal Vout based on the signal received by the first interface P1, and when it is determined that there is a short-circuit to power failure at the drive output terminal Vout, control the first interface P1 to output a first enable control signal at an enable level.

[0050] Specifically, according to the above principle, after the first interface P1 switches from the output state to the input state, the control module 10 can detect the signal at the control terminal of the logic operation module 20. Since the signal at the control terminal of the logic operation module 20 is affected by the feedback signal, the control module 20 can detect the feedback signal based on the signal at the control terminal of the logic operation module 20, thereby detecting the SCB fault at the drive output terminal Vout. When the control module 10 determines that there is an SCB fault at the drive output terminal Vout based on the signal received from the first interface P1, it can control the first interface P1 to output a first enable control signal at a non-enabled level, so that the second enable control signal output by the logic operation module 20 is also at a non-enabled level, thus controlling the drive output module 30 to be in a non-enabled state and stopping the output of the low-side drive signal. Conversely, when the control module 10 determines that there is no SCB fault at the drive output terminal Vout based on the signal received from the first interface P1, it can control the first interface P1 to remain in its current state, so that the second enable control signal output by the logic operation module 20 remains unchanged.

[0051] Based on this, the logic operation module 20 can be equipped with an interlock circuit. That is, when the current detection signal is at a level indicating that there is no SCB fault at the drive output terminal Vout, and the control module 10 controls the first interface P1 to output an enable level (i.e., the first enable control signal is at an enable level), the interlock circuit in the logic operation module 20 will be controlled to output an enable level (i.e., the second enable control signal is at an enable level). After the first enable control signal is output, the first interface P1 switches from the output state to the input state. At this time, the interlock circuit in the logic operation circuit 20 keeps the second enable control signal at an enable level to ensure that the drive module 30 remains in the enabled state and continuously outputs a low-side drive signal until the first interface P1 outputs a non-enabled first enable control signal or the feedback signal is at a level indicating that there is an SCB fault at the drive output terminal Vout. Then, the second enable control signal output by the interlock circuit becomes a non-enabled level. When the feedback signal indicates that there is no SCB fault at the drive output terminal of the drive output module, and the control module 10 controls the first interface P1 to output an inactive level (i.e., the first enable control signal is inactive), then the interlock circuit in the logic operation module 20 controls the interlock circuit in the logic operation module 20 to output an inactive level (i.e., the second enable control signal is enabled). After the first enable control signal is output at an inactive level, the first interface P1 switches from the output state to the input state. At this time, the interlock circuit in the logic operation circuit 20 keeps the second enable control signal at an inactive level to ensure that the drive module 30 remains in an inactive state and stops outputting low-side drive signals, or outputs low-side drive signals with zero or close to zero voltage, until the first interface P1 outputs the first enable control signal at an enabled level. Then, the interlock circuit in the logic operation circuit 20 makes the second enable control signal become enabled.

[0052] The input terminal of the signal acquisition module 40 can be electrically connected to the detection terminal of the drive output module 30. The detection terminal can be the output terminal of the drive output module 30, or other nodes in the drive output module 30 that can reflect the current or voltage status of the drive output terminal Vout. The position of the detection terminal is related to the circuit structure of the drive output module 30 and can be set according to the circuit structure of the drive output module 30. This embodiment of the invention does not specifically limit this. It can be understood that when the load connected to the drive output terminal Vout has an SCB fault (i.e., the drive output terminal Vout has an SCB fault), the current flowing through the drive output terminal Vout increases, which leads to an increase in the current flowing through the detection terminal, causing the voltage at the current detection terminal to increase. This allows the signal detection module 30 to output a corresponding feedback signal to the logic operation module 40 based on the voltage at the detection terminal. This allows the logic operation module 20 to control the second enable control signal based on the feedback signal. Furthermore, during the process of the drive output module 30 outputting the low-side drive signal, the control module 10 can detect the SCB fault status of the drive output terminal Vout based on the feedback signal.

[0053] The low-side driving circuit provided in this embodiment of the invention acquires the input control signal and the actual voltage of the drive output terminal through a control module. This allows the control module to detect short-circuit to ground faults and open-circuit faults at the drive output terminal based on the actual voltage. Upon determining a short-circuit to ground fault or an open-circuit fault at the drive output terminal, the control module sets the first enable control signal output from the first interface to a disabled level and stops outputting the drive control signal. By setting the logic operation module to enable the second enable control signal when the first enable control signal is at an enabled level and the feedback signal indicates that there is no short-circuit to power fault at the drive output terminal, the circuit... The overdrive output module outputs a low-side drive signal based on the drive control signal and the second enable control signal. It also collects the detection voltage of the drive output module through the signal acquisition module and outputs a feedback signal to the feedback input terminal of the logic operation module based on the detection voltage. This ensures that the drive output module is always in an disabled state when there is a short circuit to ground, short circuit to power supply, or open circuit fault at the drive output terminal of the low-side drive circuit. It will not repeatedly switch between the enabled and disabled states, thus avoiding damage to the electronic components of the drive output module due to overcurrent or overvoltage. This improves the reliability of the low-side drive circuit and extends its service life.

[0054] Optional, Figure 3 This is a schematic diagram of another low-side driving circuit provided in an embodiment of the present invention, as shown below. Figure 3As shown, the logic operation module 20 includes a first diode D1, a second diode D2, a first transistor T1, a second transistor T2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The cathode of the first diode D1 is electrically connected to the output terminal of the signal detection module 40, and the anode of the first diode D1 is electrically connected to the first interface P1 of the control module 10, the anode of the second diode D2, and the first terminal of the first resistor R1. The control electrode of the first transistor T1 is electrically connected to the cathode of the second diode D2 through the second resistor R2. The first electrode of the first transistor T1 is electrically connected to the first terminal of the third resistor R1 and the control electrode of the second transistor T2. The second electrode of the first transistor T1 is electrically connected to the ground terminal GND. The first electrode of the second transistor T2 and the second terminal of the third resistor R3 are both electrically connected to the first voltage terminal V1. The second electrode of the second transistor T2, the second terminal of the first resistor R1, and the enable terminal of the drive output module 30 are electrically connected to the first node a1. The fourth resistor R4 and the fifth resistor R5 are connected in series between the first node a1 and the ground terminal GND.

[0055] In this transistor, the first transistor T1 can be an N-type transistor, and the second transistor T2 can be a P-type transistor. The first transistor T1 can be configured with its first electrode as the collector, its second electrode as the emitter, and its control electrode as the base, and the second transistor T2 can be configured with its first electrode as the emitter, its second electrode as the collector, and its control electrode as the base. Therefore, the enable level of the first transistor T1 is high, and the enable level of the second transistor T2 is low.

[0056] Specifically, based on the above circuit, the enable level of the first enable control signal and the second control signal can be set to high level, and the disable level can be set to low level (voltage less than or equal to 0V). Furthermore, the feedback signal can be set to high level when there is no SCB fault at the drive output terminal Vout, and low level when an SCB fault exists. When both the first enable control signal and the feedback signal are high level, the first diode D1 is cut off, and the second diode D2 is turned on. The high level of the first enable control signal is transmitted sequentially through the second diode D2 to the base of the first transistor T1, causing the first transistor T1 to turn on. The base of the second transistor T2 is then connected to the ground terminal GND through the first transistor T1, causing the second transistor T2 to turn on. The first voltage signal provided by the first voltage terminal V1 is then transmitted through the first transistor T1, and after being divided by the fourth resistor R4 and the fifth resistor R5, to the enable terminal of the drive output module 30, causing the second enable control signal output by the logic operation module 20 to be high level, thereby controlling the drive output module 30 to be in the enabled state. At the same time, the first voltage signal is also transmitted to the anode of the first diode D1 and the anode of the second diode D2 through the first resistor R1. Thus, after the first interface P1 completes the output of the first enable control signal at the enable level and switches to the input state, the anode of the second diode D2 can always be kept at a high level, thereby keeping the first transistor T1 and the second transistor T2 in the on state.

[0057] When the first enable control signal is low and the feedback signal is high, both the first diode D1 and the second diode D2 are cut off, and the first transistor T1 is turned off. This makes the base voltage of the second transistor T1 the voltage provided by the first voltage terminal V1, that is, the base of the second transistor T1 is high, which makes the second transistor T2 turn off. Then the enable terminal of the drive output module 30 is connected to the ground terminal GND in sequence through the fourth resistor R4 and the fifth resistor R5, so that the second enable control signal provided to the drive output module 30 is low, thereby the drive output module 30 is in a disabled state and stops outputting the low-side drive signal.

[0058] When an SCB fault exists at the drive output Vout, causing the feedback signal to be low, if the first enable control signal is high, the cathode of the first diode D1 is equivalent to ground, causing the first diode D1 to conduct, and the anode voltage of the first diode D1 is clamped to be equal to the forward voltage of the first diode D1. This can be viewed as the second diode D2, the second resistor R2, and the first transistor T1 being connected in series between the anode of the first diode D1 and the ground terminal GND. This is equivalent to the first diode D1 being connected in parallel with the second diode D2, the second resistor R2, and the first transistor T1. The sum of the voltages of the second diode D2 and the second resistor R2 is equal to the forward voltage drop of the first diode D1, making it impossible for the base voltages of the second diode D2 and the first transistor T1 to reach their respective forward thresholds. The second diode D2 is turned off and the first transistor T1 is turned off. As a result, the base potential of the second transistor T1 is pulled high, and the second transistor T2 is turned off. This allows the enable terminal (i.e., the first node a1) of the drive output module 30 to be connected to the ground terminal GND through the fourth resistor R4 and the fifth resistor R5 connected in series. In other words, the second enable control signal is non-level. Furthermore, after the first interface P1 switches to the input state, the second diode D2 remains in the off state, and both the first transistor T1 and the second transistor T2 remain in the off state, keeping the second enable control signal at a low level. This ensures that after an SCB fault occurs, the drive output module 30 remains in an disabled state and will not respond to the drive control signal, thus stopping the output of the low-side drive signal. However, if an SCB fault exists at the drive output terminal Vout, causing the feedback signal to be low, and the first enable control signal is low, then both the anode and cathode of the first diode D1 are low, and the first diode D1 is off. Based on the same principle, the second diode D2 is off, and the first transistor T1 is in the off state, keeping the second enable control signal low. After the first interface P1 switches to the input state, the states of each device remain unchanged, and the second enable control signal remains low. This ability to keep the drive output module 30 in a disabled state even when an SCB fault exists at the drive output terminal Vout effectively prevents the devices in the drive output module 30 from continuing to operate under SCB conditions, thus avoiding overcurrent or overvoltage damage.

[0059] Optional, Figure 4 This is a schematic diagram of another low-side driving circuit provided in an embodiment of the present invention, as shown below. Figure 4As shown, the logic operation module 20 also includes a third diode D3; the anode of the third diode D3 is electrically connected to the first node a1, and the cathode of the third diode D3 is electrically connected to the cathode of the first diode D1. Therefore, when the second enable control signal is high, if an SCB fault occurs at the drive output terminal Vout, causing the feedback signal to be low, the third diode D3 can be turned on. This allows the potential of the first node a1 to be pulled low through the third diode D3, enabling timely control of the drive output module 30 to switch to a disabled state when an SCB fault occurs. This further prevents overcurrent or overvoltage damage to the devices in the drive output module 30.

[0060] Optional, continue to refer to Figure 4 The logic operation circuit 20 also includes a fourth diode D4; the anode of the fourth diode D4 is electrically connected to the first node a1, the cathode of the fourth diode D4 is electrically connected to the anode of the first diode D1, and the cathode of the fourth diode D4 is electrically connected to the ground terminal GNG through the fifth resistor R5. Thus, when the second enable control signal is high, and the first enable control signal outputs a disabled level, the fourth diode D4 can be turned on. This allows the potential of the first node a1 to be pulled down to a low level in a timely manner through the fourth diode D4. This enables the drive output module 30 to switch to a disabled state in a timely manner in response to an SCG or OL fault, or in response to the input control signal Vin, thereby improving the response speed of the drive output module 30.

[0061] For example, the low-side drive circuit also includes a thirteenth resistor R13, which is electrically connected between the first interface P1 and the anode of the first diode D1 for current limiting.

[0062] Optional, see reference Figure 3 or Figure 4 The drive output module 30 includes a pre-drive chip 31, a third transistor T3, a fifth diode D5, a fifth resistor R5, and a sixth resistor R6. The drive terminal of the pre-drive chip 31 is electrically connected to the drive control output terminal VCO of the control module 10, the enable terminal of the pre-drive chip is electrically connected to the output terminal of the logic operation module 20, and the output terminal of the pre-drive chip 31 is electrically connected to the control electrode of the third transistor T3 through the fifth resistor R5. The first electrode of the third transistor T3 is electrically connected to the anode of the fifth diode D5 and the drive output terminal Vout, and the cathode of the fifth diode D5 is electrically connected to the second voltage terminal V2. The second electrode of the third transistor T3 is electrically connected to the first terminal of the sixth resistor R6 and the input terminal of the signal detection module 40, and the second terminal of the sixth resistor R6 is electrically connected to the ground terminal GND. The seventh resistor R7 is electrically connected between the first voltage terminal V1 and the drive output terminal Vout. The eighth resistor R8 is electrically connected between the drive output terminal Vout and the ground terminal GND.

[0063] Specifically, the fifth diode D5 is a freewheeling diode. When the second enable control signal is at the enable level, the pre-driver chip 31 is in the enabled state and can output a corresponding signal according to the drive control signal received by the drive terminal. When the signal output by the pre-driver chip 31 controls the third transistor T3 to turn on, the fifth diode D5 turns on, so that the second power supply terminal V2 is connected to the ground terminal GND through the fifth diode D5, the third transistor T3 and the sixth resistor R6. Then the voltage of the first terminal of the third transistor T3 is the low-side drive signal, which is approximately the voltage provided by the second voltage terminal V2. When the signal output by the pre-driver chip 31 controls the third transistor T3 to turn off, the second power supply terminal V2 is disconnected from the ground terminal GND. At this time, the first voltage signal of the first voltage terminal V1 is provided to the drive output terminal Vout after being divided by the seventh resistor R7 and the eighth resistor R8. That is, the voltage of the drive output terminal Vout is r8×v1 / (r7+r8). Where r7 is the resistance value of the seventh resistor R7, r8 is the resistance value of the eighth resistor R8, and v1 is the voltage value of the first voltage signal. In this embodiment, the voltage provided by the second voltage terminal V2 can be set to be greater than the voltage provided by the first voltage terminal V1, and there can be a large difference between the two. In an exemplary embodiment, the voltage provided by the second voltage terminal V2 can be set to 24V and the voltage provided by the first voltage terminal V1 can be set to 5V. Then, the voltage after being divided by the seventh resistor R7 and the eighth resistor R8 is smaller than the first voltage signal and will not affect the magnitude of the low-side drive signal.

[0064] refer to Figure 1When Q01 remains off, the Output is in a floating state, resulting in a zero voltage at the Output terminal, or a non-zero voltage due to the influence of air charge. This can easily lead to confusion in the diagnosis of SCG and OL faults, resulting in incorrect fault diagnosis. This embodiment of the invention connects the drive output terminal Vout to the first voltage terminal V1 via the seventh resistor R7 and to the ground terminal GND via the eighth resistor R8. This ensures that when the third transistor T3 is off, if the connection between the drive output terminal Vout and the load terminal is normal and without fault, the voltage at the drive output terminal Vout is related to the load connection. When an SCB fault exists at the drive output terminal Vout, a higher voltage is output to the detection input terminal DIN of the control module 10. When an SCG fault exists at the drive output terminal Vout, a voltage equal to or close to 0V is output to the detection input terminal DIN of the control module 10. When an OL fault exists at the drive output terminal Vout, a stable voltage, i.e., r8×v1 / (r7+r8), is output to the detection input terminal DIN of the control module 10. This allows the control module 10 to detect the fault status and type of the drive output terminal Vout based on the voltage at the drive output terminal Vout when the third transistor T3 is off, thus improving the accuracy of fault detection results. Similarly, when the third transistor T3 is on, if the connection between the drive output terminal Vout and the load terminal is normal and fault-free, the voltage at the drive output terminal Vout will be the voltage provided by the second voltage terminal V2 or close to the voltage at the second voltage terminal V2. When there is an SCB fault at the drive output terminal Vout, a higher voltage (usually greater than the voltage at the second voltage terminal V2) is output to the detection input terminal DIN of the control module 10. When there is an SCG fault at the drive output terminal Vout, a voltage equal to or close to 0V is output to the detection input terminal DIN of the control module 10. This allows the control module 10 to detect whether there is an SCB or SCG fault at the drive output terminal Vout based on the voltage at the drive output terminal Vout when the third transistor T3 is on, thus improving the accuracy of fault detection results.

[0065] When the third transistor T3 is turned on, if an SCB fault occurs at the drive output terminal Vout, the voltage at the drive output terminal Vout will be pulled high, which will increase the current flowing through the third transistor T3 and the sixth resistor R6, thereby increasing the detection voltage provided to the signal detection module 40. This will enable the signal detection module 40 to output a low-level feedback signal in response to the detection voltage.

[0066] For example, the third transistor T3 can be an NMOS transistor, in which case the control electrode can be set to the gate, the first electrode to the drain, and the second electrode to the source.

[0067] Optionally, the signal detection circuit 40 includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a fourth transistor T4; the first end of the tenth resistor R10 is electrically connected to the detection terminal of the drive output module 30, the second end of the tenth resistor R10 is electrically connected to the first end of the eleventh resistor R11 and the control electrode of the fourth transistor T4, and the second end of the eleventh resistor R11 is electrically connected to the ground terminal GND; the first electrode of the fourth transistor T4 is electrically connected to the first end of the twelfth resistor R12 and the feedback input terminal of the logic operation module 20, the second end of the twelfth resistor R12 is electrically connected to the first voltage terminal V1, and the second end of the fourth transistor T4 is electrically connected to the ground terminal GND.

[0068] Specifically, the fourth transistor T4 can be an N-type transistor, and its first terminal can be the collector, second terminal the emitter, and control terminal the base. The first terminal of the tenth resistor R10 can be electrically connected to the first terminal (i.e., the detection terminal) of the sixth resistor R6 in the drive output module 30, and the connection node can be assumed to be the second node a2. The tenth resistor R10 and the eleventh resistor R11 are used to divide the voltage supplied to the base of the fourth transistor T4. When the voltage at the second node a2 is large, the base voltage of the fourth transistor T4 is pulled high, causing the fourth transistor T4 to conduct, and the first terminal of the fourth transistor T4 is connected to the ground terminal GND, making the feedback signal output to the logic operation module 20 low level; when the voltage at the second node a2 is small, the base voltage of the fourth transistor T4 is small, causing the fourth transistor T4 to turn off, and the first terminal of the fourth transistor T4 is connected to the first voltage terminal V1 through the twelfth resistor R12, making the feedback signal output to the logic operation module 20 high level. When the third transistor T3 is turned on, the voltage across the sixth resistor R6 can be detected when an SCB fault occurs at the drive output Vout. In response to the detected voltage, a corresponding feedback signal is output to the logic operation module 20, so that the feedback signal provided to the logic operation module 20 is low when an SCB fault occurs, and high when there is no SCB fault.

[0069] Optional, continue to refer to Figure 3 or Figure 4 The low-side drive circuit also includes a ninth resistor R9; the ninth resistor R9 is electrically connected between the drive output terminal Vout and the detection input terminal IN of the control module 10. The ninth resistor R9 is used to limit the current of the voltage detection signal transmitted from the drive output terminal Vout to the control module 10.

[0070] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A low-side driving circuit, characterized in that, include: Control module, logic operation module, drive output module, and signal detection module; The control module receives an input control signal at its signal input terminal, and its detection input terminal is electrically connected to the drive output terminal of the low-side drive circuit. The control module's first interface is electrically connected to the control terminal of the logic operation module, and its drive control output terminal is electrically connected to the drive terminal of the drive output module. The control module is used to control the first interface to output a first enable control signal based on the input control signal and the actual voltage of the drive output terminal, and after controlling the first interface to output the first enable control signal, to switch the first interface to an input state. The control module is also used to control the drive control output terminal to output a drive control signal. The control terminal of the logic operation module is electrically connected to the first interface, the feedback input terminal of the logic operation module is electrically connected to the output terminal of the signal detection module, the output terminal of the logic operation module is electrically connected to the enable terminal of the drive output module, and the input terminal of the signal detection module is electrically connected to the detection terminal of the drive output module; the logic operation module is used to output a second enable control signal according to the first enable control signal and the feedback signal provided by the signal detection module. The output terminal of the drive output module is electrically connected to the drive output terminal of the low-side drive circuit; the drive output module is used to output a low-side drive signal according to the second enable control signal and the drive control signal. The signal detection module is used to output the feedback signal to the feedback input terminal of the logic operation module based on the detection voltage of the detection terminal of the drive output module.

2. The low-side driving circuit according to claim 1, characterized in that, The logic operation module includes a first diode, a second diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor; The cathode of the first diode is electrically connected to the output terminal of the signal detection module, and the anode of the first diode is electrically connected to the first interface of the control module, the anode of the second diode, and the first terminal of the first resistor. The control electrode of the first transistor is electrically connected to the cathode of the second diode through the second resistor; the first electrode of the first transistor is electrically connected to the first terminal of the third resistor and the control electrode of the second transistor; and the second electrode of the first transistor is electrically connected to the ground terminal. The first terminal of the second transistor and the second terminal of the third resistor are both electrically connected to the first voltage terminal, and the second terminal of the second transistor, the second terminal of the first resistor, and the enable terminal of the drive output module are electrically connected to the first node; The fourth resistor and the fifth resistor are connected in series between the first node and the grounding terminal.

3. The low-side driving circuit according to claim 2, characterized in that, The logic operation module also includes a third diode; The anode of the third diode is electrically connected to the first node, and the cathode of the third diode is electrically connected to the cathode of the first diode.

4. The low-side driving circuit according to claim 2, characterized in that, The logic operation circuit also includes a fourth diode; The anode of the fourth diode is electrically connected to the first node, the cathode of the fourth diode is electrically connected to the anode of the first diode, and the cathode of the fourth diode is electrically connected to the ground terminal through the fifth resistor.

5. The low-side driving circuit according to claim 1, characterized in that, The drive output module includes a pre-drive chip, a third transistor, a fifth diode, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor; The driving terminal of the pre-drive chip is electrically connected to the driving control output terminal of the control module, the enabling terminal of the pre-drive chip is electrically connected to the output terminal of the logic operation module, and the output terminal of the pre-drive chip is electrically connected to the control electrode of the third transistor through the fifth resistor. The first terminal of the third transistor is electrically connected to the anode of the fifth diode and the drive output terminal, and the cathode of the fifth diode is electrically connected to the second voltage terminal; the second terminal of the third transistor is electrically connected to the first terminal of the sixth resistor and the input terminal of the signal detection module, and the second terminal of the sixth resistor is electrically connected to the ground terminal. The seventh resistor is electrically connected between the first voltage terminal and the drive output terminal; The eighth resistor is electrically connected between the drive output terminal and the ground terminal.

6. The low-side driving circuit according to claim 1, characterized in that, Also includes: Ninth resistor; The ninth resistor is electrically connected between the drive output terminal and the detection input terminal of the control module.

7. The low-side driving circuit according to claim 1, characterized in that, The signal detection circuit includes a tenth resistor, an eleventh resistor, a twelfth resistor, and a fourth transistor; The first end of the tenth resistor is electrically connected to the detection end of the drive output module, the second end of the tenth resistor is electrically connected to the first end of the eleventh resistor and the control electrode of the fourth transistor, and the second end of the eleventh resistor is electrically connected to the ground end. The first terminal of the fourth transistor is electrically connected to the first terminal of the twelfth resistor and the feedback input terminal of the logic operation module, the second terminal of the twelfth resistor is electrically connected to the first voltage terminal, and the second terminal of the fourth transistor is electrically connected to the ground terminal.

8. The low-side driving circuit according to claim 1, characterized in that, Also includes: The thirteenth resistor; The thirteenth resistor is electrically connected between the first interface and the control terminal of the logic operation module.

9. The low-side driving circuit according to claim 1, characterized in that, The control module is also used to detect the fault condition of the drive output terminal based on the actual voltage of the drive output terminal, and when it is determined that there is a short circuit to ground fault or an open circuit fault at the drive output terminal, control the first interface to output the first enable control signal at a non-enable level.

10. The low-side driving circuit according to claim 1, characterized in that, The control module is further configured to detect a short-circuit to power supply fault at the drive output terminal based on the signal received by the first interface, and when it is determined that the short-circuit to power supply fault exists at the drive output terminal, control the first interface to output a first enable control signal at an enable level.

Images