BMS slave automatic addressing method

Abstract

The invention relates to a BMS slave automatic addressing method and device, electronic equipment and a storage medium. The method comprises the following steps: when a host starts to perform address allocation for a slave, the host controls an output control line of the host to enable, and the host sends an allocation broadcast instruction of an address 1 through a CAN communication line; after an output control line of the host is enabled, a first slave input control line connected with the output control line of the host detects an effective level, a first slave receives an allocation broadcast instruction of an address 1 through a CAN communication line, and the first slave input control line detects the effective level, the address 1 is allocated and stored; the first slave sends a message responding to the configured address 1 to the host through the CAN communication line; and after the host receives the message of the first slave configured with the address 1 through the CAN communication line, the control of the output control line of the host is eliminated, so that the state of the output control line of the host is changed from enabling to forbidding. The hardware cost is saved, the expandability is good, and the stability is high.

Description

A method for automatic addressing of BMS slave devices Technical Field

[0001] This disclosure relates to the field of distributed BMS control systems, and more specifically, to a method, apparatus, electronic device, and computer-readable storage medium for automatic addressing of BMS slave devices. Background Technology

[0002] A distributed BMS control system is an advanced architecture that modularizes battery management functions and distributes them to various battery modules or cell units. Each unit is equipped with an independent slave control module (BMU) for voltage and temperature acquisition and equalization control. It then works in conjunction with the central master control unit (BCU) through a high-speed bus (such as CAN or daisy-chain communication) to achieve state estimation, fault diagnosis, and energy management. Compared with traditional centralized solutions, it has higher scalability, reliability (single point failure does not affect the whole) and sampling accuracy, while simplifying the wiring complexity of high-voltage systems. It is particularly suitable for high-capacity, high-voltage power battery pack applications.

[0003] When setting up a distributed BMS control system, it is necessary to configure the slave device addresses. Currently, common methods for configuring slave device addresses include:

[0004] Detection via DIP switch physical module: Each slave board is assigned multiple address detection ports, which are connected to the DIP switch. The slave board address value is obtained by identifying the level state of the DIP switch module. This generally requires 4 GPIO ports and can only support a maximum of 16 slave boards, which consumes a lot of GPIO port resources. In addition, the DIP switches are costly and prone to damage. Setting the address of each slave board individually through the host computer saves IO port resources, but when there are many slave boards, the operation is cumbersome, and the replacement of slave board positions is easy to get confused, requiring reconfiguration, which is time-consuming and labor-intensive.

[0005] Therefore, one or more methods are needed to solve the above problems.

[0006] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0007] The purpose of this disclosure is to provide a method, apparatus, electronic device, and computer-readable storage medium for automatic addressing of BMS slave devices, thereby overcoming, at least to some extent, one or more problems caused by limitations and defects in related technologies.

[0008] According to one aspect of this disclosure, a method for automatic addressing of a BMS slave is provided, comprising:

[0009] When the master starts assigning addresses to the slave, the master controls the master's output control line to enable, and the master sends an address 1 assignment broadcast command through the CAN communication line;

[0010] After the output control line of the host is enabled, the input control line of the first slave connected to the output control line of the host detects a valid level. The first slave receives the allocation broadcast command of address 1 through the CAN communication line, and the input control line of the first slave has detected a valid level. Then, the address 1 is allocated and saved. The first slave sends a message responding to the configured address 1 to the host through the CAN communication line.

[0011] After the master receives the message from the first slave device configured with address 1 via the CAN communication line, it clears the control over the master's output control line, changing the status of the master's output control line from enabled to disabled.

[0012] In one exemplary embodiment of this disclosure, the method further includes:

[0013] After the master completes the address allocation to the first slave, the master enables the output control line of the first slave through the CAN communication line, and sends the address 2 allocation broadcast command through the CAN communication line.

[0014] After the output control line of the first slave is enabled, the input control line of the second slave connected to the output control line of the first slave detects a valid level. The second slave receives the address 2 allocation broadcast command through the CAN communication line, and the input control line of the second slave has detected a valid level. Then, the address 2 is allocated and saved. The second slave sends a message responding to the configured address 2 to the master through the CAN communication line.

[0015] After the master receives the message from the second slave with the configured address 2 via the CAN communication line, it clears the control over the output control line of the first slave via the CAN communication line, changing the state of the output control line of the first slave from enabled to disabled.

[0016] In one exemplary embodiment of this disclosure, the method further includes:

[0017] After the master completes the address allocation to the (N-1)th slave, the master enables the output control line of the (N-1)th slave through the CAN communication line, and sends the address N allocation broadcast command through the CAN communication line.

[0018] After the output control line of the (N-1)th slave is enabled, the input control line of the Nth slave connected to the output control line of the (N-1)th slave detects a valid level. The Nth slave receives the address N allocation broadcast command through the CAN communication line, and the input control line of the Nth slave has detected a valid level. Then, the address N is allocated and saved, and the Nth slave sends a message to the master indicating that the address N has been configured through the CAN communication line.

[0019] After the master receives the message from the Nth slave device with the configured address N via the CAN communication line, it clears the control over the output control line of the (N-1)th slave device via the CAN communication line, changing the state of the output control line of the (N-1)th slave device from enabled to disabled.

[0020] N is the serial number of the slave device connected in series with the master.

[0021] In one exemplary embodiment of this disclosure, the method further includes:

[0022] The output control line of the master unit is connected in series with the input control line of the first slave unit;

[0023] The output control line of the first slave device is connected in series with the input control line of the second slave device;

[0024] The output control line of the (N-1)th slave device is connected in series with the input control line of the Nth slave device;

[0025] N is the serial number of the slave device connected in series with the master.

[0026] In one exemplary embodiment of this disclosure, the method further includes:

[0027] The master unit establishes communication connections with all slave units via the CAN communication line.

[0028] In one exemplary embodiment of this disclosure, the method further includes:

[0029] Before the master starts assigning addresses to the slaves, the master sends an assignment broadcast command via the CAN communication line to clear the control of all slave output control lines, thus setting the status of all slave output control lines to disabled.

[0030] In one exemplary embodiment of this disclosure, the method further includes:

[0031] If the master does not receive the configured address N message after sending the address N allocation broadcast command via the CAN communication line for a preset time, the slave configuration process will end.

[0032] N is the serial number of the slave device connected in series with the master.

[0033] In one aspect of this disclosure, an apparatus for automatic addressing of BMS slave devices is provided, comprising:

[0034] The master allocation module is used to enable the output control line of the master when the master starts to allocate addresses to the slave. The master sends the allocation broadcast command for address 1 through the CAN communication line.

[0035] The slave response module is used to, after the output control line of the master is enabled, detect a valid level on the input control line of the first slave connected to the output control line of the master, receive the allocation broadcast command of address 1 through the CAN communication line, and the input control line of the first slave has detected a valid level, then allocate and save the address 1, and send a message responding to the configured address 1 to the master through the CAN communication line.

[0036] The host feedback module is used to clear the control of the host's output control line after the host receives the message of the first slave device configured with address 1 via the CAN communication line, so that the status of the host's output control line changes from enabled to disabled.

[0037] In one aspect of this disclosure, an electronic device is provided, comprising:

[0038] Processor; and

[0039] A memory storing computer-readable instructions that, when executed by the processor, implement the method according to any one of the preceding claims.

[0040] In one aspect of this disclosure, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method according to any one of the preceding claims.

[0041] An exemplary embodiment of this disclosure provides a method for automatic addressing of a BMS slave device. The method includes: when the master device begins address allocation for the slave device, the master device enables its output control line and sends an address allocation broadcast command for address 1 via a CAN communication line; after the master device's output control line is enabled, a valid level is detected on the first slave device's input control line connected to the master device's output control line; the first slave device receives the address allocation broadcast command for address 1 via the CAN communication line, and since a valid level has been detected on the first slave device's input control line, address 1 is allocated and saved; the first slave device sends a message indicating that address 1 has been configured to the master device via the CAN communication line; after receiving the message indicating that address 1 has been configured to the first slave device via the CAN communication line, the master device clears its control over the master device's output control line, changing the state of the master device's output control line from enabled to disabled. This disclosure saves hardware costs and offers good scalability and high stability.

[0042] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0043] The above and other features and advantages of this disclosure will become more apparent from the detailed description of exemplary embodiments thereof with reference to the accompanying drawings.

[0044] Figure 1 shows a flowchart of a method for automatic addressing of a BMS slave according to an exemplary embodiment of the present disclosure;

[0045] Figure 2 shows a logical structure diagram of a method for automatic addressing of a BMS slave according to an exemplary embodiment of the present disclosure;

[0046] Figure 3 shows a slave automatic addressing control flowchart of a BMS slave automatic addressing method according to an exemplary embodiment of the present disclosure;

[0047] Figure 4 shows a schematic block diagram of an apparatus for automatic addressing of BMS slaves according to an exemplary embodiment of the present disclosure;

[0048] Figure 5 schematically illustrates a block diagram of an electronic device according to an exemplary embodiment of the present disclosure;

[0049] Figure 6 schematically illustrates a computer-readable storage medium according to an exemplary embodiment of the present disclosure. Detailed Implementation

[0050] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0051] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced without one or more of the specific details described, or other methods, components, materials, apparatuses, steps, etc., can be employed. In other instances, well-known structures, methods, apparatuses, implementations, materials, or operations are not shown or described in detail to avoid obscuring various aspects of this disclosure.

[0052] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, or in one or more software-hardened modules, or in different network and / or processor devices and / or microcontroller devices.

[0053] In this example embodiment, a method for automatic addressing of a BMS slave is first provided; referring to Figure 1, this method for automatic addressing of a BMS slave may include the following steps:

[0054] In step S110, when the master starts to allocate addresses to the slave, the master controls the output control line of the master to enable, and the master sends an address 1 allocation broadcast command through the CAN communication line.

[0055] Step S120: After the output control line of the host is enabled, the input control line of the first slave connected to the output control line of the host detects a valid level. The first slave receives the allocation broadcast command of address 1 through the CAN communication line, and the input control line of the first slave has detected a valid level. Then, the address 1 is allocated and saved. The first slave sends a message responding to the configured address 1 to the host through the CAN communication line.

[0056] In step S130, after the host receives the message from the first slave device configured with address 1 via the CAN communication line, it clears the control over the host's output control line, changing the status of the host's output control line from enabled to disabled.

[0057] An exemplary embodiment of this disclosure provides a method for automatic addressing of a BMS slave device. The method includes: when the master device begins address allocation for the slave device, the master device enables its output control line and sends an address allocation broadcast command for address 1 via a CAN communication line; after the master device's output control line is enabled, a valid level is detected on the first slave device's input control line connected to the master device's output control line; the first slave device receives the address allocation broadcast command for address 1 via the CAN communication line, and since a valid level has been detected on the first slave device's input control line, address 1 is allocated and saved; the first slave device sends a message indicating that address 1 has been configured to the master device via the CAN communication line; after receiving the message indicating that address 1 has been configured to the first slave device via the CAN communication line, the master device clears its control over the master device's output control line, changing the state of the master device's output control line from enabled to disabled. This disclosure saves hardware costs and offers good scalability and high stability.

[0058] The following will further explain a method for automatic addressing of BMS slave devices in this example embodiment.

[0059] Example 1:

[0060] In this example embodiment, the proper nouns are described as follows:

[0061] BMS: Battery Management System. A distributed BMS system consists of one BCU and several BMUs.

[0062] BMU: Battery Management Unit, whose main function is to collect the individual cell voltage and temperature of the battery and transmit them to the BCU via CAN communication;

[0063] BCU: Battery Control Unit, is the control center of the system. It collects battery voltage and temperature data from the board BMU, as well as total voltage, current, and insulation values. It enables external communication and charge / discharge control, while also monitoring the status of the battery pack and estimating its charge capacity and health.

[0064] CAN: Controller Area Network, a bus-based communication system consisting of CAN H and CAN L;

[0065] GPIO: General Purpose Input / Output Port, is a general-purpose pin on an integrated circuit used for output control or input detection.

[0066] In step S110, when the host starts to assign an address to the slave, the host controls the host's output control line to enable, and the host sends an address 1 assignment broadcast command through the CAN communication line.

[0067] In step S120, after the output control line of the host is enabled, the input control line of the first slave connected to the output control line of the host detects a valid level. The first slave receives the allocation broadcast command of address 1 through the CAN communication line, and the input control line of the first slave has detected a valid level. Then, the address 1 is allocated and saved, and the first slave sends a message responding to the configured address 1 to the host through the CAN communication line.

[0068] In step S130, after the host receives the message from the first slave device configured with address 1 via the CAN communication line, it can clear the control of the host's output control line, changing the state of the host's output control line from enabled to disabled.

[0069] In this example embodiment, the method further includes:

[0070] After the master completes the address allocation to the first slave, the master enables the output control line of the first slave through the CAN communication line, and sends the address 2 allocation broadcast command through the CAN communication line.

[0071] After the output control line of the first slave is enabled, the input control line of the second slave connected to the output control line of the first slave detects a valid level. The second slave receives the address 2 allocation broadcast command through the CAN communication line, and the input control line of the second slave has detected a valid level. Then, the address 2 is allocated and saved. The second slave sends a message responding to the configured address 2 to the master through the CAN communication line.

[0072] After the master receives the message from the second slave with the configured address 2 via the CAN communication line, it clears the control over the output control line of the first slave via the CAN communication line, changing the state of the output control line of the first slave from enabled to disabled.

[0073] In this example embodiment, the method further includes:

[0074] After the master completes the address allocation to the (N-1)th slave, the master enables the output control line of the (N-1)th slave through the CAN communication line, and sends the address N allocation broadcast command through the CAN communication line.

[0075] After the output control line of the (N-1)th slave is enabled, the input control line of the Nth slave connected to the output control line of the (N-1)th slave detects a valid level. The Nth slave receives the address N allocation broadcast command through the CAN communication line, and the input control line of the Nth slave has detected a valid level. Then, the address N is allocated and saved, and the Nth slave sends a message to the master indicating that the address N has been configured through the CAN communication line.

[0076] After the master receives the message from the Nth slave device with the configured address N via the CAN communication line, it clears the control over the output control line of the (N-1)th slave device via the CAN communication line, changing the state of the output control line of the (N-1)th slave device from enabled to disabled.

[0077] N is the serial number of the slave device connected in series with the master.

[0078] In this example embodiment, the method further includes:

[0079] The output control line of the master unit is connected in series with the input control line of the first slave unit;

[0080] The output control line of the first slave device is connected in series with the input control line of the second slave device;

[0081] The output control line of the (N-1)th slave device is connected in series with the input control line of the Nth slave device;

[0082] N is the serial number of the slave device connected in series with the master.

[0083] In this example embodiment, the method further includes:

[0084] The master unit establishes communication connections with all slave units via the CAN communication line.

[0085] In this example embodiment, the method further includes:

[0086] Before the master starts assigning addresses to the slaves, the master sends an assignment broadcast command via the CAN communication line to clear the control of all slave output control lines, thus setting the status of all slave output control lines to disabled.

[0087] In this example embodiment, the method further includes:

[0088] If the master does not receive the configured address N message after sending the address N allocation broadcast command via the CAN communication line for a preset time, the slave configuration process will end.

[0089] N is the serial number of the slave device connected in series with the master.

[0090] In this example embodiment, the automatic addressing method for BMS slave devices of the present invention only requires setting up a slave addressing control port on the main control board (BCU) and setting up an address detection port and an addressing control port for the next slave device on each slave board (BMU). The main control board (BCU) and multiple slave board (BMU) are cascaded together via address control detection lines. Utilizing the existing internal CAN bus (through which the BCU and BMU transmit and receive data), automatic addressing commands are issued. After installation, slave addresses are encoded from nearest to farthest in line sequence and stored in memory. This not only saves resources on GPIO detection ports and reduces the cost of physical address modules, but also eliminates the limitation on the number of expansion slave boards. One-click addressing makes operation convenient, and the settings are saved even after power failure. It only needs to be set once during packaging, saving time and effort.

[0091] In one optional embodiment, the host sets a preset timeout for receiving response messages for each target address. If the host does not receive a response message carrying the corresponding address within the preset timeout, it considers the current address allocation process to have malfunctioned. At this point, the host can terminate the current round of address allocation and record the abnormal information internally, or report the abnormal status to the host computer via the CAN communication line, so that maintenance personnel can troubleshoot the problem. This timeout handling mechanism can prevent the entire addressing process from being blocked for a long time due to a single slave device failure, improving the robustness of system operation.

[0092] In the cascaded connection method described above, only one slave device's input control line is active at any given time. For example, when allocating the first address, only the first slave device's input control line IP_IN1 is high, while the input control lines of the other slave devices are inactive. After configuring the first slave device's address and updating its control line status, only the second slave device's input control line is active, and so on. Since only slave devices with active input control lines can receive and respond to the address allocation broadcast command sent by the master device, each round of broadcast commands will only be processed and the address configuration completed by one slave device, thus ensuring the uniqueness and reliability of address allocation for each slave device.

[0093] Example 2:

[0094] In this example embodiment, the logical system structure upon which the present invention is based is shown in Figure 2. A master control board (BCU) and multiple slave control boards (BMUs) are on the same CAN bus. The IP_OUT1 of the master control board (BCU) is connected to the IP_IN1 of the first slave BMU, and the IP_OUT of the first slave BMU is connected to the IP_IN of the next slave, and so on. The master control board controls IP_OUT1 to enable the ID_IN1 of slave BMU1 to detect a valid signal. Starting from the second slave, the IP_IN of the next slave is detected as valid through the output of the IP_OUT of the previous slave. Following the line sequence, once the address of the previous slave is configured, the next slave becomes valid. During address allocation, only one slave's IP_IN can detect a valid level. At this time, the master control board sends an address allocation command through the CAN bus. Only the slave that detects a valid level can be allocated an address.

[0095] In this example embodiment, the address allocation control flow of the present invention is shown in Figure 3. Before addressing starts, all IP_OUTs are disabled and all IP_INs are invalid. After addressing starts, the master control board BCU enables IP_OUT1 output, and only the IP_IN1 of slave 1 detects a valid level. The master control board BCU starts sending the address 1 allocation broadcast command. Only when the slave's IP_IN is valid will the address allocation be saved, and the configured message will be sent to the main board BCU. After receiving the allocated message, the main board BCU clears the IP_OUT control of slave 1 and sends a command to the slave BMU1 that has just completed address allocation to enable the output of the next IP_OUT. After successful output, the corresponding... Once the IP_IN of the next connected slave device is detected as valid, it begins receiving the incremental address allocation broadcast command sent by the main board BCU. The slave device with a valid IP_IN signal will receive the command, configure the address, and respond with a configuration completion message. After receiving the configuration completion response message from the slave device with the currently configured address, the main board BCU sends a message to the previous configured slave device to clear its control over ID_OUT. After clearing, the main board BCU sends a message to the most recently configured slave device to enable the output of the next ID_OUT, making the IP_IN of the next connected slave device that has not yet been assigned an address valid and starting the address allocation process. This process is repeated until all slave device addresses are configured.

[0096] In this example embodiment, compared with other existing technologies, the present invention automatically assigns slave addresses through "one-click addressing" of the host computer software. After the address is set successfully, it can be saved even after power failure, without the need for repeated addressing. The operation is convenient and fast. Each slave only needs two detection ports, which is not limited by the number of slave boards. Compared with physical IP detection, it saves GPIO resources and hardware costs, and has good scalability and high stability. It is very suitable for multiple slave board modules of high voltage platform.

[0097] It should be noted that although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.

[0098] Furthermore, in this example embodiment, an apparatus for automatic addressing of BMS slave devices is also provided. Referring to FIG4, the apparatus 400 for automatic addressing of BMS slave devices may include: a master allocation module 410, a slave response module 420, and a master feedback module 430. Wherein:

[0099] The master allocation module 410 is used to enable the output control line of the master when the master starts to allocate addresses to the slave, and the master sends the allocation broadcast command of address 1 through the CAN communication line.

[0100] The slave response module 420 is used to, after the output control line of the master is enabled, detect a valid level on the input control line of the first slave connected to the output control line of the master, receive the allocation broadcast command of address 1 through the CAN communication line, and the input control line of the first slave has detected a valid level, then allocate and save the address 1, and send a message responding to the configured address 1 to the master through the CAN communication line.

[0101] The host feedback module 430 is used to clear the control of the host's output control line after the host receives the message of the first slave device configured with address 1 through the CAN communication line, so that the status of the host's output control line changes from enabled to disabled.

[0102] The specific details of each of the above-mentioned BMS slave automatic addressing device modules have been described in detail in the corresponding BMS slave automatic addressing method, so they will not be repeated here.

[0103] It should be noted that although several modules or units of a BMS slave automatic addressing device 400 are mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0104] Furthermore, in an exemplary embodiment of this disclosure, an electronic device capable of implementing the above-described method is also provided.

[0105] Those skilled in the art will understand that various aspects of the present invention can be implemented as systems, methods, or program products. Therefore, various aspects of the present invention can be specifically implemented as entirely hardware embodiments, entirely software embodiments (including firmware, microcode, etc.), or embodiments combining hardware and software aspects, collectively referred to herein as “circuit,” “module,” or “system.”

[0106] The electronic device 500 according to this embodiment of the present invention will now be described with reference to FIG5. The electronic device 500 shown in FIG5 is merely an example and should not be construed as limiting the functionality and scope of use of the embodiments of the present invention.

[0107] As shown in Figure 5, the electronic device 500 is presented in the form of a general-purpose computing device. The components of the electronic device 500 may include, but are not limited to: at least one processing unit 510, at least one storage unit 520, a bus 530 connecting different system components (including storage unit 520 and processing unit 510), and a display unit 540.

[0108] The storage unit stores program code that can be executed by the processing unit 510, causing the processing unit 510 to perform the steps described in the "Exemplary Methods" section of this specification according to various exemplary embodiments of the present invention. For example, the processing unit 510 can perform steps S110 to S130 as shown in FIG1.

[0109] Storage unit 520 may include a readable medium in the form of a volatile storage unit, such as random access memory (RAM) 5201 and / or cache memory 5202, and may further include a read-only memory (ROM) 5203.

[0110] Storage unit 520 may also include a program / utility 5204 having a set (at least one) program module 5205, such program module 5205 including but not limited to: operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0111] Bus 530 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0112] Electronic device 500 can also communicate with one or more external devices 570 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 500, and / or with any device that enables electronic device 500 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 550. Furthermore, electronic device 500 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 560. As shown, network adapter 560 communicates with other modules of electronic device 500 via bus 530. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 500, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0113] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, terminal device, or network device, etc.) to execute the methods according to the embodiments of this disclosure.

[0114] In exemplary embodiments of this disclosure, a computer-readable storage medium is also provided, on which a program product capable of implementing the methods described above is stored. In some possible embodiments, various aspects of the invention may also be implemented as a program product comprising program code that, when the program product is run on a terminal device, causes the terminal device to perform the steps of the various exemplary embodiments of the invention described in the "Exemplary Methods" section above.

[0115] Referring to FIG6, a program product 600 for implementing the above-described method according to an embodiment of the present invention is described. This product may employ a portable compact disc read-only memory (CD-ROM) and include program code, and may run on a terminal device, such as a personal computer. However, the program product of the present invention is not limited thereto. In this document, the readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0116] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0117] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of sending, propagating, or transmitting programs for use by or in conjunction with an instruction execution system, apparatus, or device.

[0118] The program code contained on the readable medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0119] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0120] Furthermore, the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0121] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

[0122] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A method for automatic addressing of BMS slave devices, characterized in that, The method includes: when the host starts assigning addresses to the slave, the host enables its output control line and sends an address 1 assignment broadcast command via the CAN communication line; after the host's output control line is enabled, the input control line of the first slave connected to the host's output control line detects a valid level, the first slave receives the address 1 assignment broadcast command via the CAN communication line, and the first slave's input control line has detected a valid level, then the address 1 is assigned and saved, and the first slave sends a message indicating that address 1 has been configured to the host via the CAN communication line; after the host receives the message indicating that address 1 has been configured to the first slave via the CAN communication line, it clears the control over the host's output control line, changing the state of the host's output control line from enabled to disabled.

2. The method as described in claim 1, characterized in that, The method further includes: after the host completes the address allocation to the first slave device, the host enables the output control line of the first slave device through the CAN communication line, and sends an address 2 allocation broadcast command through the CAN communication line; after the output control line of the first slave device is enabled, the input control line of the second slave device connected to the output control line of the first slave device detects a valid level, the second slave device receives the address 2 allocation broadcast command through the CAN communication line, and the input control line of the second slave device has detected a valid level, then the address 2 is allocated and saved, and the second slave device sends a message responding to the configured address 2 to the host through the CAN communication line; after the host receives the message of the configured address 2 from the second slave device through the CAN communication line, it clears the control of the output control line of the first slave device through the CAN communication line, so that the state of the output control line of the first slave device changes from enabled to disabled.

3. The method as described in claim 1, characterized in that, The method further includes: after the host completes the address allocation for the (N-1)th slave device, the host enables the output control line of the (N-1)th slave device via the CAN communication line, and sends an address N allocation broadcast command via the CAN communication line; after the output control line of the (N-1)th slave device is enabled, the input control line of the Nth slave device connected to the output control line of the (N-1)th slave device detects a valid level, the Nth slave device receives the address N allocation broadcast command via the CAN communication line, and the input control line of the Nth slave device has detected a valid level, then the address N is allocated and saved, and the Nth slave device sends a message responding to the configured address N to the host via the CAN communication line; after the host receives the message from the Nth slave device that the address N has been configured via the CAN communication line, it clears the control of the output control line of the (N-1)th slave device via the CAN communication line, so that the state of the output control line of the (N-1)th slave device changes from enabled to disabled; N is the serial number of the slave device connected in series with the host.

4. The method as described in claim 1, characterized in that, The method further includes: the output control line of the host is connected in series with the input control line of the first slave; the output control line of the first slave is connected in series with the input control line of the second slave; the output control line of the (N-1)th slave is connected in series with the input control line of the Nth slave; N is the serial number of the slave connected in series with the host.

5. The method as described in claim 1, characterized in that, The method further includes: the host establishing a communication connection with all slave devices via a CAN communication line.

6. The method as described in claim 1, characterized in that, The method further includes: before the host starts assigning addresses to the slave devices, the host sends an allocation broadcast command via the CAN communication line to clear the control of all slave device output control lines, thereby setting the status of all slave device output control lines to disabled.

7. The method as described in claim 1, characterized in that, The method further includes: if the host does not receive a message with the configured address N after sending the address N allocation broadcast command through the CAN communication line for a preset time period, the slave configuration process is terminated; N is the sequence number of the slave connected in series with the host.

8. A device for automatic addressing of BMS slave devices, characterized in that, The device includes: a master allocation module, used to enable the master's output control line and send an address allocation broadcast command for address 1 via a CAN communication line when the master starts allocating addresses to the slave; a slave response module, used to, after the master's output control line is enabled, detect a valid level on the input control line of the first slave connected to the master's output control line, receive the address 1 allocation broadcast command via a CAN communication line, and save the address 1 allocation, and send a message indicating that address 1 has been configured to the master via a CAN communication line; and a master feedback module, used to, after the master receives the message indicating that address 1 has been configured to the first slave via a CAN communication line, clear the control over the master's output control line, changing the state of the master's output control line from enabled to disabled.

9. An electronic device, characterized in that, The method includes a processor; and a memory storing computer-readable instructions that, when executed by the processor, implement the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the method according to any one of claims 1 to 7.

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